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Mark B. Rosenbluth patents

Recent bibliographic sampling of Mark B. Rosenbluth patents listed/published in the public domain by the USPTO (USPTO Patent Application #,Title):



03/19/15 - 20150081976 - Caching for heterogeneous processors
A multi-core processor providing heterogeneous processor cores and a shared cache is presented....
Inventors: Frank T. Hady, Mason B. Cabot, John Beck, Mark B. Rosenbluth (Intel Corporation)

10/17/13 - 20130275681 - Caching for heterogeneous processors
A multi-core processor providing heterogeneous processor cores and a shared cache is presented....
Inventors: Frank T. Hady, Mason B. Cabot, John Beck, Mark B. Rosenbluth

05/23/13 - 20130132683 - Pci express enhancements and extensions
A method and apparatus forenhancing/extending a serial point-to-point interconnect architecture, such as Peripheral Component Interconnect Express (PCIe) is herein described. Temporal and locality caching hints and prefetching hints are provided to improve system wide caching and prefetching. Message codes for atomic operations to arbitrate ownership between system devices/resources are included...
Inventors: Jasmin Ajanovic, Mahesh Wagh, Prashant Sethi, Debendra Das Sharma, David J. Harriman, Mark B. Rosenbluth, Ajay V. Bhatt, Peter Barry, Scott Dion Rodgers, Anil Vasudevan, Sridhar Muthrasanallur, James Akiyama, Robert G. Blankenship, Ohad Falik, Avi Mendelson, Ilan Pardo, Eran Tamari, Eliezer Weissmann, Doron Shamia

05/23/13 - 20130132636 - Pci express enhancements and extensions
A method and apparatus for enhancing/extending a serial point-to-point interconnect architecture, such as Peripheral Component Interconnect Express (PCIe) is herein described. Temporal and locality caching hints and prefetching hints are provided to improve system wide caching and prefetching. Message codes for atomic operations to arbitrate ownership between system devices/resources are...
Inventors: Jasmin Ajanovic, Mahesh Wagh, Prashant Sethi, Debendra Das Sharma, David J. Harriman, Mark B. Rosenbluth, Ajay V. Bhatt, Peter Barry, Scott Dion Rodgers, Anil Vasudevan, Sridhar Muthrasanallur, James Akiyama, Robert G. Blankenship, Ohad Falik, Avi Mendelson, Ilan Pardo, Eran Tamari, Eliezer Weissmann, Doron Shamia

05/23/13 - 20130132622 - Pci express enhancements and extensions
A method and apparatus forenhancing/extending a serial point-to-point interconnect architecture, such as Peripheral Component Interconnect Express (PCIe) is herein described. Temporal and locality caching hints and prefetching hints are provided to improve system wide caching and prefetching. Message codes for atomic operations to arbitrate ownership between system devices/resources are included...
Inventors: Jasmin Ajanovic, Mahesh Wagh, Prashant Sethi, Debendra Das Sharma, David J. Harriman, Mark B. Rosenbluth, Ajay V. Bhatt, Peter Barry, Scott Dion Rodgers, Anil Vasudevan, Sridhar Muthrasanallur, James Akiyama, Robert G. Blankenship, Ohad Falik, Avi Mendelson, Ilan Pardo, Eran Tamari, Eliezer Weissmann, Doron Shamia

05/02/13 - 20130111086 - Pci express enhancements and extensions
A method and apparatus for enhancing/extending a serial point-to-point interconnect architecture, such as Peripheral Component Interconnect Express (PCIe) is herein described. Temporal and locality caching hints and prefetching hints are provided to improve system wide caching and prefetching. Message codes for atomic operations to arbitrate ownership between system devices/resources are...
Inventors: Jasmin Ajanovic, Mahesh Wagh, Prashant Sethi, Debendra Das Sharma, David J. Harriman, Mark B. Rosenbluth, Ajay V. Bhatt, Peter Barry, Scott Dion Rodgers, Anil Vasudevan, Sridhar Muthrasanallur, James Akiyama, Robert G. Blankenship, Ohad Falik, Avi Mendelson, Ilan Pardo, Eran Tamari, Eliezer Weissmann, Doron Shamia

04/18/13 - 20130097353 - Pci express enhancements and extensions
A method and apparatus for enhancing/extending a serial point-to-point interconnect architecture, such as Peripheral Component Interconnect Express (PCIe) is herein described. Temporal and locality caching hints and prefetching hints are provided to improve system wide caching and prefetching. Message codes for atomic operations to arbitrate ownership between system devices/resources are...
Inventors: Jasmin Ajanovic, Mahesh Wagh, Prashant Sethi, Debendra Das Sharma, David J. Harriman, Mark B. Rosenbluth, Ajay V. Bhatt, Peter Barry, Scott Dion Rodgers, Anil Vasudevan, Sridhar Muthrasanallur, James Akiyama, Robert G. Blankenship, Ohad Falik, Avi Mendelson, Ilan Pardo, Eran Tamari, Eliezer Weissmann, Doron Shamia

04/11/13 - 20130091317 - Pci express enhancements and extensions
A method and apparatus for enhancing/extending a serial point-to-point interconnect architecture, such as Peripheral Component Interconnect Express (PCIe) is herein described. Temporal and locality caching hints and prefetching hints are provided to improve system wide caching and prefetching. Message codes for atomic operations to arbitrate ownership between system devices/resources are...
Inventors: Jasmin Ajanovic, Mahesh Wagh, Prashant Sethi, Debendra Das Sharma, David J. Harriman, Mark B. Rosenbluth, Ajay V. Bhatt, Peter Barry, Scott Dion Rodgers, Anil Vasudevan, Sridhar Muthrasanallur, James Akiyama, Robert G. Blankenship, Ohad Falik, Avi Mendelson, Ilan Pardo, Eran Tamari, Eliezer Weissmann, Doron Shamia

08/23/12 - 20120215984 - Heterogeneous processors sharing a common cache
A multi-core processor providing heterogeneous processor cores and a shared cache is presented....
Inventors: Frank T. Hady, Mason B. Cabot, John Beck, Mark B. Rosenbluth

05/12/11 - 20110113197 - Queue arrays in network devices
A queue descriptor including a head pointer pointing to the first element in a queue and a tail pointer pointing to the last element in the queue is stored in memory. In response to a command to perform an enqueue or dequeue operation with respect to the queue, fetching from...
Inventors: Gilbert Wolrich, Mark B. Rosenbluth, Debra Bernstein (Intel Corporation)

01/14/10 - 20100011167 - Heterogeneous processors sharing a common cache
A multi-core processor providing heterogeneous processor cores and a shared cache is presented....
Inventors: Frank T. Hady, Mason B. Cabot, John Beck, Mark B. Rosenbluth

07/16/09 - 20090182989 - Multithreaded microprocessor with register allocation based on number of active threads
A mechanism in a multithreaded processor to allocate resources based on configuration information indicating how many threads are in use....
Inventors: Mark B. Rosenbluth, Gilbert Wolrich, Debra Bernstein (Intel Corporation)

05/07/09 - 20090119671 - Registers for data transfers
A system and method for employing registers for data transfer in multiple hardware contexts and programming engines to facilitate high performance data processing. The system and method includes a processor that includes programming engines with registers for transferring data from one of the registers residing in an executing programming engine...
Inventors: Gilbert Wolrich, Mark B. Rosenbluth, Debra Bernstein, Matthew Adiletta, Hugh M. Wilkinson, Iii (Intel Corporation)

Intel Corporation

Archived*
(*May have duplicates - we are upgrading our archive.)

20120215984 - Heterogeneous processors sharing a common cache


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The bibliographic references displayed about Mark B. Rosenbluth's patents are for a recent sample of Mark B. Rosenbluth's publicly published patent applications. The inventor/author may have additional bibliographic citations listed at the USPTO.gov. FreshPatents.com is not associated or affiliated in any way with the author/inventor or the United States Patent/Trademark Office but is providing this non-comprehensive sample listing for educational and research purposes using public bibliographic data published and disseminated from the United States Patent/Trademark Office public datafeed. This information is also available for free on the USPTO.gov website. If Mark B. Rosenbluth filed recent patent applications under another name, spelling or location then those applications could be listed on an alternate page. If no bibliographic references are listed here, it is possible there are no recent filings or there is a technical issue with the listing--in that case, we recommend doing a search on the USPTO.gov website.

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