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Macronix C/o Haynes Beffel & Wolfeld LLP patentsThe following is a sampling of recent Macronix C/o Haynes Beffel & Wolfeld LLP patent applications (USPTO Patent Application #, Patent Title) sorted by month.
April 2008 - Macronix C/o Haynes Beffel & Wolfeld LLP patents
20080094873 - Method and apparatus for non-volatile multi-bit memory
20080094875 - Methods of operating a bistable resistance random access memory with multiple memory layers and multilevel memory states
20080094885 - Bistable resistance random access memory structures with multiple memory layers and multilevel memory states
20080094891 - Parallel threshold voltage margin search for mlc memory application
20080096341 - Method for manufacturing a resistor random access memory with reduced active area and reduced contact areas
20080096344 - Method for manufacturing a resistor random access memory with a self-aligned air gap insulator
20080096375 - Method for making memory cell device
20080087942 - Vertical channel memory and manufacturing method thereof and operating method using the same
20080087946 - Vertical channel transistor structure and manufacturing method thereof
March 2008 - Macronix C/o Haynes Beffel & Wolfeld LLP patents
20080067578 - Nonvolatile memory having modified channel region interface
20080061341 - Memory device having wide area phase change element and small electrode contact area
20080057651 - Method of manufacturing non-volatile memory
20080059768 - Method and apparatus for communicating a bit per half clock cycle over at least one pin of an spi bus
February 2008 - Macronix C/o Haynes Beffel & Wolfeld LLP patents
20080050900 - Methods for pitch reduction formation
20080043520 - I-shaped phase change memory cell with thermal isolation
20080031046 - Nonvolatile memory array having modified channel region interface
20080031049 - Operation of nonvolatile memory having modified channel region interface
January 2008 - Macronix C/o Haynes Beffel & Wolfeld LLP patents
20080019172 - Gated diode nonvolatile memory cell array
20080013379 - Method and apparatus for reading data from nonvolatile memory
20080014676 - Method for making a pillar-type phase change memory element
20080006871 - Nonvolatile memory having raised source and drain regions
20080005434 - Method and apparatus for communicating data over multiple pins of a multi-mode bus
December 2007 - Macronix C/o Haynes Beffel & Wolfeld LLP patents
20070296023 - Charge monitoring devices and methods for semiconductor manufacturing
20070297227 - Multi-level cell memory structures with enlarged second bit operation window
20070297240 - Methods and structures for expanding a memory operation window and reducing a second bit effect
20070297241 - Method and structure for operating memory devices on fringes of control gate
20070297243 - Memory structures for expanding a second bit operation window
20070297244 - Top dielectric structures in memory devices and methods for expanding a second bit operation window
20070298535 - Memory cell with memory material insulation and manufacturing method
20070290273 - Operating method of non-volatile memory device
20070284620 - Structure and method of sub-gate and architectures employing bandgap engineered sonos devices
20070285960 - Single-mask phase change memory element
20070278529 - Resistor random access memory cell with l-shaped electrode
20070281420 - Resistor random access memory cell with reduced active area and reduced contact areas
November 2007 - Macronix C/o Haynes Beffel & Wolfeld LLP patents
20070274121 - Multi-level memory cell having phase change element and asymmetrical thermal boundary
20070267687 - Bandgap engineered split gate memory
20070268753 - Methods of operating bandgap engineered memory
20070262388 - Bridge resistance random access memory device and method with a singular contact structure
20070263436 - Method and apparatus to improve nonvolatile memory data retention
20070263437 - Method and apparatus to improve nonvolatile memory data retention
20070257300 - Structures and methods of a bistable resistive random access memory
20070258297 - Method and apparatus for accessing nonvolatile memory with read error by changing read reference
20070258304 - Method and system for preventing noise disturbance in high speed, low power memory
20070253258 - Methods to resolve hard-to-erase condition in charge trapping non-volatile memory
October 2007 - Macronix C/o Haynes Beffel & Wolfeld LLP patents
20070246699 - Phase change memory cell with vacuum spacer
20070241371 - Memory device and manufacturing method
20070236994 - Program and erase methods with substrate transient hot carrier injections in a non-volatile memory
20070230247 - Trapping storage flash memory cell structure with undoped source and drain regions
September 2007 - Macronix C/o Haynes Beffel & Wolfeld LLP patents
20070224726 - Thin film plate phase change ram circuit and manufacturing method
20070215852 - Manufacturing method for pipe-shaped electrode phase change memory
20070218575 - Method and apparatus for electroluminescence
20070211540 - Structures and methods for enhancing erase uniformity in a nitride read-only memory array
August 2007 - Macronix C/o Haynes Beffel & Wolfeld LLP patents
20070201269 - Method and apparatus for protection from over-erasing nonvolatile memory cells
20070187813 - Uv blocking and crack protecting passivation layer
20070189089 - Method and apparatus for implementing high speed memory
20070190806 - Uv blocking and crack protecting passivation layer fabricating method
20070176261 - Vertical side wall active pin structures in a phase change memory and manufacturing methods
July 2007 - Macronix C/o Haynes Beffel & Wolfeld LLP patents
20070171762 - Method and apparatus to control sensing time for nonvolatile memory
20070173019 - Programmable resistive ram and manufacturing method
20070173063 - Self-aligned manufacturing method, and manufacturing method for thin film fuse phase change ram
20070158632 - Method for fabricating a pillar-shaped phase change memory element
20070158633 - Method for forming self-aligned thermal isolation cell for a variable resistance memory array
20070158645 - Self-align planerized bottom electrode phase change memory and manufacturing method
20070158690 - Programmable resistive ram and manufacturing method
20070158741 - Ldmos device and method of fabrication of ldmos device
20070158862 - Vacuum jacketed electrode for phase change memory element
20070159887 - Method and apparatus for programming nonvolatile memory
20070161186 - Programmable resistive ram and manufacturing method
20070154847 - Chalcogenide layer etching method
20070155172 - Manufacturing method for phase change ram with electrode layer process
June 2007 - Macronix C/o Haynes Beffel & Wolfeld LLP patents
20070147105 - Phase change memory cell and manufacturing method
20070138458 - Damascene phase change ram and manufacturing method
20070140010 - Method and apparatus for operating a string of charge trapping memory cells
20070140019 - Method and apparatus for operating a string of charge trapping memory cells
20070131922 - Thin film fuse phase change cell with thermal isolation pad and manufacturing method
20070131980 - Vacuum jacket for phase change memory element
20070131999 - Gated diode nonvolatile memory process
20070133273 - Gated diode nonvolatile memory cell
20070133274 - Gated diode nonvolatile memory cell array
20070133292 - Method for operating gated diode nonvolatile memory cell
20070133307 - Methods to resolve hard-to-erase condition in charge trapping non-volatile memory
20070126040 - Vacuum cell thermal isolation for a phase change memory device
20070128870 - Surface topology improvement method for plug surface areas
May 2007 - Macronix C/o Haynes Beffel & Wolfeld LLP patents
20070121363 - Phase change memory cell and manufacturing method
20070121374 - Phase change memory device and manufacturing method
20070121386 - Multi-level-cell programming methods of non-volatile memories
20070115031 - Differential sense amplifier circuit and method triggered by a clock signal through a switch circuit
20070115737 - Method and apparatus for reading data from nonvolatile memory
20070115794 - Thermal isolation for an active-sidewall phase change memory cell
20070117315 - Memory cell device and manufacturing method
20070117323 - Method for manufacturing a multiple-gate charge trapping non-volatile memory
20070117353 - Method for forming oxide on ono structure
20070108077 - Spacer electrode small pin phase change memory ram and manufacturing method
20070108429 - Pipe shaped phase change memory
20070108430 - Thermally contained/insulated phase change memory device and method (combined)
20070108431 - I-shaped phase change memory cell
20070109836 - Thermally insulated phase change memory device and manufacturing method
20070109843 - Phase change memory device and manufacturing method
20070111429 - Method of manufacturing a pipe shaped phase change memory
20070103991 - Integrated code and data flash memory
April 2007 - Macronix C/o Haynes Beffel & Wolfeld LLP patents
20070094320 - Parallel adder-based dct / idct design using cyclic convolution
20070086255 - Memory device with a plurality of reference cells on a bit line
20070087482 - Method and apparatus for operating nonvolatile memory cells with modified band structure
20070087523 - Recessed shallow trench isolation
20070080378 - Ultraviolet blocking layer
20070081377 - Method and circuit for reading fuse cells in a nonvolatile memory during power-up
20070081393 - Multi-operation mode nonvolatile memory
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This listing is an abstract for educational and research purposes is only meant as a recent sample of applications filed, not a comprehensive history. Freshpatents.com is not affiliated or associated with Macronix C/o Haynes Beffel & Wolfeld LLP in any way and there may be associated servicemarks. This data is also published to the public by the USPTO and available for free on their website. Note that there may be alternative spellings for Macronix C/o Haynes Beffel & Wolfeld LLP with additional patents listed. Browse our Agent directory for other possible listings.
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