| Low power voltage reference circuit -> Monitor Keywords |
|
|
 
Low power voltage reference circuitLow power voltage reference circuit description/claimsThe Patent Description & Claims data below is from USPTO Patent Application 20070241809, Low power voltage reference circuit. Brief Patent Description - Full Patent Description - Patent Application Claims
CLAIM OF PRIORITY UNDER 35 U.S.C. .sctn.119 [0001] The present Application for Patent claims priority to Indian Patent Application No. 395/CHE/2006 filed Mar. 7, 2006, and assigned to the assignee hereof and hereby expressly incorporated by reference herein. [0002] The present Application for Patent claims priority to U.S. Provisional Application No. 60/793,489 entitled "A RESISTOR-LESS BANDGAP REFERENCE FOR MICRO-POWR MEMORIES and LOW-POWER LOW VOLTAGE MOSFET BASED VOLTAGE REFERENCE" filed Apr. 19, 2006, and assigned to the assignee hereof and hereby expressly incorporated by reference herein. BACKGROUND [0003] Conventionally, obtaining a sub-100 nA micro-power voltage reference for micro-power wide voltage range memory applications required very large matched resistors to achieve a low current, bipolar junction transistors (BJT), and an amplifier to generate a proportional to absolute temperature (PTAT) voltage. FIG. 1 illustrates a circuit schematic for a conventional band-gap voltage reference circuit 100. The large resistors (R1 and R2) are not generally suitable as micro-power components. Furthermore, the use of BJTs 102-106 and resistors R1-R2 introduces BJT mismatch and resistor mismatch. [0004] One purpose of a band gap voltage reference is to balance the negative temperature coefficient of a P-N junction with the thermal voltage (V.sub.T, where V.sub.T=KT/q). In FIG. 1, the reference voltage V.sub.bg can be expressed as follows: V.sub.bg=V.sub.eb106+K.sub.1*V.sub.T. (1) The amplifier 108 generates a PTAT voltage across resistor 110 by equalizing nodes A and B. The current through resistor 110 can be expressed as follows: I = .DELTA. .times. .times. V R .times. .times. 1 R .times. .times. 1 = V eb .times. .times. 102 - V eb .times. .times. 104 R .times. .times. 1 = V T .times. ln .function. ( I / I S ) - V T .times. ln .function. ( I I S * K 2 ) R .times. .times. 1 , = V T .times. ln .function. ( K 2 ) R .times. .times. 1 ( 2 ) where the m-factor K.sub.2 is equal to 8. V.sub.bg can alternatively be expressed as: V.sub.bg=V.sub.eb106+I*R2. (3) Upon substituting the expression of I from Equation 2 into Equation 3: V.sub.bg=V.sub.eb106+R2/R1*ln(8)*V.sub.T (4) Thus, it should be clear from Equation 4 that K.sub.1=R2/R1*ln(K.sub.2) (5) Thus, establishing a band-gap reference voltage in the conventional art depended heavily on the values of R1 and R2. [0005] Beta multiplier voltage references have been developed in the past that do not require the use of a BJT. FIG. 2 is a circuit schematic for one such conventional circuit 200 for generating a beta multiplier voltage reference. When MOSFETS 202-208 operate in the sub-threshold region, the relationship between I.sub.DS and V.sub.GS depends strongly on Vt variations with respect to temperature. Thus I.sub.DS at 90.degree. C. would be greater than I.sub.DS at 27.degree. C. On the other hand, when MOSFETS 202-208 operate in the strong inversion region, the relationship between I.sub.DS and V.sub.GS depends strongly on Mobility (u.sub.n) variations with respect to temperature. Thus I.sub.DS at 90.degree. C. would be less than I.sub.DS at 27.degree. C. [0006] FIG. 3 is an I.sub.DS vs. V.sub.GS curve illustrating a MOSFET's transfer characteristic for two different temperatures. The principle behind beta multiplier voltage references is that there exists a temperature-insensitive value of V.sub.GS for a given I.sub.DS. This point is denoted as point CP in FIG. 3. However, the temperature insensitivities of circuits such as circuit 200 strongly depend on MOSFET modeling and do not account for threshold voltage and mobility variations with respect to temperature or the variations in resistance. Consequently, these circuits require a significant amount of on-chip trimming. SUMMARY [0007] Accordingly, embodiments of the present invention eliminate the need for the resistors and the amplifier discussed above and also reduce the number of BJTs required for a voltage reference circuit. Embodiments also help to eliminate excessive dependence on MOSFET models so as to eliminate the need for on-chip trimming. [0008] An embodiment of the present invention is directed to a low power voltage reference circuit. The circuit includes a first circuit for generating a PTAT voltage without use of an operational amplifier. The reference circuit also includes a second circuit for generating the reference voltage. The first and the second circuit are resistor-free, e.g., they do not use resistors. [0009] Another embodiment of the present invention is directed to a circuit for generating a band-gap voltage reference including a first transistor coupled with a first output of a current reference circuit. The first transistor is operable to generate a bias current that is proportional to a reference current of the current reference circuit. The reference current is proportional to a temperature measurement. The novel circuit also includes a diode-connected transistor coupled with the first transistor and a second transistor coupled with said first transistor and said second transistor, wherein said reference voltage is generated at a drain of said diode-connected transistor. The reference voltage is generated at a drain of the diode-connected transistor. [0010] This embodiment of the present invention is capable of achieving a band-gap reference of minimal variation (1.24V+/-20 mV, for instance) across a wafer in the temperature range of -45.degree. C. to 95.degree. C., for instance. The voltage reference is achieved with an ultra low sub-100 nA operating current. This embodiment is applicable for micro-power applications requiring low standby current, for example. [0011] Another embodiment of the present invention is directed to a circuit for generating a low-power, low-voltage voltage reference including a PMOS transistor coupled with an output of a current reference circuit. The current reference circuit generates a reference current that is proportional to a temperature measurement. The novel circuit also includes a diode-connected transistor coupled with the PMOS transistor. The voltage reference is generated at a drain of said diode-connected transistor. [0012] This embodiment has several benefits over conventional voltage reference circuits. For example, the circuit's dependency on MOSFET models has been minimized and depends on Vt modeling. The circuit also has low power requirements (.ltoreq.300 nA of current, for instance). The circuit can also operate at low voltage (up to Vt+300 mV, for instance). Additionally, in one embodiment, the circuit's temperature coefficient is less than 200 ppm/.degree. C. Furthermore, the reference may be adaptive with respect to process. [0013] Thus, embodiments of the present invention are able to advantageously provide a reference voltage without using resistors or amplifiers. As a result, circuit area and operating current are reduced. Moreover, problems associated with resistor matching are eliminated. These advantages translate generally into lower cost and lower power consumption compared to conventional voltage reference circuits. BRIEF DESCRIPTION OF THE DRAWINGS [0014] The accompanying drawings, which are incorporated in and form a part of this specification, illustrate embodiments of the invention and, together with the description, serve to explain the principles of embodiments of the invention: [0015] FIG. 1 shows a circuit schematic of a conventional band-gap voltage reference. [0016] FIG. 2 shows a circuit schematic of a conventional beta multiplier voltage reference. [0017] FIG. 3 is an I.sub.DS vs. V.sub.GS curve, illustrating a temperature insensitive point in a MOSFET's transfer characteristic. [0018] FIG. 4 shows an exemplary circuit schematic of a resistor-less current reference, in accordance with an embodiment of the present invention. [0019] FIG. 5 shows an exemplary circuit schematic of a resistor-less band-gap voltage reference, in accordance with an embodiment of the present invention. [0020] FIG. 6 shows an exemplary circuit schematic of a low power, low voltage MOSFET based voltage reference, in accordance with an embodiment of the present invention. Continue reading about Low power voltage reference circuit... Full patent description for Low power voltage reference circuit Brief Patent Description - Full Patent Description - Patent Application Claims Click on the above for other options relating to this Low power voltage reference circuit patent application. ###  How KEYWORD MONITOR works... a FREE service from FreshPatents1. Sign up (takes 30 seconds). 2. Fill in the keywords to be monitored. 3. Each week you receive an email with patent applications related to your keywords. Start now! - Receive info on patent apps like Low power voltage reference circuit or other areas of interest. ### Previous Patent Application: High voltage pumping device Next Patent Application: Semiconductor device Industry Class: Miscellaneous active electrical nonlinear devices, circuits, and systems ### FreshPatents.com Support Thank you for viewing the Low power voltage reference circuit patent info. IP-related news and info Results in 0.12307 seconds Other interesting Feshpatents.com categories: Canon USA , Celera Genomics , Cephalon, Inc. , Cingular Wireless , Clorox , Colgate-Palmolive , Corning , Cymer , 174 |
 * Protect your Inventions * US Patent Office filing 
PATENT INFO |
|
