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07/12/07 - USPTO Class 257 |  16 views | #20070158710 | Prev - Next | About this Page  257 rss/xml feed  monitor keywords

Low-noise image sensor and transistor for image sensor

USPTO Application #: 20070158710
Title: Low-noise image sensor and transistor for image sensor
Abstract: Provided are a low-noise image sensor capable of improving the efficiency of charge transfer from a photodiode to a diffusion node region and effectively suppressing the generation of dark current, and a transistor for the image sensor. The image sensor includes: a photosensitive pixel having a transfer transistor formed in a structure which causes hole accumulation in a part or all regions of a gate oxide; and a sensing control part applying a negative offset potential to the gate during a part or whole of a turn-off period of the transfer transistor. When the transfer transistor is off, the image sensor may form a sufficient barrier and accumulate electrons in the photodiode, and when the transistor is on, the sensor sufficiently lowers a barrier, fully depletes the photodiode before the transfer transistor reaches a threshold voltage, and inactivates a trap in a predetermined region for a certain time, and thus the dark current can be reduced.
(end of abstract)
Agent: Ladas & Parry LLP - Chicago, IL, US
Inventors: Bong Ki Mheen, Mi Jin Kim, Young Joo Song
USPTO Applicaton #: 20070158710 - Class: 257291000 (USPTO)

Related Patent Categories: Active Solid-state Devices (e.g., Transistors, Solid-state Diodes), Field Effect Device, Having Insulated Electrode (e.g., Mosfet, Mos Diode), Light Responsive Or Combined With Light Responsive Device, Imaging Array
The Patent Description & Claims data below is from USPTO Patent Application 20070158710.
Brief Patent Description - Full Patent Description - Patent Application Claims  monitor keywords

CROSS-REFERENCE TO RELATED APPLICATION

[0001] This application claims priority to and the benefit of Korean Patent Application Nos. 2005-117419, filed Dec. 5, 2005, and 2006-87439, filed Sept. 11, 2006, the disclosures of which are incorporated herein by reference in their entirety.

BACKGROUND

[0002] 1. Field of the Invention

[0003] The present invention relates to a low-noise image sensor and a transistor for the image sensor, and more particularly, to a low-noise image sensor capable of improving the efficiency of charge transfer from a photodiode to a diffusion node region and effectively suppressing the generation of dark current and enhancing well capacity, and a transistor for the image sensor.

[0004] 2. Discussion of Related Art

[0005] Image sensors may be classified into a charge-coupled device (CCD) sensor and a CMOS image sensor, which basically utilize an electron-hole pair separated by light having a higher energy than a silicon bandgap. In image sensors, an amount of irradiated light is generally estimated by collecting electrons or holes.

[0006] Especially, the CMOS image sensors are integrated sensors having a block amplifying or processing signals using active devices, such as MOS or CMOS transistors, in a sensor chip. That is, since the CMOS image sensor has a photodiode and a transistor composed of a common CMOS device in each image pixel, a conventional CMOS process is utilized almost as it is. This allows an image signal processing and detecting unit integrated in an external block of pixel. Thus, the CMOS image sensor may overcome a shortcoming of the CCD that has to have such an image signal processing part in a separate chip, adapt various image sensor structures because of its integrated structure, and provide a method for various subsequent processes.

[0007] One of widely used CMOS image sensor structures is a structure comprising four transistors as illustrated in FIG. 1. In the above structure, a photodiode PD which is a light sensing unit and four NMOS transistors constitute one unit pixel. Among the four NMOS transistors, a transfer transistor Tx serves to transfer a photocharge generated in the photodiode PD to a diffusion node region FD, a reset transistor Rx serves to emit charges stored in the diffusion node region FD for signal detection, a drive transistor Dx serves as a source follower, and a switch transistor Sx serves to switch and address signals.

[0008] When the transfer transistor Tx is turned off and, in this state, light is irradiated onto a surface of the photodiode PD region, holes and electrons are separated, and the holes flow into a connected ground and are removed, and the electrons are accumulated in the photodiode PD region. The transfer transistor Tx functions as a transfer channel transferring the electrons accumulated in the photodiode PD region by light irradiation to a diffusion node 131 when a suitable voltage is applied to a gate 111 of the transfer transistor, and performs a reset function of completely removing electrons from the photodiode PD before the light is irradiated to the photodiode. The diffusion node 131 is formed by diffusion capacitance 114 and gate capacitance of the drive transistor Dx, and a voltage at the node is reset by the reset transistor Rx. That is, the voltage at the diffusion node 131 is reset immediately before the electrons are taken from the photodiode PD, or a reset voltage is applied to the diffusion node 131 to reset the photodiode PD region.

[0009] In order to obtain a two-dimensional image, a voltage is applied to a gate 141 of the switch transistor Sx to select one column. Particularly, one pixel is biased by one current source 150, which operates the drive transistor Dx and the switch transistor Sx so that a voltage value of the diffusion node 131 is read out to an output node 142.

[0010] The major characteristic of the pixel having the above structure is that a light receiving part, i.e., the photodiode PD region and a light-to-voltage conversion part, i.e., the diffusion node 131 are separated from each other, and a ratio of capacitance between the two parts may be used to excellently adjust sensitivity to light. That is, the sensitivity to light can be relatively adjusted by increasing the area of a detector, for example, the photodiode while keeping the capacitance of the diffusion node 131 constant.

[0011] FIG. 2 is a cross-sectional view of a device having a pixel formed in the above structure. Referring to FIG. 2, the photodiode PD region, the transfer transistor Tx, and the diffusion node 131 of the structure of FIG. 1 are shown, and other parts are omitted. The transfer transistor Tx comprises a gate 210, a gate oxide layer 220 and a p-type substrate 260, the photodiode PD region comprises a photodiode doped region 250 and a surface p-doped region 230, and the diffusion node 131 comprises an n+ diffusion node 240.

[0012] As described in U.S. Patent Publication No. 2005/0017155 A1 entitled "Active Pixel Cell using Negative to Positive Voltage Swing Transfer Transistor" by Manabe et al., reduction of a leakage current of the photodiode causing dark current may be accomplished by connecting a surface potential of the diode to a P well or a p-type substrate through a p+ layer. As a result, a surface voltage is forcibly made to be a complete ground potential by maintaining a lower potential than that in a p-doped region of a substrate, thereby eliminating a potential difference and suppressing the generation of the dark current.

[0013] In addition, the photodiode having such a structure needs to accommodate photoelectrons as much as possible in order to increase a size of a photo signal. That is, the number of electrons stored in the photodiode must be maximized. Here, the number of electrons is called well capacity. However, in general, increased capacity of the photodiode results in image lag caused by the incomplete transfer of charges. One of methods for increasing the photodiode capacity is to increase the voltage for complete depletion of photodiode, namely, a pinning voltage. However, this may cause the incomplete transfer of charges.

[0014] As disclosed in IEDM, 1982 by Teranishi et al. (N. Teranishi, A. Kohono, Y. Ishihara, E. Oda, and K. Rai, "No Image Lag Photodiode Structure in the Interline CCD Image Sensor," in IEDM 1982, pp. 324-327), a pinning voltage higher than a gate turn-on voltage makes an operation of a transistor into a sub threshold region, and this results in image lag caused by incomplete reset and transfer process. Though such a noise element has a relatively constant value, as illumination decreases, a signal becomes weaker, and thereby signal vs. noise ratio (SNR) is drastically decreased in relatively low illumination. This results in degradation of image quality. Accordingly, the image lag has to be inhibited to protect degradation of the image quality in low illumination. This phenomenon more easily occurs in a junction profile which is not optimized. However, even if the junction profile is optimized, incomplete reset or incomplete charge depletion in an N well of a pinned photodiode occurs in some conditions, and thereby image lag is caused. As a result, up to recently, a doping condition of a photodiode, and particularly, design and processing conditions of a photodiode and a transfer transistor boundary are considered as crucial design parameters in an image pixel design.

[0015] Particularly, as a power supply voltage is more lowered for a low power operation, such a CMOS process and scaling of a device make these problems worse. The severest problem is incomplete charge depletion in the N well of the photodiode at a low operating voltage, for example, at 2.5V or less. For this reason, the image lag occurs, which results in deterioration of SNR at low illumination. Thus, recent technologies have focused on improving charge accumulation capabilities and developing a method for thoroughly resetting a photodiode in a low voltage operation.

[0016] To be specific, in the case of lowering the power supply voltage by scaling, though the pinned photodiode PPD may be completely depleted at 5V or 3.3V, in the conventional structure, the PDD may not be completely depleted when a rail voltage is 1.8V or 1.3V in a new integrated circuit process. This is because the transfer transistor is turned off before reaching the reset voltage of the photodiode, that is, a pinning voltage, or a reset voltage of the photodiode cannot be raised any more with entering a sub threshold region. Thus, such incomplete reset may be overcome by providing a lower threshold voltage of the transfer transistor, but thereby a well capacity of the PDD is reduced, and sufficient impedance may not be generated when the transfer transistor is turned off, which results in more decrease in the well capacity. In other words, if the threshold voltage of the transfer transistor is lowered in order to thoroughly and rapidly reset or transfer electrons, a sufficient barrier may not be formed when the transfer transistor is turned off, so that the well capacity decreases. On the other hand, if the threshold voltage of the transfer transistor is increased, a sufficient barrier is formed so that the well capacity may largely increase, but in this case, electrons are reset in the sub threshold region and then transferred, which results in incomplete depletion.

[0017] Another conventional art provided to overcome this problem is as follows.

[0018] The suggestion by Teranishi et al. (N. Teranishi, A. Kohono, Y. Ishihara, E. Oda, and K. Rai, "No Image Lag Photodiode Structure in the Interline CCD Image Sensor," In IEDM 1982, pp. 324-327) is for completely depleting a photodiode before a transfer transistor is turned off by lowering a doping concentration of the photodiode. That is, an image lag effect is prevented by lowering the threshold voltage to completely deplete a photodiode before the transfer transistor is operated as a sub threshold region by an increased voltage of the photodiode. In addition, defects on a surface of the photodiode are suppressed as much as possible by implanting p+ into its surface, thereby reducing dark current. Thus, the image lag is suppressed, and deterioration of image quality may be prevented even at low illumination. However, this method cannot be continuously used at a low power supply voltage. This is because the photodiode is lightly doped, making it difficult to further lower a pinning voltage, and a voltage itself applied to the transfer transistor is already too low.

[0019] As still another method to overcome this problem, a method of operating a transfer transistor in a depletion mode by additionally doping a channel of the transfer transistor with an n-type dopant has been disclosed by Manabe in U.S. Patent Publication No. US2005/0017155 A1 entitled "Active Pixel Cell Using Negative to Positive Voltage Swing Transfer Transistor." For example, if a threshold voltage is set as -0.7V, on and off states may be switched by voltage swing from -1.8V to +1.8V. In this method, a negative power source is required, which may be produced from a positive voltage by charge pumping in an integrated circuit. Here, even though a transfer transistor has the same gate voltages, a greater gate overdrive voltage is applied to the transistor by lowering threshold voltage, and thus a barrier between a photodiode and a transfer channel may be stably overcome to completely deplete the photodiode. Moreover, when the transfer transistor is off, holes may be accumulated in the channel, and thus dark current caused by a defect of the channel may be reduced depending on conditions. However, in the suggested structure, well capacity is not improved, and dark current may increase depending on actual realizations.

[0020] The severest problem caused by lowering an operating voltage is that a turn-on voltage of the transfer transistor is not higher enough than a threshold voltage of the transfer transistor, so that a photodiode moves to a sub threshold region before it is fully depleted. If the threshold voltage of the transistor is lowered, this problem may be solved, but if the transfer transistor is off, the transistor does not form a sufficient barrier, and thus a capacity of electrons which can be stored in the photodiode is reduced. As a result, the conventional arts described above cannot be appropriate solutions for overcoming the above problems because they may not improve well capacity and depletion efficiency at the same time.

[0021] Still another cause of dark current is shallow trench isolation (STI). The STI is a technology that is used for isolating devices or circuits from one another. To strengthen isolation performance of the STI, ions are injected into a silicon substrate in a region under a trench. However, the ion implantation into the region under the trench results in high leakage of current, which functions as dark current.

[0022] A method of reducing dark current that is generated in such STI is disclosed by micron (Korean Patent Publication No. 10-2005-0061608, entitled "Isolation Technology for Reducing Dark Current in CMOS Image Sensors"). In general, ions may be injected into a silicon substrate in a region under a trench for isolation in STI. However, as noted in a paper written by S. Nag et al. disclosed in IEEE IEDM, pp. 841-844 (1996), entitled "Comparative Evaluation of Gap-Fill Dielectrics in Shallow Trench Isolation for Sub 0.25 .mu.m Technologies," the ion injection under the trench may cause high leakage of current. In particular, when ions are injected into a substrate adjacent to edges of the trench, current leakage may occur in junctions between active device regions and the trenches.

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