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Browse: A | B | C | D | E | F | G | H | I | J | K | L | M | N | O | P | Q | R | S | T | U | V | W | X | Y | Z | 1 | 3 | Leffert Jay Polglaze, P.A. Attn: Thomas W. Leffert patentsThe following is a sampling of recent Leffert Jay Polglaze, P.A. Attn: Thomas W. Leffert patent applications (USPTO Patent Application #, Patent Title) sorted by month.December 2010 - Leffert Jay Polglaze, P.A. Attn: Thomas W. Leffert patents 20100320523 - Finned memory cells 20100325479 - Program failure recovery 20100308389 - Discrete trap non-volatile multi-functional memory device September 2010 - Leffert Jay Polglaze, P.A. Attn: Thomas W. Leffert patents 20100226175 - Memory devices and methods of writing data to memory devices utilizing analog voltage levels December 2009 - Leffert Jay Polglaze, P.A. Attn: Thomas W. Leffert patents 20090303788 - Methods and apparatus utilizing predicted coupling effect in the programming of non-volatile memory 20090303789 - Dynamically configurable mlc state assignment 20090300269 - Hybrid memory management November 2009 - Leffert Jay Polglaze, P.A. Attn: Thomas W. Leffert patents 20090282232 - Memory device boot command 20090282232 - Memory device boot command July 2009 - Leffert Jay Polglaze, P.A. Attn: Thomas W. Leffert patents 20090191676 - Flash memory having a high-permittivity tunnel dielectric June 2009 - Leffert Jay Polglaze, P.A. Attn: Thomas W. Leffert patents 20090147584 - Nand architecture memory devices and operation January 2009 - Leffert Jay Polglaze, P.A. Attn: Thomas W. Leffert patents 20090027959 - Programming multilevel cell memory arrays 20090014780 - Discrete trap non-volatile multi-functional memory device 20090016143 - Word line activation in memory devices 20090008702 - Dielectric charge-trapping materials having doped metal sites 20090010075 - Nrom memory cell, memory array, related devices and methods October 2008 - Leffert Jay Polglaze, P.A. Attn: Thomas W. Leffert patents 20080263412 - Program failure recovery 20080253187 - Multiple select gate architecture August 2008 - Leffert Jay Polglaze, P.A. Attn: Thomas W. Leffert patents 20080203467 - Nrom flash memory devices on ultrathin silicon 20080195795 - Pipelined burst memory access July 2008 - Leffert Jay Polglaze, P.A. Attn: Thomas W. Leffert patents 20080181014 - Programming a non-volatile memory device 20080183950 - Memory device architectures and operation June 2008 - Leffert Jay Polglaze, P.A. Attn: Thomas W. Leffert patents 20080151638 - Selective threshold voltage verification and compaction 20080130372 - Trench memory structures and operation May 2008 - Leffert Jay Polglaze, P.A. Attn: Thomas W. Leffert patents 20080121970 - Finned memory cells and the fabrication thereof February 2008 - Leffert Jay Polglaze, P.A. Attn: Thomas W. Leffert patents 20080031044 - Memory device architectures and operation January 2008 - Leffert Jay Polglaze, P.A. Attn: Thomas W. Leffert patents 20080016419 - Data compression read mode for memory testing December 2007 - Leffert Jay Polglaze, P.A. Attn: Thomas W. Leffert patents 20070290255 - Source lines for nand memory devices 20070291552 - Runtime flash device detection and configuration for flash data management software 20070294522 - Using chip select to specify boot memory ### This listing is an abstract for educational and research purposes is only meant as a recent sample of applications filed, not a comprehensive history. Freshpatents.com is not affiliated or associated with Leffert Jay Polglaze, P.A. Attn: Thomas W. Leffert in any way and there may be associated servicemarks. This data is also published to the public by the USPTO and available for free on their website. Note that there may be alternative spellings for Leffert Jay Polglaze, P.A. Attn: Thomas W. Leffert with additional patents listed. Browse our Agent directory for other possible listings. ### FreshPatents.com Support - Terms & Conditions |