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Leffert Jay Polglaze, P.A. Attn: Thomas W. Leffert patentsThe following is a sampling of recent Leffert Jay Polglaze, P.A. Attn: Thomas W. Leffert patent applications (USPTO Patent Application #, Patent Title) sorted by month.
February 2008 - Leffert Jay Polglaze, P.A. Attn: Thomas W. Leffert patents
20080031044 - Memory device architectures and operation
January 2008 - Leffert Jay Polglaze, P.A. Attn: Thomas W. Leffert patents
20080016419 - Data compression read mode for memory testing
December 2007 - Leffert Jay Polglaze, P.A. Attn: Thomas W. Leffert patents
20070290255 - Source lines for nand memory devices
20070291552 - Runtime flash device detection and configuration for flash data management software
20070294522 - Using chip select to specify boot memory
November 2007 - Leffert Jay Polglaze, P.A. Attn: Thomas W. Leffert patents
20070275526 - Methods of programming memory cells using manipulation of oxygen vacancies
20070267689 - One-transistor composite-gate memory
October 2007 - Leffert Jay Polglaze, P.A. Attn: Thomas W. Leffert patents
20070247908 - Read operation for nand memory
20070245071 - Random access interface in a serial memory device
September 2007 - Leffert Jay Polglaze, P.A. Attn: Thomas W. Leffert patents
20070206420 - Mode selection in a flash memory device
August 2007 - Leffert Jay Polglaze, P.A. Attn: Thomas W. Leffert patents
20070189091 - Noise suppression in memory device sensing
July 2007 - Leffert Jay Polglaze, P.A. Attn: Thomas W. Leffert patents
20070170496 - Nrom flash memory devices on ultrathin silicon
March 2007 - Leffert Jay Polglaze, P.A. Attn: Thomas W. Leffert patents
20070047301 - Multiple select gate architecture
20070047311 - Selective threshold voltage verification and compaction
20070047312 - Operation of multiple select gate architecture
February 2007 - Leffert Jay Polglaze, P.A. Attn: Thomas W. Leffert patents
20070034930 - Discrete trap non-volatile multi-functional memory device
January 2007 - Leffert Jay Polglaze, P.A. Attn: Thomas W. Leffert patents
20070018228 - Non-volatile memory with carbon nanotubes
December 2006 - Leffert Jay Polglaze, P.A. Attn: Thomas W. Leffert patents
20060286747 - Floating-gate structure with dielectric component
November 2006 - Leffert Jay Polglaze, P.A. Attn: Thomas W. Leffert patents
20060261404 - Vertical nrom nand flash memory array
20060256631 - Internal data comparison for memory testing
20060244039 - Metal-poly integrated capacitor structure
September 2006 - Leffert Jay Polglaze, P.A. Attn: Thomas W. Leffert patents
20060208308 - Use of selective epitaxial silicon growth in formation of floating gates
20060203554 - Multi-state memory cell with asymmetric charge trapping
20060203555 - Multi-state memory cell with asymmetric charge trapping
July 2006 - Leffert Jay Polglaze, P.A. Attn: Thomas W. Leffert patents
20060163614 - Multi-layer memory arrays
20060166436 - Forming integrated circuit devices
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This listing is an abstract for educational and research purposes is only meant as a recent sample of applications filed, not a comprehensive history. Freshpatents.com is not affiliated or associated with Leffert Jay Polglaze, P.A. Attn: Thomas W. Leffert in any way and there may be associated servicemarks. This data is also published to the public by the USPTO and available for free on their website. Note that there may be alternative spellings for Leffert Jay Polglaze, P.A. Attn: Thomas W. Leffert with additional patents listed. Browse our Agent directory for other possible listings.
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