|
FREE patent keyword monitoring and additional FREE benefits. |
|
|
Browse: A | B | C | D | E | F | G | H | I | J | K | L | M | N | O | P | Q | R | S | T | U | V | W | X | Y | Z | 1 | 3 | Leffert Jay & Polglaze, P.A. Attn: Daniel J. Polglaze patentsThe following is a sampling of recent Leffert Jay & Polglaze, P.A. Attn: Daniel J. Polglaze patent applications (USPTO Patent Application #, Patent Title) sorted by month.June 2010 - Leffert Jay & Polglaze, P.A. Attn: Daniel J. Polglaze patents 20100146329 - Cell deterioration warning apparatus and method May 2010 - Leffert Jay & Polglaze, P.A. Attn: Daniel J. Polglaze patents 20100128529 - Nand step voltage switching method November 2009 - Leffert Jay & Polglaze, P.A. Attn: Daniel J. Polglaze patents 20090279359 - Nand with back biased operation 20090279359 - Nand with back biased operation July 2009 - Leffert Jay & Polglaze, P.A. Attn: Daniel J. Polglaze patents 20090185415 - Cell operation monitoring May 2009 - Leffert Jay & Polglaze, P.A. Attn: Daniel J. Polglaze patents 20090129152 - Program and read method for mlc April 2009 - Leffert Jay & Polglaze, P.A. Attn: Daniel J. Polglaze patents 20090097311 - Non-equal threshold voltage ranges in mlc nand January 2009 - Leffert Jay & Polglaze, P.A. Attn: Daniel J. Polglaze patents 20090027960 - Cell deterioration warning apparatus and method August 2008 - Leffert Jay & Polglaze, P.A. Attn: Daniel J. Polglaze patents 20080192538 - Architecture and method for nand flash memory March 2008 - Leffert Jay & Polglaze, P.A. Attn: Daniel J. Polglaze patents 20080055969 - Phase change memory 20080055976 - Mem suspended gate non-volatile memory 20080057643 - Memory and method of reducing floating gate coupling January 2008 - Leffert Jay & Polglaze, P.A. Attn: Daniel J. Polglaze patents 20080025097 - Nand flash memory programming December 2007 - Leffert Jay & Polglaze, P.A. Attn: Daniel J. Polglaze patents 20070291565 - Architecture and method for nand flash memory October 2007 - Leffert Jay & Polglaze, P.A. Attn: Daniel J. Polglaze patents 20070247910 - Nand erase block size trimming apparatus and method August 2007 - Leffert Jay & Polglaze, P.A. Attn: Daniel J. Polglaze patents 20070195614 - Level shifter for low voltage operation April 2007 - Leffert Jay & Polglaze, P.A. Attn: Daniel J. Polglaze patents 20070080727 - Startup circuit and method December 2006 - Leffert Jay & Polglaze, P.A. Attn: Daniel J. Polglaze patents 20060285390 - Bitline exclusion in verification operation ### This listing is an abstract for educational and research purposes is only meant as a recent sample of applications filed, not a comprehensive history. Freshpatents.com is not affiliated or associated with Leffert Jay & Polglaze, P.A. Attn: Daniel J. Polglaze in any way and there may be associated servicemarks. This data is also published to the public by the USPTO and available for free on their website. Note that there may be alternative spellings for Leffert Jay & Polglaze, P.A. Attn: Daniel J. Polglaze with additional patents listed. Browse our Agent directory for other possible listings. ### FreshPatents.com Support - Terms & Conditions |