| Integrated system for processing semiconductor wafers -> Monitor Keywords |
|
|
  Integrated system for processing semiconductor wafersUSPTO Application #: 20070004316Title: Integrated system for processing semiconductor wafers Abstract: An integrated process tool for chemical mechanical processing, cleaning and drying a semiconductor workpiece is provided. The integrated process tool includes a CMP module and a cleaning and drying module. After being processed, the workpiece is transported from the CMP module to the cleaning and drying module using a movable housing. In the cleaning and drying module, a cleaning mechanism is used to clean the workpiece while the workpiece is rotated and held by a support stucture of the movable housing. A drying mechanism of the cleaning and drying module picks up the workpiece from the moveable housing and spin dries it. Throughout the CMP process, cleaning and drying, the processed surface of the wafer faces down. (end of abstract)
Agent: Knobbe Martens Olson & Bear LLP - Irvine, CA, US Inventors: Jalal Ashjaee, Boris Govzman, Bernard M. Frey, Boguslaw A. Nagorski, Douglas W. Young, Bulent M. Basol, Homayoun Talieh USPTO Applicaton #: 20070004316 - Class: 451005000 (USPTO) Related Patent Categories: Abrading, Precision Device Or Process - Or With Condition Responsive Control, Computer Controlled The Patent Description & Claims data below is from USPTO Patent Application 20070004316. Brief Patent Description - Full Patent Description - Patent Application Claims
CROSS-REFERENCE TO RELATED APPLICATIONS [0001] This application is a continuation of U.S. application Ser. No. 10/369,118, filed Feb. 18, 2003, which is a continuation in part of U.S. application Ser. No. 09/795,687, filed Feb. 27, 2001, now U.S. Pat. No. 6,953,392, which claims priority from U.S. provisional application Nos. 60/259,676, filed Jan. 5, 2001, and 60/261,263, filed Jan. 16, 2001, all of which are entirely incorporated herein by reference. This application also claims priority by way of U.S. application Ser. No. 10/369,118 to U.S. provisional application Nos. 60/357,148, filed Feb. 15, 2002, and 60/397,740, filed Jul. 20, 2002, all of which are entirely incorporated herein by reference. FIELD OF THE INVENTION [0002] The present invention relates to semiconductor processing technologies and, more particularly, to an integrated system for processing semiconductor wafers. The invention also includes individual process modules for performing specific tasks, for example, a workpiece cleaning and drying module. BACKGROUND OF THE INVENTION [0003] In the semiconductor industry, various processes can be used to deposit and etch materials on wafers. Deposition techniques include processes such as electrochemical deposition (ECD) and electro chemical mechanical deposition (ECMD). In both processes, a conductor is deposited on a semiconductor wafer or workpiece by having electrical current carried through an electrolyte that comes into contact with the surface of the workpiece (cathode). The ECMD process is able to uniformly fill the holes and trenches on the surface of the workpiece with the conductive material while maintaining the planarity of the surface. A more detailed description of the ECMD method and apparatus can be found in the U.S. Pat. No. 6,176,992, entitled "Method and Apparatus For Electro Chemical Mechanical Deposition", commonly owned by the assignee of the present invention. [0004] If a conventional plating process is performed to deposit the conductive material in a deposition chamber, the workpiece may be transferred to another chamber in the cluster tool for chemical mechanical polishing (CMP). As is known, the material removal can also be carried out using electrochemical etching by making the workpiece anodic (positive) with respect to an electrode after completing an ECD or ECMD process. [0005] Regardless of which process is used, the workpiece is next transferred to a rinsing/cleaning station or module after the deposition and/or polishing steps. During the rinsing/cleaning step, various residues generated by the deposition and/or polishing processes are rinsed off the workpiece with a fluid such as de-ionized water or de-ionized water with small amounts of other cleaning and/or passivating agents, and subsequently the workpiece is dried. [0006] Conventionally, processing chambers are designed in multiple processing stations or modules that are arranged in a cluster to form a cluster tool or system. Such cluster tools or systems are often used to process a multiple number of workpieces at the same time. Generally, cluster tools are configured with multiple processing stations or modules and are designed for a specific operation. However, in such conventional cluster tools, deposition and cleaning processing steps both typically require separate chambers. For this reason, in known cluster tools, for a workpiece to be processed and cleaned, it must be moved to another station or system. Thus, such configured systems require picking workpieces from a particular processing environment and placing them into a cleaning environment. The workpiece can be cleaned and dried in a cleaning and a drying module using, for example, a rinse and spin process, as known in the art. [0007] When the workpiece is transferred to the cleaning and drying module, contaminants may have attached themselves on the workpiece surface. The source of these contaminants may be the plating/polishing agent, transferring mechanism, surrounding air, the processing facility, personnel, process chemicals, and the like. The workpiece surface should be free of such contaminants; otherwise, the contaminants may affect device performance characteristics and may cause device failure to occur at faster rates than usual. [0008] The speed of which the workpiece is transferred from one module to the next is also critical. As is well known in the semiconductor industry, the production line for manufacturing the workpiece from beginning to end must be performed in the most efficient manner. SUMMARY OF THE INVENTION [0009] The present invention is directed to a novel cleaning and drying module of the overall cluster tool. The present invention further provides a more cost effective, efficient, contaminant free method and apparatus for cleaning and dying workpieces than those currently available. [0010] In one aspect of the present invention, an apparatus for processing, cleaning and drying a semiconductor workpiece is provided. The apparatus includes a process area to process a surface of the workpiece and a cleaning drying area to clean and dry the workpiece. A movable housing transports the workpiece from the process area to a cleaning and drying area. The movable housing includes a support structure adapted to hold the workpiece. A cleaning mechanism cleans the workpiece while the workpiece is rotated and held by the support structure. A drying mechanism receives the workpiece from the moveable housing for drying the workpiece. The workpiece is held and cleaned and dried while the processed surface of the workpiece faces down. [0011] In another aspect of the present invention, a method for cleaning and drying a workpiece in a process module, that has a cleaning and drying section and a process section, is provided. The method includes placing the workpiece on a movable housing, moving the movable housing into the cleaning and drying section of the process module, cleaning a surface of the workpiece using a cleaning fluid in the cleaning and drying section, transferring the workpiece from the moveable housing to a drying mechanism having a spinning wheel and drying the workpiece. Before the step of placing the workpiece onto the movable housing, the surface of the workpiece is processed in the process section adjacent the cleaning and drying section of the process module prior to the step of placing. BRIEF DESCRIPTION OF THE DRAWINGS [0012] FIG. 1 is a schematic illustration of a system of the present invention including an embodiment of an integrated chemical mechanical process station of the present invention; [0013] FIG. 2 is a schematic illustration of another system of the present invention including the chemical mechanical polishing process station of the present invention; [0014] FIG. 3 is a schematic illustration of another system of the present invention including the chemical mechanical polishing process station and an anneal station of the present invention; [0015] FIG. 4 is a schematic illustration of the chemical mechanical polishing processing station of the present invention; [0016] FIG. 5 is a schematic illustration of a cleaning drying module of the present invention including the cleaning and drying mechanisms according to one embodiment of the present invention; [0017] FIG. 6 is a schematic illustration of a wafer indicating the relative positions of the holding spools and the dryer clamps; [0018] FIG. 7 is a schematic illustration of an embodiment of a wafer release and hold mechanism of the dryer. [0019] FIG. 8 is a schematic illustration of another system of the present invention having a plurality of chemical mechanical polishing stations and anneal stations; Continue reading... Full patent description for Integrated system for processing semiconductor wafers Brief Patent Description - Full Patent Description - Patent Application Claims Click on the above for other options relating to this Integrated system for processing semiconductor wafers patent application. ###  How KEYWORD MONITOR works... a FREE service from FreshPatents1. Sign up (takes 30 seconds). 2. Fill in the keywords to be monitored. 3. Each week you receive an email with patent applications related to your keywords. Start now! - Receive info on patent apps like Integrated system for processing semiconductor wafers or other areas of interest. ### Previous Patent Application: Eyeglass lens processing apparatus Next Patent Application: Free curved surface precision machining tool Industry Class: Abrading ### FreshPatents.com Support Thank you for viewing the Integrated system for processing semiconductor wafers patent info. IP-related news and info Results in 1.6781 seconds Other interesting Feshpatents.com categories: Qualcomm , Schering-Plough , Schlumberger , Seagate , Siemens , Texas Instruments , |
||
