| Integrated parallel power amplifier -> Monitor Keywords |
|
Integrated parallel power amplifierUSPTO Application #: 20070229165Title: Integrated parallel power amplifier Abstract: A parallel power amplifier includes a carrier amplifier and peak amplifier coupled to receive signals from a quadrature hybrid made up of slab inductors in an integrated circuit. The slab inductors may be on different layers in the integrated circuit and may have similar or dissimilar shapes. (end of abstract)
Agent: Lemoine Patent Service, LLC C/o Portfolioip - Minneapolis, MN, US Inventors: Mostafa Elmala, Jeyanandh K. Paramesh USPTO Applicaton #: 20070229165 - Class: 330286000 (USPTO) The Patent Description & Claims data below is from USPTO Patent Application 20070229165. Brief Patent Description - Full Patent Description - Patent Application Claims FIELD [0001] The present invention relates generally to amplifier circuits, and more specifically to parallel amplifier circuits. BACKGROUND [0002] Power amplifiers are a main building block of any transmitter chain. The problems associated with designing power amplifiers are various. These problems include: break down voltages of different transistors, hot carrier effects, losses of choke inductors and matching components, distortions, trade-offs between efficiency and linearity of the amplifier, etc. BRIEF DESCRIPTION OF THE DRAWING [0003] FIG. 1 shows a diagram of a parallel power amplifier circuit; [0004] FIG. 2 shows a parallel power amplifier circuit with slab inductors in accordance with various embodiments of the present invention; [0005] FIGS. 3 and 4 show schematics of amplifier circuits; [0006] FIG. 5 shows an integrated circuit floorplan; [0007] FIG. 6 shows a perspective view of a corner of two coupled slab inductors; [0008] FIG. 7 shows a flowchart in accordance with various embodiments of the present invention; and [0009] FIG. 8 shows a diagram of an electronic system in accordance with various embodiments of the present invention. DESCRIPTION OF EMBODIMENTS [0010] In the following detailed description, reference is made to the accompanying drawings that show, by way of illustration, specific embodiments in which the invention may be practiced. These embodiments are described in sufficient detail to enable those skilled in the art to practice the invention. It is to be understood that the various embodiments of the invention, although different, are not necessarily mutually exclusive. For example, a particular feature, structure, or characteristic described herein in connection with one embodiment may be implemented within other embodiments without departing from the spirit and scope of the invention. In addition, it is to be understood that the location or arrangement of individual elements within each disclosed embodiment may be modified without departing from the spirit and scope of the invention. The following detailed description is, therefore, not to be taken in a limiting sense, and the scope of the present invention is defined only by the appended claims, appropriately interpreted, along with the full range of equivalents to which the claims are entitled. In the drawings, like numerals refer to the same or similar functionality throughout the several views. [0011] FIG. 1 shows a diagram of a parallel power amplifier circuit. Parallel power amplifier circuit 100 includes quadrature hybrid 110, power amplifiers (PA) 120 and 130, impedance transformation circuit 140, and output matching circuit 150. Parallel power amplifier circuit 100 is also shown with resistors 104, 132, and 152. [0012] Parallel power amplifier circuit 100 is an implementation of a high efficiency power amplifier using two separate power amplifiers working in different classes, such as class B and C. Power amplifier 120 operates as a "carrier PA," operating over all input power range, e.g., in class A/B, and power amplifier 130 operates as a "peak PA," operating in class C. In some embodiments, peak PA 130 contributes to the output power only over the upper input power range. For example, peak PA 130 may only contributes to the output power over the upper 6 dB of input power range. Also for example, in some embodiments of the present invention, parallel power amplifier circuit 100 may operate as a "Doherty" power amplifier. Doherty amplifiers are known amplifiers that may include multiple power amplifiers operating in different classes to achieve high efficiency across the upper range of output power. [0013] Quadrature hybrid 110 operates as a coupler to couple the input signal on node 102 to peak PA 130 and carrier PA 120 with a relative phase difference of substantially 90 degrees. For example, the input signal arriving at peak PA 130 may have a phase shift of substantially 90 degrees relative to the input signal arriving at carrier PA 120. Impedance transformation circuit 140 also contributes substantially 90 degrees of phase shift. This phase shift is applied to the carrier amplifier output signal, such that output currents from impedance transformation circuit 140 and peak PA 130 are added in-phase at node 142. Output matching circuit 150 provides an impedance match between node 142 and any load impedance, shown schematically by resistor 152. [0014] In various embodiments of the present invention, power amplifier circuit 100 is integrated onto a single integrated die. In these embodiments, quadrature hybrid 110 may include slab inductors. A "slab inductor" is an inductor manufactured within an integrated circuit and made from non-coiled wires, traces, or conductive regions. For example, a slab inductor may be formed by one or more traces on a metal layer within the integrated circuit. Slab inductors may also be included within carrier PA 120, peak PA 130, impedance transformation circuit 140, and output matching circuit 150. Various embodiments that include slab inductors are described further below with reference to later figures. [0015] Various embodiments of the present invention reduce amplitude-to-phase (AM-to-PM) distortion in parallel power amplifiers by controlling the input capacitance of carrier amplifier 120 and peak amplifier 130. For example, bias points for the power amplifiers may be chosen to modify input capacitance. Also for example, transistor sizes may be specified to control input capacitance. As described further below, input capacitance may be controlled for a first power amplifier can be chosen so that the power amplifier has a phase characteristic that changes in a first direction with increasing input power, and input capacitance for a second power amplifier can be chosen so that the power amplifier has a phase characteristic that changes in a direction opposite the first direction with increasing input power. When output power from both power amplifiers is combined, the phase characteristics combine to reduce phase variation with increasing input power. [0016] FIG. 2 shows a parallel power amplifier circuit with slab inductors in accordance with various embodiments of the present invention. Parallel power amplifier circuit 200 is shown as one side of a differential system. Parallel power amplifier circuit 200 includes driver amplifier 210, carrier amplifier 220, and peak amplifier 230. Parallel power amplifier 200 also includes slab inductors 240, 242, 216, 226, 236, 250, and 260. [0017] Slab inductors 240 and 242 form a quadrature hybrid, such as quadrature hybrid 110 (FIG. 1). In some embodiments, slab inductors 240 and 242 are manufactured on a common layer in an integrated circuit. For example, slab inductors 240 and 242 may be located side-by-side on a common integrated circuit layer to achieve inductive coupling. In other embodiments, slab inductors 240 and 242 are manufactured on separate layers in an integrated circuit. For example, slab inductors 240 and 242 may be located with one on top of the other to achieve inductive coupling. Further, in some embodiments, one or both of slab inductors 240 and 242 may be distributed across more than one integrated circuit layer. For example, slab inductor 240 may be manufactured on one metal layer of an integrated circuit, and slab inductor 242 may be manufactured on multiple layers of the integrated circuit. [0018] In some embodiments, slab inductors 240 and 242 may have similar shapes. For example, in some embodiments, slab inductors 240 and 242 may be located side-by-side with similar shapes on a common integrated circuit layer. Also for example, in some embodiments, slab inductors 240 and 242 may have similar shapes, and may be located with one on top of the other on separate integrated circuit layers. Further, in some embodiments, slab inductors 240 and 242 may have dissimilar shapes. For example, in some embodiments, slab inductors 240 and 242 may be located side-by-side with dissimilar shapes on a common integrated circuit layer. Also for example, in some embodiments, slab inductors 240 and 242 may have dissimilar shapes, and may be located with one on top of the other on separate integrated circuit layers. Various shape/layer combinations for slab inductors are described further below with reference to later figures. [0019] Driver amplifier 210 includes amplifier transistor 212 and cascode transistor 214. Slab inductor 216 is coupled to cascode transistor 214 and operates as a radio frequency (RF) choke. In operation, driver amplifier 210 receives an input signal on node 211 and drives output node 215. As shown in FIG. 2, the output of driver amplifier 210 is capacitively coupled to slab inductor 242 of the quadrature hybrid. [0020] Carrier amplifier 220 includes amplifier transistor 222 and cascode transistor 224. Slab inductor 226 is coupled to cascode transistor 224 and operates as an RF choke. In operation, carrier amplifier 220 receives an input signal on node 241 from the quadrature hybrid, and drives output node 225. As shown in FIG. 2, the output of carrier amplifier 220 is coupled to slab inductor 250 of the impedance transformation circuit. Continue reading... Full patent description for Integrated parallel power amplifier Brief Patent Description - Full Patent Description - Patent Application Claims Click on the above for other options relating to this Integrated parallel power amplifier patent application. ### 1. Sign up (takes 30 seconds). 2. Fill in the keywords to be monitored. 3. Each week you receive an email with patent applications related to your keywords. Start now! - Receive info on patent apps like Integrated parallel power amplifier or other areas of interest. ### Previous Patent Application: Plop noise avoidance for an amplifier Next Patent Application: Buffered cascode current mirror Industry Class: Amplifiers ### FreshPatents.com Support Thank you for viewing the Integrated parallel power amplifier patent info. IP-related news and info Results in 0.60932 seconds Other interesting Feshpatents.com categories: Medical: Surgery , Surgery(2) , Surgery(3) , Drug , Drug(2) , Prosthesis , Dentistry |
||