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Freescale Semiconductor, Inc. Law Department patentsThe following is a sampling of recent Freescale Semiconductor, Inc. Law Department patent applications (USPTO Patent Application #, Patent Title) sorted by month.
April 2008 - Freescale Semiconductor, Inc. Law Department patents
20080094037 - Control apparatus and method of regulating power
20080095142 - Method and apparatus for updating a count value
20080098218 - Secure communication protocol and method therefor
20080087954 - Semiconductor device having nitridated oxide layer and method therefor
20080088340 - Miller capacitance tolerant buffer element
20080088341 - Level shifter circuit
20080090359 - Semiconductor device having a p-mos transistor with source-drain extension counter-doping
20080091989 - System and method for testing memory blocks in an soc design
20080091990 - Controlled reliability in an integrated circuit
20080084235 - Dynamic scannable latch and method of operation
20080085574 - Antifuse one time programmable memory array and method of manufacture
20080085609 - Method for protecting high-topography regions during patterning of low-topography regions
20080086671 - System and method for reducing power consumption in a low-density parity-check (ldpc) decoder
20080079463 - System and method for monitoring clock signal in an integrated circuit
20080080297 - Self-timed memory having common timing control circuit and method therefor
20080082720 - Data processing system having cache memory debugging support and method therefor
20080082843 - Dynamic branch prediction predictor
20080082873 - Minimum memory operating voltage technique
March 2008 - Freescale Semiconductor, Inc. Law Department patents
20080073722 - Circuit for storing information in an integrated circuit and method therefor
20080076221 - Split gate memory cell method
20080077787 - Method and system of executing a software application in highly constrained memory situation
20080067645 - Heat spreader for semiconductor package
20080068061 - Performance variation compensating circuit and method
20080072117 - Programming a memory device having error correction logic
20080061846 - Input circuit for receiving a variable voltage input signal and method
20080054975 - Circuitry for latching
20080054980 - Level shifting circuit
20080055807 - Power switching apparatus with overload protection
20080055966 - Storage circuit with efficient sleep mode and method
20080056049 - Method for powering an electronic device and circuit
20080057696 - Method of forming crack arrest features in embedded device build-up package and package thereof
20080059679 - Application processor circuit incorporating both sd host and slave functions and electronic device including same
February 2008 - Freescale Semiconductor, Inc. Law Department patents
20080048626 - Series regulator circuit
20080048634 - Reference circuit
20080052572 - Pipelined data processor with deterministic signature generation
20080042518 - Control and testing of a micro electromechanical switch having a piezo element
20080043523 - Control and testing of a micro electromechanical switch
20080043883 - Channel estimation using dynamic-range-limited pilot signals
20080037343 - Memory having sense time of variable duration
20080037357 - Double-rate memory
20080038994 - Method to passivate conductive surfaces during semiconductor processing
20080039025 - Multi-mode transceiver having tunable harmonic termination circuit and method therefor
20080040590 - Selective branch target buffer (btb) allocaiton
20080040591 - Method for determining branch target buffer (btb) allocation for branch instructions
20080029860 - Semiconductor device with internal heat sink
20080030388 - Method and apparatus for reduced power consumption adc conversion
20080034139 - Memory access controller and method thereof
January 2008 - Freescale Semiconductor, Inc. Law Department patents
20080024192 - Voltage control circuit having a power switch
20080025111 - Memory circuit using a reference for sensing
20080025197 - Estimating frequency error of a sample stream
20080026517 - Method for forming a stressor layer
20080026526 - Method for removing nanoclusters from selected regions
20080026529 - Transistor with asymmetry for data storage circuitry
20080026599 - Transfer of stress to a layer
20080028253 - Bus having a dynamic timing bridge
20080018368 - Brown out detector
20080019206 - Integrated circuit having a memory with low voltage read/write operation
20080022047 - Storage circuit and method therefor
20080022064 - Memory pipelining in an integrated circuit
20080012603 - Brown out detector
20080006880 - Method and apparatus for mobility enhancement in a semiconductor device
20080007350 - Oscillator circuit
20080008249 - Image data up sampling
20080009250 - Wireless receiver for removing direct current offset component
20080009251 - Wireless mobile device
20080010618 - Method and device for designing semiconductor integrated circuit
20080001199 - Semiconductor storage device
20080001202 - A method of making metal gate transistors
20080001840 - Stacked loop antenna
20080003725 - Method for forming a semiconductor device and structure thereof
20080005717 - Primitive cell method for front end physical design
December 2007 - Freescale Semiconductor, Inc. Law Department patents
20070295357 - Removing metal using an oxidizing chemistry
20070297120 - Rf power transistor device with high performance shunt capacitor and method thereof
20070298520 - Method of producing an element comprising an electrical conductor encircled by magnetic material
20070298623 - Method for straining a semiconductor device
20070300042 - Method and apparatus for interfacing a processor and coprocessor
20070300043 - Method and apparatus for interfacing a processor and coprocessor
20070300044 - Method and apparatus for interfacing a processor and coprocessor
20070291531 - Mram with a write driver and a method therefor
20070294502 - Lookup table array compression and indexing
20070294504 - Virtual address cache and method for sharing data using a unique task identifier
20070287361 - Method of polishing a layer using a polishing pad
20070277728 - Method for forming a semiconductor structure having a strained silicon layer
20070279125 - Differential receiver circuit
20070279990 - Nonvolatile memory having latching sense amplifier and method of operation
20070280379 - Wireless receiver for removing direct current offset component
20070281393 - Method of forming a trace embedded package
20070281397 - Method of forming semiconductor packaged device
20070283062 - Bus control system
November 2007 - Freescale Semiconductor, Inc. Law Department patents
20070272975 - Method of forming a semiconductor device having an interlayer and structure therefor
20070273433 - Floating voltage source
20070274116 - Multi-level voltage adjustment
20070275539 - Method of stimulating die circuitry and structure therefor
20070275549 - Contact surrounded by passivation and polymide and method therefor
20070277009 - Memory management unit and method for memory management
20070267651 - Semiconductor device having a fuse and method of forming thereof
20070267748 - Integrated circuit having pads and input/output (i/o) cells
20070267755 - Integrated circuit having pads and input/output (i/o) cells
20070269926 - Method and apparatus for forming an electrical connection to a semiconductor substrate
20070269933 - Integrated circuit encapsulation and method therefor
20070269969 - Semiconductor structure pattern formation
20070264727 - High sensitivity sensor for tagged magnetic bead bioassays
20070266199 - Virtual address cache and method for sharing data stored in a virtual address cache
20070266207 - Replacement pointer control for set associative cache and method
20070266217 - Selective cache line allocation instruction execution and circuitry
20070266225 - Microcontroller unit
20070260794 - Method of transitioning between active mode and power-down mode in processor based system
20070260863 - Integrated circuit having a conditional yield instruction and method therefor
20070260950 - Method and apparatus for testing a data processing system
20070252575 - Accumulated current counter and method thereof
20070254409 - Method of forming stackable package
20070254435 - Method for forming a semiconductor device having a fin an structure thereof
20070254599 - Wireless communication device and data interface
20070255924 - Processor and method for altering address translation
20070255933 - Parallel condition code generation for simd operations
20070256042 - Method and system for incorporating via redundancy in timing analysis
October 2007 - Freescale Semiconductor, Inc. Law Department patents
20070247886 - Memory circuit
20070247939 - Mram array with reference cell row and methof of operation
20070248153 - Discrete multi-tone (dmt) system and method that communicates a data pump data stream between a general purpose cpu and a dsp via a buffering scheme
20070249103 - Method of making a multi-gate device
20070241403 - Integrated circuit with different channel materials for p and n channel transistors and method therefor
20070242534 - Memory with charge storage locations
20070235807 - Semiconductor device structure and method therefor
20070236263 - Contention-free keeper circuit and a method for contention elimination
20070237021 - Memory with clocked sense amplifier
20070238233 - Method of making a multiple crystal orientation semiconductor device
20070238278 - Method of separating a structure in a semiconductor device
20070239968 - Data processing system having bit exact instructions and methods therefor
20070228475 - Esd protection circuit with isolated diode element and method thereof
20070230633 - Method of determining a synchronous phase
20070231946 - Laterally grown nanotubes and method of formation
20070231950 - Barrier for use in 3-d integration of circuits
20070232281 - Wireless communication device and method of setting individual information therein
September 2007 - Freescale Semiconductor, Inc. Law Department patents
20070222425 - Series regulator circuit
20070223276 - Non-volatile memory wih controlled program/erase
20070223376 - Arbiter for a serial bus system
20070218618 - Interlayer dielectric under stress for an integrated circuit
20070218631 - Method for forming a non-volatile memory and a peripheral device on a semiconductor substrate
20070218633 - Silicided nonvolatile memory and method of making same
20070218640 - Semiconductor device having a gate with a thin conductive layer
20070218669 - Method of forming a semiconductor device and structure thereof
20070220388 - Apparatus and method for adjusting an operating parameter of an integrated circuit
20070209446 - Frozen material detection using electric field sensor
20070210314 - Semiconductor device with stressors and method therefor
20070210442 - Method and apparatus for providing structural support for interconnect pad while allowing signal conductance
20070211516 - Semiconductor storage device
20070211554 - Memory with serial input-output terminals for address and data and method therefor
20070205421 - Semiconductor optical devices and method for forming
20070205506 - Rf power transistor device with metal electromigration design and method thereof
20070207603 - Metal gate with zirconium
20070207605 - Method for forming reinforced interconnects on a substrate
20070208955 - Integrated circuit and method for manufacturing wafer and integrated circuit
August 2007 - Freescale Semiconductor, Inc. Law Department patents
20070200206 - Multi-row lead frame
20070200225 - Heat sink for semiconductor package
20070200586 - Method of testing for power and ground continuity of a semiconductor device
20070201586 - Multi-rate viterbi decoder
20070202632 - Capacitor attachment method
20070202645 - Method for forming a deposited oxide layer
20070202680 - Semiconductor packaging method
20070202708 - Method for forming a deposited oxide layer
20070204098 - Non-volatile memory having a multiple block erase mode and method therefor
20070204140 - Integrated circuit with memory and method of configuring a memory
20070194392 - Method and apparatus for indicating directionality in integrated circuit manufacturing
20070194394 - Noise isolation between circuit blocks in an integrated circuit chip
20070194460 - Cap layer for an aluminum copper bond pad
20070198804 - Data processing system having address translation bypass and method therefor
20070198805 - Non-intrusive address mapping having a modified address space identifier and circuitry therefor
20070198877 - Wireless mobile device
20070188190 - Antifuse circuit
20070190711 - Semiconductor device and method for incorporating a halogen in a dielectric
20070190720 - Method for making an integrated circuit having an embedded non-volatile memory
20070190745 - Method to selectively form regions having differing properties and structure
20070181653 - Magnetic alignment of integrated circuits to each other
20070181946 - Method and apparatus for forming a semiconductor-on-insulator (soi) body-contacted device
20070182399 - Low drop-out dc voltage regulator
20070184601 - Method of forming a semiconductor device
20070176223 - Split gate memory cell in a finfet
20070176226 - Memory cell using a dielectric having non-uniform thickness
20070176668 - Level shifter circuit
20070177440 - Method for multiple step programming a memory cell
20070178228 - Method for fabricating a pcb
20070178626 - Method of packaging semiconductor die
20070178633 - Semiconductor device comprising a transistor having a counter-doped channel region and method for forming the same
20070178649 - Double-gated non-volatile memory and methods for forming thereof
20070178661 - Method of forming a semiconductor isolation trench
20070178688 - Method for forming multi-layer bumps on a substrate
July 2007 - Freescale Semiconductor, Inc. Law Department patents
20070170584 - Semiconductor interconnect having adjacent reservoir for bonding and method for formation
20070170585 - Composite integrated device and methods for forming thereof
20070172996 - Method of forming a semiconductor device with decreased undercutting of semiconductor material
20070164777 - Scan cell for an integrated circuit
20070164884 - Clock pulse generator apparatus with reduced jitter clock phase
20070165748 - Low if radio receiver
20070168820 - Linear approximation of the max* operation for log-map decoding
20070158730 - Integrated circuit using finfets and having a static random access memory (sram)
20070159266 - Arrangement and method impedance matching
20070159285 - High frequency thin film electrical circuit element
20070160915 - Phase shifting mask having a calibration feature and method therefor
20070161170 - Transistor with immersed contacts and methods of forming thereof
20070152739 - Power management in integrated circuits using process detection
20070153606 - Temperature based dram refresh
20070155113 - Thin-film capacitor with a field modification layer and methods for forming the same
June 2007 - Freescale Semiconductor, Inc. Law Department patents
20070148879 - Iii-v compound semiconductor heterostructure mosfet with a high workfunction metal gate electrode and process of making the same
20070148894 - Semiconductor device and method for regional stress control
20070150782 - Method and apparatus for affecting a portion of an integrated circuit
20070137889 - Multi-strand substrate for ball-grid array assemblies and method
20070138507 - Method of fabricating reduced subthreshold leakage current submicron nfet's with high iii/v ratio material
20070141740 - Method for damage avoidance in transferring an ultra-thin layer of crystalline material with high crystalline quality
20070141751 - Stackable molded packages and methods of making the same
20070141770 - Semiconductor device having an organic anti-reflective coating (arc) and method therefor
20070143716 - Circuit layout compaction using reshaping
20070132031 - Semiconductor device having stressors and method for forming
20070132519 - Oscillator circuit
20070133262 - Mram with a write driver and method therefor
20070134888 - Back-gated semiconductor device with a storage layer and methods for forming thereof
20070134891 - Soi active layer with different surface orientation
20070134921 - Method of forming a semiconductor device having dummy features
20070135182 - Cell phone device
20070136640 - Defect detection and repair in an embedded random access memory
20070136720 - Method for estimating processor energy usage
20070126076 - Semiconductor optical devices and method for forming
20070126480 - Circuit and method for peak detection of an analog signal
20070128766 - Method of making exposed pad ball grid array package
20070129031 - Transmitter and receiver gain calibration by means of feedback in a transceiver
May 2007 - Freescale Semiconductor, Inc. Law Department patents
20070120604 - Low voltage low power class a/b output stage
20070121387 - Method and apparatus for programming/erasing a non-volatile memory
20070122940 - Method for packaging a semiconductor device
20070122943 - Method of making semiconductor package having exposed heat spreader
20070123056 - Plasma treatment of a semiconductor surface for enhanced nucleation of a metal-containing layer
20070114664 - Packaged device and method of forming same
20070115158 - Rf carrier generator and method thereof
20070116058 - Network node
20070116137 - Blind bandwidth detection for a sample stream
20070117319 - Programming and erasing structure for a floating gate memory cell and method of making
20070113213 - Flip flop function device, semiconductor integrated-circuit, and method and apparatus for designing semiconductor integrated circuit
20070102828 - Fine pitch interconnect and method of making
20070103838 - Ripple filter circuit
20070105280 - Brace for wire loop
20070106718 - Fast fourier transform on a single-instruction-stream, multiple-data-stream processor
20070096760 - Method and apparatus for testing a semiconductor structure having top-side and bottom-side connections
20070099341 - Method of making stacked die package
20070099353 - Method for forming a semiconductor structure and structure thereof
20070099361 - Method for forming a semiconductor structure and structure thereof
20070099413 - Method for forming multi-layer bumps on a substrate
20070101231 - Multi-standard turbo interleaver using tables
April 2007 - Freescale Semiconductor, Inc. Law Department patents
20070090405 - Charge compensated dielectric layer structure and method of making the same
20070090882 - Phase locked loop filter
20070092090 - Apparatus for detecting a module
20070092996 - Method of making semiconductor package with reduced moisture sensitivity
20070093010 - Method of making an inverted-t channel transistor
20070093043 - Semiconductor structure with reduced gate doping and methods for forming thereof
20070093054 - Multiple device types including an inverted-t channel transistor and method therefor
20070094480 - System and method for memory array access with fast address decoder
20070085153 - Voltage controlled oscillator with a multiple gate transistor and method therefor
20070085576 - Output driver circuit with multiple gate devices
20070085624 - Voltage controlled oscillator having digitally controlled phase adjustment and method therefor
20070085721 - Signal converters with multiple gate devices
20070086262 - Integrated circuit chip with connectivity partitioning
20070087067 - Semiconductor die having a protective periphery region and method for forming
20070087566 - Controlled electroless plating
20070088889 - Communication steering for use in a multi-master shared resource system
20070080724 - Digital clock frequency multiplier
20070080726 - Sequence-independent power-on reset for multi-voltage circuits
20070080739 - Trimming circuit, electronic circuit, and trimming control system
20070080740 - Reference circuit for providing a temperature independent reference voltage and current
20070081601 - Blind preamble detection for an orthogonal frequency division multiplexed sample stream
20070082431 - Programmable fuse with silicon germanium
20070082449 - Method and apparatus for maintaining topographical uniformity of a semiconductor memory array
20070082453 - Method for making a semiconductor structure using silicon germanium
20070082495 - Semiconductor device having nano-pillars and method therefor
20070083580 - Bounded signal mixer and method of operation
20070083684 - Data stream converter and data conversion circuit
20070076120 - Nicam processing method
20070076121 - Nicam processor
20070077698 - Method for fabricating dual-metal gate device
20070077705 - Split gate memory cell and method therefor
20070077706 - Method of making a multi-bit nov-volatile memory (nym) cell and structure
20070077743 - Multiple fin formation
March 2007 - Freescale Semiconductor, Inc. Law Department patents
20070045735 - Finfet structure with contacts
20070046106 - Power supply circuit
20070046276 - Discharge device and dc power supply system
20070047281 - Storage element with clear operation and method thereof
20070047346 - Semiconductor integrated circuit
20070048985 - Dual silicide semiconductor fabrication process
20070049008 - Method for forming a capping layer on a semiconductor device
February 2007 - Freescale Semiconductor, Inc. Law Department patents
20070040619 - Digitally programmable capacitor array
20070030719 - One time programmable memory and method of operation
20070031996 - Packaged integrated circuit having a heat spreader and method therefor
20070023121 - Fabrication of three dimensional integrated circuit employing multiple die panels
20070023880 - Packaged integrated circuit with enhanced thermal dissipation
20070024300 - Method for manufacturing integrated circuit, measurement apparatus for integrated circuit, and wafer
20070026573 - Method of making a stacked die package
20070026593 - Diffusion barrier for nickel silicides in a semiconductor fabrication process
20070026615 - Method of forming a finfet structure
January 2007 - Freescale Semiconductor, Inc. Law Department patents
20070018712 - Pvt variation detection and compensation circuit
20070018713 - Pvt variation detection and compensation circuit
20070018864 - Pvt variation detection and compensation circuit
20070020849 - Source side injection storage device with spacer gates and method therefor
20070022312 - Clock generation circuit
20070001162 - Single transistor memory cell with reduced programming voltages
20070001218 - Source side injection storage device with control gates adjacent to shared source/drain and method therefor
20070001222 - Single transistor memory cell with reduced recombination rates
20070004135 - Source side injection storage device and method therefor
December 2006 - Freescale Semiconductor, Inc. Law Department patents
20060289946 - Method and apparatus for maintaining topographical uniformity of a semiconductor memory array
20060291308 - Test method and test program for semiconductor storage device, and semiconductor storage device
20060291315 - Antifuse circuit
20060292773 - Method of making a metal gate semiconductor device
20060292815 - Mim capacitor in a semiconductor device and method therefor
20060294478 - Method and system for reducing delay noise in an integrated circuit
20060284741 - Keypad signal input apparatus
20060285414 - Fuse circuit and electronic circuit
20060288315 - Method and apparatus for compiling a parameterized cell
20060281240 - Method of forming an interlayer dielectric
20060273411 - In-situ nitridation of high-k dielectrics
20060273425 - High density capacitor structure
20060274790 - Arrangement and method for connecting a processing node in a distribution system
20060276004 - Method of fabricating a substrate for a planar, double-gated, transistor process
November 2006 - Freescale Semiconductor, Inc. Law Department patents
20060266646 - Trimming circuit and electronic circuit
20060267113 - Semiconductor device structure and method therefor
20060267641 - Transmission line driver circuit
20060267671 - Charge pump circuit for high side drive circuit and driver driving voltage circuit
20060270234 - Method and composition for preparing a semiconductor surface for deposition of a barrier material
20060271759 - Translation information retrieval
20060271919 - Translation information retrieval
20060261408 - Structure and method for resurf ldmosfet with a current diverter
20060262633 - Storage circuit and method therefor
20060250838 - Method and apparatus for low voltage write in a static random access memory
20060250880 - Dual-port static random access memory having improved cell stability and write margin
20060244081 - Semiconductor device and method of forming the same
20060244640 - Front-end method for nicam encoding
20060244644 - Variable interpolator for non-uniformly sampled signals and method
20060245262 - Memory structure and method of programming
20060248279 - Prefetching across a page boundary
20060248280 - Prefetch address generation implementing multiple confidence levels
20060248281 - Prefetching using hashed program counter
October 2006 - Freescale Semiconductor, Inc. Law Department patents
20060237850 - Semiconductor die edge reconditioning
20060239377 - Systems, methods, and apparatus for reducing dynamic range requirements of a power amplifier in a wireless device
20060240609 - Semiconductor device and method for regional stress control
20060240629 - Self correcting suppression of threshold voltage variation in fully depleted transistors
20060240650 - Semiconductor device having a plurality of different layers and method therefor
20060231938 - Structure for stacking an integrated circuit on another integrated circuit
20060231959 - Bonding pad for a packaged integrated circuit
20060234421 - Method of forming a substrateless semiconductor package
20060234436 - Method of forming a semiconductor device having a high-k dielectric
20060234467 - Method of forming trench isolation in a semiconductor device
20060226490 - Interlayer dielectric under stress for an integrated circuit
20060226492 - Semiconductor device featuring an arched structure strained semiconductor layer
20060228842 - Transistor fabrication using double etch/refill process
20060228851 - Method of making a dual strained channel semiconductor device
20060228863 - Method for making a semiconductor device with strain enhancement
20060228872 - Method of making a semiconductor device having an arched structure strained semiconductor layer
20060230364 - Method and computer program product for generation of bus functional models
20060220157 - Transitional dielectric layer to improve reliability and performance of high dielectric constant transistors
20060220187 - Heatsink moldlocks
20060220675 - Transmission line driver
20060220700 - Flip-flop circuit having low power data retention
20060220708 - Digital clock frequency doubler
20060220717 - Flip-flop circuit having low power data retention
20060220721 - Clock delay compensation circuit
20060222968 - Lithographic template and method of formation and use
20060223320 - Polishing technique to minimize abrasive removal of material and composition therefor
20060223335 - Method of forming a semiconductor device having asymmetric dielectric regions and structure thereof
20060225059 - Method and device for creating and using pre-internalized program files
September 2006 - Freescale Semiconductor, Inc. Law Department patents
20060218467 - Memory having a portion that can be switched between use as data and use as error correction code (ecc)
20060208344 - Lead frame panel and method of packaging semiconductor devices using the lead frame panel
20060208363 - Three-dimensional package and method of forming same
20060211199 - Method of removing nanoclusters in a semiconductor device
20060202339 - Method of forming a semiconductor device having a diffusion barrier stack and structure thereof
20060199087 - Method of making an integrated circuit by modifying a design layout by accounting for a parameter that varies based on a location within an exposure field
August 2006 - Freescale Semiconductor, Inc. Law Department patents
20060192301 - Semiconductor device with a protected active die region and method therefor
20060192596 - Integrated circuit having a low power mode and method therefor
20060192604 - Integrated circuit storage element having low power data retention and method therefor
20060192620 - Arrangement, phase locked loop and method for noise shaping in a phase-locked loop
20060193167 - Compact non-volatile memory array with reduced disturb
20060193269 - Communication of conversation between terminasl over a radio link
20060194384 - Semiconductor device with multiple semiconductor layers
20060194423 - Method of making a nitrided gate dielectric
20060194438 - Method of forming a nanocluster charge storage device
20060195721 - Method and apparatus for qualifying debug operation using source information
20060186456 - Nvm cell on soi and method of manufacture
20060186457 - Methods for programming a floating body nonvolatile memory
20060186936 - Delay circuitry and method therefor
20060186938 - Circuit and method for determining optimal power and frequency metrics of an integrated circuit
20060188016 - Method and apparatus for dynamic determination of frames required to build a complete picture in an mpeg video stream
20060188102 - Btsc encoding method with digital fm modulation
20060188103 - Btsc encoder with digital fm modulator feature
20060189050 - Method of forming a semiconductor device and an optical device and structure thereof
20060189079 - Method of forming nanoclusters
20060189120 - Method of making reinforced semiconductor package
20060190203 - Method for determining programmable coefficients to replicate frequency and supply voltage correlation in an integrated circuit
20060181823 - I/o cell esd system
20060170402 - Voltage regulator having improved ir drop
20060170450 - Integrated circuit with programmable-impedance output buffer and method therefor
20060170455 - Method and circuit for maintaininig i/o pad characteristics across different i/o supply voltages
20060172468 - Method of making a planar double-gated transistor
20060174152 - Parallel path alignment method and apparatus
20060174172 - Toggle memory burst
July 2006 - Freescale Semiconductor, Inc. Law Department patents
20060163716 - Semiconductor package with crossing conductor assembly and method of manufacture
20060166424 - Metal gate transistor cmos process and method for making
20060166452 - Non-volatile nanocrystal memory and method therefor
20060166492 - Semiconductor fabrication process employing stress inducing source drain structures with graded impurity concentration
20060166493 - Semiconductor device having nitridated oxide layer and method therefor
20060168502 - Decoder with m-at-a-time traceback
20060157783 - Semiconductor device having trench isolation for differential stress and method therefor
20060160311 - Method of forming an integrated circuit having nanocluster devices and non-nanocluster devices
20060152261 - Communication apparatus including driver means for applying a switched signal to a communication line with a controlled slew rate
20060152964 - Sram having improved cell stability and method therefor
20060154469 - Method and apparatus for providing structural support for interconnect pad while allowing signal conductance
20060154470 - Integrated circuit having structural support for a flip-chip interconnect pad and method therefor
20060155974 - Data processing system having flexible instruction capability and selection mechanism
20060156304 - Apparatus and method for scheduling tasks in a communications network
20060145252 - Power semiconductor device and method of manufacturing the same
20060145900 - Analog-to-digital converter arrangement and method
20060148196 - Semiconductor fabrication process including recessed source/drain regions in an soi wafer
20060149559 - Voice signal processor
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