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Fractional chip correlation device and method for operating fractional chip correlation in spread spectrum receiver

Fractional chip correlation device and method for operating fractional chip correlation in spread spectrum receiver description/claims

The present invention relates to spread spectrum signal receiver, more particularly, to fractional chip correlation in the spread spectrum signal receiver.

In a spread spectrum communication system, an input data stream of a received signal is modulated with a series of spreading code. For example, in GPS (Global Positioning System) system, C/A code is used to modulate signals. In a receiver receiving a spread spectrum signal, it is necessary to generate a local code replica and correlate the local code replica with the received signal, so as to de-spread the signal.

To acquire and track satellites with sufficient efficiency, resolution and accuracy, fractional chip correlation is utilized. In fractional chip correlation, delayed version(s) of the local code replica are correlated with the received signal to synchronize the local code with the code received by the satellite by determining which of the delayed version(s) and the original version is the one which correlates with the received code the most accurately. In practice, the delayed chip space used in the fractional chip correlation should be ½ chip at most in acquisition mode. In tracking mode, the fractional chip space should be less, ¼ or even ⅛, for example, so as to provide sufficient accuracy, since one chip indicates a range of 300 meters in positioning.

FIG. 1 is a block diagram showing a conventional fractional chip correlation device of a receiver, in which the chip space is ¼ chip. FIG. 2 is a diagram showing the waveform at respective components of the fractional chip correlation device in FIG. 1. To perform the fractional correlation for chip space of ¼ chip, the correlator must operate at a speed that is 4 multiples of the sampling rate fs. A signal received by the receiver is down-converted and digitized into an IF (intermediate frequency) signal, which is sampled at a high sampling rate fs, for example, fs=8 fc (fc is the chipping rate of the spread spectrum system). Then the IF signal is latched by a latch 11. The signal is down-sampling by an integration unit 12. The sampling rate fs of down-sampled signal is reduced to 4 fc. As can be seen in FIG. 2, the samples of the down-sampled signal are not as dense as the input signal. The down-sampled signal is then transmitted to four correlators 140, 142, 144 and 146 to be correlated with a local code replica generated by a local code replica generator 16 and delayed versions of the local code replica delayed by delay units 202, 204 and 206, respectively. Specifically, the correlator 140 correlates the signal with the local code replica without delay; the correlator 142 correlates the signal with the local code replica delayed with ¼ chip from the delay unit 202; the correlator 144 correlates the signal with the local code replica delayed with ½ chip; the correlator 146 correlates the signal with the local code replica delayed with ¾ chip. The waveforms of the various versions of the local code replica are shown in FIG. 2.

In the above example, in order to keep up with the fractional chip code transition, the correlation is executed at a high sampling rate, which is 4 fc is this case. The high operation speed results in heavy power consumption, which is a critical problem to a CDMA receiver.

The present invention is to provide a fraction chip correlation device for a spread spectrum receiver for receiving signals modulated with spread spectrum codes. The present invention also provides a method for operating fractional chip correlation to spread spectrum signals received by the spread spectrum receiver. By using the fractional chip correlation in accordance with the present invention, power consumption of the receiver can be significantly reduced.

In accordance with the present invention, the fractional chip correlation device comprises a first latch receiving an input signal and outputting the input signal and at least one delayed version of the input signal; a plurality of integration units respectively integrating the input signal and at least one delayed version of the input signal to down-sample the signals; a plurality of second latches respectively connecting to the integration units for aligning the down-sampled signals; and a plurality of correlators respectively connected to the second latches for correlating the signals with a local code replica The first latch outputs said at least one delayed version of the input signal with a delay based on a required chipping space or a multiple of the chipping space. In addition, in addition to correlate the signals with the local code replica, the correlators can also correlate the signals with a delayed version of the local code replica.

In accordance with the present invention, the method for operating fractional chip correlation to spread spectrum signals, said method comprising receiving a signal; latching the signal to output the signal and at least one delayed version thereof; integrating the signal and said at least one delayed version thereof to down-sample the signals; latching the down-sampled signals to align the signals with each other; and correlating the down-sampled signals with a local code replica, respectively. The delayed version of the input signal is delayed with a delay based on a required chipping space or a multiple of the chipping space. In addition to correlating the input signal and said at least one delayed version thereof with the local code replica, the method may also includes correlating the signals with a delayed version of the local code replica.

FIG. 1 is a block diagram showing a fractional chip correlation device of a receiver of prior art;

FIG. 2 is a diagram illustrating waveforms at the respective components of the fractional correlation device in FIG. 1;

FIG. 3 is a block diagram showing a fractional chip correlation device of a receiver in accordance with an embodiment of the present invention;

FIG. 4 is a diagram illustrating waveforms at the respective components of the fractional chip correlation device in FIG. 3;

FIG. 5 is a block diagram showing a fractional chip correlation device of a receiver in accordance with another embodiment of the present invention; and

FIG. 6 is a diagram illustrating waveforms at the respective components of the fractional chip correlation device in FIG. 5.

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