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Floorplanning a hierarchical physical design to improve placement and routingUSPTO Application #: 20070136709Title: Floorplanning a hierarchical physical design to improve placement and routing Abstract: Methods for floorplanning a hierarchical physical design to improve placement and routing are provided and described. In one embodiment, a method of floorplanning a hierarchical physical design includes arranging a plurality of blocks in a top-level of the hierarchical physical design. Each block includes a plurality of linear edges. Additionally, at least one of the blocks is selected. Furthermore, at least one linear edge of the selected block is rasterized. This rasterization includes converting the linear edge to a stepped-shape edge. (end of abstract) USPTO Applicaton #: 20070136709 - Class: 716008000 (USPTO) Related Patent Categories: Data Processing: Design And Analysis Of Circuit Or Semiconductor Mask, Circuit Design, Floorplanning
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