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06/07/07 | 26 views | #20070126032 | Prev - Next | USPTO Class 257 | About this Page  257 rss/xml feed  monitor keywords

Fin field effect transistor and method for manufacturing fin field effect transistor

USPTO Application #: 20070126032
Title: Fin field effect transistor and method for manufacturing fin field effect transistor
Abstract: The invention is directed to a method for manufacturing a fin field effect transistor including a fully silicidated gate electrode. The method is suitable for a substrate including a fin structure, a straddle gate, a source/drain region and a dielectric layer formed thereon, wherein the straddle gate straddles over the fin structure, the source/drain region is located in a portion of the fin structure exposed by the straddle gate and the dielectric layer covers the substrate. The method includes steps of performing a planarization process to remove a portion of the dielectric layer and the first salicide layer until the surface of the straddle gate is exposed and performing a salicide process to convert the straddle gate into a fully silicidated gate electrode.
(end of abstract)
USPTO Applicaton #: 20070126032 - Class: 257213000 (USPTO)
Related Patent Categories: Active Solid-state Devices (e.g., Transistors, Solid-state Diodes), Field Effect Device

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Semiconductor integrated circuit and method of manufacturing the same
Industry Class:
Active solid-state devices (e.g., transistors, solid-state diodes)

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