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  Field effect transistor and semiconductor device, and method for manufacturing sameUSPTO Application #: 20080105910Title: Field effect transistor and semiconductor device, and method for manufacturing same Abstract: Current drive efficiency is deteriorated in the conventional FET. The FET 20 includes an electrode film 24a provided over the semiconductor substrate 10 and a stressor film 24b that is provided on the electrode film 24a and constitutes a gate electrode 24 together with the electrode film 24a. Each of the electrode film 24a and the stressor film 24b is composed of a metal, a metallic nitride or a metallic silicide. The stressor film 24b is capable of exhibiting a compressive stress over the semiconductor substrate 10. (end of abstract) Agent: Young & Thompson - Alexandria, VA, US Inventor: Takeo MATSUKI USPTO Applicaton #: 20080105910 - Class: 257295000 (USPTO) Related Patent Categories: Active Solid-state Devices (e.g., Transistors, Solid-state Diodes), Field Effect Device, Having Insulated Electrode (e.g., Mosfet, Mos Diode), With Ferroelectric Material Layer The Patent Description & Claims data below is from USPTO Patent Application 20080105910. Brief Patent Description - Full Patent Description - Patent Application Claims
[0001] This application is based on Japanese patent application No. 2006-300487, the content of which is incorporated hereinto by reference. BACKGROUND [0002] 1. Technical Field [0003] The present invention relates to a field effect transistor and a semiconductor device, and to a method for manufacturing thereof. [0004] 2. Related Art [0005] Metal insulator semiconductor field effect transistors (MISFET), which are composed of silicon and polycrystalline silicon employed as materials for semiconductor substrate and gate electrode, respectively, exhibit progressively improved performances by virtue of processing technologies for fine devices, various types of deposition technologies and impurity control technologies. Semiconductor devices having various functions are configured by combining different MISFETs that exhibits different threshold voltage properties. In particular, a considerable improvement in the current drive efficiency is obtained by a scaledown of devices. Besides, a MISFET having an oxide film such as silicon oxide film employed as a gate insulating film is particularly referred to as metal oxide semiconductor field effect transistor (MOSFET). [0006] Prior art literatures related to the present invention include: Japanese Patent Laid-Open No. 2002-93921; Japanese Patent Laid-Open No. 2005-57301; Japanese Patent Laid-Open No. 2005-303261; J. Welser, J. L. Hoyt, and J. F. Gibbons, IEEE Electron Device Letters, Vol. 15, No. 3 (1994), p. 100-102, entitled "Electron Mobility Enhancement in Strained-Si N-type Metal-Oxide-Semiconductor Field-Effect Transistors"; [0007] S. Itoh et al., Technical Digest of 2000 International Electron Device Meeting (2000), p. 247-250, entitled "Mechanical Stress Effect of Etch-Stop Nitride and its Impact on Deep Submicron Transistor Design"; [0008] T. Ghani et al., Technical Digest of 2003 International Electron Device Meeting (2003), p. 978-980, entitled "A 90 nm High Volume Manufacturing Logic Technology Featuring Novel 45 nm Gate Length Strained Silicon CMOS Transistors"; and [0009] H. J. Cho et al., Technical Digest of 2004 International Electron Device Meeting (2004), p. 503-506, entitled "The Effects of TaN Thickness and Strained Substrate on the Performance and PBTI Characteristics of Poly-Si/TaN/HfSiON MOSFETs". [0010] Nevertheless, a scaledown of devices causes a reduced channel-length of FET, causing a difficulty in controlling an electric current in the channel region by employing a gate voltage (electric charge control). A known solution for such difficulty is an utilization of an increased impurity concentration in the channel region of the semiconductor substrate to thereby improve the controllability. However, such process causes an increased scattering of charged carrier (electronic electron hole) by the presence of impurity, deteriorating the current drive efficiency. SUMMARY [0011] According to one aspect of the present invention, there is provided an n-channel field effect transistor, comprising: a first electrode film provided over a semiconductor substrate; and a second electrode film provided on the first electrode film, the second electrode film and the first electrode film constituting a gate electrode, wherein at least one of the first electrode film and the second electrode film is a stressor film that is capable of exhibiting a compressive stress over the semiconductor substrate, and wherein each of the first and the second electrode films is composed of a metal, a metallic nitride or a metallic silicide. [0012] In such n-channel FET, at least one of the first electrode film and the second electrode film is a stressor film that is capable of exhibiting a compressive stress over the semiconductor substrate. Such stressor film draws the channel region toward the outer direction, thereby providing an improved electron mobility. [0013] According to another aspect of the present invention, there is provided a p-channel field effect transistor, comprising: a first electrode film provided over a semiconductor substrate; and a second electrode film provided on the first electrode film, the second electrode film and the first electrode film constituting a gate electrode, wherein at least one of the first electrode film or the second electrode film is a stressor film that is capable of exhibiting a tensile stress for the semiconductor substrate, and wherein each of the first and the second electrode films is composed of a metal, a metallic nitride or a metallic silicide. [0014] In such p-channel FET, at least one of the first electrode film and the second electrode film is a stressor film that is capable of exhibiting a tensile stress for the semiconductor substrate. Such stressor film provides a compressed channel region, thereby providing an improved hole mobility. [0015] Besides, determinations of a tensile stress and a compressive stress in this specification are presented as follows. [0016] Assume that a stress is exerted on a film formed on a substrate through a unit area of a vertical cross-section thereof that is perpendicular to a surface of the substrate, the stress is determined as a tensile stress when the stress transversely acts as pulling the vertical cross-section from both sides via the vertical cross-section, and on the other hand, the stress is determined as a compressive stress when the stress transversely acts as pushing the vertical cross-section from both sides via the vertical cross-section. For example, when a film is to be shrunk, a tensile stress exerts through the film, resulting in a compressive distortion caused in the surface of the substrate. When a film is to be expanded, a compressive stress exerts through the film, resulting in a tensile distortion caused in the surface of the substrate. [0017] According to the present invention, the FET that exhibits an improved mobility of charge carrier and the semiconductor device comprising thereof, and the method for manufacturing thereof are achieved. BRIEF DESCRIPTION OF THE DRAWINGS [0018] The above and other objects, advantages and features of the present invention will be more apparent from the following description of certain preferred embodiments taken in conjunction with the accompanying drawings, in which: [0019] FIG. 1 a cross-sectional view of a semiconductor device, illustrating an embodiment of a semiconductor device according to the present invention; [0020] FIGS. 2A and 2B are cross-sectional views of a semiconductor device, illustrating an embodiment of a process for manufacturing the semiconductor device according to the present invention; [0021] FIGS. 3A and 3B are cross-sectional views of the semiconductor device, illustrating the embodiment of the process for manufacturing the semiconductor device according to the present invention; Continue reading... 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