| Fabrication of nanowires -> Monitor Keywords |
|
|
 
Fabrication of nanowiresRelated Patent Categories: Active Solid-state Devices (e.g., Transistors, Solid-state Diodes), Combined With Electrical Contact Or Lead, Of Specified Material Other Than Unalloyed Aluminum, Layered, At Least One Layer Containing Vanadium, Hafnium, Niobium, Zirconium, Or TantalumFabrication of nanowires description/claimsThe Patent Description & Claims data below is from USPTO Patent Application 20070182015, Fabrication of nanowires. Brief Patent Description - Full Patent Description - Patent Application Claims
TECHNICAL FIELD [0001] This invention relates to a system and method for fabricating nanowire arrays. BACKGROUND [0002] Prior art thin-wire arrays are used in a large number of devices, and have been found particularly suited for use in small or densely structured computer devices, such as sensors, memory devices, and logic chips. [0003] To address this need for thin-wire arrays, thin-wire arrays have been created using photolithography. As computer devices get smaller and smaller, however, the wires of these arrays need to be thinner and more closely spaced. Photolithography has so far not proven to be an adequate method to create very thin and closely spaced arrays of wires. [0004] To address this need for thinner arrays of wires, two ways of creating them have been used. One of these prior-art ways uses an etched superlattice as a mold for imprint lithography. The other uses an etched superlattice and physical vapor deposition to fabricate nanowire arrays. [0005] Prior-art etched-superlattice imprint lithography is described in U.S. Pat. No. 6,407,443. This example of imprint lithography is typically associated inconveniently with subsequent lift-off processing and may ultimately have limited process capability. It also uses a nano-imprinting step, which has so far not been consistently and successfully used in a production atmosphere. [0006] Prior-art physical vapor deposition uses an atomic beam to directly deposit material on a surface of an etched superlattice. This deposited material is then physically transferred to a substrate. This method, however, produces oddly shaped wires, which can create various structural and usage difficulties. Prior-art physical vapor deposition also can require processing in an Ultra-High Vacuum ("UHV"), which can be costly to use and would restrict the usage of materials that are incompatible with UHV processing. [0007] There is, therefore, a need for a technique for manufacturing arrays of thinner wires that is reliable, less expensive, more reproducible, and more production-friendly than permitted by present-day techniques. BRIEF DESCRIPTION OF THE DRAWINGS [0008] FIG. 1 illustrates a side, cross-sectional view of an exemplary superlattice. [0009] FIG. 2 illustrates a side, cross-sectional view of an exemplary superlattice having a working surface. [0010] FIG. 3 illustrates a three-dimensional view of an exemplary superlattice having a working surface and a thickness, depth, and length dimensions. [0011] FIG. 4 illustrates a three-dimensional view of an exemplary superlattice having a working surface and an electrical connection surface. [0012] FIG. 5 shows a block diagram of an exemplary system that is capable of implementing methods for creating nanowire arrays. [0013] FIG. 6 is a flow diagram of an exemplary method for creating a nanowire array using electrochemistry and physical transfer. [0014] FIG. 7 illustrates a three-dimensional view of an exemplary superlattice having a working surface and an electrical connection surface in electrical communication with an electrical power sink. [0015] FIG. 8 illustrates a three-dimensional view of an exemplary superlattice having a working surface having a low-adhesion layer and an electrical connection surface in electrical communication with an electrical power sink. [0016] FIG. 9 illustrates a side, cross-sectional view of an exemplary superlattice having alternating layers of materials and with one set of the alternating layers being altered at a working surface. [0017] FIG. 10 illustrates a side, cross-sectional view of an exemplary superlattice having alternating layers of materials and with the materials being altered at a working surface. [0018] FIG. 11 illustrates a three-dimensional view of an exemplary superlattice having a corrugated working surface and an electrical connection surface in electrical communication with an electrical power sink. [0019] FIG. 12 illustrates a three-dimensional view of an exemplary superlattice having a working surface, the working surface having a low-adhesion layer and material present on alternating layers of the working surface, and an electrical connection surface in electrical communication with an electrical power sink. [0020] FIG. 13 illustrates a three-dimensional view of an exemplary superlattice having a corrugated working surface, the working surface having material present on alternating layers of the working surface, and an electrical connection surface in electrical communication with an electrical power sink. [0021] FIG. 14 illustrates a three-dimensional view of an exemplary superlattice and an exemplary array substrate, the superlattice having material on its working surface. Continue reading about Fabrication of nanowires... Full patent description for Fabrication of nanowires Brief Patent Description - Full Patent Description - Patent Application Claims Click on the above for other options relating to this Fabrication of nanowires patent application. ###  How KEYWORD MONITOR works... a FREE service from FreshPatents1. Sign up (takes 30 seconds). 2. Fill in the keywords to be monitored. 3. Each week you receive an email with patent applications related to your keywords. Start now! - Receive info on patent apps like Fabrication of nanowires or other areas of interest. ### Previous Patent Application: Semiconductor device and method for manufacturing same Next Patent Application: Method of making same low moisture absorptive circuitized substrave with reduced thermal expansion Industry Class: Active solid-state devices (e.g., transistors, solid-state diodes) ### FreshPatents.com Support Thank you for viewing the Fabrication of nanowires patent info. IP-related news and info Results in 0.19121 seconds Other interesting Feshpatents.com categories: Daimler Chrysler , DirecTV , Exxonmobil Chemical Company , Goodyear , Intel , Kyocera Wireless , 174 |
 * Protect your Inventions * US Patent Office filing 
PATENT INFO |
|
