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Fabrication methods for compressive strained-silicon and transistors using the sameRelated Patent Categories: Active Solid-state Devices (e.g., Transistors, Solid-state Diodes), Field Effect Device, Having Insulated Electrode (e.g., Mosfet, Mos Diode)Fabrication methods for compressive strained-silicon and transistors using the same description/claimsThe Patent Description & Claims data below is from USPTO Patent Application 20080023733, Fabrication methods for compressive strained-silicon and transistors using the same. Brief Patent Description - Full Patent Description - Patent Application Claims
[0001] This application is a Divisional of allowed application Ser. No. 10/909,403, filed on Aug. 3, 2004, which claims priority of Taiwan Application No. 93113926, filed on May 18, 2004, the entire contents of all are hereby incorporated by reference and for which priority is claimed under 35 U.S.C. .sctn. 120. BACKGROUND OF THE INVENTION [0002] 1. Field of the Invention [0003] The present invention relates to a fabrication method for strained-silicon and, in particular, to compressive strained-silicon. [0004] 2. Brief Discussion of the Related Art [0005] Chip operating speeds, while desirable, depend on driving current. Improving mobility of the device to increase driving current thereof has become a technique commonly used by chip manufacturers. [0006] In recent years, research has proven that strained-silicon enhances carrier mobility significantly. As shown in FIGS. 1A and 1B, electron mobility increases with tensile strain and hole mobility increases with compressive strain. Electron or hole mobility is higher in MOSFET with a channel of strained-silicon than a conventional MOSFET, of the same size, without strained-silicon. Increased performance is thus accomplished. A current method of fabricating strained-silicon forms the strained-silicon on a relaxed silicon-germanium layer. Since the lattice constant of germanium is 4% larger than that of silicon, the relaxed silicon-germanium layer exerts tensile stress on silicon during formation on the silicon-germanium layer, wherein the silicon-germanium layer is formed on a graded silicon-germanium layer. [0007] Tensile strained-silicon has been realized through several methods such that performance of the NMOS device is enhanced. However, there is no effective method to fabricate the compressive strained-silicon required to improve hole mobility and driving current of a PMOS device, a barrier to application of the strained-silicon technology to integrated circuits. SUMMARY OF THE INVENTION [0008] An embodiment of a fabrication method for compressive strained-silicon comprises providing a silicon-containing substrate, implanting ions therein and converting the vicinity of the ion-containing region to strained-silicon. [0009] An embodiment of a MOSFET fabricated by a fabrication method of compressive strained-silicon comprises a channel region in a silicon-containing substrate, source/drain regions adjacent to two ends of the channel region, a gate dielectric layer on the channel region and a gate on the gate dielectric layer. The region beneath the channel region is converted to a strain inducing layer after ion implantation and high temperature processing. Compressive strained-silicon is thereby formed in the channel region. [0010] Another embodiment of a MOSFET fabricated by a fabrication method for compressive strained-silicon comprises a channel region in a silicon-containing substrate, source/drain regions adjacent to two ends of the channel region, a gate dielectric layer on the channel region and a gate on the gate dielectric layer. The regions beneath the source/drain regions are converted to a strain inducing layer after ion implantation and high temperature processing. Compressive strained-silicon is thereby formed in the source/drain regions and tensile strain induced in the channel region. [0011] Embodiments of fabrication methods of compressive strained-silicon and devices fabricated thereby make use of ion implantation and high temperature processing to induce compressive strain in the vicinity of the region containing the implanted ions, such that hole mobility is increased. Furthermore, the compressive strain in the vicinity of the region containing the implanted ions can induce tensile strain in the region thereof. [0012] Further scope of the applicability of the present invention will become apparent from the detailed description given hereinafter. However, it should be understood that the detailed description and specific examples, while indicating preferred embodiments of the invention, arc given by way of illustration only, since various changes and modifications within the spirit and scope of the invention will become apparent to those skilled in the art from this detailed description. BRIEF DESCRIPTION OF THE DRAWINGS [0013] The present invention will become more fully understood from the detailed description given hereinbelow and the accompanying drawings, which are given by way of illustration only, and thus are not limitative of the present invention, and wherein: [0014] FIG. 1A shows electron mobility of an NMOS transistor corresponding to tensile strain thereof; [0015] FIG. 1B shows hole mobility of a PMOS transistor corresponding to compressive strain thereof; [0016] FIGS. 2A and 2B show an embodiment of fabrication methods for compressive strained-silicon using hydrogen ion implantation; [0017] FIGS. 3A and 3B are diagrams of X-ray diffraction(XRD) of the silicon-containing substrate after hydrogen ion implantation and high temperature processing; [0018] FIGS. 4A.about.4C show another embodiment of fabrication methods of compressive strained-silicon using hydrogen ion implantation; [0019] FIGS. 5A.about.5D show another embodiment of fabrication methods of compressive strained-silicon using hydrogen ion implantation; and [0020] FIGS. 6A.about.6C show another embodiment of fabrication methods of compressive strained-silicon using hydrogen ion implantation. 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