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  Fabrication method of conductive bump structures of circuit boardUSPTO Application #: 20060219567Title: Fabrication method of conductive bump structures of circuit board Abstract: A fabrication method of conductive bump structures of a circuit board includes providing the circuit board with a plurality of electrically connecting pads formed on at least one surface thereof and covering the circuit board with an insulating protection layer formed a plurality of openings to expose the electrically connecting pads; forming a conductive layer on surfaces of the insulating protection layer and openings, and forming a metal layer on the conductive layer by electroplating, with the openings of the insulating protection layer being deposited by the metal layer; forming a resist layer on the metal layer wherein the resist layer is further patterned to form a plurality of openings corresponding to the electrically connecting pads to partially expose the metal layer; forming an adhesive layer in the openings of the resist layer; and removing the resist layer, and then removing the metal layer and conductive layer not covered by the adhesive layer, to form conductive bump structures on the electrically connecting pads. (end of abstract)
Agent: Mr. Joseph A. Sawyer Jr. Sawyer Law Group LLP - Palo Alto, CA, US Inventor: Wen-Hung Hu USPTO Applicaton #: 20060219567 - Class: 205125000 (USPTO) Related Patent Categories: Electrolysis: Processes, Compositions Used Therein, And Methods Of Preparing The Compositions, Electrolytic Coating (process, Composition And Method Of Preparing Composition), Coating Selected Area, Specified Product Produced, Product Is Circuit Board Or Printed Circuit The Patent Description & Claims data below is from USPTO Patent Application 20060219567. Brief Patent Description - Full Patent Description - Patent Application Claims
CROSS-REFERENCE TO RELATED APPLICATIONS [0001] This application claims benefit under 35 USC 119 of Taiwan Application No. 094110691, filed Apr. 4, 2005. FIELD OF THE INVENTION [0002] The present invention relates to fabrication methods for conductive bump structures of circuit boards, and more particularly, to a method for fabricating conductive bump structures on electrically connecting pads of a circuit board. BACKGROUND OF THE INVENTION [0003] To make electronic products much lighter, thinner, shorter, and smaller, packages that are characterized with a small integrated circuit area, high component density, and multiple pins, such as BGA, flip chip, MCM and so on, are becoming mainstream in the market. For example, in the flip chip technique, a plurality of electrode pads are disposed on surface of an IC chip and a plurality of electrically connecting pads corresponding to the electrode pads are formed on a circuit board. Then, the chip is disposed with its active face down on the circuit board and the electrode pads of the chip are electrically connected with the electrically connecting pads of the circuit board through a plurality of solder bumps or other conductive adhesive materials formed between the chip and the circuit board. [0004] Conventionally, solder bumps or conductive adhesive materials are disposed on electrode pads or electrically connecting pads by printing. With both reduced pitch and size of electrically connecting pads, it becomes difficult to attach the solder bumps to the electrically connecting pads, thereby resulting in the lack of enough bonding force between the solder material and the electrically connecting pads. In addition, in that the solder material support strength is not enough, it is easy for the solder material to overflow during the reflow process. [0005] To overcome the above drawbacks, an electroplating process is used to form solder material on a circuit board. Compared with the printing method, the electroplating process with higher accuracy can meet the requirements of fine routing so as to implement high-density wiring with reduced circuit board area. To form the solder bumps, a conductive layer is first formed on the circuit. Then, solder material can be formed on the conductive layer. Detailed processing steps for the solder bumps are shown in FIGS. 1A to 1F. [0006] As shown in FIG. 1A, a solder mask layer 11 is formed on a circuit board 10 with a plurality of electrically connecting pads 100. [0007] As shown in FIG. 1B, a plurality of openings 110 are formed in the solder mask layer 11 to expose the electrically connecting pads 100 of the circuit board 10. [0008] As shown in FIG. 1C, a conductive layer 12 is formed on the exposed surface of the solder mask layer 11 and the exposed surface of the electrically connecting pads 100 in the openings 110. [0009] As shown in FIG. 1D, a resist layer is formed on the conductive layer 12, the resist layer having openings 130 formed corresponding to the electrically connecting pads 100 to expose the conductive layer 12. [0010] As shown in FIG. 1E, conductive bumps 14 are formed on the exposed surface of the conductive layer 12 by electroplating using the conductive layer 12 as a current conducting path. [0011] As shown in FIG. 1F, the resist layer 13 and the conductive layer 12 underneath the resist layer 13 are removed and a metal protection layer 15 is formed on the exposed surface of the conductive bumps 14 to protect the conductive bumps 14. [0012] In this conventional fabrication method, the conductive bumps 14 are formed in the region formed by openings 110 and the laminated openings 130. However, the deeper the openings are, the more difficult it is to form the conductive bumps 14 by electroplating. [0013] Moreover, because the conductive layer 12 has a small electroplating area, it is difficult to keep the current density stable. The unstable current density often results in uneven conductive bumps 14, thereby affecting subsequent processing steps. SUMMARY OF THE INVENTION [0014] According to the above drawbacks, a primary objective of the present invention is to provide a fabrication method of conductive bump structures which can avoid unevenness between solder bumps to ensure stable electrical connections with external electronic devices. [0015] Another objective of the present invention is to provide a fabrication method of conductive bump structures that can avoid the small electroplating area and deep holes of the prior art, thereby facilitating the electroplating process. [0016] A further objective of the present invention is to decrease the use of solder material for environmental concern. [0017] Still another objective of the present invention is to provide a fabrication method of conductive bump structures that can form conductive structures on electrically connecting pads of fine pitch circuit boards for external electrical connections. [0018] To achieve the above and other objectives, the present invention discloses a fabrication method of conductive bump structures of a circuit board, comprising: providing a circuit board with a plurality of electrically connecting pads formed on at least one surface thereof and covering the circuit board with an insulating protection layer that has a plurality of openings to expose the electrically connecting pads; forming a conductive layer on the insulating protection layer and surface of the openings; forming a metal layer on the conductive layer by electroplating, the openings of the insulating protection layer being deposited by the metal layer; covering the metal layer with a resist layer which is further patterned such that the resist layer to form a plurality of openings corresponding to the electrically connecting pads to partially expose the metal layer; forming an adhesive layer in the openings of the resist layer; and removing the resist layer, and then removing the metal layer and the conductive layer that are not covered by the adhesive layer to form conductive bump structures on the electrically connecting pads. Therein, if the adhesive layer is made of solder material, it is further reflowed to cover exposed surface of the metal layer. [0019] According to another embodiment of the present invention, the fabrication method of conductive bump structures of a circuit board comprises: providing a circuit board with a plurality of electrically connecting pads formed on at least one surface thereof and covering the circuit board with an insulating protection layer that has a plurality of openings to expose the electrically connecting pads; forming a conductive layer on the insulating protection layer and surface of the openings and forming a metal layer on the conductive layer by electroplating, the openings of the insulating protection layer being deposited by the metal layer; covering the metal layer with a resist layer which is further patterned such that the resist layer only covers the metal layer corresponding in position to the electrically connecting pads; removing the metal layer and the conductive layer that are not covered by the resist layer; and removing the resist layer and forming an adhesive layer on exposed surface of the metal layer. [0020] In the present invention, a metal layer is directly formed on the whole conductive layer that is not covered by a resist layer and accordingly has a larger electroplating area compared with the prior art, thereby eliminating the prior art drawbacks such as a relatively small electroplating area, electroplating difficulty due to unstable current density, and the presence of deep holes. In addition, an even and flat surface for the metal layer of the present invention ensures that the subsequently formed conductive bump structures have uniform height, thereby improving the quality of electrical connections between the conductive bump structures and external electronic devices. Continue reading... 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