|Error detection/correction and fault detection/recovery patents - Monitor Patents|
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Listing for abstract view: USPTO application #, Title, Abstract excerpt,Patent Agent. Listing format for list view: USPTO National Class full category number, title of the patent application. 06/11/2015 > patent applications in patent subcategories.
06/04/2015 > patent applications in patent subcategories.
05/28/2015 > 65 patent applications in 45 patent subcategories.
20150149810 - Apparatus, system and method for autonomous recovery from failures during system characterization on an environment with restricted resources: A power management mechanism maintains power to a processor and an integrated memory. Read-only logic and a cache are also provided. At power on, the read-only logic configures the cache as an internal memory and loads executable instructions in the cache. A copy of the executable instructions is stored in... Agent: Qualcomm Incorporated
20150149811 - Method for maintaining the functional ability of a field device: A method for maintaining the functional ability of a field device of automation technology, wherein the method comprises the following steps: monitoring the field device for at least one achieved parameter change (Δnx), wherein the parameter change (Δnx) converts an old parameter set (nx-1) into a new parameter set (nx),... Agent:
20150149812 - Self-debugging router platform: Exemplary methods for network debugging include a control plane of a first network device generating and injecting debug traffic into a data plane of the first network device such that the debug traffic appears to the data plane as if it originated from an external network device. The methods include... Agent:
20150149814 - Failure recovery resolution in transplanting high performance data intensive algorithms from cluster to cloud: A method of providing failure recovery capabilities to a cloud environment for scientific HPC applications. An HPC application with MPI implementation extends the class of MPI programs to embed the HPC application with various degrees of fault tolerance. An MPI fault tolerance mechanism realizes a recover-and-continue solution. If an error... Agent:
20150149813 - Failure recovery system and method of creating the failure recovery system: When detecting the configuration change or the operating state of a virtual machine of the main system, a VM management unit changes a value of a determination index of the virtual machine, and selects a virtual machine of the standby system/auxiliary system used for failure recovery of the virtual machine... Agent: Hitachi, Ltd.
20150149815 - Bios failover update with service processor having direct serial peripheral interface (spi) access: Certain aspects direct to systems and methods of BIOS failover update with a service processor (SP) having direct serial peripheral interface (SPI) access to a basic input/output system (BIOS) chip of a host computer. In certain embodiments, the SP receives a failover backup image from a BIOS being executed at... Agent: American Megatrends, Inc.
20150149817 - Managing non-volatile media: Apparatuses, systems, and methods are disclosed to manage non-volatile media. A method includes determining a configuration parameter for a set of storage cells of a non-volatile recording medium. A method includes reading data from a set of storage cells using a determined configuration parameter. A method includes adjusting a configuration... Agent:
20150149816 - Multi-stage codeword detector: A multi-stage codeword detector for detecting codewords from read signals received from a multi-level memory device, includes a first detection stage configured for a coarse detection of a first codeword from a received read signal; a second detection stage configured for a fine detection of a second codeword from the... Agent:
20150149818 - Defect management policies for nand flash memory: Systems and methods of managing defects in nonvolatile storage systems that can be used to avoid an inadvertent loss of data, while maintaining as much useful memory in the nonvolatile storage systems as possible. The disclosed systems and methods can monitor a plurality of trigger events for detecting possible defects... Agent:
20150149819 - Parity chunk operating method and data server apparatus for supporting the same in distributed raid system: The present invention relates to operating a parity chunk, and a parity chunk operating method, in an environment dividing data of a file by a chunk unit, constituting a stripe by calculating a parity for a failure recovery, dispersely storing a data chunk and a parity chunk included in the... Agent: Electronics And Telecommunications Research Institute
20150149821 - Electrical installation having an uninterruptible power supply: An electrically operated installation and method has a plurality of electrical loads, in which the event of a failure of a basic supply voltage the electrical loads are supplied by a backup voltage, wherein a power supply unit exchanges data with several loads via a field bus, the loads each... Agent: Siemens Aktiengesellschaft
20150149820 - Memory and memory module including the same: A memory unit including a first data transferring/receiving unit suitable for transferring/receiving data through a first data bus for communication with a host, a second data transferring/receiving unit suitable for transferring/receiving data through a second data bus for a data backup, and a control unit suitable for controlling the first... Agent: Sk Hynix Inc.
20150149822 - Event handling in storage area networks: Storage area network (SAN) components contain a processor configured to provide a first event handling module that can receive an error event at a first hardware component of the storage area network. A database is accessed that contains associations between error event data and potential sources of errors. A plurality... Agent: International Business Machines Corporation
20150149823 - Methods for preserving state across a failure and devices thereof: A method, non-transitory computer readable medium, and host device that receives one or more transactions. A state is stored in a transaction log in a volatile memory wherein the state includes information associated with the one or more transactions. The transaction log is stored in a stable storage device when... Agent:
20150149824 - Method and apparatus for reconstructing an indirection table: A memory system contains solid state media for storing data and uses volatile memory for storing an indirection table. The indirection table maps client addresses to media addresses in the solid state media. The solid state media also stores metadata summaries maintaining the mappings of the client addresses to the... Agent: Violin Memory Inc.
20150149825 - Power fail latching based on monitoring multiple power supply voltages in a storage device: The various embodiments described herein include systems, methods and/or devices used to enable power fail latching based on monitoring multiple power supply voltages in a storage device. In one aspect, the method includes: (1) determining whether a first power supply voltage provided to the storage device is out of range... Agent: Sandisk EnterpriseIPLLC
20150149829 - Failure detecting apparatus and failure detecting method: A failure detecting apparatus includes: a processor that executes a process includes: identifying, when a new message is output from a target to be monitored, a message to be replaced, which is output from the target to be monitored before the output of the new message and is not output... Agent:
20150149827 - Identifying a change to indicate a degradation within a computing device: Examples disclose a method to collect a first property and a second property of a computing device. The first property and the second property monitor a functionality of the computing device and are collected as a function of time. Further, the examples provide comparing the first property and the second... Agent:
20150149828 - Management of cloud-based application delivery: The techniques described herein provides troubleshooting, monitoring, reporting and dynamic adjustments and virtualization to management of application delivery. A system can be completely external to an application delivery data path, or can be highly compatible for integration to the application delivery path. Entities can be billed on a per user,... Agent: Anunta Technology Management Services Ltd.
20150149826 - Management of performance levels of information technology systems: A method for monitoring information systems has been provided. The method includes analyzing at least one event data record of an information technology system to determine whether at least one target system of the information technology system has monitoring levels, trace levels, log levels, or snap shot levels which should... Agent: International Business Machines Corporation
20150149830 - Data dump for a memory in a data processing system: As the file system of an operating system program might be damaged by a crash, the file system is usually used neither for the selection of data to be dumped from a memory nor for the analysis of the dumped data, and all data contained in one or several areas... Agent:
20150149831 - Problem determination in distributed enterprise applications: Problem determination in an enterprise computer system in a distributed environment is provided. Information is obtained regarding the enterprise applications, and high-level information is presented to a user, with one or more prompts provided to the user for more detailed information. In response to a request from a user for... Agent:
20150149832 - Bus pressure testing system and method thereof: A bus pressure testing system and method thereof are disclosed, where a peripheral component interconnect express (PCI-E) device is used to initialize a central processing unit (CPU), peripheral component interface express (PCI-E) device interface and memory according to a testing model, generate a data transmission path corresponding to the testing... Agent: Inventec (pudong) Technology Corporation
20150149833 - Embedding stall and event trace profiling data in the timing stream - extended timing trace circuits, processes, and systems: An electronic tracing process includes packing both stall (215) and reason (219) data into a single high priority timing information stream. An integrated circuit includes an electronic processor (110), and a tracing circuit (120) operable to pack both stall and events data into a single timing information stream. Other circuits,... Agent:
20150149834 - Testing device and a test method with zoom display:
20150149835 - Managing faults in a high availability system: An approach is provided for managing a failure of a critical high availability (HA) component in a HA system. Critical HA components are identified. Categories are assigned to the identified components and weights are assigned to the categories. A current value indicating a performance of a component included in the... Agent: International Business Machines Corporation
20150149836 - Recoverable and fault-tolerant cpu core and control method thereof: A recoverable and fault-tolerant CPU core and a control method thereof are provided. The recoverable and fault-tolerant CPU core includes first, second, and third arithmetic logic circuits configured to perform a calculation requested by the same instruction, a first selector configured to compare calculation values output from the first, second,... Agent:
20150149837 - Method, apparatus, and computer program product for collecting and displaying sporting event data based on real time data for proximity and movement of objects: A method, apparatus and computer program product are provided for collecting sporting event data based on real time data for proximity and movement of objects. In the context of a method, the method includes calculating a tag data filter parameter for a plurality of tag events based on received tag... Agent:
20150149838 - Rearranging programming data to avoid hard errors: This disclosure relates to avoiding a hard error in memory during write time by shifting data to be programmed to memory to mask the hard error. In one implementation, a method of programming data to a memory array includes obtaining error data corresponding to a selected memory cell, shifting a... Agent:
20150149839 - System and method for dynamic signal interference detection during testing of a data packet signal transceiver: A system and method for testing multiple wireless data packet signal transceiver devices under test (DUTs) with dynamic signal interference compensation. Transmit data packets originating from other DUTs are monitored during receive signal testing of a selected DUT for concurrent occurrences of transmit and receive data packets. From this, it... Agent: Litepoint Corporation
20150149840 - Read retry for non-volatile memories: An apparatus for reading a non-volatile memory includes a tracking module operable to calculate means and variances of voltage level distributions in a non-volatile memory and to calculate at least one reference voltage to be used when reading the non-volatile memory based on the means and variances, a likelihood generator... Agent: Lsi Corporation
20150149841 - Systems and methods for low voltage secure digital (sd) interfaces: Systems and methods for low voltage secure digital (SD) interfaces are disclosed. Embodiments of the present disclosure relate to systems and voltage for a lower voltage SD or SD Input/Output (SDIO) interface such as two integrated circuits. In particular, a SD or SDIO interface may be established between two SD... Agent: Qualcomm Incorporated
20150149842 - Test device and method using a separate control module for test: A test device and method using a separate control module for test are disclosed, where a main console is replaced with a control module of the test device, the control module may generate a control command after receiving the a command transmitted from the main console, and transmit the control... Agent: Inventec (pudong) Technology Corporation
20150149843 - Integrated circuit with a high-speed debug access port: An integrated circuit with a high-speed debug access port includes interface circuitry and a dedicated debug port in the interface circuitry. The interface circuitry includes a function circuit block that is used to receive a data packet from external circuitry coupled to the integrated circuit. The dedicated debug port is... Agent: Altera Corporation
20150149845 - Device testing architecture, method, and system: A device test architecture and interface is provided to enable efficient testing embedded cores within devices. The test architecture interfaces to standard IEEE 1500 core test wrappers and provides high test data bandwidth to the wrappers from an external tester. The test architecture includes compare circuits that allow for comparison... Agent:
20150149844 - Double data rate test interface and architecture: A device test architecture and a reduced device test interface are provided to enable efficient testing of embedded cores and other circuits within devices. The reduced device test interface is achieved using a double data rate (DDR) signaling technique between the tester and the device. The DDR test interface allows... Agent:
20150149846 - Testing a processor assembly: A testing backplane apparatus includes first test ports configured to receive a first processor assembly under test and the plurality of first test ports may be an even number of first test ports or an odd number of first test ports. The testing backplane apparatus includes second test ports, where... Agent: International Business Machines Corporation
20150149847 - Channel sharing for testing circuits having non-identical cores: Various aspects of the disclosed techniques relate to channel sharing techniques for testing circuits having non-identical cores. Compressed test patterns for a plurality of circuit blocks are generated for channel sharing. Each of the plurality of circuit blocks comprises a decompressor configured to decompress the compressed test patterns. Test data... Agent: Mentor Graphics Corporation
20150149848 - Detection device, sensor, electronic apparatus, and moving object: A detection device includes: a detection circuit which carries out detection processing of a physical quantity on the basis of a signal from a physical quantity transducer and outputs detected data of the physical quantity; and a correction unit which carries out correction processing on the detected data and outputs... Agent:
20150149849 - Detection and recovery of harq nak-to-ack feedback error in wireless communications systems: In wireless communication networks that use ARQ/HARQ feedback protocols, when a first device receives an apparent HARQ ACK from a second device, the first device may make a new transmission using a HARQ Channel ID whose previous usage was under conditions indicating a likelihood of error in the ACK. When... Agent:
20150149850 - Device performance monitoring: A computing device performance monitor may be configured to collect performance metric information regarding one or more monitored computing devices, and may assign condition point values to each metric. The performance monitor may generate a total of the condition point values, and use the total to determine an appropriate response.... Agent: Comcast Cable Communication, LLC
20150149851 - System and method for communicating with low density parity check codes: The present invention provides an approach for FEC encoding based on intermediate code block lengths not associated with any supported mother FEC code. A first string of k2 data bits is received. The first string of data bits is encoded to generate an N2 bit code block for transmission over... Agent:
20150149852 - Memory device and memory system: A memory device and a memory system, the memory system including a data compressor for generating compressed data by compressing program data in a first unit, and an error correction block generator for dividing the compressed data in a second unit to obtain a plurality of pieces of normal data,... Agent:
20150149853 - Half pipelined turbo decoder and method for controlling thereof: A turbo decoder configured to perform MAP (Maximum A Posteriori) decoding for a plurality of data blocks including encoded noise, comprises a first MAP decoder configured to perform MAP decoding for a first data block that is included in the plurality of data blocks; an interleaver configured to interleave a... Agent: Electronics And Telecommunications Research Institute
20150149855 - Bit-line defect detection using unsatisified parity code checks: An apparatus having a device and a circuit is disclosed. The device has a plurality of bit-lines and is configured to store a codeword. The circuit is configured to (i) receive the codeword from the device, (ii) generate a syndrome by performing a portion less than all of an iterative... Agent: Lsi Corporation
20150149854 - Early data tag to allow data crc bypass via a speculative memory data return protocol: A bypass mechanism allows a memory controller to transmit requested data to an interconnect before the data's error code has been decoded, e.g., a cyclical redundancy check (CRC). The tag, tag CRC, data, and data CRC are pipelined from DRAM in four frames, each having multiple clock cycles. The tag... Agent: International Business Machines Corporation
20150149856 - Decoding with log likelihood ratios stored in a controller: An apparatus having one or more lookup tables and a decoder is disclosed. The lookup tables are configured to store a plurality of sets of values of log likelihood ratios. The decoder is configured to (i) receive a codeword read from a memory, (ii) receive an initial one of the... Agent: Lsi Corporation
20150149862 - Adjustable read time for memory: Apparatuses, systems, methods, and computer program products are disclosed for controlling a read time of an electronic memory device. A method includes reading data from an integrated circuit of storage using a read time for the integrated circuit of storage. A method includes adjusting a read time for an integrated... Agent:
20150149857 - Error correction in memory: Apparatus, systems, and methods for error correction in memory are described. In one embodiment, a controller comprises logic to receive a read request from a host device for data stored in a memory, retrieve the data and an associated error correction codeword, send the data to a host device, apply... Agent: Intel Corporation
20150149860 - Iterative data storage read channel architecture: In one embodiment, a computer program product for iterative read channel operation has program instructions embodied therewith that are executable by a controller to cause the controller to: in an iterative process until a maximum number of iterations has been reached or a valid codeword is produced: execute one or... Agent:
20150149858 - Memory controller and method of operating memory controller for reading data from memory device at high speed: An method is provided for operating a memory system. The method includes reading data from memory cells connected to a selected word line to generate read data; performing an error correction operation based on the read data and generating segmented error correcting code (ECC) read data; transferring the segmented ECC... Agent:
20150149859 - Method and apparatus for encoding and decoding data in memory system: Example embodiments disclose methods and apparatuses for encoding and decoding data in a memory system. In an encoding method according to an example embodiment of inventive concepts, a codeword is generated based on a combination of data to be stored and auxiliary data according to stuck cells and an encoding... Agent:
20150149861 - Method and apparatus for nested dispersed storage: A method begins by a DS processing module generating a plurality of encoded slices from a data segment using an error encoding function. The method continues with the DS processing module identifying a plurality of DS storage units for storing the plurality of encoded slices. The method continues with the... Agent: Cleversafe, Inc.
20150149863 - Semiconductor storage device, method for controlling the same and control program: According to one embodiment, a semiconductor memory stores a program for causing a memory controller to operate in at least one of first and second modes. In the first mode, for each of the blocks, the memory controller autonomously erases and writes data and reads the written data, and determines... Agent: Kabushiki Kaisha Toshiba
20150149864 - Bit recovery system: A particular device includes a resistance-based memory device, a tag random-access memory (RAM), and a bit recovery (BR) memory. The resistance-based memory device is configured to store a data value and error-correcting code (ECC) data associated with the data value. The tag RAM is configured to store information that maps... Agent: Qualcomm Incorporated
20150149865 - Cache structure with parity-protected clean data and ecc-protected dirty data: A method includes generating error detection information associated with data to be stored at a cache in response to determining that the data is clean. The method also includes storing the clean data at a first region of the cache. The method further includes generating error correction information associated with... Agent: Qualcomm Incorporated
20150149868 - Data protection system: The present invention provides systems and methods for logically organizing data for storage and recovery on a data storage medium using a multi-level format. The present invention also provides systems and methods for protecting data stored on data storage medium so that the data may be recovered without errors.... Agent:
20150149866 - Early data tag to allow data crc bypass via a speculative memory data return protocol: A bypass mechanism allows a memory controller to transmit requested data to an interconnect before the data's error code has been decoded, e.g., a cyclical redundancy check (CRC). The tag, tag CRC, data, and data CRC are pipelined from DRAM in four frames, each having multiple clock cycles. The tag... Agent: International Business Machines Corporation
20150149867 - Storage device and operating method thereof: An operating method of a storage device is provided. The operating method comprises the following steps. First, a first data is read from a target address of a first storage unit. Then, an assisting unit checks whether the target address is corresponding to a second data stored in a second... Agent: Macronix International Co., Ltd.
20150149869 - Physical subsector error marking: Physical subsector error marking allows for selectively marking subsectors of a physical sector of a storage medium as unreadable. The error marking may include a bad sector mask to indicate that the subsector is unreadable combined with an error signature to confirm that the bad sector mask was set intentionally.... Agent: Seagate Technology LLC
20150149870 - Method and apparatus for low delay access to key-value based storage systems using fec techniques: A method and apparatus is disclosed herein for low delay access to key-value based storage systems. In one embodiment, the method for putting data into a key-value store comprising dividing the data into K portions, where K is an integer; selecting an erasure coding to apply to the K portions... Agent:
20150149872 - Data encoding in solid-state storage apparatus: A method for encoding an input data block for storage in q-level cells of solid-state memory includes producing a preliminary block from the input data block by modulation encoding at least part of the input block into a first group of qary symbols via a first drift-tolerant encoding scheme, the... Agent:
20150149873 - Error correction method and module for non-volatile memory: There is provided an error correction method for a non-volatile memory. The method includes receiving a codeword read from the non-volatile memory, computing a reliability information for each bit of the codeword received, and performing a reduced-complexity soft-decision decoding (SDD) technique to decode the received codeword. In particular, the SDD... Agent: Agency For Science, Technology And Research
20150149871 - Flash channel with selective decoder likelihood dampening: An apparatus for reading a flash memory includes a read controller operable to read the flash memory to yield read patterns, a likelihood generator operable to map the read patterns to likelihood values, a decoder operable to decode the likelihood values, a data state storage operable to retrieve the likelihood... Agent: Lsi Corporation
20150149874 - Reliability metric for decoding hypothesis: A reliability metric is used for determining whether to prune a decoding hypothesis. For example, a reliability metric can be generated for each possible hypothesis generated during blind decoding operations. The reliability metric can then be used in a pruning process whereby a determination to prune a given hypothesis is... Agent: Qualcomm Incorporated05/21/2015 > 52 patent applications in 32 patent subcategories.
20150143161 - Disaster recovery appliance: A disaster recovery appliance is described herein. The disaster recovery appliance is coupled to one or more servers. The disaster recovery appliance continuously receives backup data for each of the one or more servers. When a server fails, the disaster recovery appliance, replaces the failed server. While the failed server... Agent:
20150143158 - Failover in a data center that includes a multi-density server: Failover in a data center that includes a multi-density server, where the multi-density server includes multiple independent servers, includes; detecting, by a management module, a failure of one of the independent servers of the multi-density server; identifying, by the management module, a failover target; determining, by the management module, whether... Agent: International Business Machines Corporation
20150143159 - Failover in a data center that includes a multi-density server: Failover in a data center that includes a multi-density server, where the multi-density server includes multiple independent servers, includes; detecting, by a management module, a failure of one of the independent servers of the multi-density server; identifying, by the management module, a failover target; determining, by the management module, whether... Agent: International Business Machines Corporation
20150143160 - Modification of a cluster of communication controllers: Provided is a system having a cluster of communication controllers, a method for modification of the latter, and a computer program product carrying computer executable code for execution of the method. Each communication controller is operable for providing network connections of the computer system with external computer systems using communication... Agent:
20150143162 - Two-tier failover service for data disaster recovery: Technologies are described herein for providing a two-tier failover service. A request to access content by an application associated with an application identifier may be identified. A first record corresponding to the application identifier may be retrieved from a database information table. The first record may include a reference identifier,... Agent:
20150143157 - Method for controlling operations of server cluster: A server cluster has a plurality of application servers. During failover of a failed node of the application servers, right to use of internet protocol (IP) address of the failed node is transferred to a surviving node of the server cluster according to a failed-link index of the failed node,... Agent:
20150143165 - Memory systems and methods of managing failed memory cells of semiconductor memories: A memory system includes a memory controller configured to replace a memory block including a failed memory cell with a unit cache block of a cache memory in response to detection of the failed memory cell in the memory block. The unit cache block is smaller than a minimum size... Agent:
20150143166 - Security key entry using ancillary input device: A physical, non-human readable representation of a digital key may be in a physical key article. The key article may enable a person to generate a signal representing the digital key from a user interface device in communication with a computer by physical manipulation of the key article. Access to... Agent:
20150143167 - Storage control apparatus, method of controlling storage system, and computer-readable storage medium storing storage control program: A storage control apparatus for controlling a storage system including a plurality of storage devices includes a monitor unit that collects statistics from each of the storage devices; and a selection unit that, in the event of a failure of any of the storage devices, selects a storage device to... Agent:
20150143168 - Restore in cascaded copy environment: In one aspect of the present description, handling multiple backup processes comprises detecting that a defined storage volume is present in a first cascade of storage volumes; detecting that the defined storage volume is present in a second cascade of storage volumes; receiving a data write for a last storage... Agent:
20150143164 - I/o request mirroring in a clustered storage system: Clustered storage systems and methods are presented herein. One clustered storage system includes a logical volume comprising first and second pluralities of storage devices. The first plurality of storage devices is different from the second plurality of storage devices and includes at least the same data as the second plurality... Agent: Lsi Corporation
20150143163 - Preventing a rollback attack in a computing system that includes a primary memory bank and a backup memory bank: Preventing a rollback attack in a computing system that includes a primary memory bank and a backup memory bank, including during startup of the computing system: determining whether the computing system is attempting to use firmware in the backup memory bank; responsive to determining that the computing system is attempting... Agent:
20150143169 - Storage control device, non-transitory computer-readable recording medium having stored therein program, and control method: There is provided a storage control device that is communicably connected to a plurality of storage devices and a plurality of spare storage devices through a plurality of paths. The storage control device includes: a memory configured to store path information associating the plurality of spare storage devices and the... Agent:
20150143172 - Computing device and method for automatically recovering bios of computing device: In a method for automatically recovering a basic input-output system (BIOS) of a computing device, the computing device includes a serial peripheral interface (SPI) ROM, a storage device, and a supper I/O (SIO) controller. The SPI ROM stores a first BIOS booting block and a main BIOS, and the SIO... Agent:
20150143173 - Determining performance states of parent components in a virtual-machine environment based on performance states of related child components during a time period: Techniques promote monitoring of hypervisor systems by presenting dynamic representations of hypervisor architectures that include performance indicators. A reviewer can interact with the representation to progressively view select lower-level performance indicators. Higher level performance indicators can be determined based on lower level state assessments. A reviewer can also view historical... Agent: Splunk Inc.
20150143171 - Method, electronic device and controller for recovering array of memory cells: A method, an electronic device and a controller for recovering an array of memory cells are provided. The method comprises the following steps. Whether a recovery control signal is received or not is determined. A retention checking procedure is executed for identifying whether a threshold voltage distribution of at least... Agent: Macronix International Co., Ltd.
20150143170 - Storage device failure recovery system: A storage device failure recovery system includes a storage IHS and a user IHS coupled together over a network. The user IHS includes a storage system having a storage device, and a storage repair function that periodically provides a storage device image over the network to the storage IHS using... Agent:
20150143174 - Method and apparatus for recovering metadata lost during an unexpected power down event: A system including first and second memories and a control module. The first memory stores a first lookup table (LUT) with first metadata. The first metadata maps logical addresses to physical addresses. The first metadata is lost due to an unexpected power down event. The second memory stores an event... Agent:
20150143175 - Information processing apparatus, control device, and computer-readable recording medium having stored control program: A first control device includes: a switch device including a first port connected to a second control device among the plurality of control devices via a first channel and a second port connected to the second control device via a second channel and to which a processing device is connected;... Agent:
20150143177 - Analysis stack for an event flow: An analysis module is configured to receive data associated with an event flow. The data is received from a first analysis module (e.g., in a stack of analysis modules) or from the event flow. The analysis module is configured to execute an analysis operation on the data to generate a... Agent:
20150143176 - Identification system, identification method, and program: The present invention is an identification system comprising: an irrelevance trigger interpreting section for calculating a logical formula of irrelevance triggers for a component in a system from a cut set logical formula f of a system failure; and minimal cut set evaluating means for minimizing the logical formula of... Agent:
20150143178 - Testing framework for control devices: The present disclosure generally relates to the automated testing of a system that includes software or hardware components. In some embodiments, a testing framework generates a set of test cases for a system under test using a grammar. Each test case may perform an action, such as provide an input... Agent:
20150143179 - System and method for progressive fault injection testing: A system and method for performing a progressive fault injection process to verify software is provided. In some embodiments, the method comprises loading a software product into the memory of a testbed computing system, wherein the software product includes a function and a statement that calls the function. A data... Agent: Netapp, Inc.
20150143180 - Validating software characteristics: Aspects of the subject matter described herein relate to software validation. In aspects, code may be instrumented to generate certain records upon execution. The code may be further instrumented to generate start and stop records that correspond to the start and stop events of a scenario of a program. The... Agent: Microsoft Corporation
20150143181 - Dual endianess and other configuration safety in lock step dual-core system, and other circuits, processes and systems: An electronic circuit includes a microcontroller processor (410), a peripheral (420) coupled with the processor, an endian circuit (470) coupled with the processor and the peripheral to selectively provide different endianess modes of operation, and a detection circuit (140) to detect a failure to select a given endianess, whereby inadvertent... Agent:
20150143184 - Network management server and recovery method: A network management server stores, in terms of a transmission path within the network, each occurrence pattern of a failure occurrence area in which a failure has occurred in a communication apparatus through which the transmission path passes. Information for identifying a recovery plane serving as a set of recovery... Agent:
20150143183 - Storage control apparatus and method for controlling storage apparatus: A storage control apparatus for controlling a storage apparatus including inside a casing thereof one or more storage units and two or more fans for cooling the storage units includes a processor. The processor is configured to obtain abnormality information regarding abnormalities in access in each of the storage units.... Agent: Fujitsu Limited
20150143182 - Varying logging depth based on user defined policies: Techniques for writing logging files, where the logging files include multiple pieces of logging information. The pieces of logging information are based on operation of a computer system. The writing of the logging information includes the following steps (not necessarily in the following order): (i) choosing a set of logging... Agent: International Business Machines Corporation
20150143185 - Data storage and variable length error correction information: A corresponding portion of storage (such as one or more storage cells) is assigned one of multiple different error correction modes depending on a respective ability of the corresponding portion of storage cells to store data without error. Groups of storage cells that are less prone to failures (i.e., loss... Agent:
20150143186 - Systems and methods for detecting a dimm seating error: DIMM seating errors may be detected. An example detection method includes determining whether a training error has occurred for a number of dynamic random access memories (DRAMs) of a DIMM. The Example method includes identifying a location for each of the DRAMs. The example method includes determining whether a seating... Agent: Hewlett-packard Developement Company
20150143187 - Implementing enhanced performance with read before write to phase change memory: A method and apparatus are provided for implementing enhanced performance with read before write to phase-change-memory. Each write to PCM is preceded by a read and a calculation to discover a location of any bad bits. The write data is converted to a format that can be corrected for a... Agent: Hgst Netherlands B.v.
20150143188 - Methods for accessing a storage unit of a flash memory and apparatuses using the same: An embodiment of a method for accessing a storage unit of a flash memory, performed by a control unit, is disclosed to include at least the following steps. A transaction is appended to a bad-column table each time a bad column of a block within the storage unit is inspected.... Agent:
20150143189 - Coverage enhancement and power aware clock system for structural delay-fault test: Methods and devices applying to a clock system of scan circuits to enhance the test coverage for structural delay-fault tests are provided. According to an aspect, a method applying to a clock system of a scan circuit of a scan test containing one or more clock gating cells includes at... Agent:
20150143190 - Partial scan cell: An integrated circuit 2 is provided with a serial scan chain. Disposed between at least some serial scan cells 32, 34 forming a serial scan chain there is provided a partial scan cells 36. These partial scan cells are arranged such that during a scan mode in which serial data... Agent:
20150143191 - Shadow access port method and apparatus: The disclosure describes a novel method and apparatus for providing a shadow access port within a device. The shadow access port is accessed to perform operations in the device by reusing the TDI, TMS, TCK and TDO signals that are used to operate a test access port within the device.... Agent:
20150143192 - Application server and method of error recovery when downloading data files: In a method of error recovery when downloading data files using an application server, the application server connects to at least one terminal device and several file servers. The application server receives a file downloading request from the terminal device, finds a first file server nearest to the terminal device,... Agent: Hon Hai Precision Industry Co., Ltd.
20150143193 - Information processing apparatus, control method for the same and storage medium: An information processing apparatus, connected to a management server managing a set value used among a plurality of information processing apparatuses, can perform an appropriate process according to the situation of an information processing system and can prevent wasteful power consumption thereof. A set value acquired from the management server... Agent:
20150143194 - Reduced complexity non-binary ldpc decoding algorithm: Decoding logic is provided that is operational upon a data buffer to represent a plurality of variable nodes and a plurality of check nodes. For a respective one of the variable nodes, a vector component is selected from a confidence vector associated with the variable node. Using a respective one... Agent:
20150143195 - Encoding and decoding using constrained interleaving: Serially-concatenated codes are formed in accordance with the present invention using a constrained interleaver. The constrained interleaver cause the minimum distance of the serial concatenated code to increase above the minimum distance of the inner code alone by adding a constraint that forces some or all of the distance of... Agent:
20150143196 - Systems and methods for faid follower decoding: Systems and method relating generally to data processing, and more particularly to systems and methods for decoding information.... Agent: Lsi Corporation
20150143197 - Codes for enhancing the repeated use of flash memory: A basic property of flash memory is that: a 0-bit can be changed into a 1-bit, but not vice-versa, which severely limits the possibilities of reusing storage space with new data. A family of new coding methods is presented that enables double use of the memory, effectively expanding the combined... Agent:
20150143199 - Computer memory power management: A method of operating a computer memory system with ECC features that will enable operational modes with less electrical power consumption. A chip mark normally used to mark a failing DRAM device may instead be used to mark a non-failing DRAM device before a computer memory system shuts off electrical... Agent: International Business Machines Corporation
20150143198 - Method and apparatus for multiple-bit dram error recovery: A system for replacing a page stored in system memory when reading the page incurs a multiple-bit error. Upon reading a page in system memory for which a multiple-bit error is detected, backup data in flash memory is loaded into a redundant page in the system memory, and a re-mapper... Agent: Qualcomm Incorporated
20150143200 - Computer memory power management: A method of operating a computer memory system with ECC features that will enable operational modes with less electrical power consumption. A chip mark normally used to mark a failing DRAM device may instead be used to mark a non-failing DRAM device before a computer memory system shuts off electrical... Agent: International Business Machines Corporation
20150143201 - Error-correcting code distribution for memory systems: According to one embodiment, a memory system includes a plurality of memory devices and a memory controller operatively coupled to the memory devices. The memory controller is configured to partition write data into a plurality of data blocks, where each data block is associated with one of the memory devices.... Agent: International Business Machines Corporation
20150143203 - Semiconductor device and method of operating the same: A semiconductor device includes a memory device suitable for outputting health monitoring data including information on a threshold voltage distribution, and outputting read data read from memory cells included in the memory device, and a controller suitable for receiving a predetermined quantity of the read data from the memory device... Agent: Sk Hynix Inc.
20150143202 - Systems and methods for soft decision generation in a solid state memory system: Systems and method relating generally to solid state memory, and more particularly to systems and methods for generated data from a solid state memory.... Agent: Lsi Corporation
20150143205 - Dtv transmitting system and method of processing broadcast data: A DTV transmitting system includes an encoder, a randomizer, a block processor, a group formatter, a deinterleaver, and a packet formatter. The encoder codes enhanced data for error correction, permutes the coded data, and further codes the permuted data for error detection. The randomizer randomizes the coded enhanced data, and... Agent:
20150143204 - Transmission device, reception device, transmission method, and reception method: A transmission device for rigorously protecting important information when information is transferred via a best-effort network. In this transmission device, a quality control information retention unit (203) holds quality control information set by a user. A recovery strength instruction unit (204) sets redundant code strength on the basis of transmission... Agent:
20150143206 - Method for performing error corrections of digital information codified as a symbol sequence: A method and system for making error corrections on digital information coded as symbol sequences, for example digital information stored in electronic memory systems or transmitted from and to these systems is described, provides the 5 transmission of sequences incorporating a portion of error corrector code allowing the sequence which... Agent:
20150143207 - Computationally efficient convolutional coding with rate-matching: An error coding circuit comprises a non-systematic convolutional encoder for coding an input bit stream to produce two or more groups of parity bits, an interleaver circuit for interleaving parity bits within each group of parity bits, and a rate-matching circuit for outputting a selected number of the interleaved parity... Agent:
20150143208 - Signal quality evaluation apparatus, signal quality evaluation method, and reproducing device: Provided is a signal quality evaluation apparatus, including an error pattern detection unit to which binarized data obtained by performing a PRML decoding process on a reproduced signal of bit information by partial response equalization and maximum likelihood decoding is input, the error pattern detection unit configured to detect at... Agent:Previous industry: Electrical computers and digital processing systems: support
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