|Error detection/correction and fault detection/recovery patents - Monitor Patents|
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Error detection/correction and fault detection/recovery August inventions list 08/11Below are recently published patent applications awaiting approval from the USPTO. Recent week's RSS XML file available below.
Listing for abstract view: USPTO application #, Title, Abstract excerpt,Patent Agent. Listing format for list view: USPTO National Class full category number, title of the patent application. 08/25/2011 > 45 patent applications in 28 patent subcategories. inventions list
20110208993 - Systems and methods for diagnosing and fixing electronic devices: Systems and methods for reducing the cost and time required for diagnosing and fixing electronic devices are provided. A host electronic device may be configured to generate a log of events that it experiences. A help component may access the generated log and analyze the log to detect if the... Agent: Apple Inc.
20110208992 - Universal resource locator watchdog: A watchdog system for identifying failures in uniform resource locators (URLs) respective of advertized content. The system comprises a database containing at least campaign information, the at least campaign information containing at least a URL to be monitored by the watchdog system, the URL directs to advertized content; and a... Agent: Kenshoo Ltd.
20110208995 - Read-modify-write protocol for maintaining parity coherency in a write-back distributed redundancy data storage system: Data storage reliability is maintained in a write-back distributed data storage system including multiple nodes, each node comprising a processor and an array of failure independent data storage devices. Information is stored as a set of stripes, each stripe including a collection of multiple data strips and associated parity strips,... Agent: International Business Machines Corporation
20110208996 - Read-other protocol for maintaining parity coherency in a write-back distributed redundancy data storage system: Data storage reliability is maintained in a write-back distributed data storage system including multiple nodes. Each node comprises a processor and an array of failure independent data storage devices. Information is stored as a set of stripes, each stripe including a collection of at least a data strip and associated... Agent: International Business Machines Corporation
20110208994 - Rebuilding lost data in a distributed redundancy data storage system: Rebuilding lost data in a distributed redundancy data storage system including multiple nodes, is provided. User data is stored as a collection of stripes, each stripe comprising a collection of data strips and associated parity strips, the stripes distributed across multiple corresponding data owner nodes and multiple corresponding parity owner... Agent: International Business Machines Corporation
20110208997 - Radiation hard and fault tolerant multicore processor and method for ionizing radiation environment: A redundancy system in a fault tolerant computer comprises a multiple core processor which may support a real time operating system. The multiple core machine may be actual or virtual. Multiple identical instructions, e.g., three instructions, are executed redundantly so that the redundancy system can detect and recover from a... Agent: Space Micro, Inc., A Corporation Of Delaware
20110208998 - Disk array device and its control method: To shorten the time from power restoration to the resumption of business operation. During a power failure, a memory controller saves configuration information and directory information of a shared memory to a nonvolatile memory, and saves data of a cache memory to the nonvolatile memory. During power restoration from a... Agent: Hitachi, Ltd.
20110208999 - Method of storing data on a secondary storage device: A backup method relies on a single secondary storage device, such as a tape storage device, which emulates multiple secondary storage devices. The emulated secondary storage devices are coupled to data sources. Data which is received from the data sources is tagged with respective unique identifiers, interleaved and stored on... Agent:
20110209000 - Systems and methods for allocating network resources from one address realm to clients in a different address realm: Disclosed is a method performed by a gateway server. The method may include the following steps: receiving from a client belonging to a first address realm a request for a network resource from a second address realm; allocating a network resource from the second address realm to the client in... Agent: Telefonaktiebolaget L M Ericsson (publ)
20110209001 - Time modulated generative probabilistic models for automated causal discovery: Dependencies between different channels or different services in a client or server may be determined from the observation of the times of the incoming and outgoing of the packets constituting those channels or services. A probabilistic model may be used to formally characterize these dependencies. The probabilistic model may be... Agent: Microsoft Corporation
20110209003 - Information processing apparatus with debugging unit and debugging method therefor: An information processing apparatus includes an external tool unit configured to provide a man-machine interface to a debugging user; and a microcontroller. The microcontroller includes: a CPU section configured to execute a program as a debugging target in a response to a first clock signal, wherein a clock rate of... Agent: Renesas Electronics Corporation
20110209002 - Programmable test engine (pcdte) for emerging memory technologies: A programmable characterization-debug-test engine (PCDTE) on an integrated circuit chip. The PCDTE includes an instruction memory that receives and stores instructions provided on a chip interface, and a configuration memory that receives and stores configuration values provided on the chip interface. The PCDTE also includes a controller that configures a... Agent: Mosys, Inc.
20110209004 - Integrating templates into tests: Test template may comprise a source code template instruction associated with source code commands. The source code template instruction is utilized in generation of a test. The generation of instructions associated with the source code template instruction takes into account utilization of shared resources by both the source code commands... Agent: International Business Machines Corporation
20110209006 - Microcomputer: When a CPU executes a failure detection program, the CPU causes a program counter expected value register to store an expected value of an address which is stored in a program counter after a detection time passes from the start of execution of the failure detection program, and causes a... Agent: Fujitsu Semiconductor Limited
20110209005 - Time-gap defect detection apparatus and method: A programmatic time-gap defect correction apparatus and method corrects errors which may go undetected by a computer system. Buffer underruns or overruns, which may incur errors in data transfers, yet remain undetected and uncorrected in a computer system, are corrected by an error avoidance module in accordance with the invention.... Agent:
20110209008 - Application reporting library: An apparatus and a method for detecting and reporting malfunctions in computer programs is described. A reporting library of an Application Programming Interface (API) is configured to direct a report of software malfunction to a specified server. The API is implemented in an application to be executed on a computer... Agent:
20110209007 - Composition model for cloud-hosted serving applications: Methods and apparatus for executing an application are disclosed. In accordance with one embodiment, a request is received. One or more of a plurality of module types are instantiated such that a plurality of module objects are generated. A query plan linking the plurality of module objects is executed such... Agent: Yahoo! Inc.
20110209009 - Distributed memory usage for a system having multiple integrated circuits each including processors: A plurality of integrated circuits in a system, each having a program memory loaded with different sections of a program, and a second memory. The integrated circuits perform the program, such that, when one of the integrated circuits requires a portion of the program, which is contained in its own... Agent:
20110209010 - Method, apparatus and system for displaying result of failure root cause analysis: A management system comprises at the least a first analysis rule information and a second analysis rule information, acquires a first analysis result and a second analysis result based on a detected status of an information processing apparatus, and aggregates and displays a first analysis result and a second analysis... Agent: Hitachi, Ltd.
20110209011 - Method for error test, recordation and repair: In a memory device, an on-die register is provided that is configured to store a row address as well as a column address of a memory cell that fails a test. Storing the row address frees testing from being limited to activating at one time only rows related to a... Agent: Micron Technology, Inc.
20110209012 - Method and apparatus for optimizing address generation for simultaneously running proximity-based bist algorithms: The invention discloses a method and a system for optimizing address generation for simultaneously running proximity-based Built-In-Self-Test (BIST) algorithms. The method also describes simultaneously testing proximity-based faults for different memories having column multiplexers of different sizes using the BIST algorithms. The system described above may be embodied in the form... Agent:
20110209013 - Boundary scan path method and system with functional and non-functional scan cell memories: An integrated circuit or circuit board includes functional circuitry and a scan path. The scan path includes a test data input lead, a test data output lead, a multiplexer, and scan cells. A dedicated scan cell has a functional data output separate from a test data output. Shared scan cells... Agent: Texas Instruments Incorporated
20110209014 - High speed interconnect circuit test method and apparatus: A Propagation Test instruction, a Decay Test instruction and a Cycle Test instruction provide testing of DC and AC interconnect circuits between circuits including JTAG boundary scan cells. A few additions to the Test Access Port circuitry, including gating producing a Capture Test Strobe (CTS) signal, and the boundary scan... Agent: Texas Instruments Incorporated
20110209016 - Selectively accessing test access ports in a multiple test access port environment: A TAP linking module (21, 51) permits plural TAPs (TAPs 1-4) to be controlled and accessed from a test bus (13) via a single TAP interface (20).... Agent: Texas Instruments Incorporated
20110209017 - Selectively accessing test access ports in a multiple test access port environment: A TAP linking module (21, 51) permits plural TAPs (TAPs 1-4) to be controlled and accessed from a test bus (13) via a single TAP interface (20).... Agent: Texas Instruments Incorporated
20110209018 - Selectively accessing test access ports in a multiple test access port environment: A TAP linking module (21, 51) permits plural TAPs (TAPs 1-4) to be controlled and accessed from a test bus (13) via a single TAP interface (20).... Agent: Texas Instruments Incorporated
20110209019 - Selectively accessing test access ports in a multiple test access port environment: A TAP linking module (21, 51) permits plural TAPs (TAPs 1-4) to be controlled and accessed from a test bus (13) via a single TAP interface (20).... Agent: Texas Instruments Incorporated
20110209015 - Serial scan chain in a star configuration: A method implemented to test a plurality of components coupled in a star configuration, each component having a test access port (TAP) controller. The method comprises performing a capture phase of a scan operation on all of the TAP controllers in the star configuration and sequentially selecting one of the... Agent: Texas Instruments Incorporated
20110209020 - Position independent testing of circuits: Scan distributor, collector, and controller circuitry connect to the functional inputs and outputs of core circuitry on integrated circuits to provide testing through those functional inputs and outputs. Multiplexer and demultiplexer circuits select between the scan circuitry and the functional inputs and outputs. The core circuitry can also be provided... Agent: Texas Instruments Incorporated
20110209021 - Failure detection and mitigation in logic circuits: The present invention is directed to methods of monitoring logic circuits for failures. In particular, the methods are directed toward establishing parallel logic cores where failures are detected by comparing the parallel paths for equivalence at key locations by a redundancy checker. Any mismatch will result in a predetermined failsafe... Agent:
20110209022 - Selectively accessing test access ports in a multiple test access port environment: A TAP linking module (21, 51) permits plural TAPs (TAPs 1-4) to be controlled and accessed from a test bus (13) via a single TAP interface (20).... Agent: Texas Instruments Incorporated
20110209023 - Selectively accessing test access ports in a multiple test access port environment: A TAP linking module (21, 51) permits plural TAPs (TAPs 1-4) to be controlled and accessed from a test bus (13) via a single TAP interface (20).... Agent: Texas Instruments Incorporated
20110209024 - Generation device, classification method, generation method, and program: The output pattern includes unspecified bits. In step SS1, classification unit classifies the unspecified bits and determines if an unspecified bit is an implied bit or not. The implied bit is an unspecified bit if its value is a logic value determined as logic value 0 or 1 relating to... Agent: National Taiwan University
20110209027 - Error detection in physical interfaces for point-to-point communications between integrated circuits: An apparatus, system and method for detecting errors in a physical interface during the transmission or receipt of data communications between integrated circuits (“ICs”) are disclosed. In one embodiment, a physical interface formed as a first IC on a first substrate portion to detect transmission errors in data exchanged with... Agent: Silicon Image, Inc.
20110209025 - Multicast subscription based on forward error correction: Embodiments are disclosed herein that relate to multicast subscription based on forward error correction. One disclosed embodiment comprises a network-accessible server having a data-holding subsystem holding instructions executable by a logic subsystem to receive a content item, and form a first version of the content item having a first level... Agent: Microsoft Corporation
20110209026 - Systems and methods for data recovery using enhanced sync mark location: Various embodiments of the present invention provide systems and methods for identifying a reproducible location on a storage medium. As an example, a circuit is discussed that includes a data storage circuit, a pattern comparison circuit, and a threshold comparison circuit. The data storage circuit is operable to store a... Agent: Lsi Corporation
20110209028 - Codeword remapping schemes for non-volatile memories: Systems and methods are disclosed for remapping codewords for storage in a non-volatile memory, such as flash memory. In some embodiments, a controller that manages the non-volatile memory may prepare codeword using a suitable error correcting code. The controller can store a first portion of the codeword in a lower... Agent: Apple Inc.
20110209029 - Low complexity error correction using cyclic redundancy check (crc): Low complexity error correction using cyclic redundancy check (CRC). Communications between at communication devices, sometimes including at least one redundant transmission from a transmitter to a receiver, undergo low complexity error correction. CRC may be employed in conjunction with using any desired type of ECC or using uncoded modulation. Based... Agent: Broadcom Corporation
20110209030 - Semiconductor memory device and data error detection and correction method of the same: A semiconductor memory device includes a memory cell array, a mode setting circuit, a parity data generation unit, and a data error detection and correction unit. The memory cell array has a plurality of first memory banks for storing normal data, and a predetermined number of second memory banks less... Agent:
20110209031 - Methods of performing error detection/correction in nonvolatile memory devices: Methods of operating nonvolatile memory devices include testing a plurality of strings of nonvolatile memory cells in the memory device to identify at least one weak string therein having a higher probability of yielding erroneous read data error relative to other ones of the plurality of strings. An identity of... Agent:
20110209032 - Nonvolatile memory devices with age-based variability of read operations and methods of operating same: Integrated circuit memory systems include a nonvolatile memory device having an array of nonvolatile memory cells therein and a memory controller, which is electrically coupled to the nonvolatile memory device. The memory controller is configured to apply signals to the nonvolatile memory device that cause the nonvolatile memory device to... Agent:
20110209033 - Circuit and technique for reducing parity bit-widths for check bit and syndrome generation for data blocks through the use of additional check bits to increase the number of minimum weighted codes in the hamming code h-matrix: A circuit and technique for reducing parity bit-widths for check bit and syndrome generation is implemented through the use of additional check bits to increase the number of minimum weighted codes in the Hamming Code H-Matrix. The circuit and technique of the present invention may be implemented while adding no... Agent: United Memories, Inc
20110209034 - Method for improving the acquisition of a data set transmitted repeatedly in a difficult environment: A method is provided for improving the acquisition of a data set transmitted repeatedly in a difficult environment, which is particularly appropriate to satellite radionavigation systems. The main characteristic of the method is to provide “contextual” aid relating to the transmitted data by indicating the nature and the possible updating... Agent: Thales
20110209035 - Golay-code generation: A Golay-code generator configured for generating Golay complementary code pairs comprises a sequence of delay elements configured for providing a predetermined set of fixed delays to at least a first input signal and a sequence of adaptable seed vector insertion elements configured for multiplying at least a second input signal... Agent: Qualcomm Incorporated
20110209036 - Unidirectional error code transfer for both read and write data transmitted via bidirectional data link: A controller includes a link interface that is to couple to a first link to communicate bi-directional data and a second link to transmit unidirectional error-detection information. An encoder is to dynamically add first error-detection information to at least a portion of write data. A transmitter, coupled to the link... Agent:08/18/2011 > 32 patent applications in 21 patent subcategories. inventions list
20110202789 - Processor-memory unit for use in system-in-package and system-in-module devices: An apparatus and method for a processor-memory unit for use in system-in-package (SiP) and system-in-package (SiP) integrated circuit devices. The apparatus includes a processing module, a memory module and a programmable system module. The programmable system module is configured to function as an interface between the memory module and the... Agent: Rambus Inc.
20110202790 - Storage configuration: Aspects of the subject matter described herein relate to storage configuration. In aspects, an interface is used to discover the existence, capacity, and characteristics of solid state storage. This information may be provided to a user or storage management process which may use the information to configure the solid state... Agent: Microsoft Corporation
20110202791 - Storage control device , a storage system, a storage control method and a program thereof: A storage control device and a storage control method are provided. If a first failure detector of a first controller does not detect a failure in a second controller, a first input/output processor of the first controller copies the contents of a first volatile memory of the first controller to... Agent: Nec Corporation
20110202792 - System and methods for raid writing and asynchronous parity computation: A computer storage management system for managing a first plurality of data storage units, the system including: (a) an asynchronous parity computation manager which, responsive to a write operation in which an incoming data portion is to be written into an individual storage unit from among the storage units, deposits... Agent: Kaminario Technologies Ltd.
20110202793 - Failure system for domain name system client: A method performed by a domain name service client includes storing DNS entries in a local cache; sending a DNS query to another device to obtain an update to one of the DNS entries; determining whether a DNS response is received; and resetting a time-to-live (TTL) timer associated with the... Agent: Verizon Patent And Licensing, Inc.
20110202794 - Method of restoring master boot record of storage medium, storage medium driving device, and storage medium: A storage medium driving device including a storage medium having a user area and a non-user area, and to record master boot record information that is backed up in the non-user area, and a controller to compare the backup master boot record information with master boot record information read from... Agent: Samsung Electronics Co., Ltd
20110202795 - Data corruption prevention during application restart and recovery: Embodiments of the present invention are directed to a method and system for draining or aborting IO requests of a failed system prior to restarting or recovering an application in virtual environments. The method includes detecting, within an electronic system, an application error condition of an application executing on a... Agent: Symantec Corporation
20110202796 - Microprocessor with system-robust self-reset capability: A microprocessor includes a bus interface unit that interfaces the microprocessor to a bus that includes a signal that, when asserted, instructs all bus agents to refrain from initiating bus transactions. Microcode causes the bus interface unit to assert the signal in response to detecting an event and resets the... Agent: Via Technologies, Inc.
20110202797 - Method and system for resetting a subsystem of a communication device: Described herein are a method, system, and computer readable medium for resetting a subsystem of a communication device. The method involves utilizing a subsystem error handler to generate a reset request signal indicating the subsystem has experienced an exception; distributing to a software component, residing externally to the subsystem, a... Agent:
20110202799 - Process for making an electric testing of electronic devices: The disclosure relates to a process for making an electric testing of electronic devices DUT, of the type comprising the steps of: connecting at least one electronic device DUT to an automatic testing apparatus or ATE apparatus suitable for making the testing of digital circuits; sending, through said ATE apparatus,... Agent: Stmicroelectronics S.r.l.
20110202798 - Remote technical support employing a configurable executable application: In a remote technical support system, in response to a request for service, a user device receives an executable application from the technical support controller, which executable application is subsequently invoked at the user device. Additionally, the user device receives configuration information from the technical support controller. The executable application... Agent: Accenture Global Services Gmbh
20110202800 - Prognostic analysis system and methods of operation: A prognostic analysis system and methods of operating the system are provided. In particular, a prognostic analysis system for the analysis of physical system health applicable to mechanical, electrical, chemical and optical systems and methods of operating the system are described herein.... Agent:
20110202802 - Supporting detection of failure event: In a mechanism for supporting detection of a failure event, history information of a system including log information of the system including plural components and/or failure information output from each component upon occurrence of a failure in the system is collected. A detection rule for detecting an event included in... Agent: International Business Machines Corporation
20110202801 - Trace data priority selection: An integrated circuit 2 is provided with a data source 6 in the form of a processor executing program instructions connected via a bus interconnect 16 to a trace output device 8. The trace output device 8 is memory mapped. Different memory addresses that are mapped to the trace output... Agent: Arm Limited
20110202804 - Circuit and method for simultaneously measuring multiple changes in delay: A circuit and method provide built-in measurement of delay changes in integrated circuit paths. The circuit includes a digital shift register to access multiple paths, and may be implemented in digital boundary scan to test I/O pin delays. Synchronous to a first frequency, the circuit applies an alternating signal to... Agent: Mentor Graphics Corporation
20110202807 - Lock state machine operations upon stp data captures and shifts: A process of selecting alternative test circuitry within an integrated circuit enables a test access port. Scan test instruction data is loaded into an instruction register of a test access port TAP, the instruction data including information for selecting the alternative test circuitry. An Update-IR instruction update operation is performed... Agent: Texas Instruments Incorporated
20110202803 - Method for testing an address bus in a logic module: A method for testing an address bus (14) in a logic module (10), a logic module (10), a computer program and a computer program product are described. The presented method provides for a logic module (10) to have at least one data register, into which addresses detected by the address... Agent:
20110202805 - Pulse dynamic logic gates with mux-d scan functionality: A scannable pulse dynamic logic gate may include an evaluation network that evaluates dynamic inputs in response to assertion of an evaluate pulse. The evaluate pulse may be generated from a clock signal such that it is shorter in duration than the clock signal. During a normal mode of operation,... Agent:
20110202806 - Tam controller connected with tam and functional core wrapper circuit: A device test architecture and interface is provided to enable efficient testing embedded cores within devices. The test architecture interfaces to standard IEEE 1500 core test wrappers and provides high test data bandwidth to the wrappers from an external tester. The test architecture includes compare circuits that allow for comparison... Agent: Texas Instruments Incorporated
20110202808 - Reduced signaling interface method & apparatus: This disclosure describes a reduced pin bus that can be used on integrated circuits or embedded cores within integrated circuits. The bus may be used for serial access to circuits where the availability of pins on ICs or terminals on cores is limited. The bus may be used for a... Agent: Texas Instruments Incorporated
20110202810 - Pulse dynamic logic gates with lssd scan functionality: A scannable pulse dynamic logic gate may include an evaluation network that evaluates dynamic inputs in response to assertion of an evaluate pulse. The evaluate pulse may be generated from a clock signal such that it is shorter in duration than the clock signal. During a normal mode of operation,... Agent:
20110202809 - Pulse flop with enhanced scan implementation: In an embodiment, a clocked storage device such as a pulse flop is provided. The pulse flop includes a latch coupled to receive a scan data input to the pulse flop. The latch receives the scan data input during one of the phases of the clock, and retains the received... Agent:
20110202811 - Test access port with address and command capability: The disclosure provides a novel method and apparatus for inputting addresses to devices to select the device TAP for access. Further, the disclosure provides a novel method and apparatus for inputting addresses for selecting device TAPs and for inputting commands for commanding circuitry within the device. The inputting of addresses... Agent: Texas Instruments Incorporated
20110202812 - Semiconductor memory device: According to one embodiment, a semiconductor memory device includes semiconductor memory chips in which data requested to be written. The data has one or more pieces of first data in a predetermined unit. The device includes a write controller that writes the first data and redundancy information calculated by using... Agent: Kabushiki Kaisha Toshiba
20110202813 - Error correction and recovery in chained memory architectures: Electronic apparatus, systems, and methods to construct and operate the electronic apparatus and/or systems include a memory unit configured to receive data flow from two directions. The memory unit can be configured serially in a chain with other memory units. The chain can include an error check and correcting unit... Agent:
20110202814 - Interleaving scheme for an ldpc coded 32 apsk system: An approach is provided for interleaving low density parity check (LDPC) encoded bits in 32APSK modulation systems. By assigning the bits determining modulation symbols based on different bit degrees, one can efficiently find the desirable tradeoff between error performance and error floor provided by the LDPC codes in use.... Agent: Availink, Inc.
20110202816 - Distributed processing ldpc (low density parity check) decoder: Distributed processing LDPC (Low Density Parity Check) decoder. A means is presented herein that includes an LDPC decoding architecture leveraging a distributed processing technique (e.g., daisy chain) to increase data throughput and reduce memory storage requirements. Routing congestion and critical path latency are also improved thereby. Each daisy chain includes... Agent: Broadcom Corporation
20110202815 - Error detection and correction system: An error detection and correction system in accordance with an embodiment comprises: an encoding unit; a syndrome calculating unit; a syndrome element calculating unit; an error search unit; and an error correction unit, read and write of a memory cell array being assumed to be performed concurrently for m bits,... Agent: Kabushiki Kaisha Toshiba
20110202817 - Node information storage method and system for a low-density parity-check decoder: A receiver to receive a signal associated with a low-density parity-check (LDPC) code. The receiver includes a memory device, an address generator, and an LDPC decoder. The LDPC decoder includes a row designator and a position designator. The memory device stores data related to an LDPC decoding process. The address... Agent: Nxp B.v.
20110202818 - Non-volatile memory device and operation method using the same: The non-volatile memory system includes a non-volatile memory and a controller. The non-volatile memory includes a data region including a sector region for storing sector data, and an uncorrectable information region for storing uncorrectable sector information on the sector region. The controller includes an information generation unit for generating the... Agent:
20110202819 - Configurable error correction encoding and decoding: A system and method are disclosed performing error correction on data by a processor. Received data is demultiplexed into a first demultiplexer output and a second demultiplexer output. Stored instructions are executed by a processor to decode the first demultiplexer output and a deinterleaver output to produce a decoded output.... Agent:
20110202820 - Method and system for providing low density parity check (ldpc) encoding and decoding: An approach is provided for processing structure Low Density Parity Check (LDPC) codes. Memory storing edge information and a posteriori probability information associated with a structured parity check matrix used to generate Low Density Parity Check (LDPC) coded signal are accessed. The edge information represent relationship between bit nodes and... Agent: Hughes Network Systems, LLC08/11/2011 > 24 patent applications in 18 patent subcategories. inventions list
20110197090 - Error reporting through observation correlation: A software component is executed to carry out a task, the task including a subtask. An external function is called to perform the subtask, the external function executing in a separate thread or process. The component receives an observation recorded by the external function, the observation including an identifier of... Agent: Vmware, Inc.
20110197091 - Switch device, switch control method and storage system: A switch device includes a memory unit for storing therein an error response for each error event to be sent in response at the time of a failure with respect to a control signal that controls a storage device connected to the switch device, an error response output unit for... Agent: Fujitsu Limited
20110197092 - A method for requesting a file repair distribution mode: The present invention concerns a receiver terminal and method at the receiver for requesting a missing symbol from a repair service, the method comprising the steps of receiving from a first server a list of at least one repair server and at least one transmission mode used by the at... Agent: Thomson Licensing, LLC
20110197093 - Reduced wireless internet connect time: A method for reducing the connect time for server access by wireless devices connecting to the server via a gateway is described. A connection from the wireless device to the gateway is established and a request for information on the server is received from the wireless device and transmitted to... Agent:
20110197094 - Systems and methods for visual correlation of log events, configuration changes and conditions producing alerts in a virtual: Embodiments of the present disclosure provide methods and systems for detecting and correlating log events, configuration changes and conditions producing alerts within a virtual infrastructure. Other embodiments may be described and claimed.... Agent: Tripwire, Inc.
20110197096 - Highly reliable storage system and internal network thereof: The disk controller has a plurality of channel control units, a plurality of cache memories, a plurality of disk control units, and a plurality of internal switch units. Each channel control unit or disk control unit sends to one of the cache memory units a request packet requesting execution of... Agent: Hitachi, Ltd.
20110197095 - Information processing apparatus and method: An information processing apparatus comprising: a plurality of processing units; a plurality of individual monitoring units provided for each of the plurality of processing units, that monitor an operation condition of a corresponding processing unit, and judge whether or not the corresponding processing unit is operating normally, and notify the... Agent: Fujitsu Limited
20110197097 - Incremental problem determination and resolution in cloud environments: Installation files are annotated, which annotations may trigger system snapshots to be taken at a plurality of points during the execution of the installation files and/or collected. During a test run, the generated snapshots are examined incrementally to determine whether the installation is success or failure at that point. Checkpoint... Agent: International Business Machines Corporation
20110197098 - Method and apparatus for test coverage analysis: A method provides for a way to test coverage data used in testing small computing platforms by assigning unique signatures to each node in the control flow graph and embedding control function calls. Signatures are embedded into the program during compilation time using the custom parser. When the program is... Agent:
20110197099 - Objective assessment of application crashes from a customer environment: A computerized method for collecting error data and providing error reports relating to occurrences of errors of software applications installed on one or more computing devices is disclosed. Data for describing software applications and identifying software application errors is collected from the computing devices and stored in a catalog. Data... Agent: Microsoft Corporation
20110197100 - Non-volatile redundant verifiable indication of data storage status: A non-volatile redundant verifiable indication of data storage status is provided with respect to data storage operations conducted with respect to removable data storage media, and store the indication with an auxiliary non-volatile memory of the data storage media, such that the indication stays with the media. At least one... Agent: International Business Machines Corporation
20110197101 - Semiconductor device and test method thereof: A semiconductor device includes a first management area storing a plurality of inspection results, the plurality of inspection results being obtained by executing inspections for each of a plurality of storage areas which store a plurality of data; and a second management area storing the plurality of inspection results. The... Agent: Elpida Memory, Inc.
20110197102 - Automatable scan partitioning for low power using external control: Scan architectures are commonly used to test digital circuitry in integrated circuits. The present invention describes a method of adapting conventional scan architectures into a low power scan architecture. The low power scan architecture maintains the test time of conventional scan architectures, while requiring significantly less operational power than conventional... Agent: Texas Instruments Incorporated
20110197103 - Decoding method and apparatus of retransmission communication system: A decoding method and apparatus of a retransmission communication system are provided. In the decoding method and apparatus, weights are applied to error data and retransmitted data, and the resulting error data and the resulting retransmitted data are chase-combined. Therefore, it is possible to reduce the coding rate of combined... Agent: Electronics And Telecommunications Research Institute
20110197105 - Encoder, transmission device, and encoding method: Disclosed are an encoder, a transmission device, and an encoding method with which the transmission amount is reduced and a deterioration in transmission efficiency is suppressed while improving reception quality when QC-LDPC or a like block encoding is used. A puncture pattern setting unit (620) searches for a puncture pattern... Agent: Panasonic Corporation
20110197104 - Method and apparatus for encoding and decoding data: A method and apparatus for selecting interleaver sizes for turbo codes is provided herein. During operation information block of size K is received. An interleaver size K′ is determined that is related to K″, where K″ from a set of sizes; wherein the set of sizes comprise K″=ap×f, pmin≦p≦pmax; fmin≦f≦fmax,... Agent: Motorola Mobility, Inc.
20110197106 - Wireless transmission device, wireless receiving device, and method for transmitting encoded data: Disclosed are a wireless transmission device, wireless receiving device, and method for transmitting encoded data with which power consumption can be reduced at the receiving end in accordance with reception conditions, while resource-saving is maintained by employing an erasure correcting code (ECC). In a wireless communication device (100), an erasure... Agent: Panasonic Corporation
20110197108 - Memory card and memory controller: A memory card has a plurality of non-volatile memories and a main controller for controlling the operation of the non-volatile memories. The main controller performs an access control to the non-volatile memories in response to an external access instruction, and an alternate control for alternating an access error-related storage area... Agent: Hitachi Ulsi Systems Co., Ltd.
20110197107 - Non-volatile memory device and data processing method thereof: A data processing method for a non-volatile memory device is provided. The non-volatile memory device includes a controller and a NAND flash memory. First, a target command and a corresponding target address are serially transmitted from the controller to the NAND flash memory. Then, the NAND flash memory calculates a... Agent: Silicon Motion, Inc.
20110197109 - Semiconductor memory device and method of controlling the same: A semiconductor memory device includes a plurality of detecting code generators configured to generate a plurality of detecting codes to detect errors in a plurality of data items, respectively, a plurality of first correcting code generators configured to generate a plurality of first correcting codes to correct errors in a... Agent:
20110197110 - Semiconductor memory device and method of controlling the same: A semiconductor memory device includes a plurality of detecting code generators configured to generate a plurality of detecting codes to detect errors in a plurality of data items, respectively, a plurality of first correcting code generators configured to generate a plurality of first correcting codes to correct errors in a... Agent:
20110197111 - Method and apparatus for error-correction in and processing of gfp-t superblocks: The present invention discloses a method and apparatus for processing and error correction of a GFP-T superblock, where the 64 bytes of payload data of a first superblock are buffered in the first page of a two-page buffer. The flag byte is buffered in a separate buffer, and a CRC... Agent: Avalon Microelectronics, Inc.
20110197112 - Max-log-map equivalence log likelihood ratio generation soft viterbi architecture system and method: A modified soft output Viterbi algorithm (SOVA) detector receives a sequence of soft information values and determines a best path and an alternate path for each soft information value and further determines, when the best and alternate paths lead to the same value for a given soft information value, whether... Agent: Stmicroelectronics, Inc.
20110197113 - Abnormality detection system, abnormality detection method, and abnormality detection program storage medium: Disclosed is an abnormality detection system which detects abnormal data in a data sequence including data of multi-dimensional features, and the system includes storing or generating a generation distribution of features of the data and reference data indicative of normal data; obtaining, every piece of the data sequence, a probability... Agent: Nec Corporation08/04/2011 > 39 patent applications in 28 patent subcategories. inventions list
20110191625 - Controlling the state of duplexing of coupling facility structures: A coupling facility is coupled to one or more other coupling facilities via one or more peer links. The coupling of the facilities enables various functions to be supported, including the duplexing of structures of the coupling facilities. Duplexing is performed on a structure basis, and thus, a coupling facility... Agent: International Business Machines Corporation
20110191624 - Systems, methods, and computer readable media for providing instantaneous failover of packet processing elements in a network: Systems, methods, and computer program products for providing instantaneous failover of packet processing elements in a network are disclosed. According to one aspect, the subject matter described herein includes a system for providing instantaneous failover of packet processing elements in a network. The system includes a plurality of packet processing... Agent:
20110191626 - Fault-tolerant network management system: The fault-tolerant network management system is a hierarchical system having two Manager-of-Managers (MoM) that are implemented at the highest layer in an active-passive mode. A middle layer includes Mid-Level Managers (MLMs), which are used to manage agents disposed throughout different areas of the network at the lowest layer. The MLMs... Agent:
20110191622 - Computer system and boot control method: When a primary computer is taken over to a secondary computer in a redundancy configuration computer system where booting is performed via a storage area network (SAN), a management server delivers an information collecting/setting program to the secondary computer before the user's operating system of the secondary computer is started.... Agent: Hitachi, Ltd.
20110191623 - Method for transmitting and negotiating network-controlled functional data between a client and a server: The invention relates to a method for transmitting control data in a telecommunication network for controlling a service administered by the telecommunication network, especially a server connected to the telecommunication network. According to said method, the telecommunication network provides a data object, especially a contact of an address book, with... Agent:
20110191627 - System and method for handling a failover event: A system comprising a memory storing a set of instructions executable by a processor. The instructions being operable to monitor progress of an application executing in a first operating system (OS) instance, the progress occurring on data stored within a shared memory area, detect a failover event in the application... Agent:
20110191628 - Computer program, method, and apparatus for controlling data allocation: A computer executes a data allocation control program to control allocation of data in a plurality of disk nodes. A redundancy restoration module executes a redundancy restoration procedure by commanding disk nodes to create a new copy of redundancy-lost data. An error message reception module receives a write error message... Agent: Fujitsu Limited
20110191629 - Storage apparatus, controller, and method for allocating storage area in storage apparatus: A storage apparatus for storing data includes a plurality of physical media provided with storage areas to store data, a storage group determining unit configured to determine, upon detecting a request to write new data to a virtual volume to be accessed, a storage group from which to allocate storage... Agent: Fujitsu Limited
20110191630 - Diagnosing a fault incident in a data center: A method, computer program product and apparatus for diagnosing a fault incident in a data center. A determination is made as to whether a fault incident happened in the data center. If a fault incident happened, then the business logic being executed in a node where the fault incident happened... Agent: International Business Machines Corporation
20110191631 - Information processing apparatus, communication apparatus, wireless diagnosis method and program: An information processing apparatus includes: a first communication section which communicates with an external device having a diagnosis function of a network using a first communication method; a second communication section which communicates with the external device using a second communication method; a first transmission section which transmits a diagnosis... Agent: Seiko Epson Corporation
20110191632 - Small form factor pluggable (sfp) checking device for reading from and determining type of inserted sfp transceiver module or other optical device: A SFP checking device (SFP Check) connects to a SFP transceiver and a PC or laptop via a USB cable. The SFP Check uses the default web browser of the PC, without an internet connection, to display details of the SFP transceiver such as wavelength, description, range, manufacturer, among other... Agent:
20110191633 - Parallel debugging in a massively parallel computing system: A method and apparatus is described for parallel debugging on the data nodes of a parallel computer system. A data template associated with the debugger can be used as a reference to the common data on the nodes. The application or data contained on the compute nodes diverges from the... Agent: International Business Machines Corporation
20110191634 - Test-operation control apparatus, system, and method: A test-operation control apparatus, system and method are disclosed to reduce time and cost required for test operation by automatically performing test-operation on a control point of facilities installed on site based on a previously established template sequence and operational conditions of the situation on the spot. The test-operation control... Agent:
20110191636 - Microprogrammable device code signature: A microprogrammable electronic device has a code memory storing a software and/or firmware code having instructions. The microprogrammable electronic device is configured to compute a signature of the code stored in the code memory, and to detect any corruption of the code stored in the code memory on the basis... Agent:
20110191635 - Noisy monitor detection and intermittent fault isolation: A method of detecting and diagnosing system faults, includes detecting the noisy status of a monitor during operations and incorporating a quantified monitor uncertainty level to support fault isolation reasoning. A sequential probability ratio test is used to statistically test the noisy status of a monitor and Shannon's entropy theory... Agent: Honeywell International Inc.
20110191637 - Method and apparatus for sas speed adjustment: A method for maintaining reliable communication between a command initiator and a target device is provided. After the command initiator detects an error corresponding to the target device and a path between the command initiator and the target device, the command initiator performs a downshift evaluation. The initiator maintains a... Agent: Dot Hill Systems Corporation
20110191638 - Parallel computer system and method for controlling parallel computer system: A parallel computer system includes a first, a second, and a third apparatuses. The first apparatus includes a first arithmetic processing unit that stores first information regarding execution of a first program stored in a first area of a first storage device in a second area of the first storage... Agent: Fujitsu Limited
20110191641 - Raid device, abnormal device detecting apparatus, and abnormal device detecting method: A RAID device has a plurality of HDDs for a RAID configuration and controls the RAID configuration. The RAID device has a host that performs various data processes on the HDDs and a control unit that controls communication with the HDDs. With this configuration, if an initialization process for assigning... Agent: Fujitsu Limited
20110191640 - Semiconductor memory device: A memory device and a method of controlling the memory device are provided, comprising: generating commands at a memory controller; counting a number of commands in response to a clock signal; storing the commands and the count numbers corresponding to the commands; transmitting to a memory device the commands, the... Agent:
20110191639 - Storage system and control method: Provided are a storage system and its control method having superb functionality of being able to notify an administrator of the extent of impact of a pool fault in an easy and prompt manner. The foregoing storage system and its control method manage a storage area provided by a storage... Agent: Hitachi, Ltd.
20110191642 - Method and apparatus for providing intelligent error messaging: A method and apparatus for providing intelligent error messaging is disclosed wherein a user of a mobile communications device is provided with descriptive error messaging information to assist the user in overcoming errors associated with the processing of electronic messages and data.... Agent: Research In Motion Limited
20110191643 - Detection and diagnosis of scan cell internal defects: A diagnosis technique to improve scan cell internal defect diagnostic resolution using scan cell internal fault models.... Agent: Mentor Graphics Corporation
20110191645 - Method and apparatus for adjusting number of iterations in iterative decoding procedure: In a method of determining an iteration value for an iterative decoding process of a hard disk drive, a bit error rate (BER) of a digital signal is measured in multiple iterations. A difference is calculated between BERs of consecutive iterations, and the calculated differences are compared with a reference... Agent: Samsung Electronics Co., Ltd.
20110191644 - Method and apparatus for sas speed adjustment: A method for maintaining reliable communication on a bidirectional communication link is provided. A receiver on the bidirectional communication link detects an error and maintains a count of detected errors. The transmitter on the bidirectional communication link polls the receiver in order to determine the count of detected errors, and... Agent: Dot Hill Systems Corporation
20110191646 - Fault-and variation-tolerant energy - and area-efficient links for network-on-chips: The present invention provides methods for detecting and correcting transmission errors in inter-router links of Network-on-Chip (NoC) architectures. A NoC has repeaters along its bus lines. The output of a main repeater is compared and multiplexed with the output of a shadow repeater. If these outputs are the same the... Agent: Ohio University
20110191647 - Communication interface and protocol: An apparatus includes a receiver, an error detection unit, and an acknowledgement unit. The receiver may receive frames of data from a transmitter unit of a second apparatus via a first communication path. The error detection unit may detect data errors in the frames of data received via the first... Agent:
20110191650 - Cyclic shift device, cyclic shift method, ldpc decoding device, television receiver, and reception system: With a cyclic shift device 33 including a barrel shifter 61 for performing cyclic shift with M pieces of input data as objects, in the event of cyclically shifting parallel data made up of N pieces of input data smaller than M pieces of input data by shift amount k... Agent:
20110191648 - Information processing apparatus, information transmitting method, and information receiving method: A transmitting-side device and a receiving-side device are connected to each other with a parallel bus that carries transmit data and an error-correcting code based on this transmit data in parallel. The transmitting-side device includes a signal inversion unit for inverting a signal to be sent to the parallel bus.... Agent: Fujitsu Limited
20110191649 - Solid state drive and method of controlling an error thereof: The present general inventive concept relates to a solid state drive and a method of controlling an error thereof. A flash translation layer includes a parity managing module to correct errors. A block address of a storage medium including error data that can be recovered is managed through the parity... Agent: Samsung Electronics Co., Ltd.
20110191651 - Two-plane error correction method for a memory device and the memory device thereof: In order to correct errors of a first page on one plane in a two-plane NAND flash memory, use data of a second page on another plane to mix the encoding and leverage the error correction code of the first page. Each of the error correction codes of the first... Agent:
20110191652 - Memory read-channel with selective transmission of error correction data: A memory read-channel is provided with selective transmission of error correction data. The disclosed read-channel improves throughput and reduces power consumption when error correction codes are unnecessary. The data read from a memory device comprises user data, error detection data and error correction data. In one embodiment, the error detection... Agent:
20110191653 - Quasi-cyclic ldpc encoding and decoding for non-integer multiples of circulant size: In processing quasi-cyclic low-density parity-check (QC-LDPC) data, an input signal is received which includes decision and reliability information corresponding to unpadded data. Decision and reliability information corresponding to padded data is introduced into the input signal. Message passing is performed one or more times to obtain decoded data. This includes... Agent: Link_a_media Devices Corporation
20110191654 - Adjustable error correction code length in an electrical storage device: An apparatus includes a memory that is allocated to reported portions and overprovisioned portions. The apparatus includes an error correction circuit that communicates with the memory in error correction coded data that has a controllable ECC length. The ECC length is a function of a history of error reports. A... Agent: Seagate Technology LLC
20110191655 - Memory array error correction apparatus, systems, and methods: Various embodiments include apparatus, methods, and systems that operate to extend the processes of reading, modifying, and writing data stored in or being provided to a memory array without interrupting a continual stream of data to be written into the memory array. Embodiments may include an apparatus comprising a memory... Agent: Micron Technology, Inc.
20110191656 - Systems for high-speed backplane applications using pre-coding: In conventional Backplane Ethernet systems, data is transmitted over two pairs of copper traces in one direction using a PAM-2 scheme and a baud rate of 10.3125 GHz, giving an effective bit rate of 10.3125 Gbps. The rate at which data can be transmitted in Backplane Ethernet systems, while still... Agent: Broadcom Corporation
20110191657 - Systems for high-speed backplane applications using fec encoding: In conventional Backplane Ethernet systems, data is transmitted over two pairs of copper traces in one direction using a PAM-2 scheme and a baud rate of 10.3125 GHz, giving an effective bit rate of 10.3125 Gbps. The rate at which data can be transmitted in Backplane Ethernet systems, while still... Agent: Broadcom Corporation
20110191658 - Method and apparatus for storing data: When coding user data, it may be desirable to mark user data as invalid. This may arise, by way of example, in applications in which a stored data item needs to be updated by virtue of an updated data item additionally being stored and the old stored data item being... Agent: Infineon Technologies Ag
20110191660 - Apparatus, system, and method for specifying intermediate crc locations in a data stream: An apparatus, system, and method are disclosed for determining the location of intermediate CRC in a data stream sent from a channel subsystem to a control unit of an I/O processing system. A CRC locating module determines the location of at least one intermediate CRC in a transport data information... Agent: International Business Machines Corporation
20110191659 - System and method providing fault detection capability: A system and method for providing fault detection capability is provided which comprises a first node (2). The first node (2) comprises a first processing subsystem (5) generating data (14) to be transmitted. The first node (2) has a fault supervisor unit (13) adapted to gather and process fault indications... Agent: Nxp B.v.Previous industry: Electrical computers and digital processing systems: support
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