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USPTO Class 714 | Browse by Industry: Previous - Next | All 10/2009 | Recent | 09: Oct | Sept | Aug | Jul | Jun | May | Apr | Mar | Feb | Jan | | 08: Dec | Nov | Oct | Sp | Aug | Jul | Jun | May | Apr | Mar | Feb | Jan | | 07: Dec | Nov | Oct | Sep | Aug | Jul | Jun | May | Apr | Mar | Feb | Jan | | 06: Dec | Nov | Oct | Sep | Aug | Jul | Jun | May | Apr | Error detection/correction and fault detection/recovery inventions 10/09Recently published patent applications awaiting approval from the USPTO. Recent week's RSS XML file available below.Listing format for abstract view: USPTO application #, Title, Abstract excerpt,Patent Agent. Listing format for list view: USPTO National Class full category number, title of the patent application. 10/01/2009 > patent applications in patent subcategories. 20090249113 - Method for recovering basic input output system and computer device thereof: The invention discloses a method for recovering a basic input output system (BIOS) and a computer device thereof. The computer device of the invention includes a motherboard, a power button, a BIOS storage unit, and an embedded controller. The BIOS storage unit is disposed on the motherboard, and it stores... Agent: Morris Manning Martin LLP 20090249111 - Raid error recovery logic: A method of reading desired data from drives in a RAID1 data storage system, by determining a starting address of the desired data, designating the starting address as a begin read address, designating one of the drives in the data storage system as the current drive, and iteratively repeating the... Agent: Lng/lsi Joint Customer C/o Luedeka, Neely & Graham, P.c. 20090249112 - Triggered restart mechanism for failure recovery in power over ethernet: A triggered restart mechanism for failure recovery in power over Ethernet (PoE). Powered devices (PDs) that fail can be remotely recycled by a power sourcing equipment (PSE). After detection of a failure of a PD, such as by the failure to receive a status message, a PSE can generate a... Agent: Law Office Of Duane S. Kobayashi 20090249114 - Computer system: The computer system is capable of improving performance, reliability and redundancy. The computer system comprises: a plurality of server computers having different functions, the server computers being mutually connected by communication lines; a standby server computer being connected to each of the server computers by the communication lines, the standby... Agent: Staas & Halsey LLP 20090249115 - Method and system for dynamic link failover management: The present invention is directed to a method and system for providing redundancy and resiliency features to network devices, such as switches and routers, that do not have built-in redundancy and resiliency features. Health-check messages are periodically transmitted over a first link that transmits network data. Upon detecting a failure... Agent: Arent Fox LLP 20090249117 - Apparatus maintenance system and method: An apparatus maintenance system and method are provided. The apparatus maintenance system includes an apparatus including a first control part, and a second control part connected to the first control part and a maintenance-data management server managing maintenance data about the apparatus. The second control part downloads the maintenance data... Agent: Staas & Halsey LLP 20090249116 - Managing writes received to data units that are being transferred to a secondary storage as part of a mirror relationship: Provided are a method, system, and article of manufacture for managing writes received to data units that are being transferred to a secondary storage as part of a mirror relationship. Synchronization information indicates data units to transfer from a primary storage to a secondary storage, wherein the synchronization information data... Agent: Konrad Raynes & Victor, LLP. Attn: Ibm37 20090249118 - Method and apparatus for restore management: A restore management apparatus comprising a restore performing unit which performs restoration of a data and stores the data in a restore disk which is distinct from a backed up disk, a management unit that manages progress of the restoration performed by the restore performing unit, and an access controlling... Agent: Fujitsu Patent Center C/o Cpa Global 20090249120 - Remote firmware recovery: Embodiments of the present invention provide methods, systems, and apparatus for instantiating, by a computing system, a firmware recovery module in response to a detected firmware failure during a system startup. The firmware recovery module establishes access to a remotely disposed recovery server and retrieves from it a replacement or... Agent: Schwabe, Williamson & Wyatt, P.c. 20090249119 - Using volume snapshots to prevent file corruption in failed restore operations: Restore software executing in a computer system may invoke a snapshot of a target volume before restoring a plurality of files from a backup image to the target volume. If the restore operation fails before all the files are restored to the target volume then the restore software may use... Agent: Meyertons, Hood, Kivlin, Kowert, Goetzel/symantec 20090249121 - System and method for grammar based test planning: The present disclosure generally relates to the testing of a system that includes software or hardware components. In some embodiments, a testing framework generates a set of test cases for a system under test using a grammar. Each test case may perform an action, such as provide an input to... Agent: Knobbe Martens Olson & Bear LLP 20090249122 - Debugger and debugging method: A debugger includes: a break detecting circuit which, when the state of a microprocessor core corresponds to a previously set condition, generates a break request signal for requesting a transition of the microprocessor core to a debug state; a trigger detecting circuit which, when a predetermined signal of additional hardware... Agent: Mcginn Intellectual Property Law Group, Pllc 20090249123 - Method and system for autonomic verification of hdl models using real-time statistical analysis and layered feedback stages: Real-time statistical analysis is used to perform autonomic self-healing within the context of a 3-tier regression system for analysis of a computer system design component. Throughout the system, there are mechanisms for implementing self-healing if breakage is detected. The regression layer with the highest throughput is maintained in a much... Agent: International Business Machines Corporation Richard Lau 20090249124 - Verification apparatus, verification method, and computer product: A main step is retrieved from an operations process subject to verification. Mapping information is referenced to further retrieve a preventive measure against an error expected upon execution of the main step. Based on the order in which the preventive measure is executed within the operations process, it is determined... Agent: Fujitsu Patent Center C/o Cpa Global 20090249125 - Database querying: Data stored in relational databases can be retrieved using a relational database query language, while data stored in a multidimensional database is typically retrieved using a multidimensional database query language. However, most users do not have a functional working knowledge of multidimensional database query languages, which leaves large amounts of... Agent: Microsoft Corporation 20090249126 - Testing device for usb i/o board: A testing device for a USB I/O board includes USB plugs connected to the USB I/O board, a connector connected to the USB I/O board, an indication module, and a testing module including data output terminals connected to the USB plugs, data reception terminals connected to the connector, and indication... Agent: Pce Industry, Inc. Att. Steven Reiss 20090249127 - Method and system for storing data from a plurality of processors: A method of storing data from a plurality of processors comprising the steps of (a) transferring data along a first bus (b) connectable between a first processor and a synchronising means and operable with a first protocol; (c) synchronising the synchronising means with a second processor; and (d) transferring the... Agent: Freescale Semiconductor, Inc. Law Department 20090249128 - Predictive diagnostics system, apparatus, and method for improved reliability: A system for managing a processing system and/or a processing system component is described. The system may include a wear-out module configured to provide a wear-out signal, the wear-out signal indicating a remaining amount of useful life of the component; a health module configured to provide a health signal, the... Agent: Neugeboren O'dowd Pc 20090249129 - Systems and methods for managing multi-component systems in an infrastructure: The present invention discloses systems and methods to maintain a multi-component system. The methods include defining a performance factor to be maintained in a given system, and collecting by agents associated with a given container in the system data associated with the performance factor. The collected data is then used... Agent: K&l Gates LLP 20090249131 - Communication detection device, communication detection method, and communication detection program: A communication detection method in which, based on a sender and a destination of communication data recorded in a communication log that records information concerning communication data exchanged between devices linked to a network, the communication log is divided into parts corresponding to individual object devices. The communication logs divided... Agent: Fujitsu Patent Center C/o Cpa Global 20090249130 - Trouble coping method for information technology system: A trouble coping apparatus includes an incident registration section which registers information about an incident which has solved a problem, a solution knowledge generation section which generates trouble solution knowledge from the incident information, a risk registration section which registers risk items which are materials for judging appropriateness of selection... Agent: Greer, Burns & Crain 20090249132 - Data processing apparatus and method of verifying programs: According to one embodiment, an information processing apparatus includes a plurality of execution modules, a system memory shared by the plurality or execution modules, and a scheduler which controls assignment of a plurality of basic modules to the plurality of execution modules in order to execute a program in parallel... Agent: Blakely Sokoloff Taylor & Zafman LLP 20090249133 - Systems and methods for protecting dsl systems against impulse noise: Systems and methods for protecting DSL systems against impulse noise are provided. Disclosed herein are example embodiments of a retransmission technique located above the gamma interface (i.e., in the network processing layer). Such a retransmission technique can be combined with standard RS coding with standard erasure-decoding & triangular interleaving at... Agent: Thomas, Kayden, Horstemeyer & Risley, L.l.p. 20090249134 - De-interleaving mechanism involving a multi-banked llr buffer: A de-interleaver generates a plurality of De-interleaved Reorder Physical (DRP) addresses to simultaneously write a corresponding plurality of LLR values into a multi-banked memory such that not more than one LLR value is written into each bank of the multi-banked memory at a time. A sequence of such parallel writes... Agent: Qualcomm Incorporated 20090249135 - Testing apparatus and testing method: Provided is test apparatus with higher testing efficiency, including: plurality of pattern generating sections generating test pattern to supply to devices under test; group control section controlling group of pattern generating sections out of the pattern generating sections, and generating control signal upon receiving signal output from any pattern generating... Agent: Jianq Chyun Intellectual Property Office 20090249136 - Accessing sequential data in a microcontroller: System and methods transfer data over a microcontroller system test interface. The system can read data from and write data to microcontroller system memory using the described method. The method provides for the efficient transfer of data, minimizing redundancies and overhead present in conventional microcontroller test system protocols.... Agent: Fish & Richardson P.c. 20090249138 - Semiconductor memory apparatus for reducing bus traffic between nand flash memory device and controller: Provided is a semiconductor memory apparatus that may use an efficient protocol between an NAND flash memory device and a controller to reduce bus traffic. The flash memory device may include a memory cell array and an error correction encoder. The memory cell array may include a plurality of pages.... Agent: Harness, Dickey & Pierce, P.L.C 20090249137 - Testing module, testing apparatus and testing method: There is provided a testing module including a designation information storing section that stores thereon designation information designating an order of decoding fundamental patterns, a fundamental pattern storing section that stores thereon the fundamental patterns in a data form, a plurality of pattern generating sections each of which has a... Agent: Jianq Chyun Intellectual Property Office 20090249139 - Unidirectional error code transfer for both read and write data transmitted via bidirectional data link: A controller includes a link interface that is to couple to a first link to communicate bi-directional data and a second link to transmit unidirectional error-detection information. An encoder is to dynamically add first error-detection information to at least a portion of write data. A transmitter, coupled to the link... Agent: Morgan Lewis & Bockius LLP/rambus Inc. 20090249140 - Method for managing defect blocks in non-volatile memory: A method for managing defect blocks in a non-volatile memory essentially comprises the steps of detecting defect blocks in the non-volatile memory, storing addresses of the defect blocks in a table block of the non-volatile memory, and setting the non-volatile memory to be read-only if the quantity of defect blocks... Agent: Wpat, Pc Intellectual Property Attorneys 20090249141 - Semiconductor integrated circuit: A semiconductor integrated circuit includes a flipflop holding and outputting input data according to a clock, the flipflop having: an input end to which data is input; an output end from which data is output; a first logic gate connected between the input end and the output end, the first... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP 20090249142 - Method for race prevention and a device having race prevention capabilities: A method for race prevention and a device that has race prevention capabilities. The method includes: selectively providing data or scan data to a input latching logic, activating the input latching logic for a first scan mode activation period, introducing a substantial time shift between the first scan mode activation... Agent: Freescale Semiconductor, Inc. Law Department 20090249143 - Scan control method, scan control circuit and apparatus: A scan control method for a circuit device connected with a first bus and having a test access port controller, including setting information indicating a register to be scanned in the circuit device, a number of scan shifts and a scan start via a second bus different from the first... Agent: Staas & Halsey LLP 20090249144 - Shadow access port method and apparatus: The disclosure describes a novel method and apparatus for providing a shadow access port within a device. The shadow access port is accessed to perform operations in the device by reusing the TDI, TMS, TCK and TDO signals that are used to operate a test access port within the device.... Agent: Texas Instruments Incorporated 20090249145 - Scan control method and device: A scan control method of a circuit device including setting information indicating scan mode in a register is provided. The scan control method includes cutting an output of scan-out data to a test access port controller and an input of scan-in data from a data register based on information set... Agent: Staas & Halsey LLP 20090249146 - Automatically extensible addressing for shared array built-in self-test (abist) circuitry: A method for testing integrated circuits (ICs) by automatically extending addressing for shared array built-in self-test (BIST) circuitry, includes polling a plurality of memories to determine which of the plurality of memories are sharing a first comparison tree and mapping a shared array BIST address space to each of the... Agent: Greenblum & Bernstein, P.L.C 20090249147 - Fault diagnosis of compressed test responses: Methods, apparatus, and systems for diagnosing failing scan cells from compressed test responses are disclosed herein. For example, in one nonlimiting exemplary embodiment, at least one error signature comprising multiple bits (including one or more error bits) is received. Plural potential-error-bit-explaining scan cell candidates are evaluated using a search tree.... Agent: Klarquist Sparkman, LLP 20090249148 - Error-correction forced mode with m-sequence: Improved apparatus, systems and methods, such as those for testing an error correction code (ECC) encoder/decoder for solid-state memory devices, are provided. In one or more embodiments, the improved systems and methods deliberately inject errors into memory storage areas of memory devices to test the operation of the ECC encoder/decoder.... Agent: Knobbe Martens Olson & Bear LLP 20090249149 - Low overhead soft error tolerant flip flop: A system and method for soft error recovery (SER) within a flip-flop. A first stage of the flip-flop receives an ungated input clock signal. A second stage of the flip-flop receives a gated input clock signal. The second stage may also store a prebuffered data output and one or more... Agent: Meyertons, Hood, Kivlin, Kowert & Goetzel (amd) 20090249150 - Apparatus, method and computer program product for harq buffer size reduction: Apparatus, methods and computer program products implement HARQ buffer size reduction by storing successfully received blocks of a multi-block signal in a code block buffer and only storing unsuccessfully received blocks of the multi-block signal in the HARQ buffer. As HARQ retransmissions of the signal occur, previous successfully received blocks... Agent: Harrington & Smith, Pc 20090249154 - Data transfer appartus and data transfer control method: A data transfer apparatus in which, in a failure state such that an error packet is received at a reception end, the error packet is returned and is recorded in the transmission end, the error packet is analyzed and an error bit is identified at the transmission end, and data... Agent: Staas & Halsey LLP 20090249153 - Dynamic adjustment and signaling of downlink/uplink allocation ratio in lte/tdd systems: A method for dynamic adjustment of downlink/uplink resource allocation ratio in a long-term evolution (LTE) time division duplex (TDD) system is disclosed. The method includes replacing at least one of an uplink subframe and a downlink subframe with a mute subframe in a subframe pattern, indicating a first downlink/uplink resource... Agent: Morrison & Foerster LLP 20090249155 - Method and apparatus for decoding: Aspects of the disclosure can provide a method and an apparatus to decode a data stream based on multiple transmissions with efficient usages of storage and power resources. The method for decoding can include receiving a first plurality of encoded code blocks corresponding to a first transmission of a transport... Agent: Oliff & Berridge, Plc 20090249151 - Mimo-harq communication system and communication method: The invention relates to a MIMO-HARQ communication system and communication method. When a receiver carries out a CRC for received data streams and detects an error in a data stream, it feeds back to a transmitter and requests a retransmission of the data stream. The transmitter determines the correspondence between... Agent: Hanify & King Professional Corporation 20090249152 - Transmission system, transmission method and communication device: A transmission method for transmitting information between a transmission device and a reception device, the method includes determining whether or not an error is detected in information from the transmission device, requesting the transmission device to re-transmit the error-detected information when an error is detected, re-transmitting information corresponding to a... Agent: Westerman, Hattori, Daniels & Adrian, LLP 20090249156 - Unidirectional error code transfer method for a bidirectional data link: A controller includes a link interface that is to couple to a first link to communicate bi-directional data and a second link to transmit unidirectional error-detection information. An encoder is to dynamically add first error-detection information to at least a portion of write data. A transmitter, coupled to the link... Agent: Morgan Lewis & Bockius LLP/rambus Inc. 20090249157 - Method of encoding/decoding using low density check code matrix: A method of encoding data using a parity check matrix, a method of decoding encoded data, and a data retransmission method using the same are disclosed. A method of encoding data by LDPC code using a parity check matrix includes variably selecting a specific sub-matrix from a parity check matrix... Agent: Lee, Hong, Degerman, Kang & Waimey 20090249158 - Method for packet retransmission employing feedback information: A method for packet retransmission employing feedback information is disclosed. The method for packet retransmission employing feedback information comprises receiving reception acknowledgement information from a receiver after a transmitter transmits packets, the reception acknowledgement information representing channel status information and decoding success/failure of the packets; and changing a retransmission mode... Agent: Lee, Hong, Degerman, Kang & Waimey 20090249159 - Ldpc encoder and decoder and ldpc encoding and decoding methods: Provided are an LDPC encoder and decoder, and LDPC encoding and decoding methods. The LDPC encoder includes: a code generating circuit that includes a memory storing a first parity check matrix and sums a first row which is at least one row of the first parity check matrix and a... Agent: Ampacc Law Group 20090249161 - Method of restoring data: A method of restoring data from a stream of data segments each including first synchronization information followed by first user data information, second synchronization information, and second user data information, the method includes extracting first and second user data information on the basis of the first synchronization information, and converting... Agent: Greer, Burns & Crain 20090249160 - Methods and apparatus for power reduction in iterative decoders: There are provided a method, an apparatus and a computer program product for reducing power consumption in an iterative decoder, for example, for low-density parity-check (LDPC) codes or turbo codes. The apparatus includes a memory device and an iteration termination device. The memory device is for storing a decoded codeword... Agent: Thomson Licensing Llc 20090249163 - Iterative decoding of concatenated low-density parity-check codes: Techniques to perform iterative decoding of concatenated low-density parity-check codes (LDPC) are described. Iterative decoding of the concatenated code is achieved by performing T common iterations, wherein a common iteration comprises t1 decoding iterations on the inner LDPC code my means of a first decoder (340) followed by t2 decoding... Agent: Kacvinsky Llc C/o Intellevate 20090249162 - Method of restoring data: A system of determining unknown symbols of an error correcting code using the Discrete Fourier Transform (DFT) with arithmetic corresponding to the number field of the error correcting code, including complex numbers. Encoder and decoder configurations are described. Parallel generation of independent parity check equations, simultaneous solution of unknown symbols... Agent: Martin Tomlinson 20090249165 - Event cleanup processing for improving the performance of sequence-based decoders: The invention relates to improving the performance of sequence-based soft-output decoders using event cleanup processing, wherein combinations of potential error events are evaluated using an error detection code (EDC) to select events that produce a modified set of decisions that has no EDC detectable errors. The event cleanup method and... Agent: Allen, Dyer, Doppelt, Milbrath & Gilchrist P.a. 20090249164 - Method for serial asynchronous transmission of data in an arragement for the monitoring, controlling, and regulating an operational control facility of building: In a method for the serial, asynchronous and character-by-character data transmission of a data stream having multiple data words Z to Z, an additional parity data word D is generated and transmitted. The parity data word D is generated such that in a data block formed from the data words... Agent: Staas & Halsey LLP 20090249166 - Wireless communications apparatus and method: A wireless communications apparatus according to the present invention includes a scheduler which allocates, to a user apparatus, at least one resource block included in a system bandwidth; an interleaver which rearranges an order of bits within a bit sequence according to a specified pattern; a unit which creates a... Agent: Osha Liang L.l.p. 20090249167 - Semiconductor memory device: A semiconductor memory device includes a data storage area wherein a plurality of data cells, respectively storing one bit of data, is arranged in a lattice form, a redundant data storage area that stores one bit parity data, the one bit parity data corresponding respectively to a line of data... Agent: Mcginn Intellectual Property Law Group, Pllc 20090249168 - Storage device: A storage device includes: a storage medium; an auxiliary memory; and a controller for: determining an error correcting code length corresponding to an error rate of a data write area and/or an error correcting code write area of the storage medium; generating an error correcting code on the basis of... Agent: Greer, Burns & Crain 20090249169 - Systems, methods, and apparatuses to save memory self-refresh power: Embodiments of the invention are generally directed to systems, methods, and apparatuses to save dynamic random access memory (DRAM) self-refresh power. In some embodiments, the refresh frequency of a DRAM is reduced and errors are allowed to occur. In error check mode, the DRAM stores data and corresponding error check... Agent: Philip A. Pedigo Intel Corporation 20090249170 - Decoding method: A method for decoding forward error correction (FEC) encoded data. A stream of units of FEC encoded bits are received, where the units are derived from a transmitted signal, where each unit represents a one-bit data value, and where each unit includes correctness bits. Preferably, the stream of units of... Agent: The Marbury Law Group, Pllc 20090249171 - Turbo decoder, base station and decoding method: A turbo decoder includes a state transition probability computing unit which obtains a state transition probability from data, a flag, and a priori probability from a previous stage, an alpha and beta metric computing unit which obtains an alpha metric and a beta metric from the state transition probability by... Agent: Fujitsu Patent Center C/o Cpa Global 20090249172 - Methods and apparatus for improved decoding of bursts that include multiple concatenated protocol data units: A corrupted protocol data unit (PDU) within a received burst of data may be identified. The received burst of data may include multiple concatenated PDUs. The received burst of data may continue to be processed despite the identification of the corrupted PDU. A next PDU in the received burst of... Agent: Qualcomm Incorporated 20090249173 - Storage system and data storage method: The storage system includes a first memory device configured to store data sent from a host system, a first memory device controller configured to control read/write access of the data from/to the first memory device, an arithmetic circuit unit configured to calculate parity data based on the data, a second... Agent: Juan Carlos A. Marquez C/o Stites & Harbison Pllc 20090249174 - Fault tolerant self-correcting non-glitching low power circuit for static and dynamic data storage: In a computer system in which personalization data for an ASIC is stored in latches, this data is susceptible to soft errors. Many computer systems require high levels of error detection, error correction, fault isolation, fault tolerance, and self-healing. In order to complete an ASIC design and release it to... Agent: Ibm Corporation Rochester Ip Law Dept. 917 20090249175 - Single event upset error detection within sequential storage circuitry of an integrated circuit: Sequential storage circuitry for a integrated circuit is provided, comprising a first storage element, a second storage element and an additional storage element. The first storage element stores, during a first phase of a clock signal, a first indication of an input data value received by the sequential storage circuitry.... Agent: Nixon & Vanderhye, Pc Previous industry: Electrical computers and digital processing systems: supportNext industry: Data processing: presentation processing of document ###### RSS FEED for 20091112: Integrate FreshPatents.com into your RSS reader/aggregator or website to track weekly updates. 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