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Error detection/correction and fault detection/recovery inventions 02/09

Recently published patent applications awaiting approval from the USPTO. Recent week's RSS XML file available below.
Listing format for abstract view: USPTO application #, Title, Abstract excerpt,Patent Agent. Listing format for list view: USPTO National Class full category number, title of the patent application.
  
02/26/2009 > patent applications in patent subcategories.

20090055679 - Recovery of a redundant node controller in a computer system: Recovery of a redundant node controller in a computer system including determining a loss of a heartbeat for a predefined period of time between a system controller and the redundant node controller; in response to determining the loss of the heartbeat for the predefined period of time, checking network connectivity... Agent: International Corp (blf)

20090055680 - Nonvolatile storage device, memory controller, and defective region detection method: It is possible to accurately detect a physical block which has caused a fixture defect in a flash memory so as to limit the use of the physical block. By recording a history of generation of a physical block error and a history of physical erasing in an ECC error... Agent: Greenblum & Bernstein, P.L.C

20090055682 - Data storage systems and methods having block group error correction for repairing unrecoverable read errors: Data storage systems and methods perform error correction on a single physical storage disk. The technique includes arranging a plurality of addressable blocks on the single physical storage disk into error correction groups, wherein each error correction group includes N data blocks and M coding blocks. M is determined in... Agent: Morgan Lewis & Bockius LLP

20090055681 - Intra-disk coding scheme for data-storage systems: Exemplary embodiments of the present invention comprise a method for the use of an intra-disk redundancy storage protection operation for the scrubbing of a disk. The method comprises initiating a disk scrubbing operation upon each disk of a plurality of disks that are comprised within a storage disk array, issuing... Agent: Cantor Colburn LLP-ibm Yorktown

20090055683 - Method of restoring previous computer configuration: A method of handling and storing data in a computer by establishing a plurality of zones or sessions with different levels of write protection, writing attempted changes to data stored in a protected zone to a temporary zone, creating representative maps of some or all of the zones or sessions... Agent: Spencer, Fane, Britt & Browne

20090055684 - Method and apparatus for efficient problem resolution via incrementally constructed causality model based on history data: A system for problem resolution in network and systems management includes a database of trouble ticket data including information fields for checked components and affected components, an automated model builder system that processes the trouble ticket data to construct a causality model to represent causality information between system components identified... Agent: F. Chau & Associates, LLC

20090055685 - Electronic apparatus in which functioning of of a microcomputer is monitored by another microcomputer to detect abnormal operation: In an electronic apparatus, a first microcomputer is monitored by a second microcomputer, which periodically transmits data relating to a main function to the first microcomputer to be processed. The first microcomputer periodically updates a variable value, performs a predetermined calculation operation whose final result should be a specific fixed... Agent: Harness, Dickey & Pierce, P.L.C

20090055686 - Server side logic unit testing: A method for server side logic unit testing in an application server environment is provided. The method includes reading a plurality of input parameters from an XML input repository, where the input parameters define an initial state of a test environment, and configuring the test environment to the initial state... Agent: Cantor Colburn LLP - IBM Austin

20090055687 - Ram diagnosis device and ram diagnosis method: A RAM diagnosis device sequentially generates a state bit indicating any one of states of kinds of processing; selects processing referring to the state bit. The devices then writes a first data pattern in all areas of the RAM when writing processing is selected, and writes a second data pattern... Agent: Staas & Halsey LLP

20090055688 - Detection and correction of dropped write errors in a data storage system: Methods are provided for detecting and correcting dropped writes in a storage system. Data and a checksum are written to a storage device, such as a RAID array. The state of the data is classified as being in a “new data, unconfirmed” state. The state of written data is periodically... Agent: Law Firm Of Dan Shifrin

20090055689 - Systems, methods, and computer products for coordinated disaster recovery: Systems, methods and computer products for coordinated disaster recovery of at least one computing cluster site are disclosed. According to exemplary embodiments, a disaster recovery system may include a computer processor and a disaster recovery process residing on the computer processor. The disaster recovery process may have instructions to monitor... Agent: Cantor Colburn LLP-ibm Poughkeepsie

20090055690 - Error catch ram support using fan-out/fan-in matrix: In accordance with one embodiment of the invention, a method and apparatus are provided for obtaining test data from multiples devices under test. This could be accomplished in accordance with one embodiment by outputting from a testing device a test signal for input in parallel to at least two devices... Agent: Gregory W. Osterloth Holland & Hart, LLP

20090055691 - Method and system for managing a network of sensors: A system and method are disclosed for managing a network of sensors (100). A system that incorporates teachings of the present disclosure may include, for example, a sensor (102) belonging to the network of sensors operating in a geographic space having a controller (210) that manages a sensing device (204).... Agent: Akerman Senterfitt

20090055692 - Method and apparatus to automatically create virtual sensors with templates: A method and apparatus for automatically providing a virtual sensor have been described. In one embodiment, a method for automatically providing a virtual sensor includes receiving a plurality of virtual sensor templates from a server. The method further includes selecting a virtual sensor template from the plurality of virtual sensor... Agent: Applied Materials/bstz Blakely Sokoloff Taylor & Zafman LLP

20090055693 - Monitoring execution of guest code in a virtual machine: One embodiment of the present invention is a method of operating a virtualization system, the method including: (a) instantiating a guest in a virtual machine of the virtualization system; and (b) monitoring execution of code registered for monitored execution in an execution context of the guest, wherein the monitoring is... Agent: Vmware, Inc.

20090055694 - Apparatus and method for measuring skew in serial data communication: An apparatus and method measures the skew between signals on data and clock channels using a bit pattern matching technique for any given protocol in Serial data communication. In one embodiment, the method of finding the pattern comprises of importing the waveform data from the oscilloscope and converting the waveform... Agent: Thomas F. Lenihan Tektronix, Inc.

20090055695 - Integrated circuit with self-test feature for validating functionality of external interfaces: This disclosure describes an integrated circuit with self-test features for validating functionality of external interfaces. Example external interfaces include memory interfaces and bus interfaces, such as a peripheral component interconnect (PCI) bus, an advanced high-performance bus (AHB), an advanced extensible interface (AXI) bus, and other external interfaces that operate a... Agent: Qualcomm Incorporated

20090055696 - Microcontroller for logic built-in self test (lbist): Built-in self-test (BIST) microcontroller integrated circuit adapted for logic verification. Microcontroller includes a plurality of hardware description language files representing a hierarchical description of the microcontroller, the plurality of hardware description language files including a library of circuit design elements, a plurality of library design circuit elements adapted to store... Agent: Greenblum & Bernstein, P.L.C

20090055697 - Error scanning in flash memory: Various embodiments include methods, apparatus, and systems to scan at least a portion of a memory device when a condition for scanning is met. The condition may be dependent on one or more of a number of read operations, a number of write operations, time, and others. Other embodiments including... Agent: Schwegman, Lundberg & Woessner, P.A.

20090055698 - System, apparatus, and method for memory built-in self testing using microcode sequencers: Apparatuses, systems, and methods are disclosed for performing Built-In Self Tests (BIST) on memories. One such BIST includes loading microcode instructions into a main microcode sequencer and loading subroutine instructions into a subroutine microcode sequencer on the memory. The microcode instructions generate subroutine calls to the subroutine microcode sequencer. The... Agent: Trask Britt, P.C./ Micron Technology

20090055699 - Semiconductor test apparatus: To provide a semiconductor test apparatus which is capable of adjusting skew efficiently with sufficient operational convenience. The semiconductor test apparatus tests a semiconductor device based on a signal obtained by applying a test signal to the semiconductor device, and includes a driver pin block. The driver pin block is... Agent: Sughrue Mion, PLLC

20090055700 - Method of determining binary signal of memory cell and apparatus thereof: A method and apparatus to determine a binary signal of a memory cell capable of decreasing an error rate of binary signal determination that occur due to neighboring cells and noise, the apparatus including: a data collection unit to collect target data stored in a target cell in a memory... Agent: Stein, Mcewen & Bui, LLP

20090055702 - Apparatus and method for allocating memory space in a mobile communication system: An apparatus and method for receiving data when an HS-SCCH is not used in a mobile communication system are provided. In the apparatus and method, retransmission data is received, parameters including information about initial transmission data are acquired from the retransmission data, the initial transmission data is retrieved from a... Agent: JeffersonIPLaw, LLP

20090055703 - Apparatus and method for transmitting/receiving the hybrid-arq ack/nack signal in mobile communication system: An apparatus and method for transmitting/receiving a Hybrid Automatic Repeat reQuest (HARQ) Acknowledge/Negative acknowledge (ACK/NACK) signal in a mobile communication system. The present invention distributes a CDM segment, to which an ACK/NACK signal is mapped, in the frequency domain of an OFDM symbol, and repeatedly transmits the CDM segment, thereby... Agent: The Farrell Law Firm, P.C.

20090055701 - Mimo transmitting apparatus, mimo receiving apparatus, and retransmitting method: A MIMO transmitting apparatus that achieves a flexible control in accordance with variation of a propagation environment to reduce the number of retransmissions. A buffer (104) temporarily stores transport bits, which have been interleaved, in preparation for retransmission. An intra-code-word interleaver (105) performs an interleave process by all of the... Agent: Dickinson Wright PLLC James E. Ledbetter, Esq.

20090055704 - Error correction method and apparatus: A transmitting apparatus arranges data in matrix, calculates error correction codes in the data's column direction, arranges the calculated error correction codes in matrix having the same number of columns as the data, attaches number information corresponding to a row number to each row having data or error correction code,... Agent: Harness, Dickey & Pierce, P.L.C

20090055705 - Decoding of raptor codes: There are provided a method and apparatus for decoding Raptor code. The apparatus includes a decoder for decoding a sequence of packets representative of a sequence of encoding symbols. The decoder at least partially recovers at least some lost or corrupted packets of the sequence using Raptor code.... Agent: Joseph J. Laks Thomson Licensing LLC

20090055710 - Digital broadcast transmitter/receiver having improved receiving performance and signal processing method thereof: A digital broadcast transmitter/receiver, and a signal processing method thereof, includes a randomizer randomizing a dual transport stream which includes a normal data packet and a robust data packet and into which stuff bytes are inserted, a stuff-byte exchanger replacing the stuff bytes of the randomized data with known data,... Agent: Stein, Mcewen & Bui, LLP

20090055711 - Digital broadcasting transmission/reception system utilizing mull packet and trs code to improve receiving performance and signal processing method thereof: A digital broadcasting transmission and/or reception system having an improved reception performance and a signal-processing method thereof. A digital broadcasting transmitter comprises a TRS encoder for to TRS-encode a MPEG-2 transmission stream having null data for inserting a Known data and a TRS parity at predetermined positions, randomizer to input... Agent: Stanzione & Kim, LLP

20090055707 - Forward error correction scheme for high rate data exchange in a wireless system: A transmitter/receiver system for high data transfer in a wireless communication system includes a physical layer processor that comprises an FEC coder, a demultiplexer and a plurality of modem processors. The FEC coder applies error correction codes to the high data rate signal. Thereafter, the demultiplexer distributes portions of the... Agent: Volpe And Koenig, P.C. Dept. Icc

20090055709 - Generating and implementing a signal protocol and interface for higher data rates: A data Interface for transferring digital data between a host and a client over a communication path using packet structures linked together to form a communication protocol for communicating a pre-selected set of digital control and presentation data. The signal protocol is used by link controllers configured to generate, transmit,... Agent: Qualcomm Incorporated

20090055706 - Method and apparatus for flash memory error correction: Error correction method and a flash memory device are provided. In the flash memory device, a memory array comprises a main area for data storage, and a spare area for storage of parities associated with the stored data. An erasure table maintains an erasure list indicating addresses of defects in... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20090055708 - Robust error correction encoding/decoding apparatus and method of digital dual-stream broadcast reception/transmission system: An error correction encoding and/or decoding apparatus and method of a digital dual-stream broadcast transmission and/or reception system. An error correction encoding apparatus includes a TRS encoding part to apply the transversal encoding to normal data packets and robust data packets and to append parity packets to the normal data... Agent: Stanzione & Kim, LLP

20090055712 - Data processing method and computer system medium thereof: A data processing method includes the steps of: initializing a syndrome vector to be an (n−1)th symbol; finding a corresponding mask based on the syndrome vector, wherein the mask is zero when the (n−1)th symbol is zero; correcting a known constant, which is zero when the syndrome vector is zero,... Agent: Bacon & Thomas, PLLC

20090055713 - Ecc control circuits, multi-channel memory systems including the same, and related methods of operation: An Error Correcting Code (ECC) control circuit in a memory controller includes an ECC controller configured to receive data from a memory device in response to a request from a host device. The ECC controller transmits the data to a direct memory access (DMA) buffer for transfer to the host... Agent: Myers Bigel Sibley & Sajovec

20090055714 - Optimizing the size of memory devices used for error correction code storage: Embodiments of the invention are generally directed to systems, methods, and apparatuses for optimizing the size of memory devices used for error correction code storage. An apparatus (such as a memory module) may include a number of memory devices to store data and a memory device to store error correction... Agent: Philip A. Pedigo Intel Corporation

20090055715 - System and method for mitigating memory requirements: A receiver is provided, which is adapted to receive MPE-FEC frames and to correct erroneous sections within a received MPE-FEC frame by detecting unreliable sections and storing in an erasure list (“ESL”) table compressed data that includes the base address of each detected erroneous section, together with the respective section's... Agent: Empk & Shiloh, LLP C/o Landon Ip, Inc.

20090055717 - Architecture and control of reed-solomon list decoding: Systems and methods are provided for implementing list decoding in a Reed-Solomon (RS) error-correction system. A detector can provide a decision-codeword from a channel and can also provide soft-information for the decision-codeword. The soft-information can be organized into an order of combinations of error events for list decoding. An RS... Agent: Ropes & Gray LLP

20090055716 - Efficient chien search method and system in reed-solomon decoding: An efficient Chien search method in Reed-Solomon decoding is adapted for use in a processor having a parallel processing instruction set. The method includes the following steps: (a) if an error location polynomial that has been found matches a preset condition, finding at least one error symbol location directly through... Agent: Rosenberg, Klein & Lee

20090055718 - Method and computer unit for error detection and logging in a memory: In a method for detecting errors in computer data in a memory, a check sum is calculated in runtime and compared to a stored check sum. In this method, the computer data is being subdivided into at least two logical blocks and a check sum is calculated for each logical... Agent: Kenyon & Kenyon LLP

  
02/19/2009 > patent applications in patent subcategories.

20090049328 - Storage system and method of designing disaster recovery constitution: The present invention detects patterns that conform to the user conditions in cases where a disaster recovery constitution is constructed by connecting a plurality of sites. The design system is used in cases where the disaster recovery constitution is provided in a storage system. The site information acquisition section acquires... Agent: Stanley P. Fisher Reed Smith LLP

20090049331 - Error propagation control within integrated circuits: A method of selecting where error detection circuits should be placed within an integrated circuit uses simulation of a reference and test design with errors injected into the test design and then fan out analysis performed upon those injected errors to identify error propagation characteristics. Thus, registers at which propagated... Agent: Nixon & Vanderhye, PC

20090049330 - Method and system for virtual removal of physical field replaceable units: A method of virtually removing field replaceable units (FRUs) from a computer system during concurrent maintenance operations. Firmware within a flexible service processor (FSP) assigns unique resource identification (RID) numbers to each FRU in the computer system. The firmware collects vital product data (VPD) for each FRU and generates a... Agent: Dillon & Yudell LLP

20090049329 - Reducing likelihood of data loss during failovers in high-availability systems: A method, system, and computer program product for reducing likelihood of data loss during performance of failovers in a high-availability system comprising a primary system and a standby system are provided. The method, system, and computer program product provide for defining a halt duration, periodically determining a halt end time,... Agent: Delizio Gilliam, PLLC (ibm Svl)

20090049332 - Method and apparatus for expressing high availability cluster demand based on probability of breach: A method, apparatus, and computer instructions are provided for expressing high availability (H/A) cluster demand based on probability of breach. When a failover occurs in the H/A cluster, event messages are sent to a provisioning manager server. The mechanism of embodiments of the present invention filters the event messages and... Agent: Ibm Corp (ya) C/o Yee & Associates PC

20090049333 - Built-in redundancy analyzer and method for redundancy analysis: A built-in redundancy analyzer and a redundancy analysis method thereof for a chip having a plurality of repairable memories are provided. The method includes the following steps. First, the identification code of a repairable memory containing a fault (“fault memory” for short) is identified and a parameter is provided according... Agent: J C Patents, Inc.

20090049334 - Method and apparatus to harden an internal non-volatile data function for sector size conversion: A sector conversion device includes a non-volatile memory area that is used to save two sectors' worth of data when power is lost during the sector conversion process. These two sectors of data are stored in the non-volatile memory area within the sector conversion device itself. The non-volatile memory within... Agent: Ibm Corp. (wip) C/o Walder Intellectual Property Law, P.C.

20090049335 - System and method for managing memory errors in an information handling system: A method for handling memory defects during the POST phase and memory calibration in single processor and multiprocessor information handling systems is disclosed whereby information regarding the location of a known memory defect is utilized to optimize the performance of an information handling system. Memory defects within system memory are... Agent: Baker Botts L.L.P. One Shell Plaza

20090049336 - Processor controller, processor control method, storage medium, and external controller: A processor having a plurality of hardware resources can perform separate controls within a proper range according to the dependent relations of hardware resources troubled. In case a notification is made of the failure of the hardware resources constituting the processor, a processor control method decides the range of the... Agent: Staas & Halsey LLP

20090049337 - System and method for testing redundancy and hot-swapping capability of a redundant power supply: A system for testing redundancy and hot-swapping capability of a redundant power supply includes a power switch fixture, a system under test (SUT), and a computing device. The power switch fixture includes a processor, an alternating current (AC) source, a first relay, a second, and two AC outputs. The processor... Agent: PCe Industry, Inc. Att. Cheng-ju Chiang

20090049338 - Root cause diagnostics using temporal data mining: A method, system, and computer program product for fault data correlation in a diagnostic system are provided. The method includes receiving the fault data including a plurality of faults collected over a period of time, and identifying a plurality of episodes within the fault data, where each episode includes a... Agent: General Motors Corporation Legal Staff

20090049339 - Programmable diagnostic memory module: A programmable diagnostic memory module provides enhanced testability of memory controller and memory subsystem design. The programmable diagnostic memory module includes an interface for communicating with an external diagnostic system, and the interface is used to transfer commands to the memory module to alter various behaviors of the memory module.... Agent: Ibm Corporation (mh) C/o Mitch Harris, Attorney At Law, L.L.C.

20090049340 - System analysis device and computer readable storage medium storing system analysis program: A system analysis device for analyzing a state of operation of a computer system includes an analysis processing section, an analysis program storage section, a diagnostic processing section and a condition definition information storage section. The analysis processing section analyzes analysis subject data outputted from the analysis subject computer system.... Agent: Rabin & Berdo, PC

20090049341 - Method for performing memory diagnostics using a programmable diagnostic memory module: A method for performing memory diagnostics using a programmable diagnostic memory module provides enhanced testability of memory controller and memory subsystem design. The programmable diagnostic memory module includes an interface for communicating with an external diagnostic system, and the interface is used to transfer commands to the memory module to... Agent: Ibm Corporation (mh) C/o Mitch Harris, Attorney At Law, L.L.C.

20090049342 - Apparatus, system, and method for adjusting trace data granularity: A method is disclosed for adjusting trace data granularity. An initialization module sets a base granularity for trace data recorded for a component. A registration module registers a condition counter comprising a condition set. The threshold module sets a count threshold for the condition counter. An increment module counts each... Agent: Kunzler & Mckenzie

20090049343 - Method and system for remote diagnostics: A diagnostic system for computers, including a connector interface for connecting the diagnostic system to a PC, a storage medium for storing executable instructions that boot the PC when the diagnostic system is connected to the connector interface, for storing diagnostic testing program code that scans and tests the PC,... Agent: Soquel Group, LLC

20090049344 - Specific-equipment management system, specific-equipment management program, and specific-equipment management method: A specific-equipment management system is equipped with a question generator, a display unit and an input unit and manages a water heater. The water heater is equipment that requires human operation in the vicinity when used. The question generator generates question information. The question information is information regarding a question... Agent: GlobalIPCounselors, LLP

20090049346 - Processes and systems for auditing educational data: Processes and systems for auditing educational system data developed at the school, district, state, and federal levels are disclosed. In some embodiments, the processes include the following: reviewing and validating the data; configuring the types of audits to run against the data and designating each audit as either a standard... Agent: Wiggin And Dana LLP Attention: Patent Docketing

20090049345 - Tool for reporting the status and drill-down of a control application in an automated manufacturing environment: Disclosed are embodiments that provide near real-time monitoring of a control application in a manufacturing environment to detect and determine the root cause of faults within the control application. The embodiments monitor the flow of data within the control application during events (i.e., transactions, stages, process steps, etc.). By comparing... Agent: Frederick W. Gibb, Iii Gibb Intellectual Property Law Firm, LLC

20090049347 - Method and apparatus for bit error determination in multi-tone transceivers: A transceiver with a plurality of components coupled to one another to form a transmit path and a receive path for multi-tone modulation of user data across a communication medium. The transceiver includes a framer and a deframer. The framer is configured to momentarily suspend framing of user data before... Agent: Ip Creators

20090049348 - Semiconductor storage device: This semiconductor storage device comprises a test mode based on test data input from the outside. A test data register temporarily retains the test data, while a test code register temporarily retains a test code corresponding to the test data. A test-code-match detection circuit detects a match between a test... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090049349 - Semiconductor device using logic chip: A system-in-package type semiconductor device includes a logic chip; and a memory chip connected with external terminal through the logic chip. The logic chip includes a data holding circuit configured to hold a test data in a test mode, and store the test data supplied through the data input/output terminal... Agent: Sughrue Mion, PLLC

20090049350 - Error correction code (ecc) circuit test mode: An ECC circuit and method for an integrated circuit memory allows a user to enter a test mode and select a specific location to force a known failure on any memory chip, whether it is fully functional or partially functional. Additional circuitry is placed in the data path where existing... Agent: Hogan & Hartson LLP

20090049351 - Method for creating a memory defect map and optimizing performance using the memory defect map: A method for storing a memory defect map is disclosed whereby a memory component is tested for defects at the time of manufacture and any memory defects detected are stored in a memory defect map and used to optimize the system performance. The memory defect map is updated and the... Agent: Baker Botts, LLP

20090049352 - Control apparatus and method for controlling measuring devices to test electronic apparatuses: An electronic apparatus testing method is provided. The method includes the step of: reading a product ID of the electronic apparatus when the electronic apparatus is connected to a control apparatus; determining the device type ID from the product ID, wherein the product ID comprises basic information of the electronic... Agent: PCe Industry, Inc. Att. Cheng-ju Chiang

20090049353 - Scheme to optimize scan chain ordering in designs: A method for optimizing a scan chain ordering in circuit designs in an electronic computer-aided design system is provided. The method comprising: creating a schematic representative of a circuit design having a first cell and a second cell, the first cell and the second cell each having latches therein; creating... Agent: Cantor Colburn LLP-ibm Poughkeepsie

20090049354 - Single-pass, concurrent-validation methods for generating test patterns for sequential circuits: A single-pass, concurrent validation method for generating test pattern sequences for sequential circuits maps fault objects arriving at circuit next-state lines into good next-state fault objects, and passes these mapped results to a next time-frame by placing the good next-state fault objects on present-state lines corresponding to the next-state lines... Agent: Robert Buckley, Patent Attorney

20090049355 - System and method employing frequency band flipping for the retransmission of data: For use in a communication system, an apparatus that, in one embodiment, includes a band flipping module configured to renumber physical resource blocks for a retransmission of data from physical resource blocks associated with a previous transmission of the data. The apparatus also includes a transceiver configured to retransmit the... Agent: Slater & Matsil, L.L.P.

20090049356 - Transmission control methods and devices for communication systems: A system and method for transmission control in a wireless communication system, including receiving data for transmission to a receiving device, and forwarding the data to a subordinate device. The method also includes initiating a timer, and generating a supplemental receipt indicator. If the intermediate device receives at least one... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090049359 - Circular buffer based rate matching: Systems and methodologies are described that facilitate employing circular buffer based rate matching. Encoded block(s) that include systematic, parity 1, and parity 2 bits can be generated using turbo code. Bit type can be identified to separate bits into distinct groups. Systematic bits can be interleaved together to generate a... Agent: Qualcomm Incorporated

20090049357 - Decoding method for quasi-cyclic low-density parity-check codes and decoder for the same: A decoding method for quasi-cyclic low-density parity-check (QC-LDPC) codes sequentially decodes a plurality of block codes defined by an identical parity-check matrix derived from a parity-check matrix of the QC-LDPC codes, wherein size of the identical parity-check matrix is smaller than size of the parity-check matrix.... Agent: Hdsl

20090049358 - Methods and systems for terminating an iterative decoding process of a forward error correction block: The invention provides methods and systems for terminating an iterative decoding process of a Forward Error Correction block (FEC). The iterative decoding process of the FEC block is terminated upon determining that the FEC block cannot be decoded successfully. A method comprises calculating a metric based on one or more... Agent: Beceem Communications, Inc.

20090049360 - Optimal circular buffer rate matching for turbo code: Optimal circular buffer rate matching for turbo code. An offset index, δ, of 3 and a skipping index, σ, of 3 is employed in accordance with circular buffer rate matching. This allows less puncturing of information bits and more puncturing of redundancy/parity bits (e.g., which can provide for a higher... Agent: Garlick Harrison & Markison

20090049362 - Method and system for decoding a data burst in a communication system: The present invention provides methods and systems for decoding a data burst in a communication system. A data burst, including a plurality of forward error correction (FEC) blocks, is received. At least one FEC block of the data burst is decoded. Thereafter, it is detected if one or more errors... Agent: Beceem Communications, Inc.

20090049361 - Protected communication link with improved protection indication: A method for communication includes receiving first and second data frames over first and second communication links, respectively, the first and second data frames containing respective first and second replicas of data, which has been encoded with a Forward Error Correction (FEC) code. The FEC code in the received first... Agent: Husch Blackwell Sanders, LLP Husch Blackwell Sanders LLP Welsh & Katz

20090049363 - Simplified ldpc encoding for digital communications: Encoder circuitry for applying a low-density parity check (LDPC) code to information words is disclosed. The encoder circuitry takes advantage of a macro matrix arrangement of the LDPC parity check matrix in which the parity portion of the parity check matrix is arranged as a macro matrix in which all... Agent: Texas Instruments Incorporated

20090049364 - Nonvolatile memory device, system, and method providing fast program and read operations: Disclosed are program and read methods for a nonvolatile memory system, including determining to program first data in which one of fast and normal modes; providing the first data with an error code generated by a multi-bit ECC engine, in the fast mode, and generating second data; programming the second... Agent: Volentine & Whitt PLLC

20090049365 - System and method for providing error correction and detection in a memory system: A system and method for providing error correction and detection in a memory system. The memory system includes a plurality of memory devices, and error detection and correction logic. The error detection and correction logic includes instructions for generating an error correction code (ECC) word that includes bits from two... Agent: Cantor Colburn LLP-ibm Poughkeepsie

20090049366 - Memory device with error correction system: There is disclosed a memory device with an error detection and correction system formed therein, the error detection and correction system being configured to detect and correct errors in read out data by use of a BCH code, wherein the error detection and correction system is 4-bit error correctable, and... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090049367 - Viterbi traceback initial state index initialization for partial cascade processing: This invention provides the correct Viterbi decode traceback starting index is obtained for all constraint lengths and frame sizes. Reverse transpose operations that depend on the last active add-compare-select unit a cascade block of the state metric update process. This last active add-compare-select unit controls selection of T counter signals... Agent: Texas Instruments Incorporated

20090049369 - Circuit arrangement and method for error detection and arrangement for monitoring of a digital circuit: A circuit arrangement is formed as follows. A combinational circuit has n binary inputs E1, . . . , En for inputting n (n≧2) information bits x1, . . . , xn and m binary outputs for outputting m (m≧1) check bits c1, . . . , cm. The combinational... Agent: Slater & Matsil LLP

20090049368 - Method and device of rewriting a primary sector of a sector erasable semiconductor memory means: In a method of rewriting a primary sector of a sector erasable semiconductor memory device, a bootloader code is copied from the primary sector to a second sector, all content of the first sector is subsequently erased, and the bootloader code is recopied from the second to the primary sector.... Agent: Kenyon & Kenyon LLP

  
02/12/2009 > patent applications in patent subcategories.

20090044040 - Modification of array access checking in aix: An error handling operation for checking of an array access in program code is modified during compilation thereof. A sequentially arranged null checking operation and array bounds checking operation for the array access are located. The array bounds checking operation has a corresponding error handling operation operable for setting an... Agent: Carey, Rodriguez, Greenberg & Paul, LLP Steven M. Greenberg

20090044042 - Device management method, analysis system used for the device management method, data structure used in management database, and maintenance inspection support apparatus used for the device management method: Either a complete overhaul for replacing with recommended devices the entire number of devices in a large group of managed devices T, or a partial overhaul for repairing or replacing with recommended devices only those managed devices T that are malfunctioning is selectively performed as an initial overhaul. A complete... Agent: The Webb Law Firm, P.C.

20090044041 - Redundant data bus system: A redundant data bus system has two data buses between which at least two failsafe control devices are connected. The two data buses operate with the same data bus protocol at essentially the same transmission frequency, and safety-related control messages are transmitted in parallel via both data buses and processed... Agent: Crowell & Moring LLP Intellectual Property Group

20090044044 - Device and method for correcting errors in a system having at least two execution units having registers: A device for correcting errors in a system having at least two execution units having registers is presented, the registers being designed for recording data. The device has comparison device(s) that are set up such that through a comparison of data that are provided for storage in the registers, a... Agent: Kenyon & Kenyon LLP

20090044046 - Method for rolling back from snapshot with log: High speed differential copy can be implemented in the fail-back after disaster recovery when the data of the primary site is protected safely. When a restore command is issued, the common snapshots of the snapshots of the primary site and the secondary site are extracted as the base snapshot by... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20090044045 - Semiconductor integrated circuit and redundancy method thereof: A semiconductor integrated circuit includes a main memory cell array, redundancy memory cell array, memory macro and repair information transferring circuit. A repair information analyzing circuit fetches repair information of transferred unit repair information therein, outputs the repair information to the memory macro having a redundancy repair mechanism and subjects... Agent: Amin, Turocy & Calvin, LLP

20090044043 - System and method to support background initialization for controller that supports fast rebuild using in block data: A fast rebuild mechanism that includes a background initialization mechanism. The fast rebuild mechanism allows a RAID controller to be made aware of what blocks are actually in use so that only those blocks are rebuilt after a disk drive failure. The fast rebuild mechanism also includes functionality for an... Agent: Hamilton & Terrile, LLP

20090044047 - Accessing removable storage management services to obtain replacement instructions indicating whether to replace removable storage: Provided are a method, system, and article of manufacture for accessing removable storage management services to obtain replacement instructions indicating whether to replace removable storage. Replacement information indicating whether to replace at least one of a plurality of managed removable storages is obtained by interfacing with a service computer over... Agent: Konrad Raynes & Victor, LLP. Attn: Ibm37

20090044048 - Method and device for generating a signal in a computer system having a plurality of components: A method and device for generating a signal in a computer system having a plurality of components, at least two execution units being provided as two components, and a switchover means being provided as an additional component, in the computer system, switchover operations being carried out between at least two... Agent: Kenyon & Kenyon LLP

20090044049 - Multiple parallel pipeline processor having self-repairing capability: A multiple parallel pipeline digital processing apparatus has the capability to substitute a second pipeline for a first in the event that a failure is detected in the first pipeline. Preferably, a redundant pipeline is shared by multiple primary pipelines. Preferably, the pipelines are located physically adjacent one another in... Agent: Ibm Corporation RochesterIPLaw Dept. 917

20090044050 - Watchdog mechanism with fault recovery: A method for handling watchdog events of an electronic device includes detecting a watchdog fault in a normal mode, which is a watchdog event in which a watchdog trigger is not correctly serviced; entering from the normal mode into a first escalation level of nx escalation levels upon detection of... Agent: Texas Instruments Incorporated

20090044051 - Extracting log and trace buffers in the event of system crashes: A system and program storage device for extracting data of a buffer after a failure of an operating system. An application is registered prior to the failure. The registering includes identifying a buffer in which the data to be extracted is stored prior to the failure. The buffer is reserved... Agent: Schmeiser, Olsen & Watts

20090044052 - Cell boundary fault detection system: An apparatus and program product determine a nodal fault along the boundary, or face, of a computing cell. Nodes on adjacent cell boundaries communicate with each other, and the communications are analyzed to determine if a node or connection is faulty.... Agent: Wood, Herron & Evans, L.L.P. (ibm)

20090044053 - Method, computer system, and computer program product for problem determination using system run-time behavior analysis: Run-time behavior is recorded using traces that are generated at run-time. A set of valid system behaviors is maintained. A recorded behavior can be added to the set of valid system behaviors if the run-time operation is completed successfully. Otherwise, the recorded behavior can be compared with members of the... Agent: Ibm Endicott (anthony England) Law Office Of Anthony England

20090044054 - Dynamic critical path detector for digital logic circuit paths: Method for correcting timing failures in an integrated circuit and device for monitoring an integrated circuit. The method includes placing a first and second latch near a critical path. The first latch has an input comprising a data value on the critical path. The method further includes generating a delayed... Agent: Greenblum & Bernstein, P.L.C

20090044055 - Method for servicing hardware of computer system and method and system for guiding to solve errors: A method for guiding to solve system errors is applied to a computer system. The method of the invention includes the step of calling a debugging application software to check a system state of the computer system when a request for detecting errors inputted by a user is received. When... Agent: Jianq Chyun Intellectual Property Office

20090044056 - Maintenance management system, database server, maintenance management program, and maintenance management method: A maintenance management system according to the present invention has an electronic device and a database server. In one embodiment of the invention, the electronic device further includes: (1) a log generating unit for collecting states of components and generating a log when a failure is detected during execution of... Agent: Connolly Bove Lodge & Hutz LLP

20090044057 - System and method for controlling synchronous functional microprocessor redundancy during test and analysis: A system for testing a processor. The system includes a gold processor and a test access port (TAP). A processor that is a under test (DUT) is coupled to both the gold processor and the TAP. Test signals are simultaneously provided to both the gold processor and the DUT such... Agent: Meyertons, Hood, Kivlin, Kowert & Goetzel (amd)

20090044058 - System and method for controlling synchronous functional microprocessor redundancy during test and method for determining results: A system for testing a processor. The system includes a gold processor and a test access port (TAP). A processor that is a device under test (DUT) is coupled to both the gold processor and the TAP. In the first mode, the TAP provides test signals to both the gold... Agent: Meyertons, Hood, Kivlin, Kowert & Goetzel (amd)

20090044059 - Semiconductor integrated circuit and debugging system: This invention is to provide a technology for taking out trace information externally without lacking under the condition of limited output bandwidth. A semiconductor integrated circuit provided includes: a processing unit which can perform arithmetic processing according to a predetermined program and can output trace information with respect to the... Agent: Miles & Stockbridge PC

20090044060 - Method for supervising task-based data processing: The invention relates to a method for supervising a task-based data processing, wherein for a plurality of tasks the following steps are performed for each task: scheduling the task for processing, and logging the scheduling of the task by storing a task identifier in a log memory, said task identifier... Agent: Ericsson Inc.

20090044062 - Method of testing a memory module and hub of the memory module: A method of testing a memory module comprising converting a hub of the memory module into a transparent mode, providing first data corresponding to a first address to the hub of the memory module, providing the first data of the hub of the memory module to a first address of... Agent: Harness, Dickey & Pierce, P.L.C

20090044061 - Structure and method for detecting errors in a multilevel memory device with improved programming granularity: An error detection structure is proposed for a multilevel memory device including a plurality of memory cells each one being programmable at more than two levels ordered in a sequence, each level representing a logic value consisting of a plurality of digits, wherein the structure includes means for detecting errors... Agent: Numonyx/blakely Blakely Sokoloff Taylor & Zafman LLP

20090044063 - Semiconductor memory device and test system of a semiconductor memory device: A semiconductor memory device includes a memory core unit, N data output buffers, N data output ports, and a plurality of test logic circuits. The memory core unit stores test data through N data lines. The N data output buffers are respectively connected to the corresponding N data lines. The... Agent: Mills & Onello LLP

20090044064 - Scan path circuit and semiconductor integrated circuit: Provided are a scan path circuit and a semiconductor integrated circuit that can reduce time necessary for shift operation. The scan path circuit includes: a first scan FF group (7) including serially connected three scan FFs (21) and connected to a test input terminal (3); a second scan FF group... Agent: Foley And Lardner LLP Suite 500

20090044068 - Method and device for counting transmission times of data unit, transmission device, and computer program: A method for counting correctly substantial transmission times of a data unit such as an RLC-PDU even if the data unit is divided before being transmitted is provided. The method includes the steps of preparing a counter for the RLC-PDU (#503), making a storage portion store a pointer indicating a... Agent: Hanify & King Professional Corporation

20090044065 - Retransmitting method, radio receiving apparatus, and multiantenna radio communication system: A retransmitting method, a radio receiving apparatus and a multiantenna communication system that are capable of improving the system throughput. According to this method, the receiving apparatus determines whether a received substream has an error and hence a retransmittal is necessary (401); calculates a signal-to-interference noise ratio after detection of... Agent: Dickinson Wright PLLC James E. Ledbetter, Esq.

20090044066 - System and method for implementing a subrate recovery for lost packets in a communications environment: A method for communicating data is provided that includes receiving a plurality of bits associated with a communications flow and recovering data lost from a packet by retransmitting selected subrate data for a lost sample over a specified time period. The method may further include transmitting one additional subrate for... Agent: Baker Botts L.L.P.

20090044067 - Wireless communication apparatus, transmitting method and receiving method: A wireless communication apparatus having a retransmission control unit configured to refer to identification information added to received retransmit data when a second retransmit request is performed after the first transmit request is performed, and not to use the received retransmit data for forming data when the received retransmit data... Agent: Myers Wolin, LLC

20090044070 - System and method for trellis decoding in a multi-pair transceiver system: A method and a system for decoding information signals encoded in accordance with a multi-state encoding scheme and transmitted over a multi-dimensional transmission channel by computing a distance of a received word from a codeword. One-dimensional (1D) input signals are processed in a pair of symbol decoders, implemented as look-up... Agent: Mcandrews Held & Malloy, Ltd

20090044069 - Transmitter apparatus and multiantenna transmitter apparatus: A transmitter apparatus wherein a relatively simple structure is used to suppress burst errors without changing the block sizes of encoded blocks even when the number of modulation multi-values is increased. There are included an encoding part (11) that subjects transport data to a block encoding process to form block... Agent: Dickinson Wright PLLC James E. Ledbetter, Esq.

20090044073 - Broadcast receiver and method of processing data: A broadcast receiver and a method of processing data are disclosed. The broadcast receiver includes a signal receiving unit, a RS frame decoder, a decoding unit, a text-to-speech (TTS) module, a voice output unit, and a control unit. The signal receiving unit receives broadcast signal multiplexed mobile broadcast service data... Agent: Lee, Hong, Degerman, Kang & Waimey

20090044072 - Broadcasting receiver and broadcast signal processing method: A digital broadcasting system which is robust against an error when mobile service data is transmitted and a method of processing data are disclosed. The mobile service data is subjected to an additional coding process and the coded mobile service data is transmitted. Accordingly, it is possible to cope with... Agent: Lee, Hong, Degerman, Kang & Waimey

20090044071 - Error correcting device: The data error correcting device is provided with: a error correction means which performs an error correction process on a time-series of bits of input data, and produces corrected data and parameters showing an error sensing status at the time of correction; an estimated data producing means which responds to... Agent: Sughrue Mion, PLLC

20090044074 - Ofdm receiving apparatus and ofdm receiving method: An OFDM receiving apparatus has N sets of reception and demodulation units which input one segment broadcasting signals of ground digital broadcasting received with N sets of antennas and demodulate the signals; a buffer unit which includes N sets of buffers which hold temporarily N sets of demodulated data, which... Agent: Foley And Lardner LLP Suite 500

20090044075 - Failure tolerant data storage: with K being a counting integer; and the fountain encoder distributes the fountain codewords among the N storage devices S1 . . . SN in approximate proportion to the storage capacity CK of each of the N storage devices S1 . . . SN subject to the constraint that enough... Agent: Miller Patent Services

20090044077 - Flash memory system having encrypted error correction code and encryption method for flash memory system: A flash memory system includes a flash memory for storing input data, and a memory controller controlling the flash memory, wherein the memory controller generates a first error correction code corresponding to the input data, and encrypts the first error correction code, and the flash memory includes a main area... Agent: F. Chau & Associates, LLC

20090044076 - Memory access system: The ECC circuit generates the first syndrome of write data, which have not been written to the memory. The EDC circuit generates the second syndrome of verification read data, which have been written to the memory. The EDC circuit detects errors due only to the “read disturb phenomenon” using the... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090044078 - Ecc functional block placement in a multi-channel mass storage device: A multiple channel storage device may include a host controller to receive input data from a host device and a buffer memory to store the input data and associated error correcting data prior to downstream storage. Multiple storage channels downstream from the buffer memory may store the input data and... Agent: Alan Pedersen-giles Intel Corporation

20090044079 - Rate-adaptive forward error correction for optical transport systems: An optical transport system (OTS) having a plurality of optical transponders (OTs) connected via one or more optical links and adapted to communicate with one another using respective rate-adaptive forward-error-correction (FEC) codes. In one embodiment, the OTS has a rate control unit (RCU) adapted to configure the OTs to dynamically... Agent: Mendelsohn & Associates, P.C.

20090044080 - Closed galois field combination: A method is provided for combining two or more input sequences in a communications system to increase a repetition period of the input sequences in a resource-efficient manner. The method includes a receiving step, a mapping step, and a generating step. The receiving step involves receiving a first number sequence... Agent: Harris Corporation C/o Darby & Darby PC

20090044081 - Method and system for providing short block length low density parity check (ldpc) codes in support of broadband satellite applications: An approach is provided for encoding short frame length Low Density Parity Check (LDPC) codes. An encoder generates a LDPC code having an outer Bose Chaudhuri Hocquenghem (BCH) code. Structure is imposed on the LDPC codes by restricting portion part of the parity check matrix to be lower triangular and/or... Agent: The Directv Group, Inc. Patent Docket Administration

20090044082 - Method and system for data-rate control by randomized bit-puncturing in communication systems: Method and system for data-rate control by randomized bit-puncturing in communication systems. An encoder encodes at least one information bit thereby generating a group of encoded bits or an encoded frame. The encoder may be any type of encoder including a turbo encoder, an LDPC (Low Density Parity Check) encoder,... Agent: Garlick Harrison & Markison

20090044083 - Downstream transmitter and cable modem receiver for 1024 qam: A headend transmitter that transmits 1024 QAM including a 256 QAM modulator which has been modified to have more aggressive forward error correction processing. The 256 QAM modulator outputs 256 QAM points to a summer. Another data modulator receives additional data to be transmitted in a separate, substantially less complex... Agent: Haverstock & Owens LLP Attn: Thomas B. Haverstock

20090044084 - Combined dc restoration double detection and loops: A method of double detection in a perpendicular magnetic read channel is disclosed. The method generally includes the steps of (A) generating an intermediate signal by performing a first detection on an input signal of the perpendicular read channel, the first detection having a first error rate, (B) generating a... Agent: Christopher P Maiorana, PC Lsi Corporation

20090044085 - Defect management method for storage medium and system thereof: A defect management method for a storage medium is provided. An initial check is performed on the storage medium, and then diving the storage medium into blocks, which at least include a using data area with endurance blocks. Each endurance block is given an initial endurance value. Then, an endurance... Agent: Jianq Chyun Intellectual Property Office

20090044086 - Error correction in a set associative storage device: A data processing apparatus is provided comprising processing circuitry for performing data processing operations, a set associative storage device for storing data values for access by the processing circuitry when performing data processing operations, error detection circuitry for performing, for each access to the storage device, an error detection operation... Agent: Nixon & Vanderhye P.C.

20090044087 - Data slicer having an error correction device: A data slicer includes an error bit predictor, a DC level compensator, a co-channel detector, and an output device. The data slicer generates four bytes according to four slicing levels respectively. The four slicing levels are a DC level, a level generated by adding a predetermined offset to the DC... Agent: North America Intellectual Property Corporation

  
02/05/2009 > patent applications in patent subcategories.

20090037774 - Client server system for analysis and performance tuning of remote graphics devices: Embodiments of the invention provide a data communications protocol and client server architecture used for the performance analysis and debugging of a graphics application running on a remote device. The remote device may be a hand-held video game console, a mobile phone, or convergence device, but may also be a... Agent: Patterson & Sheridan, L.L.P.

20090037775 - Messaging system based group joint debugging system and method: A messaging system based group joint debugging system is provided, comprising a master computer and a slave computer in mutual communication with the master computer through network. With the group joint debugging system, multiple members of a geographical distributed development team can do jobs on a same debugging session. The... Agent: Law Office Of Ido Tuchman (yor)

20090037776 - Recovering from a failed i/o controller in an information handling system: An information handling system includes first and second input/output (I/O) controllers, a detector for detecting an I/O controller failure, and an I/O recovery unit. The first I/O controller adaptively controls a first and a second I/O slot. The second I/O controller adaptively controls a third and a fourth I/O slot.... Agent: Haynes And Boone, LLPIPSection

20090037777 - Use of operational configuration parameters to predict system failures: The use of operational configuration parameters to predict digital system failures is described herein. At least some illustrative embodiments include a method that includes initializing a digital system (the initializing comprising determining an operational configuration of at least part of the digital system), saving the operational configuration to a database... Agent: Hewlett Packard Company

20090037792 - Digital broadcasting system and method of processing data: A digital receiving system, and a method of processing data are disclosed. The digital receiving system includes a receiving unit, a known sequence detector, and a channel equalizer. The receiving unit receives a broadcast signal including mobile service data and main service data. The known sequence detector detects known data... Agent: Lee, Hong, Degerman, Kang & Waimey

20090037793 - Method for error processing in optical disk memories: A method of correcting and detecting errors in a sector of data stored in a DVD format is provided. The method includes: calculating an initial error detection value for data within the sector, performing an error correction operation on the data within the sector and determining an updated, intermediate error... Agent: North America Intellectual Property Corporation

20090037794 - Digital transmission system with enhanced data multiplexing in vsb transmission system: A digital VSB transmission system and enhanced data multiplexing method are disclosed. When ½ enhanced data coded at a rate of ½ and ¼ enhanced data at a rate of ¼ are transmitted, timing jitter in MPEG of VSB receiver can be reduced and the size of input buffer in... Agent: Lee, Hong, Degerman, Kang & Waimey

20090037795 - Denoising and error correction for finite input, general output channel: Systems and methods are disclosed for denoising for a finite input, general output channel. In one aspect, a system is provided for processing a noisy signal formed by a noise-introducing channel in response to an error correction coded input signal, the noisy signal having symbols of a general alphabet. The... Agent: Hewlett Packard Company

20090037796 - Error correction device: An error correction device for reducing the amount of access to an external memory while preventing the capacity of an internal memory from increasing. An optical disc stores scramble data for each data block. A descramble circuit reads scramble data in the data blocks from the optical disc as read... Agent: Arent Fox LLP

20090037797 - Rate matching for a wireless communications systems: Apparatuses and methods are provided for generating a plurality of redundancy versions using various rate matching algorithms. In some embodiments, a rate matcher is provided that allocates systematic and parity bits to the redundancy versions in a manner that allows all of these bits to be transmitted in at least... Agent: Ropes & Gray LLP

20090037798 - Self-resetting, self-correcting latches: A latch circuit having three latch stages generates a majority output value from the stages, senses when the latch stage outputs are not all equal, and feeds the majority output value back to inputs of the latch stages to reload the latch stages. The latch circuit uses a not-equal gate... Agent: Ibm Corporation (jvm)

20090037799 - Operating method applied to low density parity check (ldpc) decoder and circuit thereof: An operating method applied to low density parity check (LDPC) decoders and the circuit thereof are proposed, in which original bit nodes are incorporated into check nodes for simultaneous operation. The bit node messages are generated according to the different between the newly generated check messages and the previously check... Agent: Sinorica, LLC

20090037800 - Data parallelizing receiver: Provided is a data parallelizing receiver including an input signal receiver for externally receiving serial data as packets, sampling the serial data, aligning the sampled data in an input order, and converting the aligned data into parallel data to output the parallel data, a cyclic redundancy check (CRC) partial calculator... Agent: Volentine & Whitt PLLC

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