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Error detection/correction and fault detection/recovery inventions 12/08

Recently published patent applications awaiting approval from the USPTO. Recent week's RSS XML file available below.
Listing format for abstract view: USPTO application #, Title, Abstract excerpt,Patent Agent. Listing format for list view: USPTO National Class full category number, title of the patent application.
  
12/25/2008 > patent applications in patent subcategories.

20080320326 - System for detecting pattern of events occurred in information system: There is provided a system having a plurality of information processing apparatuses, each of which comprises a storage device that stores, for each occurrence pattern of events to be detected, a plurality of tasks for respectively determining whether a plurality of conditions are fulfilled; a process determination section that, in... Agent: Ibm Corporation

20080320327 - Degeneration control device and degeneration control program: A degeneration control device that controls degeneration of a cache having a plurality of ways based on an error that occurs in response to an access request, includes a cache line degeneration information memory unit, which stores cache line degeneration information that indicates whether a cache line constituting each of... Agent: Staas & Halsey LLP

20080320328 - Fuzz testing and attack-surface scoping for uri handlers and pluggable protocols: Systems and methods for testing uniform resource identifier protocols, comprising a fuzzer that can accept an input, and produce a fuzzed uniform resource identifier (URI), and a debugger that monitors effects of invoking the fuzzed uniform resource identifier. The input can comprise a directory containing a plurality of valid uniform... Agent: Amin, Turocy & Calvin, LLP

20080320329 - Row fault detection system: An apparatus and program product check for nodal faults in a row of nodes by causing each node in the row to concurrently communicate with its adjacent neighbor nodes in the row. The communications are analyzed to determine a presence of a faulty node or connection.... Agent: Wood, Herron & Evans, L.L.P. (ibm)

20080320330 - Row fault detection system: An apparatus, program product and method check for nodal faults in a row of nodes by causing each node in the row to concurrently communicate with its adjacent neighbor nodes in the row. The communications are analyzed to determine a presence of a faulty node or connection.... Agent: Wood, Herron & Evans, L.L.P. (ibm)

20080320331 - Control apparatus: For a control apparatus to be boundary scan testable even when running, including processor cores in an operator to be capable of self-repairing a troubling part, an operator (2) has processor cores (2a, 2b) connected to a boundary scan bus (12), and adapted to mutually diagnose opponent processor cores for... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080320332 - Error processing across multiple initiator network: An architecture for error log processing is provided. Each error log is given a defined priority and mapped to an error recovery procedure (ERP) to be run if the log is seen. The system has a plurality of software layers to process the errors. Each software layer processes the error... Agent: Ibm Corp. (wip) C/o Walder Intellectual Property Law, P.C.

20080320333 - Memory handling techniques to facilitate debugging: A method for debugging includes interacting with a memory management component to force an interrupt upon access to one or more memory locations during software execution, and in response to the forced interrupt, saving information regarding the execution of the software, and interacting with the memory management component to disable... Agent: Steptoe & Johnson LLP

20080320334 - Transactional debugger for a transactional memory system: Various technologies and techniques are disclosed for providing a debugger for programs running under a transactional memory system. When running a particular program using the debugger, the system detects when a conflict occurs on at least one conflictpoint that was set in the particular program. A graphical user interface is... Agent: Microsoft Corporation

20080320335 - Test automation via rfid technology: A method and system receives test requirements and test settings in order to design a test. An identifier is assigned to the test that was designed and the test is stored in a database using the identifier to identify the test. In addition, the test is printed on at least... Agent: Gibb & Rahman, LLC

20080320337 - Removable storage media drive feature enabling self test without presence of removable media: A method, system and apparatus for testing a removable storage media drive device are disclosed. According to teachings of the present disclosure, a simulated storage media may be disposed within a removable storage media drive device. In the event removable storage media is not present in the drive device when... Agent: Baker Botts L.L.P.

20080320336 - System and method of client side analysis for identifying failing ram after a user mode or kernel mode exception: A process executing on a computing system may encounter an exception. Pointers or other references created by the exception may identify portions of the computing system's memory containing the binary code that was executing at the time of the exception. The exception-causing code from the system memory may be compared... Agent: Marshall, Gerstein & Borun LLP (microsoft)

20080320338 - Methods, systems, and media to correlate errors associated with a cluster: Methods, systems, and media for correlating error events of a cluster are disclosed. Embodiments may identify systems of a cluster potentially impacted by an error and identify one or more error events associated with those systems. Then, embodiments may select one of the identified error events based upon data associated... Agent: Ibm Corporation, Intellectual Property Law Dept 917, Bldg. 006-1

20080320339 - Method of remotely monitoring an internet web site: A method of performing a service which remotely monitors a Web site includes the steps of monitoring the site for an error and notifying a site representative in the event an error is detected on the site. Advance permission is not obtained prior to sending the notification and a fee... Agent: Morgan, Lewis & Bockius LLP

20080320341 - Information providing system, information providing device, appropriateness judgment information generation method and appropriateness judgment inforamtion generation process program: m

20080320340 - Method and device for performing switchover operations and for comparing data in a computer system having at least three execution units: A method and a device for performing switchover operations and for comparing data in a computer system having at least three processing units are provided, in which switchover unit is provided, a switchover operations being carried out between at least two operating modes, and a comparison unit is provided. A... Agent: Kenyon & Kenyon LLP

20080320342 - Memory controller: A memory controller carries out error detection on a wide range of area of a memory cell array, which includes not only readout addresses but also non-readout addresses. Thus, by carrying out error detection at an address at which an error occurs without accessing the address for readout, it is... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080320343 - Web page error reporting: An error in a web page displayed on a device is detected. The error is assigned to a bucket to indicate a type of the error, and a record describing the current state of the device is generated. Both an indication of the bucket and the record describing the current... Agent: Microsoft Corporation

20080320344 - Method for testing the error ratio ber of a device according to confidence level, test time and selectivity: A method for testing the error ratio BER of a device under test against a specified allowable error ratio comprises the steps: measuring ns samples of the output of the device, thereby detecting ne erroneous samples of these ns samples, defining BER(ne)=ne/ns as the preliminary error ratio and deciding to... Agent: Phouphanomketh Ditthavong Ditthavong & Mori, P.C.

20080320345 - System and method for testing wireless devices: A system for testing a communication device includes a testing module, a measurement module, and a control module. The testing module transmits one or more first test signals based on a first test sequence. The measurement module acquires test data by receiving one or more second test signals that are... Agent: Vedder Price P.C.

20080320346 - Systems for reading nonvolatile memory: In a nonvolatile memory system, first raw data is obtained from stored data using a first set of reading parameters. Subsequently, the first raw data is transferred to an ECC circuit where it is decoded. While the first raw data is being transferred and decoded, second raw data is obtained... Agent: Weaver Austin Villeneuve Sampson LLP

20080320347 - Testing of integrated circuits using test module: A method and apparatus for testing of integrated circuits using a Direct Memory Load Execute Dump (DMLED) test module. The method includes loading a test case into a memory using the DMLED test module, loading initialization signatures of fixed pattern into the memory using the DMLED test module, and executing... Agent: Texas Instruments Incorporated

20080320349 - Efuse programming data alignment verification apparatus and method: An eFuse data alignment verification apparatus and method are provided. Alignment latches are provided in a series of latch units of a write scan chain and a logic unit is coupled to the alignment latches. A sequence of data that is scanned-into the series of latch units of the write... Agent: Ibm Corp. (wip) C/o Walder Intellectual Property Law, P.C.

20080320348 - Launch-on-shift support for on-chip-clocking: A method to perform launch-on-shift scanning for integrated circuits having multiple clock domains is presented. An integrated circuit includes both capture clock domains and non-capture clock domains. The portions of the test vectors for non-capture clock domains are shifted into the scan chains of the non-capture clock domains and allowed... Agent: Silicon Valley Patent Group LLP

20080320350 - Ip core design supporting user-added scan register option: An integrated circuit carries an intellectual property core. The intellectual property core includes a test access port 39 with test data input leads 15, test data output leads 13, control leads 17 and an external register present, ERP lead 37. A scan register 25 encompasses the intellectual property core and... Agent: Texas Instruments Incorporated

20080320351 - Low power scan & delay test method and apparatus: Scan and Scan-BIST architectures are commonly used to test digital circuitry in integrated circuits. The present disclosure improves upon low power Scan and Scan-BIST methods. The improvement allows the low power Scan and Scan-BIST architectures to achieve a delay test capability equally as effective as the delay test capabilities used... Agent: Texas Instruments Incorporated

20080320352 - Methods for distribution of test generation programs: As described herein, circuit testing algorithms, or portions thereof, can be executed in a distributed manner so that their execution can be over a network of processors. In one aspect, the results that are obtained by such distributed execution are ensured to be consistent with the results that would be... Agent: Klarquist Sparkman, LLP

20080320353 - Apparatus comprising a circular buffer and method for assigning redundancy versions to a circular buffer: During operation of a transmitter a circular buffer is created where only column tops of the circular buffer are defined as a starting position for a redundancy version. Where the circular buffer is in sequence format, all possible redundancy versions are at positions ┌Kstream/32┐(12×i+σ), i=0, 1, . . . ,... Agent: Motorola, Inc.

20080320354 - Context transfers and multi-band operation for wireless networks: Various example embodiments are disclosed relating wireless networks and relating to context transfers and multi-band operation in wireless networks. In an example embodiment, a multi-band scheduler may be provided for use in a wireless node. The multi-band scheduler may be configured to: receive one or more data units of a... Agent: Brake Hughes Bellermann LLP

20080320355 - System for identifying localized burst errors: A system for detecting one or more localized burst errors in a receiving message comprised of a plurality of codewords. The system comprises a trellis code decoder for decoding a receiving message with a plurality of codewords and calculating one or more cumulative metrics of a maximum likelihood path and... Agent: Edell, Shapiro & Finnan, LLC

20080320356 - Retransmission control method and transmitting device: It is determined whether control data that a receiving device has transmitted to a transmitting device in response to reception of packetized data from the transmitting device is normal data. If it is determined that the control data is not normal data, it is estimated whether response data included in... Agent: Myers Wolin, LLC

20080320357 - Method and apparatus for reducing signaling overhead in a communication system using hybrid automatic repeat request: A transmitting unit combines a slot identifier (SI) and a block identifier (BI) in each header that is transmitted with the data to allow a receiving unit to associate previously received data blocks with retransmissions, or retries, of the same respective data blocks in order to perform bit error detection... Agent: Motorola, Inc.

20080320360 - Control method of information processing device and information processing device: A transmitting side device (10) and a receiving side device (20) are connected to each other via a bus (30) comprising TAG bits (31), data bits (32) and error detection/correction ECC bits (33). The transmitting side device (10) uses a redundant bit inversion circuit (14) to invert different bits of... Agent: Staas & Halsey LLP

20080320358 - Encoding and decoding method, and encoding and decoding devices with a two-stage error protection process: An encoding method for a series of data packets transmitted in the framework of a combined streaming and downloading application by a two-stage error protection process and only one unidirectional transmission channel. According to said method, a partial block of successive data packets is protected against at least some of... Agent: Staas & Halsey LLP

20080320361 - Information recording device, data-flow controller and data flow controlling method: A method for transferring corrected data to an external buffer within a tape drive is disclosed. After the receipt of data from a data recording medium, the data are stored in an external buffer. The data are then transferred from the external buffer to an error correction code (ECC) device.... Agent: Dillon & Yudell, LLP

20080320362 - Multilevel low density parity-check coded modulation: A method and apparatus are provided for encoding and decoding a communication signal. Processes for encoding and decoding the communication signal use a first low density parity-check code (LDPC) construction and a second low density parity-check code construction that differs from the first low density parity-check code construction. Multilevel coding... Agent: Schwegman, Lundberg & Woessner, P.A.

20080320364 - Adding known data to crc processing without increased processing time: Cyclic redundancy check processing can be applied advantageously to a set of input data that includes an unknown data portion and a data portion that is already known before the unknown data portion becomes available. A syndrome contribution that the already-known data portion contributes to a syndrome for the set... Agent: Texas Instruments Incorporated

20080320363 - Method and apparatus for rateless source coding with/without decoder side information: A method of and system for rateless source coding are disclosed. The method comprises the steps of providing a set of low-density parity check (LDPC) codes, each of which accepts a range of data input lengths and a range of target compression rates; identifying a data input having a data... Agent: Scully, Scott, Murphy & Presser, P.C.

20080320365 - Providing an initial syndrome to a crc next-state decoder independently of its syndrome feedback loop: An initial syndrome for use by a next-state decoder in a cyclic redundancy check apparatus can be inserted independently of the syndrome feedback path and its associated clock. This eliminates a clock cycle penalty that would otherwise be imposed on an incoming data stream each time the initial syndrome value... Agent: Texas Instruments Incorporated

20080320367 - Apparatus for accessing and transferring optical data: An apparatus for accessing and transferring optical data has a memory supporting the page-mode function, an accessing device used to access an error correction block from the optical storage medium and store it into the memory to make the portion of data in the same column of the error correction... Agent: Birch Stewart Kolasch & Birch

20080320368 - Error detection and correction circuit and semiconductor memory: Input data (1A) having an integral multiple of 8 bits is divided into symbols in units of b bits (b is an integer of 5 to 7) in a register file 10, an error detecting code is added in an error detection calculation circuit 20, and then encoding (such as... Agent: Miles & Stockbridge PC

20080320366 - Methods of reading nonvolatile memory: In a nonvolatile memory system, first raw data is obtained from stored data using a first set of reading parameters. Subsequently, the first raw data is transferred to an ECC circuit where it is decoded. While the first raw data is being transferred and decoded, second raw data is obtained... Agent: Weaver Austin Villeneuve Sampson LLP

20080320369 - Data retrieval from a storage device using a combined error correction and detection approach: One or more methods and systems of effectively retrieving data stored in a media of a storage device are presented. The one or more methods and systems are implemented by way of correcting and detecting errors using a multi-stage decoding process. In one embodiment, the storage device comprises a magnetic... Agent: Mcandrews Held & Malloy, Ltd

20080320370 - Crc generator polynomial select method, crc coding method and crc coding circuit: Disclosed herein is a CRC generator polynomial select method for selecting a generator polynomial to be used in CRC coding processing and/or CRC processing of inspecting a CRC processing result, the CRC generator polynomial select method may include a first process of finding largest minimum Hamming distances Max.dmin; a second... Agent: Lerner, David, Littenberg, Krumholz & Mentlik

20080320371 - Efficient chien search method in reed-solomon decoding, and machine-readable recording medium including instructions for executing the method: An efficient Chien search method in Reed-Solomon decoding is adapted to be implemented in a processor having a parallel processing instruction set. The method includes the following steps: (a) calculating an error evaluation value; (b) subjecting the error evaluation value to mapping processing so as to find an index adjusting... Agent: Rosenberg, Klein & Lee

20080320372 - Reed solomon decoder: Techniques, systems and computer program products are described for providing a Reed Solomon decoder. The Reed Solomon decoder includes a syndrome polynomial generator to generate syndrome polynomials for subchannel data received from subchannels. In addition, a syndrome polynomial selector selects one of the generated syndrome polynomials according to a preset... Agent: Fish & Richardson, PC

20080320373 - Rate matching device and method for a date communication system: A device and method for rate matching channel-encoded symbols in a data communication system. The rate matching device and method can be applied to a data communication system which uses one or both of a non-systematic code (such as a convolutional code or a linear block code) and a systematic... Agent: The Farrell Law Firm, P.C.

20080320374 - Method and apparatus for decoding a ldpc code: In a decoder having a predetermined decoder structure for decoding a low density parity check (LDPC) code suitable for decoding multi-rated LDPC codes is provided. An associated method is provided. The method comprises the steps of: providing a memory for the decoding with the memory size proportional to the number... Agent: Frank F. Tian

20080320375 - Data transmitting apparatus and data receiving apparatus: To provide a data transmitting apparatus and the like capable of enhancing error detection accuracy without increasing a bandwidth unnecessarily used for the error detection performed on encrypted data and minimizing deterioration in sound quality of the data by effectively reducing noises in the transmission of the data through networks... Agent: Greenblum & Bernstein, P.L.C

20080320376 - Error detection device: A data buffer control unit obtains data from a cache according to a command retained in a command queue retaining a command(s) for reading data from the cache, and a magic ID generation circuit generates a magic ID. The data buffer control unit assigns the data obtained from the cache... Agent: Staas & Halsey LLP

  
12/18/2008 > patent applications in patent subcategories.

20080313488 - Apparatus and method for diagnosing fault and managing data in satellite ground system: Provided are an apparatus and a method for diagnosing fault and processing data of a satellite ground system. The apparatus and a method can prevent data loss of a satellite, and efficiently operate the satellite ground system using data buffer and penalty method when a temporary fault occurs. Data buffer... Agent: Rabin & Berdo, PC

20080313489 - Flash memory-hosted local and remote out-of-service platform manageability: A method, apparatus, and system are disclosed. In one embodiment, the method determines whether one or more manageability conditions are present in a computer system, and then invokes an out-of-service manageability remediation environment stored within a portion of a flash device in the computer system when one or more manageability... Agent: Intel Corporation C/o Intellevate, LLC

20080313490 - System and article of manufacture for executing initialization code to configure connected devices: Provided are a system and article of manufacture for executing initialization code to configure connected devices. A plurality of segments are provided to configure at least one connected device, wherein each segment includes configuration code to configure the at least on connected device. The segments are executed according to a... Agent: Konrad Raynes & Victor, LLP. Attn: Ibm37

20080313491 - Method and system for providing customer controlled notifications in a managed network services system: An approach for supporting automated fault isolation and recovery is provided. A notification configuration option is transmitted to a browser interface utilized by a user associated with a customer network that is monitored by a service provider, wherein the user selects the notification configuration option to input notification information. The... Agent: Verizon Patent Management Group

20080313492 - Adjusting a cooling device and a server in response to a thermal event: In an electronic device enclosure, in response to a thermal event or a power event, an output of a cooling device and an operation of at least one of a plurality of electronic devices are adjusted. The adjustment of the output of the cooling device and operation of the at... Agent: Hewlett Packard Company

20080313494 - Memory refresh system and method: A refresh scheduler is configured to refresh memory cells of a memory device according to a plurality of refresh intervals. The various refresh intervals are determined in response to refresh errors.... Agent: Dicke, Billig & Czaja

20080313493 - Programming error correction code into a solid state memory device with varying bits per cell: Memory devices that, in a particular embodiment, receive and transmit analog data signals representative of bit patterns of two or more bits such as to facilitate increases in data transfer rates relative to devices communicating data signals indicative of individual bits. Programming error correction code (ECC) and metadata into such... Agent: Leffert Jay & Polglaze, P.A. Attn: Kenneth W. Bolvin

20080313495 - Memory agent: In one embodiment a computer system comprises a processor, a memory controller, one or more memory modules coupled to the memory controller via a communication link, and a memory agent coupled to the communication link between the memory controller and the one or more memory modules, wherein the memory agent... Agent: Hewlett Packard Company

20080313497 - Data processing system: A data processing system has a plurality of storage systems. In this system, data replication is performed at high speed and efficiency while maintaining data integrity. In addition, when failure has occurred in a configuration element, the time necessary to resume the data replication is reduced. In accordance with an... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20080313496 - Gracefully degradable versioned storage systems: Multiple versions of data on different sets of machines allow a system to degrade gracefully even when experiencing excessive failures. When excessive failures cause the latest versions to be unavailable, the system becomes degraded, but still offers an old version if available. A most recent coherent set of the available... Agent: Microsoft Corporation

20080313498 - Diagnosing changes in application behavior based on database usage: Applications that utilize a database are managed through the use of meta-metadata. The database contains multiple database objects. Each database object has metadata that describes one or more operational characteristics of that database object. Each metadata has an associated meta-metadata, which describes a variance to the metadata. An application program... Agent: Dillon & Yudell LLP

20080313499 - Debug circuit: The present invention provide a debug circuit which has a structure in which a conversion block latches plural internal signals which are supposed to be effective in finding a cause of a malfunction and are outputted from a selection block, using a signal that is outputted from a timing generation... Agent: Wenderoth, Lind & Ponack L.L.P.

20080313500 - Proctor peer for malicious peer detection in structured peer-to-peer networks: A method for detecting misbehavior of a peer node within a P2P network is proposed. The method comprises the step to choose a peer node from that network to act as a tester peer. Such a tester peer sends then a testing request message, that testing request message having as... Agent: Sughrue Mion, PLLC

20080313501 - Method and system for assessing and analyzing software reliability: A method for assessing and analyzing software reliability comprises the steps of: collecting failure data from a software system during a testing period; providing a reliability model having a testing compression factor, wherein the reliability model is used to fit the failure data; providing an estimation function derived from the... Agent: Wpat, PC Intellectual Property Attorneys

20080313503 - Device and method for testing motherboard: A testing device for testing a motherboard is provided to include a server, a client terminal computer, a debug card and a receiving device. The server is connected to the client terminal computer, for inquiring test results. The debug card is attached to the motherboard, for getting test data. The... Agent: PCe Industry, Inc. Att. Cheng-ju Chiang

20080313502 - Systems, methods and computer products for trace capability per work unit: A set of trace data are generated for full tracing in private memory on a work unit basis. Generating the set of trace data includes source code having trace statements, where trace data based on the work unit includes either an identifier or a layer to establish a start and... Agent: Cantor Colburn LLP-ibm Poughkeepsie

20080313504 - Trace management in client-server applications: There are methods and apparatus, including computer program products, for generating an integrated trace output file on a system having a first computing device and a second computing device. The first computing device generates a first trace output and receives a second trace output from the second computing device. The... Agent: Sap / Finnegan, Henderson LLP

20080313505 - Flash memory wear-leveling: A memory system and corresponding method of wear-leveling are provided, the system including a controller, a random access memory in signal communication with the controller, and another memory in signal communication with the controller, the other memory comprising a plurality of groups, each group comprising a plurality of first erase... Agent: F. Chau & Associates, LLC

20080313506 - Bisectional fault detection system: An apparatus and program product logically divide a group of nodes and causes node pairs comprising a node from each section to communicate. Results from the communications may be analyzed to determine performance characteristics, such as bandwidth and proper connectivity.... Agent: Wood, Herron & Evans, L.L.P. (ibm)

20080313507 - Software reliability analysis using alerts, asserts and user interface controls: Described is a technology by which software instrumentation data collected during software program usage sessions is analyzed to identify potential problems with software program usage, such as based on frequency of problem occurrence during the usage sessions. Reliability metrics may be calculated from the information. Failure data additionally collected during... Agent: Microsoft Corporation

20080313508 - Method and system for adaptive interleaving: A method a system for automatically controlling an adaptive interleaver involves monitoring performance parameters of a transmission system and controlling the adaptive interleaver in response to the performance parameters. The SNR and the data rate of the transmission system are preferably determined. The data rate is analyzed and the adaptive... Agent: Brinks Hofer Gilson & Lione

20080313509 - Method and apparatus for preventing soft error accumulation in register arrays: A computer implemented method, apparatus, and computer usable program code for preventing soft error accumulation. A number of cycles between references to a register are counted. Instructions are injected that reference the register for preventing soft error accumulation in response to a determination that the number of cycles is greater... Agent: Duke W. Yee

20080313511 - System-in-package and method of testing thereof: A method of testing a SIP that has a CPU, a nonvolatile memory and a volatile memory. First, the CPU is used to test the memories. Then the CPU is tested separately. Preferably, the programs for testing the memories are pre-stored in and loaded from the nonvolatile memory into the... Agent: Mark M. Friedman

20080313510 - Systems and devices including memory with built-in self test and methods of making and using the same: Disclosed are methods, systems and devices, such as a device including a data location, a quantizing circuit coupled to the data location, and a test module coupled to the quantizing circuit. In one or more embodiments, the test module can include a linear-feedback shift register.... Agent: Fletcher Yoder (micron Technology, Inc.)

20080313512 - Multiple uses for bist test latches: A method, an apparatus, and a computer program are provided to utilize built-in self test (BIST) latches for multiple purposes. Conventionally, BIST latches are single purpose. Hence, separate latches are utilized for array built-in self test (ABIST) and logic built-in self test (LBIST) operations. By having the separate latches, though,... Agent: Ibm Corporation (cs) C/o Carr LLP

20080313513 - Method and apparatus for synthesis of multimode x-tolerant compressor: Methods and apparatuses for synthesizing a multimode x-tolerant compressor are described.... Agent: Synopsys, Inc. C/o Haynes Beffel & Wolfeld LLP

20080313514 - On-chip ac self-test controller: A system for performing AC self-test on an integrated circuit that includes a system clock for normal operation is provided. The system includes the system clock, self-test circuitry, a first and second test register to capture and launch test data in response to a sequence of data pulses, and a... Agent: Cantor Colburn LLP-ibm Poughkeepsie

20080313515 - System-on-chip (soc) having built-in-self-test circuits and a self-test method of the soc: A system-on-chip (SOC) having built-in-self-test (BIST) circuits and a self-test method of the SOC are provided. The SOC having the BIST circuits includes intellectual property (IP) blocks having BIST logic circuits and a BIST control unit. The BIST logic circuit operates in a normal or a test mode in response... Agent: F. Chau & Associates, LLC

20080313516 - Signal generator and user interface for setting test sequences and parameters of a test signal: A signal generator generates a WiMedia ultra wideband test signal with a user interface for setting test sequences and parameters of the test signal. Parameters are set for Presentation Protocol Data Units associated with Packet Groups of the test signal. A signal processing unit compiles the Groups containing the Presentation... Agent: William K. Bucher Tektronix, Inc.

20080313517 - Debug circuit: The present invention provide a debug circuit which has a structure in which a conversion block latches plural internal signals which are supposed to be effective in finding a cause of a malfunction and are outputted from a selection block, using a signal that is outputted from a timing generation... Agent: Wenderoth, Lind & Ponack L.L.P.

20080313518 - Communication device, communication system, communication method, communication program, and communication circuit: In a transmitter (2001), when generating a transmission frame having no limitation to a window size, a batch-transmission-end flag generating circuit (2004) and a sequence number generating circuit (2005) respectively adds a batch-transmission-end flag and a sequence number to the transmission frame. In a receiver, if an omission of a... Agent: Birch Stewart Kolasch & Birch

20080313520 - Data-transmission device data-reception device and data-transmission-and-reception system: A data-transmission device dividing video data into packets and transmitting the packet to a data-reception device requesting the video data includes a unit generating transmission packets based on the video data, a unit setting importance for each of the generated packets, a unit storing information about the set importance in... Agent: Canon U.s.a. Inc. Intellectual Property Division

20080313519 - Method and apparatus for improving hybrid automatic repeat request operation in a wireless communications system: In order to avoid unknown behavior of a user equipment, the present invention provides a method of improving Hybrid Automatic Repeat Request, known as HARQ, operation for a network in a wireless communications system. The method includes adding a HARQ information information element, abbreviated to IE, and a Multi-Input Multi-Output,... Agent: North America Intellectual Property Corporation

20080313521 - Method for dynamic interpretation of transport block size: A system and method is provided which allows for the dynamic interpretation of a transport block size field in a Layer 1/Layer 2 (L1/L2) control channel, such that for any first H-ARQ transmission, the transport block size indication field will indicate the size of the transport block. For any retransmission,... Agent: Foley & Lardner LLP

20080313522 - Digital broadcasting system and data processing method: A digital broadcasting system for transmitting/receiving a digital broadcasting signal and a data processing method are disclosed. First program table information and second program table information, which has an identifier different from an identifier of the first program information, are multiplexed and transmitted. The first program table information describes main... Agent: Lee, Hong, Degerman, Kang & Waimey

20080313523 - Encoding low density parity check (ldpc) codes through an ldpc decoder: An approach is providing for supporting broadcast transmission of low density parity check (LDPC) coded signals. A receiver includes a decoder configured to decode an LDPC signal to output a decoded signal. The decoder is further configured to operate as an encoder; as such, interference cancellation can be implemented by... Agent: The Directv Group, Inc. Patent Docket Administration

20080313524 - Recording format for information date, information recording/reproducing cording circuit: The object of the invention is to provide an efficient encoding method for error correction coding for recording/reproducing information in high-density magnetic recording/reproduction apparatus. Based upon the principle of Turbo coding for powerful random error correction, this invention provides a practical encoding method for preventing the propagation of code errors... Agent: Antonelli, Terry, Stout & Kraus, LLP

20080313525 - Error detection for multi-bit memory: Systems, methods, and devices are disclosed, including a device that includes a plurality of data locations, a quantizing circuit coupled to the plurality of data locations, and an error detection module coupled to the quantizing circuit. In some embodiments, the error detection module includes an encoder configured to encode incoming... Agent: Fletcher Yoder (micron Technology, Inc.)

20080313526 - Apparatus and method for transmitting and receiving data in a mobile communication system: An apparatus and method for transmitting and receiving symbols in a mobile communication system, in which a multiplexer and burst mapper divides each of first and second group data blocks into a plurality of sub-blocks, the symbols including the first group data block and the second group data block, the... Agent: The Farrell Law Firm, P.C.

  
12/11/2008 > patent applications in patent subcategories.

20080307249 - Digital mixing system with double arrangement for fail safe: A digital mixing system has a console having a display and an operator for transmitting and receiving a control signal, an engine having input channels and output channels for mixing a plurality of audio signals fed from the input channels while exchanging the control signal with the console and feeding... Agent: Morrison & Foerster, LLP

20080307250 - Managing network errors communicated in a message transaction with error information using a troubleshooting agent: A method, system, and program for managing network errors communicated in a message transaction with error information using a troubleshooting agent. A network facilitates message transactions between a requester and a responder for facilitating web services. When a non-application specific error occurs in relation to a particular message transaction, such... Agent: Ibm Corp (ap) C/o Amy Pattillo

20080307251 - Fuse farm redundancy method and system: A system and method for making efficient use of fuse ROM redundancy to increase yield and security. Some embodiments provide a memory repair system including a non-volatile memory component and a controller coupled to the non-volatile memory component. The non-volatile memory component includes a plurality of memory locations. The plurality... Agent: Texas Instruments Incorporated

20080307252 - Method and apparatus for implementing redundant memory access using multiple controllers on the same bank of memory: A method and apparatus implement redundant memory access using multiple controllers on the same bank of memory. A first memory controller uses the memory as its primary address space, for storage and fetches. A second redundant controller is also connected to the same memory. System control logic is used to... Agent: Ibm Corporation RochesterIPLaw Dept 917

20080307253 - Method and apparatus for implementing redundant memory access using multiple controllers on the same bank of memory: A method and apparatus implement redundant memory access using multiple controllers on the same bank of memory, and a design structure on which the subject circuit resides is provided. A first memory controller uses the memory as its primary address space, for storage and fetches. A second redundant controller is... Agent: Ibm Corporation RochesterIPLaw Dept 917

20080307254 - Information-processing equipment and system therefor: In cases where the system which performs service provision includes plural kinds of OS, the plural kinds of OS are operated simultaneously on one standby server provided with the virtual control unit. When a failure etc. occurred in the operation system server necessitates the system switchover from the operation system... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20080307255 - Failure recovery and error correction techniques for data loading in information warehouses: A method of data loading for large information warehouses includes performing checkpointing concurrently with data loading into an information warehouse, the checkpointing ensuring consistency among multiple tables; and recovering from a failure in the data loading using the checkpointing. A method is also disclosed for performing versioning concurrently with data... Agent: Shimokaji & Associates, P.C.

20080307256 - Method for fault handling in a co-operative workflow environment: Embodiments herein provide a fault-handling scheme based on forward recovery for cooperative workflow environments. The fault handling scheme relies on the correct placement of transaction scopes and their associated fault and compensation handlers for maintaining correct application semantics, a fault propagation scheme for forwarding faults to a workflow component that... Agent: Frederick W. Gibb, Iii Gibb & Rahman, LLC

20080307257 - System and method for storing and restoring a data file using several storage media: A system and method for storing and restoring a data file using several storage media. The method begins with the step of generating several identical copies of the data file. The identical copies are stored on different storage media. The identical copies are subdivided into data portions according to a... Agent: Dillon & Yudell, LLP

20080307258 - Distributed job manager recovery: A method is provided for the recovery of an instance of a job manager running on one of a plurality of nodes used to execute the processing elements associated with jobs that are executed within a cooperative data stream processing system. The states of the processing elements are checkpointed to... Agent: George A. Willinghan, Iii August Law Group, LLC

20080307259 - System and method of recovering from failures in a virtual machine: A method and systems for recovering from a failure in a virtual machine are provided. In accordance with one embodiment of the present disclosure, a method for recovering from failures in a virtual machine is provided. The method may include, in a first physical host having a host operating system... Agent: Baker Botts, LLP

20080307260 - Semiconductor ic incorporating a co-debugging function and test system: A semiconductor IC capable of debugging two or more processors at the same time by means of a single debugger and a semiconductor IC test system. The semiconductor IC includes processors operating at different frequencies, a trigger circuit which causes all of the processors to be in a debugging state... Agent: Volentine & Whitt PLLC

20080307261 - Activating a design test mode in a graphics card having multiple execution units: Provided are a method and system for activating a design test mode in a graphics card having multiple execution units. A design test mode is activated in a graphics module comprising multiple execution units coupled to a cache on a bus. The bus is configured to return test instructions from... Agent: Konrad Raynes & Victor, LLP. Attn: Int77

20080307262 - System for validating data for processing and incorporation in a report: A system automates the process of isolating incorrect, corrupt, or sensitive data and skipping duplicate records caused by violations of application business rules during report generation, for example. A data processor provides data for processing for incorporation in a report by, processing received report data to identify data objects in... Agent: Siemens Corporation Intellectual Property Department

20080307263 - Systems and media for generating a regression suite database: Systems and media for generating an improved regression suite by applying harvesting models and/or regression algorithms to tests utilized in verification of a system are disclosed. In one embodiment, a regression manager responsive to user input may be coupled to a harvester module, an analysis module, and a management module.... Agent: Ibm Coporation (rtp) C/o Schubert Osterrieder & Nickelson PLLC

20080307265 - Method for managing a software process, method and system for redistribution or for continuity of operation in a multi-computer architecture: s

20080307264 - Parameterized test driven development: In one embodiment a computer system automatically generates unit tests. The computer system accesses a parameterized unit test that provides a base outline from which one or more unit tests are automatically generated, generates input parameter values for a unit of software code, automatically generates a unit test configured to... Agent: Workman Nydegger/microsoft

20080307267 - Techniques for automatic software error diagnostics: Techniques are provided for automatically diagnosing errors in a software system. The software system automatically determines whether conditions associated with the software system warrant use of any diagnostic features that are not currently enabled. When the software system determines that the conditions associated with the software system warrant use of... Agent: Hickman Palermo Truong & Becker/oracle

20080307266 - Techniques for automatically tracking software errors: Techniques are provided for automatically tracking errors encountered by a software system. An occurrence of an error that affects performance of an operation being performed by a database server is detected. In response to detecting the occurrence, error information about the error is automatically recorded in a storage space within... Agent: Hickman Palermo Truong & Becker/oracle

20080307268 - Self-healing cache operations: A method, apparatus and program storage device for performing a self-healing cache process is described. At least one error affecting a cache is detected. The cache may have a matching address tag for a fetching operation. Based on the type of error, a self-healing cache process is performed based.... Agent: Konrad Raynes & Victor, LLP. Attn: Ibm37

20080307271 - Computer system or performance management method of computer system: This invention provides a system including a computer and a storage-subsystem comprising at least either a first storage area for storing data sent from the computer or a second storage area to be associated with the first storage area, for storing replicated data of data stored in the first storage... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20080307270 - Emerging bad block detection: Apparatus and methods, such as those that read data from non-volatile integrated circuit memory devices, such as NAND flash. For example, disclosed techniques can be embodied in a device driver of an operating system. Errors are tracked during read operations. If sufficient errors are observed during read operations, the block... Agent: Knobbe Martens Olson & Bear LLP

20080307269 - Resolution of computer operations problems using fault trend analysis: A set of fault records representing faults previously detected in an enterprise computer system is received and analyzed. The analysis comprises a variety of analytical operations and results in a report provided to a user, the report particularly including a set of fault sources identified as highly important to address,... Agent: Fenwick & West LLP

20080307272 - Backbone transmission apparatus and method having apparatus internal alarm suppression function: Disclosed is a backbone transmission apparatus including a plurality of main signal packages and a monitoring control package connected to the plurality of main signal packages each via an apparatus internal bus. When a failure occurs in one of the main signal packages, the main signal package generates mask request... Agent: Nec Corporation Of America

20080307273 - System and method for predictive failure detection: A method of predicting failure of an information handling device, such as a server, by monitoring an error rate, i.e., n errors per error period. Errors are reported only if the error rate is exceeded. An error count is kept, and errors are leaked from the count if the time... Agent: Baker Botts, LLP

20080307274 - Memory apparatus and method and reduced pin count apparatus and method: A memory apparatus is disclosed, comprising a memory device under test, a reduced-pin-count device and a built-in self test device. The reduced-pin-count device is used to find a faulty cell address in the memory device under test during a pre-fuse stage. The built-in self test device is used to detect... Agent: Joe Mckinney Muncy

20080307275 - Checking output from multiple execution units: Provided are a method and system checking output from multiple execution units. Execution units concurrently execute test instructions to generate test output, wherein test instructions are transferred to the execution units from a cache coupled to the execution units over a bus. The test output from the execution units is... Agent: Konrad Raynes & Victor, LLP. Attn: Int77

20080307276 - Memory controller with loopback test interface: In one embodiment, an apparatus comprises an interconnect; at least one processor coupled to the interconnect; and at least one memory controller coupled to the interconnect. The memory controller is programmable by the processor into a loopback test mode of operation and, in the loopback test mode, the memory controller... Agent: Mhkkg, PC/apple, Inc.

20080307278 - Apparatus for efficiently loading scan and non-scan memory elements: The present invention provides a method and apparatus for efficiently loading values into scan and non-scan memory elements. First, the network used to distribute control signals to the memory elements is cleared. Second, the desired values are loaded into the scan memory elements. Third, the values from the scan memory... Agent: Ibm Corporation (cs) C/o Carr LLP

20080307277 - Delay fault detection using latch with error sampling: Some embodiments provide sampling of a data signal output from a path stage using a latch, sampling of the data signal output from the path stage using an edge-triggered flip-flop, comparing a first value output by the latch with a second value output by the edge-triggered flip-flop, and generating an... Agent: Buckley, Maschoff & Talwalkar LLC

20080307280 - Scan cells with minimized shoot-through and scan chains and integrated circuits using the same: A scan including data and shift inputs, and input selection circuitry for selecting between the data and shift inputs during normal, capture, and shift modes in response to only a first control signal and a second control signal. The input selection circuitry includes a first storage element for storing a... Agent: Thompson & Knight, L.L.P. Patent Property Department

20080307279 - Serial scan chain in a star configuration: A method implemented to test a plurality of components coupled in a star configuration, each component having a test access port (TAP) controller. The method comprises performing a capture phase of a scan operation on all of the TAP controllers in the star configuration and sequentially selecting one of the... Agent: Texas Instruments Incorporated

20080307281 - Trading propensity-based clustering of circuit elements in a circuit design: An apparatus and program product utilize a clustering algorithm based upon trading propensity to generate assignments of circuit elements to clusters or groups to optimize a spatial distribution of the plurality of clusters. For example, trading propensity-based clustering may be used to assign circuit elements such as scan-enabled latches to... Agent: Wood, Herron & Evans, L.L.P. (ibm)

20080307282 - System and method for electronic device development: A test card system for use in product development includes a device under test (DUT). The DUT comprises: a mount plane; a power input port coupled to the mount plane; a JTAG input port coupled to the mount plane; a clock signal distribution network coupled to the JTAG input port;... Agent: Ibm Corporation (pec) C/o Patrick E. Caldwell, Esq.

20080307283 - Complex pattern generator for analysis of high speed serial streams: The present invention provides systems, devices and methods for generating user-defined test patterns within serial controller to facilitate signal testing and verification. These user-defined test patterns may be generated to more accurately reflect the actual traffic of a device-under-test or system, as well as allow a test engineer to more... Agent: Lsi Corporation

20080307284 - Method and apparatus for indicating a temporary block flow to which a piggybacked ack/nack field is addressed: A method and apparatus for indicating a temporary block flow (TBF) to which a piggybacked acknowledgement/non-acknowledgement (PAN) field is addressed are disclosed. A sequence may be generated from a temporary flow identity (TFI) to which the PAN field is addressed and masked with a PAN check sequence (PCS). A radio... Agent: Volpe And Koenig, P.C. Dept. Icc

20080307285 - Memory devices and systems including error-correction coding and methods for error-correction coding: In one aspect, a memory device includes a memory cell array, parallel internal data paths which transmit internal data to and from the memory cell array, a data driver which transmits and receives external data, and a data buffer which delays and transfers the external data received by the data... Agent: Volentine & Whitt PLLC

20080307286 - Combined single error correction/device kill detection code: In one embodiment, an apparatus comprises a check/correct circuit coupled to a control circuit. The check/correct circuit is coupled to receive a block of data and corresponding check bits. The block of data is received as N transmissions, each transmission comprising M data bits and L check bits. The check/correct... Agent: Mhkkg, PC/apple, Inc.

20080307288 - Data coding apparatus and methods: Data encoding apparatus and methods are disclosed. A Cyclic Redundancy Check (CRC) coding module is selected, from a plurality of different CRC coding modules, for coding a block of information. A generic coder, which is configurable to perform CRC coding based on any of the plurality of different CRC coding... Agent: Ralph A. Dowell Of Dowell & Dowell P.C.

20080307287 - Systems and methods for recovery from hardware access errors: Systems, methods and media for recovering from a data scan error are disclosed. In one embodiment, a service processor determines the nature of the data scan error and, depending on the nature of the error, performs one of a plurality of data scan error recovery procedures.... Agent: Ibm Corporation (jss) C/o Schubert Osterrieder & Nickelson PLLC

20080307289 - Method for efficiently calculating syndromes in reed-solomon decoding, and machine-readable storage medium storing instructions for executing the method: A method for efficiently calculating syndromes in Reed-Solomon decoding is adapted to be implemented in a processor having a parallel processing instruction set. The method includes: (a) initializing a syndrome vector; (b) obtaining a symbol from a Reed-Solomon block code; (c) finding a lookup index based on the symbol; (d)... Agent: Rosenberg, Klein & Lee

20080307290 - Method for error correction of packet data: In a method for error correction of packet data, in particular DAB data packets, code words being used over multiple data packets, redundancy information for error correction is added while maintaining the original packet data structure, at the cost of a free data field or a useful data field. The... Agent: Kenyon & Kenyon LLP

20080307291 - Processing wireless and broadband signals using resource sharing: Methods and structures are described for processing signals formatted according to a plurality of different wireless and broadband standards. In some embodiments, network resources are shared to enable energy efficient, pseudo-simultaneous processing. In some embodiments, a timestamp is prepended to input data to remove jitter associated with time division multiplexed... Agent: Schwegman, Lundberg & Woessner, P.A.

20080307292 - Method and apparatus for digit-serial communications for iterative digital processing algorithms: An architecture and a method are provided for decoding codewords for codes such as low density parity check (LDPC) codes. An iterative decoding algorithm such as the Belief Propagation Algorithm (BPA) is employed that attempts to correct errors in an input block of symbols via a structure containing two sets... Agent: Gordon & Jacobson, P.C.

20080307293 - Computational efficient convolutional coding with rate matching: An error coding circuit comprises a non-systematic convolutional encoder for coding an input bit stream to produce two or more groups of parity bits, an interleaver circuit for interleaving parity bits within each group of parity bits, and a rate-matching circuit for outputting a selected number of the interleaved parity... Agent: Ericsson Inc.

20080307294 - Efficient implementation to perform iterative decoding with large iteration counts: Systems and methods are presented to improve the performance of a constant bit rate iterative decoder by providing elastic buffering, while utilizing a relatively simple decoder architecture capable of maintaining a fixed number of iterations of a lower value. An LDPC decoder can be designed, for example, to support less... Agent: Kramer Levin Naftalis & Frankel LLP Intellectual Property Department

20080307295 - Signal processing method in mimo system and apparatus thereof: Disclosed is a signal processing method and apparatus in MIMO system. In a mobile communication system having a plurality of transmitting antennas, the present invention includes the steps of receiving a feedback signal including status information of at least one channel, segmenting one of the first data blocks to segment... Agent: Lee, Hong, Degerman, Kang & Waimey

  
12/04/2008 > patent applications in patent subcategories.

20080301486 - Customization conflict detection and resolution: A computer-implemented method is disclosed for managing customization conflicts. The method includes receiving an indication of a conflict. The conflict is indicative of an error created by a customization of a core application. A customization correction is identified as a remedy for the customization conflict. The customization correction is transmitted... Agent: Westman Champlin (microsoft Corporation)

20080301487 - Virtual computer system and control method thereof: When a failure occurs in an LPAR on a physical computer under an SAN environment, a destination LPAR is set in another physical computer to enable migrating of the LPAR and setting change of a security function on the RAID apparatus side is not necessary. When a failure occurs in... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20080301488 - Intelligent configuration for restarting failed application server instances: An improved solution for intelligent configuration for restarting failed application server instances is provided. In an embodiment of the invention, a method for restarting a failed application server instance includes: receiving a notice of a failure of an application server instance; obtaining a cause of the failure; automatically applying at... Agent: Hoffman Warnick LLC

20080301489 - Multi-agent hot-standby system and failover method for the same: The present invention discloses a multi-agent hot-standby system and a failover method for the same, which utilize a plurality of cascaded standby servers to monitor and detect a plurality of application servers, wherein a standby server is parallel connected with all the application servers, and the cascaded standby servers monitor... Agent: Sinorica, LLC

20080301490 - Quorum-based power-down of unresponsive servers in a computer cluster: A quorum-based server power-down mechanism allows a manager in a computer cluster to power-down unresponsive servers in a manner that assures that an unresponsive server does not become responsive again. In order for a manager in a cluster to power down servers in the cluster, the cluster must have quorum,... Agent: Martin & Associates, LLC

20080301491 - Quorum-based power-down of unresponsive servers in a computer cluster: A quorum-based server power-down mechanism allows a manager in a computer cluster to power-down unresponsive servers in a manner that assures that an unresponsive server does not become responsive again. In order for a manager in a cluster to power down servers in the cluster, the cluster must have quorum,... Agent: Martin & Associates, LLC

20080301494 - Remote copy synchronization in disaster recovery computer systems: A method, storage system, and machine-readable medium for resynchronizing data stored among a first storage element and a second storage element of a remote copy pair of storage elements is disclosed. According to one embodiment, a method is provided which includes detecting a reestablishment of a remote copy relationship between... Agent: Dillon & Yudell, LLP

20080301492 - Storage system and method for copying data to plurality of sites: A storage system of the present invention carries out remote copying among a plurality of sites, detects a new copy path when a failure occurs, and resumes remote copying. The storage system comprises a plurality of sites. Each site comprises a host and a storage controller. The controller of each... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20080301493 - Storage system and storage system management method: A management server in a storage system manages a table that stores, as a change history, at least configuration change and a change time for plural volumes; acquires specification of a recovery-target volume and of a recovery time, and acquires, from the table, information on the specified volume and the... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20080301495 - Reassigning storage volumes from a failed processing system to a surviving processing system: Provided are a method, system, and program for reassigning storage volumes from a failed processing system to a surviving processing system. A first processing system detects a failure of a second processing system. The first processing system determines device groups of storage devices managed by the failed second processing system... Agent: Konrad Raynes & Victor, LLP. Attn: Ibm37

20080301496 - Data processor, data processing program, and data processing system: A related data storing unit stores a plurality of sets of related data related to a plurality of controlling units. An operation storing unit stores operation detail of each of the plurality of controlling units as an operation log. A identification data recording unit records a plurality of sets of... Agent: Mcdermott Will & Emery LLP

20080301497 - Testing apparatus, system, and method for testing at least one device with a connection interface: A system, a testing apparatus, and a method for testing at least one device with a connection interface are provided. The system comprises a host, a testing apparatus, and a power supply. The testing apparatus further comprises a microprocessor and at least one current limit module. The host sending a... Agent: Grossman, Tucker, Perreault & Pfleger, PLLC

20080301498 - Control device and control method: A control device and a control method for increasing stability of micro controller system are described. The control device comprises a system error detection unit a memory unit, a data error detection unit, an error signal processing unit and a system resetting unit. When the system is error or the... Agent: Kile Goekjian Reed & Mcmanus

20080301499 - Method and system for determining a corrective action: A computer-implemented method is provided for determining a corrective action. The method may include obtaining diagnostic data and calculating, using the diagnostic data, a prognostic. The method may also include retrieving, when the prognostic is above an alarm level, historical records and calculating a Bayesian posterior probability using the diagnostic... Agent: Caterpillar/finnegan, Henderson, L.L.P.

20080301500 - System and method for identifying and manipulating logic analyzer data from multiple clock domains: A system and method for identifying and manipulating logic analyzer data from multiple clock domains is presented. A logic analyzer receives debug data and determines whether the debug data is a full frequency data type, a half frequency data type, or a crossed data type. Once determined, the logic analyzer... Agent: Ibm Corporation- Austin (jvl) C/o Van Leeuwen & Van Leeuwen

20080301501 - Analyzing problem signatures: A method of analyzing problem data from a computer application is disclosed. The method evaluates a memory dump, identifying call stacks within the memory dump that are related to application failures, creates a hash of the identified call stack and adds the hash to a database. The database may then... Agent: Marshall, Gerstein & Borun LLP (microsoft)

20080301502 - System crash analysis using path tracing technologies: Technologies, systems and methods for code path analysis of an executable including: generating call graphs and control flow graphs of selected functions in the executable, and instrumenting the selected functions to provide for logging of path trace information for the selected functions upon execution of the instrumented executable, the path... Agent: Microsoft Corporation

20080301503 - High frequency divider state correction circuit: The present invention provides for a self-correcting state circuit. A first flip flop is configured to receive a clock input and a first data input, and to generate a first output in response to the clock input and the first data input. A second flip flop is coupled to the... Agent: Ibm Corporation (cs) C/o Carr LLP

20080301504 - Method and apparatus to anticipate memory exhaustion in an open services gateway initiative environment: A computer implemented method, computer program product, and data processing system for predicting a future status of a memory leak. A first set of data including memory consumption data is received at a software bundle. The software bundle is operating in an open services gateway initiative environment. Responsive to a... Agent: Ibm Corp (ya) C/o Yee & Associates PC

20080301505 - Computer performance monitoring method and system: A monitoring method and system. The method includes receiving by a software application within a computing system, data comprising a first data point associated with an operating parameter for a characteristic associated with the computing system. The software application converts the data point into a mathematical value and associates the... Agent: Schmeiser, Olsen & Watts

20080301506 - system diagnostics with dynamic contextual information of events: A network device and a method for monitoring operational messages is described. The method comprises monitoring an occurrence of an operational message of the network device, and storing dynamic context information at the time that the operational message occurred. The stored dynamic context information is then associated with the operational... Agent: Schwegman, Lundberg & Woessner, P.A.

20080301507 - System and method for repairing a memory: A method and system for repairing a memory. A test and repair wrapper is operable to be integrated with input/output (I/O) circuitry of a memory instance to form a wrapper I/O (WIO) block that is operable to receive test and repair information from a built-in self-test and repair (BISTR) processor.... Agent: Shreen K. Danamraj Danamraj & Emanuelson, P.C.

20080301508 - Semiconductor memory defect analysis method and defect analysis system: A defect analysis method for semiconductor memory includes: reading out an address bit map corresponding to an input kind of the memory macro from a database which stores address bit maps respectively corresponding to memory macro kinds; inputting size information of the memory macro; translating a logical address of a... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20080301509 - Method and apparatus for testing integrated circuits by employing test vector patterns that satisfy passband requirements imposed by communication channels: Embodiments of an apparatus and method for high-speed testing of a device under test are described herein, where the device under test is coupled to a tester via a limited passband communication channel. A plurality of test vector patterns is generated having characteristics such that when a given test vector... Agent: Bereskin And Parr

20080301510 - Dynamically reconfigurable shared scan-in test architecture: A low overhead dynamically reconfigurable shared scan-in test architecture is provided. This test architecture advantageously allows for changing scan inputs during the scan operation on a per shift basis. The flexibility of reconfiguring the scan input to scan chain mapping every shift cycle can advantageously reduce both test data volume... Agent: Bever, Hoffman & Harms, LLP

20080301511 - Integrated circuit with continuous testing of repetitive functional blocks: A method of continuous testing of repetitive functional blocks provided on an integrated circuit (IC) which includes selecting one of the repetitive functional blocks at a time for testing, substituting a test repetitive functional block for a selected repetitive functional block, and testing the selected repetitive functional block during normal... Agent: The Law Offices Of Gary R. Stanford

20080301512 - Semiconductor test system: A semiconductor test system includes: pin electronics (“PE”) cards each being operable to: a) apply a test pattern to device under tests (“DUTs”) each connected to the PE cards; b) capture patterns outputted in response to the test pattern from the DUTs; c) compare the patterns with an expected value... Agent: Sughrue-265550

20080301515 - Method and a transmitter/receiver for reduced signaling in a retransmission system using hybrid automatic repeat: The present invention relates to a transmitter and a receiver for a mobile communication system. The basic idea of the present invention is to target the number of HARQ transmissions that is required to be able to decode the transmitted data successfully and to only transmit HARQ feedback information if... Agent: Harrity & Harrity, LLP

20080301516 - Method and device for retransmitting data: A method and device for retransmitting data is provided. A receiving end receives a data unit, and checks whether a Negative Acknowledgement NACK->Acknowledgement, ACK, error occurs. If the NACK->ACK error occurs, the receiving end transmits an Automatic Repeat Request ARQ request message to a transmitting end, for requesting the transmitting... Agent: Leydig, Voit & Mayer, Ltd (for Huawei Technologies Co., Ltd)

20080301513 - Methods and apparatus to reduce errors during a re-transmission: Methods and apparatus to reduce errors during a re-transmission performed by a communication module are disclosed. An example method includes detecting an error in received data, predicting a time interval that is expected to be substantially error-free, and transmitting a re-transmission request message for the data based on the time... Agent: Hanley, Flight & Zimmerman, LLC

20080301514 - Realization method for harq in multiple frequency points cell: The present invention relates to a method for realizing HARQ in multi-carrier cell, comprising: when distributing high-speed shared resource for UE, Node B distributes the high-speed downlink packet service to N frequencies, and reports the information of the established physical channel, including the frequency information, to RNC and said UE;... Agent: Kolisch Hartwell, P.C.

20080301518 - Ldpc check matrix generation method, check matrix generator, and code retransmission method: A check matrix generation method for generating a check matrix H1 of a code H1 from a check matrix H0 of a code C0, where codes C0 and C1 are LDPC systematic codes having different encoding ratios in a rate-compatible relationship and information bit sizes of the systematic codes C0... Agent: Myers Wolin, LLC

20080301517 - Systems and methods for ldpc decoding with post processing: Various embodiments of the present invention provide systems and methods for decoding encoded information. For example, a method for post processing error correction in a decoder system is disclosed. The method includes receiving and iteratively decoding a soft input to generate a hard output associated with the soft input. The... Agent: Hamilton,desanctis & Cha

20080301520 - Method and apparatus for recording information on recording medium: A fixed-length block is repetitively generated. The fixed-length block includes a sync information piece, “n-m” information pieces following the sync information piece, an ID information piece following the “n-m” information pieces, and “m” information pieces following the ID information piece, where “n” denotes a natural number equal to or greater... Agent: Louis Woo Law Office Of Louis Woo

20080301519 - Semiconductor memory, semiconductor memory system, and error correction method for semiconductor memory: Aspects of the embodiment include providing a semiconductor memory comprising; a plurality of memory blocks that includes a plurality of regular memory cells; a plurality of first parity blocks that are disposed in accordance with the plurality of memory blocks, wherein the plurality of first parity blocks include a first... Agent: Arent Fox LLP

20080301521 - Low density parity check decoder for irregular ldpc codes: A method and system for decoding low density parity check (“LDPC”) codes. An LDPC decoder includes a control unit that controls decoder processing, the control unit causing the decoder to process the blocks of a low density parity check (“LDPC”) matrix out of order. A decoder embodiment may process the... Agent: Conley Rose, P.C. David A. Rose

20080301522 - Structured de-interleaving scheme for product code decoders: A structured interleaving/de-interleaving scheme enables efficient implementation of encoding/decoding based on two-dimensional product codes (2D PC). An encoder has an integrated architecture that performs structured interleaving and PC coding in an integrated manner in which locations in the interleaved data stream are related to row and column indices for the... Agent: Mendelsohn & Associates, P.C.

20080301523 - Method of improving the interative decoding of codes: Disclosed is a method of improving iterative decoding of short codes within a demodulator. The vector of metrics of the bits considered at the output of the demodulator is decoded. The value of the check code of the CRC of the decoded word is compared with a predetermined value. If... Agent: Lowe Hauptman & Berner, LLP

20080301524 - Decoder device and method for decoding data stored in storage medium: A decoder device includes: a decoder that decodes data stored in a storage medium by performing error correction on the data, the error correction being capable of correcting code error and code erasure included in the data; a memory that stores a history of an address in the storage medium... Agent: Amin, Turocy & Calvin, LLP

20080301525 - Data refresh apparatus and data refresh method: According to one embodiment, a data refresh apparatus which refreshes data stored in a storage device having storage areas, comprises an error detector configured to detect a number of errors of data stored in a storage area of the storage device, an error correction unit configured to execute an error... Agent: Pillsbury Winthrop Shaw Pittman, LLP

20080301526 - Memory device with error correction capability and preemptive partial word write operation: A memory device comprises a memory array and error correction circuitry coupled to the memory array. The memory device is configured to perform a partial word write operation in which an error correction code encode process for the given retrieved word is initiated prior to completion of an error correction... Agent: Ryan, Mason & Lewis, LLP

20080301528 - Method and apparatus for controlling memory: A memory control apparatus includes a reading unit, an inserting unit, an identifying unit, a determining unit, and an outputting unit. The reading unit reads data from the memory. The inserting unit inserts a dummy error at an insertion position in the data thereby obtaining error data. The identifying unit... Agent: Staas & Halsey LLP

20080301527 - Systems and methods for joint ldpc encoding and decoding: Various embodiments of the present invention provide systems and methods for LDPC encoding and decoding. For example, a system for performing LDPC encoding and decoding is disclosed that includes a joint LDPC encoder/decoder. The joint LDPC encoder/decoder includes both an LDPC decoder and an LDPC encoder that each utilize a... Agent: Hamilton,desanctis & Cha

20080301529 - Apparatus and method for distinguishing single bit errors in memory modules: An apparatus, system, and method are disclosed for distinguishing correctable bit errors in memory. A bit error detection module detects a correctable bit error in memory. The correctable bit error is correctable using error-correcting code (“ECC”). A comparison module compares an error location indicator with a stored error location indicator.... Agent: Kunzler & Mckenzie

20080301530 - Apparatus and method for distinguishing temporary and permanent errors in memory modules: An apparatus and method are disclosed for distinguishing correctable bit errors in memory. A bit error detection module detects a correctable bit error in a memory in response to a READ operation. The correctable bit error is correctable using error-correcting code. The READ operation is generated during normal operation. A... Agent: Kunzler & Mckenzie

20080301531 - Fault tolerant encoding of directory states for stuck bits: A method of handling a stuck bit in a directory of a cache memory, by defining multiple binary encodings to indicate a defective cache state, detecting an error in a tag stored in a member of the directory (wherein the tag at least includes an address field, a state field... Agent: Ibm Corporation (jvm)

20080301532 - Non-volatile semiconductor memory device: A non-volatile semiconductor memory device comprises a memory cell array including a plurality of memory cells arrayed capable of storing information of N bits (N≧2) in accordance with variations in threshold voltage. A parity data adder circuit adds parity data for error correction to every certain data bits to be... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080301533 - Dynamic synchronization of data capture on an optical or other high speed communications link: A method and system that dynamically adjusts link control parameters of a communications network. The communications network includes a transmitter coupled through a first data link to a receiver. The transmitter and receiver each have at least one associated link control parameter that affects the operation of that component. According... Agent: Dorsey & Whitney LLP Intellectual Property Department

20080301534 - Error control method and cooperative transfer system: An error control method and a cooperative transfer system are provided. The method comprises: each node acting as a transfer node in a cooperative node group codes an acquired distributed information code block to obtain a corresponding distributed check code block and transmits the corresponding distributed check code block to... Agent: Leydig, Voit & Mayer, Ltd (for Huawei Technologies Co., Ltd)

20080301535 - Forward error correction mapping and de-mapping techniques: Briefly, techniques to provide varying levels of enhanced forward error correction without modifying a line rate of a frame.... Agent: Caven & Aghevli C/o Intellevate, LLC

20080301536 - Channel coding and rate matching for lte control channels: A method and apparatus for channel coding and rate matching of the Physical Uplink Control Channel (PUCCH) and the Physical Downlink Control Channel (PDCCH) is disclosed that uses convolutional encoding to code the control channels. Rate matching is performed using a circular buffer based rate matching algorithm. A rate matching... Agent: Volpe And Koenig, P.C. Dept. Icc

20080301537 - Packet transmission device and packet transmission method: Aiming to shorten the transmission operation, the present invention provides an apparatus including a memory, a checksum calculation circuit, and a transmission device. The memory stores data of a packet to be transmitted. The checksum calculation section reads data sets corresponding to all the packet fragments except for that having... Agent: Mcginn Intellectual Property Law Group, PLLC

20080301538 - Method and apparatus for detecting video data errors: The present invention provides a method and apparatus for detecting video data errors, said video data including a plurality of successive frame image data, said method comprising the steps of acquiring the processing sequence information of two frame image data in said video data, said two frame image data being... Agent: Philips Intellectual Property & Standards

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