Error detection/correction and fault detection/recovery inventions 11/08

20080294931 - Assisted problem remediation: A method (which can be computer implemented) for assisted remediation of at least one problem with a computer system includes the steps of obtaining data from the computer system, the data being indicative of the at least one problem; hypothesizing at least a first candidate remediation process for the problem... Agent: Ryan, Mason & Lewis, LLP

20080294932 - Increasing software fault tolerance by employing surprise-removal paths: The subject invention relates to systems and methods for automatic recovery from errors in a computing environment. A system is provided to facilitate failure recovery in the computing system. The system includes at least one driver component that enumerates at least one layer of a driver stack. A module associated... Agent: Amin. Turocy & Calvin, LLP

20080294933 - Fail-over method, computer system, management server, and backup server setting method: A management server obtains configuration information of an active server and creates a logical partition in a backup server so as to correspond to the active server. The backup server starts up the created logical partition. And when the created logical partition reaches a predetermined state, the backup server releases... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20080294935 - Data structure for flash memory and data reading/writing method thereof: A data structure for a flash memory and data reading/writing method thereof are disclosed. A 512 bytes data and a redundant code derived from the data encoded with a 6-bit error correcting code scheme are stored in a first sector and a second sector with sequential address in a block... Agent: Sinorica, LLC

20080294934 - Semiconductor memory device having an error correction function and associated method: A semiconductor memory device may include a parity generating circuit, a memory cell array, an error calculating circuit and an error corrector. The parity generating circuit generates parities having different number of bits according to types of a partial array self-refresh mode, and selects one of the parities to output... Agent: Lee & Morse, P.C.

20080294936 - Software memory leak analysis using memory isolation: A computerized method, program product, and a service that allocates and isolates leaky memory during the execution of an application in a data processing system. A memory controller having several components first identifies a leaky section of memory and delegates to an allocation component to allocate more memory if possible.... Agent: Hamre, Schumann, Mueller & Larson, P.c

20080294937 - Distributed processing method: According to an aspect of the embodiment provides a method for controlling a processing device for distributing jobs among a plurality of job processing devices for executing the jobs, respectively. The method comprises the steps of: transmitting a job to one of the job processing devices to have the job... Agent: Greer, Burns & Crain

20080294938 - Semiconductor integrated circuit device having fail-safe mode and memory control method: An integrated circuit device contains a flash memory, a flash control unit for controlling the rewriting and reading on the flash memory, and a processor unit. The processor unit includes a normal mode and a fail-safe mode as the operating states. In normal mode, when a defect is detected during... Agent: Mcginn Intellectual Property Law Group, PLLC

20080294939 - Debugging device and method using the lpc/pci bus: A debug device include a programmable logic device (11) with debugging source codes burnt thereinto; a PCI connector (16) connected with the programmable logic device; a LPC connector (17) connected with the programmable logic device; a first display module (13) connected with the programmable device for showing codes of a... Agent: PCe Industry, Inc. Att. Cheng-ju Chiang

20080294940 - Method and device for managing computing system: In a computing system comprising plural processor modules possessing plural processors, plural I/O devices serving as an interface of communication between the plural processor modules and external equipment, and a connection mechanism possessing plural switching units to which the plural processor modules and the plural I/O devices are coupled, the... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20080294941 - Method and system for test case generation: A method and apparatus is described for generating a test case for an application or system modelled using a Stochastic Automata Network model. The method contemplates the inclusion of a plurality of automata and including the steps of: (a) setting an initial global state as the current global state, wherein... Agent: Hewlett Packard Company

20080294942 - Self-healing system and method: Systems and methods for optimizing performance in a computing environment are provided. The system comprises means for monitoring execution of annotated logic code associated with a software component to determine whether a condition has been satisfied, wherein annotations in the logic code provide one or more details about the software... Agent: Ibm Corporation, T.j. Watson Research Center

20080294943 - Sata interface tester and testing method: A serial advanced technology attachment (SATA) interface tester includes a memory, a signal converter, at least one SATA interface, and an indicator. The at least one SATA interface is adapted to connect with SATA interfaces of a motherboard, and is electrically connected to the memory via the signal converter. The... Agent: PCe Industry, Inc. Att. Cheng-ju Chiang

20080294944 - Processor bus for performance monitoring with digests: A method for monitoring event occurrences from a plurality of processor units at a centralized location via a dedicated bus coupled between the plurality of processor units and the centralized location. In particular, the method comprises receiving, at the centralized location, data indicative of cumulative events occurring at one of... Agent: Moser, Patterson & Sheridan, LLP

20080294945 - Program and method for error determination, and electronic apparatus: There is provided an error determination program executed by an information processor included in an electronic apparatus that includes a device installation section capable of installing any one of a plurality of devices having different formats, a host controller acting as an intermediary between the information processor and the device... Agent: Harness, Dickey & Pierce, P.L.C

20080294946 - System and method for problem determination using dependency graphs and run-time behavior models: A problem determination system and method reduces the time and effort required by system administrators to trouble shot transaction processing difficulties in a large distributed I/T environment by monitoring system component performance and computing operational performance threshold limits based on dependency graphs for the system. Using this data, a prioritized... Agent: Whitham, Curtis, & Christofferson, P.c Suite 340

20080294947 - Method of recording/reproducing digital data and apparatus for same: A digital data recording/reproducing method includes the steps of: interleaving data on a PI code for each PI code of a 208-row ECC block; and converting a short burst error into random errors by dispersing errors on the PI codes. Moreover, the digital data recording/reproducing method increases correction capability against... Agent: Townsend And Townsend And Crew, LLP

20080294948 - Protocol tester and method for performing a protocol test: Embodiments of the present invention provide a protocol tester for performing a protocol test, said protocol tester exhibiting an input for the feeding in of data, a protocol decoding device for the decoding of data, and an output for providing the decoded data, the protocol tester also comprising a device... Agent: Matthew D. Rabdau Tektronix, Inc.

20080294950 - Double dram bit steering for multiple error corrections: A method and system is presented for correcting a data error in a primary Dynamic Random Access Memory (DRAM) in a Dual In-line Memory Module (DIMM). Each DRAM has a left half (for storing bits 0:3) and a right half (for storing bits 4:7). A determination is made as to... Agent: Dillon & Yudell LLP

20080294949 - Memory access system: When a host system outputs a read command to a memory controller, it measures a load count of a memory area on which a read access load is imposed. Then, when the host system judges that the load count of a memory area reaches a predetermined count, it causes the... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080294951 - Methods and devices for testing computer memory: A method, and a corresponding device, provides for testing computer memory having a number of memory elements. The method includes the steps of initializing each memory element to zero, using a seeded random number generator, determining a random address that corresponds to a start point in the memory range, using... Agent: Hewlett-packard Company Intellectual Property Administration

20080294952 - Test apparatus and device: It is aimed to efficiently test devices that can transfer data at a very high bit rate. A test apparatus for testing a device under test includes a capture memory that stores thereon an output pattern received from the device under test, a header detecting section that reads the output... Agent: Jianq Chyun Intellectual Property Office

20080294953 - Removing the effects of unknown test values from compacted test responses: Methods, apparatus, and systems for filtering compacted test responses are disclosed. The methods, apparatus, and systems can be used, for example, to remove the effects of unknown test values. For instance, in one embodiment, a compacted test response from a compactor of a circuit-under-test is received. In this embodiment, the... Agent: Klarquist Sparkman, LLP

20080294954 - System, method and program for processing read error: A system for processing a data read error from a tape medium in one embodiment includes a reading section for reading data in data units from a tape medium; a reading control section for controlling said reading section to read data, and on condition that if an error occurs in... Agent: Zilka-kotab, PC- Ibm

20080294955 - Dynamically reconfigurable shared scan-in test architecture: A low overhead dynamically reconfigurable shared scan-in test architecture is provided. This test architecture advantageously allows for changing scan inputs during the scan operation on a per shift basis. The flexibility of reconfiguring the scan input to scan chain mapping every shift cycle can advantageously reduce both test data volume... Agent: Bever, Hoffman & Harms, LLP

20080294957 - Communication apparatus: l

20080294956 - Encryption via induced unweighted errors: A method for encrypting data is provided. The method includes formatting data represented in a weighted number system into data blocks. The method also includes converting the data blocks into a residue number system representation. The method further includes generating a first error generating sequence and inducing errors int he... Agent: Harris Corporation C/o Darby & Darby PC

20080294958 - Method of transmitting control information in wireless communication system and transmission window updating method using the same: A method of transmitting control information in a wireless communication system and transmission window updating method using the same are disclosed, by which transmission efficiency in a transmitting side can be enhanced. The present invention includes the steps of receiving a first control information block including a first status report... Agent: Lee, Hong, Degerman, Kang & Waimey

20080294959 - Decoder: An H-ARQ system wherein the transmission of two consecutive, or sequential, blocks of information bits are considered jointly; i.e., one of the blocks of information being embedded within the other one of the blocks of information. If a retransmission for the first block is necessary, the system processes both blocks... Agent: Brake Hughes Bellermann LLP

20080294960 - Memory-efficient ldpc decoding: To decode a representation of a codeword that encodes K information bits as N>K codeword bits, messages are exchanged between N bit nodes and N−K check nodes of a graph in which E edges connect the bit nodes and the check nodes. While messages are exchanged, fewer than E of... Agent: Mark M. Friedman

20080294961 - Method and apparatus for reading data: A reading apparatus reads data from a storage device based on which an error correcting code is to be generated. An error determining unit reads the data from the storage device, and determines whether a read error has occurred in the data. A reading unit re-reads, when the error determining... Agent: Staas & Halsey LLP

20080294962 - Efficient encoding/decoding of a sequence of data frames: Encoding data by first performing a transformation of predicted data and input data, and then performing a subtraction of the resulting outputs. In an embodiment, the prediction approach is chosen such that fewer elements of different values (compared to a number of elements in the input data) are generated, and... Agent: Nvidia C/o Murabito, Hao & Barnes LLP

20080294963 - Method and apparatus for designing low density parity check code with multiple code rates, and information storage medium thereof: A method and apparatus for generating a low density parity check (LDPC) code having a variable code rate, the method of generating the LDPC code having a variable code rate including: generating a first parity check matrix by combining a parity matrix or a parity check matrix and a first... Agent: Stein, Mcewen & Bui, LLP

20080294964 - Serial concatenation of interleaved convolutional codes forming turbo-like codes: A serial concatenated coder includes an outer coder and an inner coder. The outer coder irregularly repeats bits in a data block according to a degree profile and scrambles the repeated bits. The scrambled and repeated bits are input to an inner coder, which has a rate substantially close to... Agent: Fish & Richardson, PC

20080294965 - Data writing method for flash memory and error correction encoding/decoding method thereof: A data writing method for flash memory and an error correction encoding/decoding method thereof are disclosed. In an embodiment of the data writing method, a 6-bit ECC scheme using a Reed-Solomon code derived from a Galois Field GF (29) is used to encode a data for generating a redundant which... Agent: Law Offices Of Lai And Associates, P.C.

20080294966 - Data transmission apparatus, data transmission device, data reception device and data transmission system: A data transmission apparatus includes a packet generation section, a frame encoding section, a transmission section, a reception section, a frame decoding section and a packet extraction section. The packet generation section generates a packet upon request. The frame encoding section generates a frame having a predetermined length by dividing... Agent: Fildes & Outland, P.C.

20080294967 - Incremental redundancy coding system: In packet digital communications using a two way communications medium such as wireless each received packet is subject to noise and/or interference which causes errors in some of the received symbols. A common method known as Incremental Redundancy (IR), Hybrid Automatic Repeat Request (HARQ) for corrects these transmission errors by... Agent: Martin Tomlinson

20080294970 - Method for implementing stochastic equality nodes: The present invention relates to a decoding method and system for stochastic decoding of linear block codes with parity check matrix. Each encoded sample of a set of encoded samples is converted into a corresponding probability. For each probability a corresponding probability message is the generated by encoding each probability... Agent: Freedman & Associates

20080294969 - Rate-compatible protograph ldpc code families with linear minimum distance: Digital communication coding methods are shown, which generate certain types of low-density parity-check (LDPC) codes built from protographs. A first method creates protographs having the linear minimum distance property and comprising at least one variable node with degree less than 3. A second method creates families of protographs of different... Agent: Steinfl & Bruno

20080294968 - Ultra high-speed optical transmission based on ldpc-coded modulation and coherent detection for all-optical network: An optical communication system includes a bit-interleaved coded modulation (BICM) coder; and a low-density parity-check (LDPC) coder coupled to the BICM coder to generate codes used as component codes and in combination with a coherent detector.... Agent: Nec Laboratories America, Inc.

20080294971 - Transparent envelope for xml messages: Transforming portions of a message to a destination via a communication protocol. A message is received. It is detected whether the received message includes an encoded envelope. The encoded envelope includes a stack defining parameters including information for handling the received message in an original format. If the received message... Agent: Senniger Powers LLP (msft)

20080288808 - Debugging a processor through a reset event: A method for operating a processor in data processing system comprises: asserting a debug control signal to cause the processor to enter a debug operating mode; initializing a plurality of shared processor resources with debug configuration information, wherein the plurality of shared processor resources are shared between a normal operating... Agent: Freescale Semiconductor, Inc. Law Department

20080288809 - Memory controller for writing data into and reading data from a memory: According to an aspect of an embodiment, a memory controller for writing data into and reading data from a memory, comprises an error detector for detecting an error of data stored in the memory when reading the data, a time stamper for generating first time information indicative of the time... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20080288807 - System, method, and computer program for presenting and utilizing footprint data as a diagnostic tool: A data processing system for storing and identifying footprint data in a data processing system enabling automated collection, identification and formatting recovery of footprint data executing on a mainline routine. A footprint area is allocated onto a failure recovery routine stack for use by the mainline routine for storing footprint... Agent: Ibm Corp (ya) C/o Yee & Associates PC

20080288810 - Method and system for managing resources during system initialization and startup: A method for managing a system's computer resources, includes: detecting an error condition in a computer resource; labeling the computer resource as not usable based on the error condition detected; reconfiguring the remaining computer resources to compensate for the detected error condition based on a failure mode policy; and wherein... Agent: Cantor Colburn LLP - IBM Rochester Division

20080288812 - Cluster system and an error recovery method thereof: A cluster system including: a transmission side server cluster consisting of a plurality of computers; a receiving side server cluster consisting of a plurality of computers; and a network that interconnects both the transmission side server cluster and the receiving side server cluster, wherein an active-transmission computer which is included... Agent: Antonelli, Terry, Stout & Kraus, LLP

20080288811 - Multi-node replication systems, devices and methods: Replication techniques are presented. According to an embodiment of a method, a node of a replicated storage network is assigned to be an owner of a data block to issue write memory block commands. The network includes at least two nodes including the node assigned to be the owner. If... Agent: Schwegman, Lundberg & Woessner/novell

20080288814 - Apparatus for detecting and recovering from data destruction caused in an unaccessed memory cell by read, and method therefor: Read disturb in a flash memory destroys data that is not requested to be read, and an efficient read disturb check method is therefore needed. In addition, data may be destroyed beyond repair by error correction before a read disturb check is run. Thus, this invention provides a non-volatile data... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20080288813 - Method for repairing a neighborhood of rows in a memory array using a patch table: A method for repairing a neighborhood of rows in a memory array using a patch table is disclosed. First data to be stored in row N in a memory array of the memory device, second data, if any, stored in row N-1 in the memory array, and third data, if... Agent: Brinks Hofer Gilson & Lione/sandisk

20080288815 - Firmware assisted error handling scheme: A firmware assisted error handling scheme in a computer system has been disclosed. In one embodiment, firmware is used to access one or more hardware-specific error registers within the computer system in response to a system management interrupt (SMI) trap. Using the firmware, an error record in a common error... Agent: Intel/bstz Blakely Sokoloff Taylor & Zafman LLP

20080288816 - System module and data relay method: A system module includes a plurality of processors, and a system controller that is connected to the processors via a first transmission line and relays a packet from each of the processors to another system module via a second transmission line in a multiprocessor system. The system controller includes a... Agent: Staas & Halsey LLP

20080288817 - Gorbadey's method for ensuring the reliable operation of the program computing means: The invention relates to the computer engineering, and its usage ensures the possibility to recognize in due time the failures being occurred during operation of the program computing means, and to response respectively for the failure of each type. The method is realized in a program computing means (PCM) comprising... Agent: Houston Eliseeva

20080288818 - Method and system for protecting information between a master terminal and a slave terminal: In an application system of a liquid crystal display, for protecting transmissions between a master terminal and a slave terminal, effects caused by an unstable power source of the slave terminal have to be reduced to a lowest degree. When the application system is reset or under normal operations with... Agent: North America Intellectual Property Corporation

20080288819 - Computing system with transactional memory using millicode assists: A computing system processes memory transactions for parallel processing of multiple threads of execution with millicode assists. The computing system transactional memory support provides a Transaction Table in memory and a method of fast detection of potential conflicts between multiple transactions. Special instructions may mark the boundaries of a transaction... Agent: International Business Machines Corporation

20080288820 - Multi-directional fault detection system: An apparatus, program product and method checks for nodal faults in a group of nodes comprising a center node and all adjacent nodes. The center node concurrently communicates with the immediately adjacent nodes in three dimensions. The communications are analyzed to determine a presence of a faulty node or connection.... Agent: Wood, Herron & Evans, L.L.P. (ibm)

20080288821 - Automated diagnosis for electronic systems: Systems for providing automated diagnosis of problems for an electronic network include a central diagnosis engine configured to include modules that rank identified policy/configuration changes into potential causes, verify the ranked potential causes and determine whether any of the ranked potential causes is a likely cause or contributor to the... Agent: Hope Baldauff Hartman, LLC

20080288822 - Exhaustive security fuzzing for transact structured query language: Systems and methods that incorporate fuzzing capabilities within an SQL server to facilitate penetration testing. A fuzzing component associated with the SQL server provides an entry point for accessing the fuzzing system to update explicit user specified parameters associated with SQL, wherein the server's in depth knowledge regarding semantics of... Agent: Amin. Turocy & Calvin, LLP

20080288823 - Jtag interface: Implementations are presented herein that relate to improved Joint Test Action Group (JTAG) compatible devices.... Agent: Lee & Hayes, PLLC

20080288824 - Power-on self test program management apparatus and its management method and program: A POST management apparatus for managing a POST of an SB in a partition which operates in units of an OS using the CPU of the SB as a resource accesses the storage area storing the POST of the SB so as to perform read/write operation and to acquire/recognize the... Agent: Staas & Halsey LLP

20080288825 - Storage subsystem, storage system, and communication control method: In a storage subsystem which is connected to an IP network, by excluding an improper packet, security is heightened, and a performance of communication to a logical unit of storage subsystem is maintained and secured. In the storage subsystem, a function which carries out filtering of a packet other than... Agent: Townsend And Townsend And Crew, LLP

20080288826 - Trace information collecting system and program: Occurrence of a failure in a computer system is appropriately detected, and information required for removing the failure is automatically collected. A trace information collecting system of the present invention which collects trace information indicating the course of processing of a program comprises a history recording section for recording a... Agent: Shimokaji & Associates, P.C.

20080288828 - structures for interrupt management in a processing environment: A design structure embodied in a machine readable storage medium for designing, manufacturing, and/or testing a design for managing interrupts in a processing system are disclosed. The design structure can determine an indication of an interrupt request from a peripheral entity, identify the peripheral entity associated with the indication, count... Agent: Ibm Corporation, Intellectual Property Law Dept 917, Bldg. 006-1

20080288827 - Method for visualizing results of root cause analysis on transaction performance data: Mechanisms for graph manipulation of transactional performance data are provided in order to identify and emphasize root causes of electronic business system transaction processing performance problems. A system transaction monitoring system, such as IBM Tivoli Monitoring for Transaction Performance™ (ITMTP) system, is utilized to obtain transaction performance data for a... Agent: Ibm Corp (ya) C/o Yee & Associates PC

20080288829 - Method and apparatus for verifying data in a storage system: A method for verifying data in a storage system is disclosed. A host computer transmits area management data to a storage controller. The area management data specifies a range of a storage area in a storage device to be used by an application program having a mechanism for verifying data... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20080288830 - Method, system and computer program for facilitating the analysis of error messages: A solution is proposed for managing a software application. A corresponding method (300) starts with the step of detecting (306) an error condition of the software application. An error message corresponding to the error condition is logged (309-312); the error message includes at least one available field for an information... Agent: Ibm Corporation Intellectual Property Law

20080288831 - Method of recording/reproducing digital data and apparatus for same: A digital data recording/reproducing method includes the steps of: interleaving data on a PI code for each PI code of a 208-row ECC block; and converting a short burst error into random errors by dispersing errors on the PI codes. Moreover, the digital data recording/reproducing method increases correction capability against... Agent: Townsend And Townsend And Crew, LLP

20080288832 - Method of recording/reproducing digital data and apparatus for same: A digital data recording/reproducing method includes the steps of: interleaving data on a PI code for each PI code of a 208-row ECC block; and converting a short burst error into random errors by dispersing errors on the PI codes. Moreover, the digital data recording/reproducing method increases correction capability against... Agent: Townsend And Townsend And Crew, LLP

20080288833 - Method of recording/reproducing digital data and apparatus for same: A digital data recording/reproducing method includes the steps of: interleaving data on a PI code for each PI code of a 208-row ECC block; and converting a short burst error into random errors by dispersing errors on the PI codes. Moreover, the digital data recording/reproducing method increases correction capability against... Agent: Townsend And Townsend And Crew, LLP

20080288835 - Test method, integrated circuit and test system: The test method, integrated circuit and test system embodiments disclosed herein relate to testing at least one integrated circuit which uses an internal operating clock and has a first number of address pins, a second number of command pins and an address generation circuit which receives at least one encoded... Agent: Coats & Bennett/qimonda

20080288834 - Verification of memory consistency and transactional memory: A system for efficiently verifying compliance with a memory consistency model includes a test module and an analysis module. The test module may coordinate an execution of a multithreaded test program on a test platform. If the test platform provides an indication of the order in which writes from multiple... Agent: Mhkkg/sun

20080288836 - Semiconductor integrated circuit capable of testing with small scale circuit configuration: In a test mode, a comparator compares for each column a value of data read from each memory cell connected to an activated word line with an expected value to be read from each memory cell. An error register holds error data based on a comparison result by a comparator.... Agent: Buchanan, Ingersoll & Rooney PC

20080288838 - Nonvolatile semiconductor memory system: According to one embodiment, an electrical package includes: an external input portion; an external output portion; a plurality of integrated circuits that is compatible with a compressed deterministic pattern test, each of the integrated circuits including: an input portion; a decompressor that is connected to the input portion; scan chains... Agent: Amin, Turocy & Calvin, LLP

20080288837 - Testing of a circuit that has an asynchronous timing circuit: Special test measures are required to test an asynchronous timing circuit. The asynchronous timing circuit (14) comprises a time-continuous feedback loop (22, 26) with a combinatorial logic circuit (22) with inputs for a feedback signal and a further signal, the feedback loop having positive loop gain. A test prepared circuit... Agent: Philips Intellectual Property & Standards

20080288839 - Jtag test architecture for multi-chip pack: A test-communication path is provided between chips in a multi-chip package. Externally-accessible JTAG input and output pins are provided to a first chip in the multi-chip package, and this first chip is configured to allow signals received on these JTAG pins to be routed to other chips in the multi-chip... Agent: Nxp, B.v. Nxp Intellectual Property Department

20080288840 - Probeless testing of pad buffers on wafer: The peripheral circuitry (350, 360, ESD, BH) of an integrated circuit die on a wafer is tested without physically contacting the bond pads of the die.... Agent: Texas Instruments Incorporated

20080288842 - Ic testing methods and apparatus: A testing circuit has scan chain segments (62,64,60) defined between parallel inputs (wpi[0] . . . wpi[N−1]) and respective parallel outputs (wpo[0] . . . wpo[N−1]). The scan chain segments comprise a bank (62) of cells of a shift register circuit, a core scan chain portion (62), a first bypass... Agent: Nxp, B.v. Nxp Intellectual Property Department

20080288841 - System and methods of balancing scan chains and inserting the balanced-length scan chains into hierarchically designed integrated circuits.: A system and methods of balancing scan chains and, more particularly, a system and methods of load balancing scan chains into hierarchically designed integrated circuits. The method includes estimating or calculating a maximum scan chain length L and creating a maximum number of scan chains of length L in each... Agent: Greenblum & Bernstein, P.L.C

20080288843 - Optimized jtag interface: An optimized JTAG interface is used to access JTAG Tap Domains within an integrated circuit. The interface requires fewer pins than the conventional JTAG interface and is thus more applicable than conventional JTAG interfaces on an integrated circuit where the availability of pins is limited. The interface may be used... Agent: Texas Instruments Incorporated

20080288844 - Data communication module providing fault tolerance and increased stability: A module for transmitting sets of data bits to another module via a communication bus using dual-rail encoding is provided that has a reduced switching activity. The module comprises bus invert coding means adapted to compare a set of data bits with a preceding set of data bits to determine... Agent: Philips Intellectual Property & Standards

20080288845 - Range extension and noise mitigation for wireless communication links utilizing a crc based single and multiple bit error correction mechanism: A novel and useful range extension and in-band noise mitigation mechanism that uses conventional CRC error detection codes to correct single and multiple bit errors in packets received over a communications link. The CRC error correction mechanism of the invention is particularly suitable for use with communication protocols with weak... Agent: Texas Instruments Incorporated

20080288846 - Apparatus and method for encoding and decoding block low density parity check codes with a variable coding rate: An apparatus and method for coding a block Low Density Parity Check (LDPC) code having a variable coding rate. The apparatus receives an information word and encodes the information word into a block LDPC code based on one of a first parity check matrix and a second parity check matrix,... Agent: The Farrell Law Firm, P.C.

20080288847 - Wireless transmit/receive unit having a turbo decoder with circular redundancy code signature comparison and method: An iterative turbo decoder for a wireless transmit receive unit (WTRU) of a wireless communication system and method for error correcting received communication signal data are provided. The decoder implements a stopping rule through use of signature codes to determine whether successive iterations of decoder data are the same.... Agent: Volpe And Koenig, P.C. Dept. Icc

20080288848 - Latency by offsetting cyclic redundancy code lanes from data lanes: Embodiments of the invention are generally directed to systems, methods, and apparatuses for improving latency by offsetting cyclic redundancy check lanes from data. In some embodiments, a memory device includes a memory array to provide read data bits and a cyclic redundancy code (CRC) generator to generate CRC bits corresponding... Agent: Intel Corporation C/o Intellevate, LLC

20080288849 - Apparatus for generating soft decision values and method thereof: According to an example embodiment, a method of generating a soft decision value using an Analog-to-Digital Converter (ADC) having a given resolution may include receiving metric values calculated based on levels of a transmission signal and output levels of the ADC. Metric values corresponding to a level of a received... Agent: Harness, Dickey & Pierce, P.L.C

20080288850 - Method and apparatus for code block segmentation in a mobile communication system: A method for segmenting an information word into code blocks in a mobile communication system. The method includes setting a number C of code blocks to a minimum integer not less than a value obtained by dividing X by Z; when sizes K of all code blocks are determined to... Agent: The Farrell Law Firm, P.C.

20080288851 - Digital broadcast transmission and reception apparatuses and methods thereof: A digital broadcast transmission apparatus includes a Reed-Solomon (RS) encoder to perform RS encoding of data to obtain RS-encoded data formatted in data packets each including a predetermined number of bytes; a sync byte inserter to insert sync bytes indicating a start point of one of the data packets in... Agent: Stein, Mcewen & Bui, LLP

20080288852 - Multicarrier communication system capable of switching modulation schemes during communication: A multicarrier wireless communication system is capable of switching the modulation scheme used by each carrier during communication. This communication system includes error detectors for detecting error bits separately for respective carriers by comparing the data block of each carrier before and after correction. The modulation scheme used by a... Agent: Studebaker & Brackett PC

20080288853 - Apparatus and method of puncturing of error control codes: A code puncturing apparatus and method is provided. The apparatus includes: a codeword selection unit selecting continuous n−1-number of mother codewords from mother codewords generated from k-bit effective information, where k denotes a natural number, and one redundancy bit; and a puncturing unit selecting k-number of redundancy bits from redundancy... Agent: Harness, Dickey & Pierce, P.L.C

20080282104 - Self healing software: The systems and methods describe a self healing framework (SHF) that can monitor errors in a computing system and can resolve the errors and/or suggest methods for resolving the errors to a user based on a heuristic approach. In addition, the SHF can analyze errors that occurred in the past... Agent: Lee & Hayes PLLC

20080282105 - Data integrity validation in storage systems: Data validation systems and methods are provided. Data is recorded in N data chunks on one or more storage mediums. A first validation chunk independently associated with said N data chunks comprises first validation information for verifying accuracy of data recorded in said N data chunks. The first validation chunk... Agent: CenturyIPGroup, Inc. [ibm Us]

20080282106 - Data storage with incremental redundancy: Output encoded data is read and a condition is evaluated. The input data is reconstructed using a decoding level selected, responsively to the condition, from a first level, at which a first part of the output encoded data corresponding to the first section is processed to decode the ECC at... Agent: Darby & Darby P.C.

20080282107 - Method and apparatus for repairing memory: Methods and apparatuses are disclosed in which a repair instruction, such as from a tester, causes an integrated circuit undergoing testing to substitute defective locations of a first set of memory cells in the integrated circuit with a second set of memory cells in the integrated circuit, despite the repair... Agent: Macronix C/o Haynes Beffel & Wolfeld LLP

20080282108 - Program synthesis and debugging using machine learning techniques: One embodiment is directed to synthesizing code fragments in a software routine using known inputs and corresponding expected outputs. A computer system provides a software routine with known inputs and corresponding expected outputs, infers software routine instructions based on the known inputs and corresponding expected outputs, and synthesizes a correctly... Agent: Workman Nydegger/microsoft

20080282109 - Debugging system and debugging method: A debugging system includes an emulator connected via a communication line for two-way communication and a target device to be debugged by the emulator. The emulator includes a serial signal transmitting unit to transmit a control signal as serial data to the target device and an A/D converter to convert... Agent: Mcginn Intellectual Property Law Group, PLLC

20080282110 - Scan clock architecture supporting slow speed scan, at speed scan, and logic bist: Herein described are at least a method and a system to perform scan testing of an integrated circuit chip using one or more internal and external clock sources. In a representative embodiment, the method comprises receiving at least one external clock signal and three control signals generated by an off-chip... Agent: Mcandrews Held & Malloy, Ltd

20080282112 - Method and apparatus for testing request-response service using live connection traffic: The subject matter herein provides for a method and apparatus for comparison of network systems using live traffic in real-time. The inventive technique presents real-world workload in real-time with no external impact (i.e. no impact on the system under test), and it enables comparison against a production system for correctness... Agent: Law Office Of David H. Judson

20080282111 - Worker thread corruption detection and remediation: A thread has a corruption detection mechanism that compares a beginning state of a function with an ending state to determine any inconsistencies. Based on the type of inconsistency, a remedial action may be taken, such as ignoring the inconsistency, cleaning up the inconsistency, and terminating the thread with an... Agent: Microsoft Corporation

20080282113 - Failure information management method and apparatus, failure detection method and apparatus, electronic apparatus, information processing apparatus and computer-readable storage medium: A failure information management method manages failure information related to a replaceable part of an electronic apparatus, by generating an error log, and storing the error log in a non-volatile memory of the replacement recommended part itself. The error log is generated by recording first generation information in a representative... Agent: Staas & Halsey LLP

20080282115 - Client-server text messaging monitoring for remote computer management: Implementation of a client-server text messaging (CSTM) monitor installed on a computer system that is configured to monitor a client-server text messaging (CSTM) server for commands posted thereto, and a management program installed on the computer system which is responsive to the commands. The CSTM monitor is lightweight and allows... Agent: Hoffman Warnick LLC

20080282114 - Method to enhance micro-c4 reliability by reducing the impact of hot spot pulsing: A system for reducing an impact of hot spot, pulsing of a semiconductor device including: first generating means for generating a plurality of local op-codes; a sequencer for augmenting customer op-codes with the plurality of local op-codes; selecting means for selecting one or more of the randomly arriving customer op-codes... Agent: Cantor Colburn LLP-ibm Yorktown

20080282117 - Methods, apparatus, and systems for integrated management, graphics and i/o control of server systems: In one embodiment of the invention, a server system is disclosed for data processing having a printed circuit board with one or more processors to process data; a network interface controller coupled to the one or more processors; and a monolithic integrated circuit (IC) coupled to the one or more... Agent: Alford Law Group, Inc.

20080282116 - Transient fault detection by integrating an srmt code and a non srmt code in a single application: Disclosed is a method for running a first code generated by a Software-based Redundant Multi-Threading (SRMT) compiler along with a second code generated by a normal compiler at runtime, the first code including a first function and a second function, the second code including a third function. The method comprises... Agent: Grossman, Tucker, Perreault & Pfleger, PLLC C/o Intellevate, LLC

20080282118 - Highly reliable distributed system: The highly reliable distributed system is composed of a communication protocol processing unit which comprises a mailbox for storing a communication message, and executes communication protocol processing between data of an application program and a network controller using the network controller performing network communication of the message in the mailbox;... Agent: Crowell & Moring LLP Intellectual Property Group

20080282119 - Memory device and built in self-test method of the same: A memory device including, a nonvolatile memory which stores a step item, a parameter start address, and a parameter which has an address corresponding to the parameter start address and defines the step item, and a controller which performs, on the nonvolatile memory, a test step corresponding to the step... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080282121 - Integrated circuit and test method: An integrated circuit test controller and method defining a number N of failure events, applying the test to an integrated circuit under test by applying a predetermined sequence of input and output operations according to a test algorithm. Output data is compared to expected data, and a failure signal is... Agent: Dicke, Billig & Czaja

20080282120 - Memory structure, repair system and method for testing the same: A memory structure is provided. The memory structure includes a memory array, an error correct code (ECC) unit, and a comparator. The memory array includes at least one memory cell being written and storing at least one original data. The ECC unit is for reading at least one tested data... Agent: Birch Stewart Kolasch & Birch

20080282122 - Single scan clock in a multi-clock domain: Herein described are at least a method and a system to perform scan testing of an integrated circuit chip. The integrated circuit chip is scan tested using only a single scan clock. The single scan clock is provided through a single pin on the integrated circuit chip. In a representative... Agent: Mcandrews Held & Malloy, Ltd

20080282123 - System and method of multi-frequency integrated circuit testing: A system and method of multi-frequency integrated circuit testing with a method for testing a clocked logic type integrated circuit including creating exerciser code on the integrated circuit when the integrated circuit is operating at a first frequency, switching the integrated circuit to operating at a second frequency greater than... Agent: Ibm Corporation (ve) C/o Volel Emile

20080282124 - Predictive run testing: A test object can be selectively included in a test run based on predicting the behavior of the test object. In one embodiment, the present invention includes predicting how likely the test object is to produce a failure in a test run and deciding whether to include the test object... Agent: The Mueller Law Office, P.C.

20080282126 - Acknowledgments of negative acknowledgments by relay stations and mobile stations: Various example embodiments are discloses. According to one example embodiment, a method may include sending a packet to both a relay station and a destination station in a wireless network, receiving a relay station acknowledgment (ACK) or negative acknowledgment (NACK) from the relay station during an ACK/NACK frame, and receiving... Agent: Brake Hughes Bellermann LLP

20080282125 - Method and apparatus for combined packet retransmission and soft decoding of combined packets in a wireless communication network: In a wireless communication network using point-to-point or point-to-multipoint communications, this disclosure teaches the use of combined packets for retransmission and corresponding soft value processing at a receiver, wherein combined packets are formed as the logical combination of two or more previously transmitted packets and allow the receiver to use... Agent: Coats & Bennett, PLLC

20080282127 - Hybrid automatic repeat request system and method: A data communication method for puncturing of parity bits defining all parity data for a minimum code rate generated by an encoder is disclosed. The method initializes an accumulator associated with the parity bits to an initial value, and for each parity bit increments the accumulator by a increment value... Agent: David B. Cochran, Esq. Jones, Day, Reavis & Pogue

20080282128 - Method of error correction code on solid state disk to gain data security and higher performance: An electronic data storage device having a Reed Solomon (RS) decoder including a syndrome calculator block responsive to information including data and overhead and operative to generate a syndrome, in accordance with an embodiment of the present invention. The electronic data storage device further includes a root finder block coupled... Agent: Law Offices Of Imam

20080282130 - Digital broadcasting system and method of processing data: A digital broadcasting system and a data processing method are disclosed. Herein, additional encoding is performed on mobile service data, which are then transmitted, thereby providing robustness in the processed mobile service data, so that the mobile service data can respond more strongly against fast and frequent channel changes. The... Agent: Lee, Hong, Degerman, Kang & Schmadeka

20080282131 - Error detection code generating method and error detection code generator: In a mobile communication system, an error detection code or a quality frame indicator (e.g., CRC) is generated using selectively frame information, and at least one of a WCA identifier of another terminal, and a corresponding terminal identifier. And the terminal identifier can be implicitly transmitted to the receiver.... Agent: Ked & Associates, LLP

20080282129 - Operational parameter adaptable ldpc (low density parity check) decoder: Operational parameter adaptable LDPC (Low Density Parity Check) decoder. A novel means is presented by which LDPC coded signal can be decoded, and any one or more operational parameters can be adjusted during the decoding processing. For example, the original information extracted from a received LDPC coded signal (e.g., log... Agent: Garlick Harrison & Markison

20080282132 - Error correcting code: A system 100 for protecting a codeword u against an error in at least one <7-ary symbol, where q is an rΛ of two, r≧1 (q=T). The code word u 300 includes information symbols 310 u[0], . . . , u[k−1], k>1, each information symbol representing an integer in the... Agent: Nxp, B.v. Nxp Intellectual Property Department

20080282133 - Cooperative concatenated coding for wireless systems: Cooperative concatenated coding techniques are provided for wireless communications between at least two users and a base station. A network system employing cooperative concatenated coding includes cooperating user devices each configured to encode and transmit at least a portion of a joint message. The joint message includes at least a... Agent: Amin, Turocy & Calvin, LLP

20080282134 - Methods and apparatus for detection of performance conditions in processing system: Techniques are disclosed for detection of performance conditions in processing systems. For example, a method of detecting a performance condition in at least one particular processing device of a processing system having a plurality of processing devices includes the following steps. Data is input to a data structure associated with... Agent: Ryan, Mason & Lewis, LLP

20080282136 - Parity generation circuit, counter circuit, and counting method: A circuit outputs, upon receipt of data and a parity of the data, count information on the number of bits in the data represented as a base-n number (n: a natural number equal to or larger than 2) and the parity of the count information. The circuit includes a determining... Agent: Staas & Halsey LLP

20080282135 - Parity generator, priority encoder, and information processor: In order to generate a parity of output data from a priority encoder without increasing processing time or making the circuitry complex, the present invention a first level generator having a plurality of first component circuits arranged in parallel, into each of which one of a plurality of sets of... Agent: Staas & Halsey LLP

20080282137 - Error detection code generating method and error detection code generator: In a mobile communication system, an error detection code or a quality frame indicator (e.g., CRC) is generated using selectively frame information, and at least one of a WCA identifier of another terminal, and a corresponding terminal identifier. And the terminal identifier can be implicitly transmitted to the receiver.... Agent: Ked & Associates, LLP

20080276118 - Autonomically adjusting configuration parameters for a server when a different server fails: A load balancer detects a server failure, and sends a failure notification message to the remaining servers. In response, one or more of the remaining servers may autonomically adjust their configuration parameters, thereby allowing the remaining servers to better handle the increased load caused by the server failure. One or... Agent: Martin & Associates, LLC

20080276119 - Autonomically adjusting configuration parameters for a server when a different server fails: A load balancer detects a server failure, and sends a failure notification message to the remaining servers. In response, one or more of the remaining servers may autonomically adjust their configuration parameters, thereby allowing the remaining servers to better handle the increased load caused by the server failure. One or... Agent: Martin & Associates, LLC

20080276117 - End-to-end transactional protection for requests in a web application: Various embodiments of a system and method for processing a request in a distributed software application are disclosed. In response to a client request, one or more server computers may modify a plurality of different portions of state information. The system may operate to ensure that the portions of state... Agent: Meyertons, Hood, Kivlin, Kowert & Goetzel, P.C.

20080276120 - Volume and failure management method on a network having a storage device: A SAN manager acquires configuration information from devices constituting a SAN and produces a corresponding relationship between a host computer and a virtual volume (virtual volume mapping) and a corresponding relationship between the host computer and a real volume (real volume mapping). Based on those pieces of mapping information, the... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20080276121 - Method and infrastructure for recognition of the resources of a defective hardware unit: A system and method of recognizing resources of a computer comprising a system serial number and a broken hardware unit comprising a non-volatile memory unit and enablement definition data relating to functions of the broken hardware unit, wherein the method comprises starting the computer; entering a serial number in a... Agent: Frederick W. Gibb, Iii Gibb & Rahman, LLC

20080276123 - Automation of bare metal recoveries: Completely recovering data stored on a hard disk or other computer-readable media of a computing system from scratch in an automated manner. Recovery information and post-restore customization data are stored on the backup medium that stores the backup of the computer-readable media of the computing system (e.g., operating system, application... Agent: Senniger Powers LLP (msft)

20080276124 - Incomplete write protection for disk array: The embodiments of the invention provide methods of protecting data blocks while writing to a storage array, wherein storage units in the storage array include write logs. The data protection level of the write logs is equal to or greater than the data protection level of the storage units. Moreover,... Agent: Frederick W. Gibb, Iii Gibb & Rahman, LLC

20080276122 - Restoring the firmware and all programmable content of an optical drive: e

20080276125 - Data processing method: The invention relates to a data processing method comprising generating meta-data for each data file stored by back-up servers of a set of back-up servers on a storage medium of a plurality of storage media. The meta-data of a data file comprises the file name of the data file, a... Agent: Ibm Corporation RochesterIPLaw Dept. 917

20080276126 - Methods and apparatus for measuring performance in processing system: Techniques are disclosed for measuring performance in processing systems such as communications systems and computing systems. For example, a method of measuring performance in a processing system having a plurality of processing devices includes the following steps. A measurement system coupled to the plurality of processing devices generates an interrupt... Agent: Ryan, Mason & Lewis, LLP

20080276127 - Diagnostic and trouble-shooting methods in a wireless control and sensor network: A method of performing diagnostics on a first hierarchical device operable within a building automation system is disclosed. The method includes compiling application code configured to control the first hierarchical device such that the application code includes a plurality of internal variables, providing a diagnostic module configured to monitor the... Agent: Siemens Corporation Intellectual Property Department

20080276128 - Metrics independent and recipe independent fault classes: A method and apparatus for diagnosing faults. Process data is analyzed using a first metric to identify a fault. The process data was obtained from a manufacturing machine running a first recipe. A fault signature that matches the fault is identified. The identified fault signature was generated using a second... Agent: Marina Portnova Blakely, Sokoloff, Taylor & Zafman LLP

20080276129 - Software tracing: Trace information is selectively generated for a software routine based on the perceived reliability of the software routine. The software routine includes at least one trace point having an active state and an inactive state. A previously-established reliability indicator for the software routine is read before the routine is executed.... Agent: Ibm Corporation

20080276130 - Distributed logging apparatus system and method: An apparatus, system, and method are disclosed for distributed logging. Operating entities and associations between operating entities are registered in a registry by a logging entity registrar. An event notification monitor recognizes operating errors in operating entities. An aggregation module aggregates operating logs from sets of associated entities, which are... Agent: Kunzler & Mckenzie

20080276131 - Systems and methods for event detection: A system accesses a log of events on more than one computing system and scans these logs in an effort to determine the likely cause of various items of interest, events, or problems. These items of interest often include improper or frustrating behavior of a computer system, but may also... Agent: Ference & Associates LLC

20080276132 - Microprocessor supervision in a special purpose computer system: Devices and methods for microprocessor supervision in a special purpose computer system are provided. One illustrative embodiment includes a first watchdog timer internal to the microprocessor and a second watchdog timer external to the microprocessor. In some cases, the internal watchdog timer may be initiated prior to or during the... Agent: Honeywell International Inc.

20080276133 - Software-controlled dynamic ddr calibration: A system, device and method are described that provide dynamic calibration of high-speed systems, such as high-speed DDR memory systems. In accordance with certain embodiments of the invention, a DDR controller includes functionality that both initializes settings associated with a data window and dynamically maintains the data window within a... Agent: Lsi Corporation

20080276136 - Graphical user interface for presenting multivariate fault contributions: Methods and apparatuses for presenting multivariate fault contributions in a user interface are described. A user interface is provided to illustrate a fault for a sample manufactured by a process containing multiple variables, each having at least two components. The user interface presents one group of components of the multiple... Agent: Blakely, Sokoloff, Taylor & Zafman

20080276137 - Graphical user interface for presenting multivariate fault contributions: Recipe steps of a manufacturing process run that generated a fault are displayed in a current view of a user interface, the recipe steps being displayed in association with a first axis. At least one of measured parameters or calculated parameters of the manufacturing process run are displayed in the... Agent: Marina G. Portnova Blakely, Sokoloff, Taylor & Zafman LLP

20080276134 - Secure problem resolution techniques for complex data response networks: In various embodiments, techniques for secure problem resolution associated with complex data response networks are provided. Error messages associated with an executing problem service are trapped and hidden from a principal. The error messages are associated with a randomly generated incident identifier. The incident identifier is supplied to the principal.... Agent: Schwegman, Lundberg & Woessner/novell

20080276135 - Service alarm correlation: A system and method for correlating alarms from a plurality of network elements (NEs) are provided to unambiguously associate separate alarms to one another. This is accomplished by a method where a fault identifier FID is generated by a serving NE who discovered the faulty hardware or software unit. The... Agent: Nixon & Vanderhye, PC

20080276138 - Dynamically configurable interleaver scheme using at least one dynamically changeable interleaving parameter: A method for encrypting and decrypting an original data stream comprising: (A) transmitting a copy of a key to an interleaver and to a de-interleaver, wherein the key includes a key-algorithm configured to describe an evolution in time of at least one interleaving parameter; (B) interleaving the original data stream... Agent: The Law Offices Of Boris G. Tankhilevich

20080276139 - Self-synchronizing pseudorandom bit sequence checker: Self-synchronizing techniques for checking the accuracy of a pseudorandom bit sequence (PRBS) are provided. The PRBS being checked may be generated by a device (e.g., a device under test) in response to a PRBS received by the device (e.g., from a PRBS generator). In an aspect of the invention, a... Agent: Ryan, Mason & Lewis, LLP

20080276141 - Method and apparatus for broadcasting scan patterns in a scan-based integrated circuit: A broadcaster, system, and method for reducing test data volume and test application time in an ATE (automatic test equipment) in a scan-based integrated circuit. The scan-based integrated circuit contains multiple scan chains, each scan chain comprising multiple scan cells coupled in series. The broadcaster is a combinational logic network... Agent: Bacon & Thomas, PLLC

20080276140 - Semiconductor chip with a plurality of scannable storage elements and a method for scanning storage elements on a semiconductor chip: A semiconductor chip subdivided into power domains, at least one of the power domains is separately activated or deactivated and at least a part of the scannable storage elements are interconnected to one or more scan chains. At least one scan chain is serially subdivided into scan chain portions and... Agent: Michael J. Le Strange, Senior Patent Attorney International Business Machines Corporation

20080276143 - Method and apparatus for broadcasting scan patterns in a random access based integrated circuit: The scan architecture used can also be random access scan based, where the integrated circuit comprises an array of random access scan (RAS) cells that are randomly and uniquely addressable. In random access scan, test patterns can be applied by selectively updating RAS cells and test responses can be observed... Agent: Bacon & Thomas, PLLC

20080276142 - Wafer scale testing using a 2 signal jtag interface: Testing of die on wafer is achieved by; (1) providing a tester with the capability of externally communicating JTAG test signals using simultaneously bidirectional transceiver circuitry, (2) providing die on wafer with the capability of externally communicating JTAG test signals using simultaneously bidirectional transceiver circuitry, and (3) providing a connectivity... Agent: Texas Instruments Incorporated

20080276145 - Integrated circuit having electrically isolatable test circuitry: Special test circuitry in an IC for wafer level testing selectively connects the specialized test circuitry to the functional circuitry during wafer test. Following wafer test the special test circuitry is electrically isolated from the functional circuitry and power supplies such that it does not load functional circuit signals nor... Agent: Texas Instruments Incorporated

20080276144 - Method and system for formal verification of partial good self test fencing structures: The concept of applying fencing logic to Built-In Self Test (BIST) hardware structures for the purpose of segregating defective circuitry and utilizing the remaining good circuitry is a well known practice in the chip design industry. Described herein is a method for verifying that any particular implementation of partial fencing... Agent: International Business Machines Corporation

20080276146 - Incomplete write protection for disk array: The embodiments of the invention provide methods of protecting data blocks while writing to a storage array, wherein storage units in the storage array include write logs. The data protection level of the write logs is equal to or greater than the data protection level of the storage units. Moreover,... Agent: Frederick W. Gibb, Iii Gibb & Rahman, LLC

20080276147 - System and method for performing a harq operation in an ofdm-based receiver: A system and method for performing a HARQ operation in an OFDM-based receiver utilizes a linked list scheme for a HARQ buffer, which is used to store soft information for HARQ entities with decoding errors. The device and method also combine soft information of a particular HARQ entity with previous... Agent: Wilson & Ham

20080276148 - Interference limitation for uplink retransmissions: The present invention relates to a method for transmitting data packets from a mobile terminal to a base station using a hybrid automatic repeat request protocol and soft combining of received data. Further, the present invention provides a base station and a mo-bile terminal both configured to perform the respective... Agent: Dickinson Wright PLLC

20080276149 - Error control code apparatuses and methods of using the same: An Error Control Code (ECC) apparatus may include a control signal generator that generates an ECC control signal based on channel information. The ECC apparatus also may include: a plurality of ECC encoding controllers that output data respectively inputted via storage elements corresponding to the ECC control signal; and/or an... Agent: Harness, Dickey & Pierce, P.L.C

20080276150 - Error control code apparatuses and methods of using the same: An Error Control Code (ECC) apparatus applied to a memory of a Multi-Level Cell (MLC) method may include: a bypass control signal generator generating a bypass control signal; and an ECC performing unit that may include at least two ECC decoding blocks, determining whether to bypass a portion of the... Agent: Harness, Dickey & Pierce, P.L.C

20080276151 - Method and apparatus for decoding a ldpc code: In a decoder for decoding a low density parity check (LDPC) code suitable for decoding multi-rated LDPC codes, a method is provided. The method comprises the steps of: providing a memory for the decoding with the memory dependent on a parity check matrix H with maximum number of “1”s; using... Agent: Frank F. Tian

20080276152 - System and method for error detection in a data storage system: A system and method for error detection in a data storage array includes one or more storage medium interconnected with a controller through a network. A data integrity engine in the controller applies a first error detection process to a data object to create one or more data blocks and... Agent: Brooks Kushman P.C. / Sun / Stk

20080276153 - Optimal period rate matching for turbo coding: Optimal period rate matching for turbo coding. A means is provided herein by which a nearly optimal (e.g., optimal for one block size and sub-optimal for others) periodic puncturing pattern that depends on a mother code. Any desired rate matching can be achieved using the means and approaches presented herein... Agent: Garlick Harrison & Markison

20080276154 - Lighting control protocol: A digital lighting control network protocol with forward and backward frames, each of the frames including an error check code. A no-acknowledgment (NAK) signal is sent from a receiving node to a transmitting node responsive to the error check code. An interface circuit of the receiving node may include an... Agent: Marger Johnson & Mccollom PC - Leviton

20080276155 - Method of detecting and isolating fault in redundant sensors, and method of accommodating fault in redundant sensors using the same: Provided are a method of detecting and isolating fault in sensors and a method of accommodating fault in sensors using the same. In the method of detecting and isolating fault in sensors, a one reduced-order parity vector is obtained by excluding the output of one sensor selected from n sensors,... Agent: Occhiuti Rohlicek & Tsao, LLP

20080276156 - Low density parity check decoder for regular ldpc codes: A method and system for decoding low density parity check (“LDPC”) codes. An LDPC decoder includes an R select unit, a Q message first-in first-out (“FIFO”) memory, and a cyclic shifter. The R select unit provides an R message by selecting from a plurality of possible R message values. The... Agent: Conley Rose, P.C. David A. Rose