Error detection/correction and fault detection/recovery inventions 08/08

20080209253 - Selection of data arrays: Provided are a method, system, and article of manufacture, wherein a plurality of data arrays coupled to a storage controller is maintained. Data arrays are selected from the plurality of data arrays based on predetermined selection rules. Data is stored redundantly in the selected data arrays by writing the data... Agent: Konrad Raynes & Victor, LLP. Attn: Ibm37

20080209256 - Memory array repair where repair logic cannot operate at same operating condition as array: Memory array repair where the repair logic cannot operate at the same operating condition as the memory array is disclosed. In one embodiment, a test is run with the memory array configured in a first operating condition that repair logic for the memory array cannot achieve, and test data is... Agent: Hoffman Warnick Llc

20080209254 - Method and system for error recovery of a hardware device: A method and system for error recovery of a hardware device is provided. The method includes detecting a target hard error indication from the hardware device by comparing the hard error indication to signatures of hard error indications which indicate a temporary failing and modifying the reported error to a... Agent: International Business Machines Corporation

20080209255 - Method and system for the service and support of computing systems: The invention describes an end-user-initiated method and system for managing failure in a host computing system. The embodiments of the invention describe an embedded management/diagnostics system that operates independently from the failed computing system and includes the locating and connecting of an appropriate technical service provider for correcting the problem... Agent: Victoria Donnelly

20080209257 - Modeller for a high-security system: A modeller for a system for determining a residual error probability. The modeller includes a component modeller, which is adapted to receive an error probability and to model a change of the error probability due to a behaviour of a system component, in order to output a changed error probability... Agent: Dicke, Billig & Czaja

20080209258 - Disaster recovery architecture: A method and system for disaster recovery in a packet-based network. The network includes a production site and a recovery site coupled together by the packet-based network. Mirroring software on the production site keeps a recovery site up to date to the last transaction occurring on the production site. A... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20080209260 - Apparatus and method for synchronizing embedded databases of applications in a failover cluster: A method and computer program product in accordance with the invention includes identifying, by an application upon startup, redundant applications running in a failover cluster. Each of the application and redundant applications includes an embedded database for storing data. The application determines which embedded database of the applications contains the... Agent: Kunzler & Mckenzie

20080209261 - Data repair and synchronization method of dual flash read only memory: A data repair and synchronization method of dual flash ROM is provided, which includes a first flash ROM and a second flash ROM that store the same system data, wherein one of the first flash ROM and the second flash ROM is used to perform a data repair on the... Agent: Morris Manning Martin LLP

20080209259 - Method and system for testing reliability of data stored in raid: A system and method for testing reliability of RAID data storage is proposed, which is designed for use with a RAID (Redundant Array of Independent Disks) unit for testing its reliability of data storage operations, and which is characterized by the provision of three testing procedures, namely a redundant data... Agent: Law Offices Of Mikio Ishimaru

20080209263 - Rebuildling a failed disk in a disk array: Provided are a method for operating a disk array, a disk array, and a rebuilding process. The disk array comprises a plurality of data disks and a parity disk. A failed data disk in the disk array is detected and the failed data disk is isolated from the disk array.... Agent: Konrad Raynes & Victor, LLP. Attn: Ibm37

20080209262 - Systems and methods for out-of-band booting of a computer: The present invention is directed to systems and methods for remotely booting a server computer system. A boot request is received from the server computer. An access request is transmitted to a boot management system via a secondary communication channel in response to the received boot request. An access response... Agent: Needle & Rosenberg, P.c.

20080209264 - Method for automatic dump assurance: A computer implemented method, an apparatus, and a computer usable program product are provided for adjusting a dump file space in a data processing system. Events with a potential to cause a dump are detected in a data processing system. A dump file size is estimated based on the detected... Agent: Ibm Corp (ya) C/o Yee & Associates Pc

20080209265 - Information-processing method and apparatus: At a stage of compiling of a source code, range information of a variable that a pointer points and information for a failure recovering are installed into the pointer variable. Since failure recovering information can also be acquired when an illegal pointer access is detected based on range information, a... Agent: Wenderoth, Lind & Ponack L.l.p.

20080209266 - Memory device, memory system including the same, and method thereof: A memory device may include a memory cell array, a page buffer circuit, and/or a control logic. The page buffer circuit may include first and second registers and be configured to store data to be programmed in the memory cell array. The control logic may be configured to control the... Agent: Harness, Dickey & Pierce, P.L.C

20080209267 - Diagnostic test sets: Systems, methodologies, media, and other embodiments associated with metadata driven diagnostic test execution are described. One exemplary system embodiment includes a diagnostic test set repository where pre-defined and/or user-defined XML files that store the metadata for driving the diagnostic test execution can be stored. The example system may also include... Agent: Kraguljac & Kalnay, Llc

20080209268 - Selective disabling of diagnostic functions within a data processing system: A data processing system 2 has a memory 6 with a memory address space incorporating a plurality of domains, each domain comprising a set of memory addresses as defined by programmable domain specifying data 32. A processor core 8 executes program instructions fetched from the memory 6. Diagnostic control circuitry... Agent: Nixon & Vanderhye, Pc

20080209269 - Active probing for real-time diagnosis: Improved problem diagnosis techniques for use in accordance with computing systems, e.g., distributed computing systems, are disclosed. In one aspect of the invention, a technique for diagnosing a problem associated with a computing system comprises the following steps/operations. One or more probes are executed in accordance with at least a... Agent: Ryan, Mason & Lewis, LLP

20080209270 - Automation of testing in remote sessions: Systems and methods are described for implementing automation of testing in remote sessions. In an implementation, a test agent is deployed at a remote server to automate testing of various components in a remote session between the remote server and a remote client. The test agent enables automation, synchronization and... Agent: Lee & Hayes Pllc

20080209271 - Device and method for test computer: A test device for testing startup performance of a computer comprises a setting circuit for recording triggering times for triggering startup of the computer and a time interval between two successive startups of the computer, a monolithic chip (10) comprising an input pin connected to the setting circuit, and an... Agent: Pce Industry, Inc. Att. Cheng-ju Chiang

20080209272 - Apparatus and method for sensing faults of application programs in a cdma system: The present invention generally relates to apparatus and method for sensing faults of application programs in a CDMA system, which comprises a shared memory comprising a plurality of fields, wherein each of the fields comprises a Heart Beat; a plurality of application programs corresponding to the plurality of fields in... Agent: Mcdonnell Boehnen Hulbert & Berghoff LLP

20080209273 - Detect user-perceived faults using packet traces in enterprise networks: Exemplary methods, computer-readable media, and systems for detecting a fault by a packet trace, includes monitoring at least one packet transmitted to or received from, an computing device of an end user, between one or more computing devices implementing at least one of a service or an application on an... Agent: Lee & Hayes Pllc

20080209274 - Device, system and method for predictive failure analysis: A large population of mass-produced devices (80) such as a particular model of computer hard disk drive, are distributed around the world. Each device (80) includes an arrangement for collecting failure analysis data of the device (50). Each device (80) is arranged to transmit this data to the device manufacturers... Agent: Harrington & Smith, Pc

20080209277 - Computer system and memory system: a code storing circuit storing data to be outputted to the CPU instead of data from the memory when an error occurs, a selection circuit in which inputs are coupled to the memory circuit and the code storing circuit, and selectively outputting data from the code storing circuit when an... Agent: Staas & Halsey LLP

20080209278 - Initializing diagnostic functions when specified run-time error criteria are satisfied: A run-time monitor allows defining sets of run-time error criteria and corresponding diagnostic action to take when the run-time error criteria is satisfied. One way to define the run-time error criteria is to take a baseline measurement of run-time errors that occur during normal processing conditions. A run-time error criteria... Agent: Martin & Associates, Llc

20080209276 - Targeted regression testing: A software testing method. In particular implementations, a method includes accessing a first database of one or more bug entries, wherein each but entry comprises information characterizing a bug, an associated code component, and a test script; and a mapping between the component and one or more scripts that test... Agent: Law Office Of Mark J. Spolyar

20080209275 - Test framework for testing an application: A device, method and/or computer-readable medium for testing an application within a test framework includes a framework controller associated with the test framework installed on a master device and a test driver associated with the test framework installed on one or more client devices. The master device is connected to... Agent: Mh2 Technology Law Group (cust. No. W/red Hat)

20080209279 - Method and system for automatic resolution and dispatching subscription service: Embodiments relate generally to a method of providing a support subscription service. The method includes monitoring at least one a client virtual machine and a respective physical machine supporting the client virtual machine at a site of a customer and detecting an error occurring in at least one of the... Agent: Mh2 Technology Law Group (cust. No. W/red Hat)

20080209280 - Presence aware notification for information technology management: Systems and methods for information technology (IT) management, utilizing presence aware notification, are disclosed. In an implementation, the method includes receiving availability or online status of one or more users at an IT management server. The IT management server queries a monitoring database for one or more alerts. The one... Agent: Lee & Hayes Pllc

20080209281 - Storage device and control device: Data in a storage medium is scanned while a storage device is in an idle state. A proportion of scanned data in entire data in the storage medium is compared with a threshold value. If the proportion of the scanned data is less than the threshold value, an unscanned data... Agent: Greer, Burns & Crain

20080209282 - Method of managing a flash memory and the flash memory: One embodiment of the method includes determining a type of cells in a block of the flash memory if an error is detected in at least a portion of the block, and selectively changing one of a cell type indicator and a bad block indicator associated with the block based... Agent: Harness, Dickey & Pierce, P.L.C

20080209284 - Input/output compression and pin reduction in an integrated circuit: An I/O compression apparatus, for testing a memory array and/or a logic circuit, is comprised of a selectable compression circuit that outputs compressed test data from the memory array/logic circuit. An I/O scan register is coupled to each I/O pad for converting serial data to parallel and parallel data to... Agent: Leffert Jay & Polglaze, P.a. Attn: Kenneth W. Bolvin

20080209283 - Shared latch for memory test/repair and functional operations: A memory device includes a latch component including a first input configured to receive a functional data bit associated with a functional operation, a second input configured to receive a memory test/repair data bit associated with a memory test operation, and a latch comprising a data input and a data... Agent: Larson Newman Abel Polansky & White, LLP

20080209286 - Logic circuitry and recording medium: Logic circuitry has a test point to detect a signal about a delay fault propagating on a logic path between an input terminal and an output terminal, the test point being coupled to the logic path, wherein the test point includes a delay component to delay timing to detect the... Agent: Arent Fox LLP

20080209285 - Method and circuit for measuring operating and leakage current of individual blocks within an array of test circuit blocks: A method and circuits for measuring operating and leakage current of individual blocks within an array of test circuit blocks provides measurement free of error due to leakage currents through non-selected circuit blocks, without requiring an independent test facility for each circuit block. The circuit includes a pair of power... Agent: Ibm Corporation (mh) C/o Mitch Harris, Attorney At Law, L.l.c.

20080209288 - Apparatus for locating a defect in a scan chain while testing digital logic: An apparatus for locating a defect in a scan chain by recording the last bit position in a serial data stream at which a certain data state is observed during a test comprising a plurality of patterns.... Agent: Patentry

20080209287 - Method and apparatus for performing equivalence checking on circuit designs having differing clocking and latching schemes: A method for performing equivalence checking on logic circuit designs is disclosed. Within a composite netlist of an original version and a modified version of a logic circuit design, all level-sensitive sequential elements sensitized by a clock=0 are converted into buffers, and all level-sensitive sequential elements sensitized by a clock=1... Agent: Dillon & Yudell LLP

20080209289 - Partial good integrated circuit and method of testing same: An integrated circuit and method of testing and repairing the integrated circuit. The integrated circuit includes: a multiplicity of macro-circuits having the same function; a fuse bank, the state of the fuses storing test data indicating at least which macro-circuits failed a test; and means for preventing utilization of failing... Agent: Schmeiser, Olsen & Watts

20080209290 - System-on-chip performing multi-phase scan chain and method thereof: A silicon on chip (SOC), may include function blocks, and a scan chain in each of the function blocks, the scan chains being adapted to conduct scan test operations in sync with a respective one of a plurality of clock signals having a different phase relative to each other, wherein... Agent: Lee & Morse, P.c.

20080209291 - Over temperature detection apparatus and method thereof: A device is provided for detecting delays of data due to over-temperature conditions, the device includes a first latch having a data input and a clock input and an output, and a first delay path including combinational logic, a first input coupled to the output of the first latch, and... Agent: Larson Newman Abel Polansky & White, LLP

20080209292 - Circuit for controlling voltage fluctuation in integrated circuit: An integrated circuit and related method for controlling voltage fluctuations. The integrated circuit includes a plurality of clock buffers and a plurality of latches synchronously operated in accordance with operating clock signals distributed via the clock buffers. The circuit comprises a mechanism for performing an At Speed Test to shift... Agent: International Business Machines Corporation

20080209293 - Probing system for integrated circuit devices: A probing system for integrated circuit device, which transmits testing data/signal between an automatic test equipment (ATE) and an integrated circuit device, is disclosed. The probing system includes test head having a first transceiving module. There is a test station having a test unit coupled to the test head to... Agent: Egbert Law Offices

20080209294 - Built-in self testing of a flash memory: p

20080209295 - Apparatus and method for pre-processing on layer 2 in digital broadcasting receiving device: A method of correcting an error in a transport stream (TS), and a digital broadcasting receiving method are provided. The TS is transmitted from a physical layer. It is determined whether a pointer included in the TS has an error. The pointer is corrected if it is determined that the... Agent: F. Chau & Associates, Llc

20080209296 - Clock and data recovery system and method for clock and data recovery based on a forward error correction: The forward error correction based clock and data recovery system includes a data latch for intermediately storing received data, which is triggered by a sampling clock. The system further includes an error determination unit for determining whether which of the sampled received data is wrong, and for generating out of... Agent: Stephen C. Kaufman Ibm Corporation

20080209299 - Apparatus and method for retransmitting request in wireless relay communication system: Data retransmission apparatus and method in a wireless relay communication system are provided. It is checked whether an Acknowledgement (ACK) message or a Negative ACK (NACK) message for data is received from a Relay Station (RS), which receives the data from a Mobile Station (MS). Scheduling information for transmitting the... Agent: The Farrell Law Firm, P.c.

20080209300 - Data transmission method and data transmission apparatus: A data transmission apparatus including a receiving unit for receiving transmitted packets; a priority decision unit; a retransmission packet storage unit; a retransmission instruction receiving unit for receiving a retransmission request from a terminal at the receiving end; a retransmission decision unit; a transmission queue management unit; and a transmission... Agent: Wenderoth, Lind & Ponack L.l.p.

20080209298 - Decoding apparatus and method thereof: In a decoding apparatus in a portable Internet terminal, a channel encoded symbol received from a transmitter is decoded by one of a chase-combining scheme and a code-combining scheme selected based on an ID value of the subpacket indicating a start position of the symbol. In this case, the chase-combining... Agent: Jefferson Ip Law, LLP

20080209297 - Method and apparatus for retransmission management for reliable hybrid arq process: A method for transmitting a packet from a transmitter to a receiver in a wireless communication system begins by building a packet by a transport format combination (TFC) selection process, and the packet is transmitted from the transmitter to the receiver. If the transmitter receives an indication that the packet... Agent: Volpe And Koenig, P.c. Dept. Icc

20080209301 - Apparatus and method for transmitting control message in a wireless communication system using relaying: An apparatus and method for transmitting an ACK/NACK message from an RS in a wireless communication system using relaying is disclosed, in which the RS checks scheduling information for data transmission from a lower node, receives data from the lower node according to the scheduling information, checks errors in the... Agent: The Farrell Law Firm, P.c.

20080209302 - System and method for f-scch and r-odcch performance improvement: A control channel encoder, e.g., in a UMB system, uses a channel structure that can efficiently transmit more information bits, yet achieve sufficient detection and false alarm performance. A control channel encoder can use a fixed encoder packet size, tail-biting convolutional coding, and Cyclical Redundancy Check (CRC). A control channel... Agent: Baker & Mckenzie LLP Patent Department

20080209304 - Convolution-encoded raid with trellis-decode-rebuild: A Redundant Array of Independent Devices uses convolution encoding to provide redundancy of the striped data written to the devices. No parity is utilized in the convolution encoding process. Trellis decoding is used for both reading the data from the RAID and for rebuilding missing encoded data from one or... Agent: Dale F. Regelman Quarles & Brady, LLP

20080209303 - Error detection/correction method: A method for error detection and correction (EDC) includes: generating a complete EDC code in response to a data packet; distributing the complete EDC code among the data packet to create a plurality of bytes, each including a data portion from the data packet and an EDC code portion from... Agent: Bever Hoffman & Harms, LLP 2099 Gateway Place

20080209305 - Viterbi decoding system and viterbi decoding method: A depuncturing unit depunctures a punctured convolutional code sequence and outputs the result to a decoding execution unit. The decoding execution unit executes Viterbi decoding, and it includes an ACS processing unit with a variable radix. A radix control unit controls a radix of the ACS processing unit according to... Agent: Young & Thompson

20080209306 - Error monitoring for serial links: Methods, apparatuses and systems for physical link error data capture and analysis.... Agent: Intel/blakely

20080201600 - Data protection method of storage device: A data protection method of a storage device is provided. In the method, a system management interrupt program orders a hardware control unit to obtain a type and an address message of an error in a block in a first storage device, and stores the type and address message in... Agent: J C Patents, Inc.

20080201601 - Method and apparatus for elimination of faults of a data processing system: A method for fault handling of a data processing unit is disclosed. The method includes automatic acquisition of input information and/or output information of a user at at least one user interface of the data processing unit; automatic detection of a fault message that indicates a fault of the data... Agent: Slater & Matsil, L.L.P.

20080201602 - Method and apparatus for transactional fault tolerance in a client-server system: Method and apparatus for transactional fault tolerance in a client-server system is described. In one example, output data generated by execution of a service on a primary server during a current epoch between a first checkpoint and a second checkpoint is buffered. A copy of an execution context of the... Agent: Raymond R. Moser Jr., Esq. MoserIPLaw Group/symantec Corporation

20080201603 - Correlating hardware devices between local operating system and global management entity: A method and apparatus for correlating the identities of hardware devices, such as processors and memory controllers, between a local operating system and a global management entity is described. When the operating system detects a faulting device, the operating system generates a fault message and transmits the fault message to... Agent: Christensen, O'connor, Johnson, Kindness, PLLC

20080201604 - Kernel error recovery disablement and shared recovery routine footprint areas: A method, computer program product, and data processing system for providing optional failure recovery features in operating system kernel code are disclosed. In accordance with a preferred embodiment, a segment of mainline code may designate a recovery routine for that segment by calling a kernel service provided for that purpose.... Agent: Ibm Corp. (mrn) C/o Law Office Of Michael R. Nichols

20080201605 - Dead man timer detecting method, multiprocessor switching method and processor hot plug support method: A Dead man timer detecting method, a multiprocessor switching method, and a processor hot plug support method are provided. A hot spare boot control register communicated with the Dead man timer is used to detect functions of the Dead man timer, such as enabling, timing, disabling, and responding. After an... Agent: Rabin & Berdo, PC

20080201607 - Disaster recovery in a data processing system: The present invention relates to a method of disaster recovery in data processing systems and to a recovery system. The invention allows for easy, fast and reliable recovery of a data processing system in a disaster situation. Unmodified backup data is stored to a target data processing system, the hardware... Agent: Ibm Corporation

20080201608 - Recovering from abnormal interruption of a parity update operation in a disk array system: Data associated with the state of a parity update operation in a disk array system such as a RAID-6 system is stored during performance of the operation so that, in the event the operation is interrupted, recovery may be initiated using the stored data. The stored data may include a... Agent: Wood, Herron & Evans, L.L.P. (ibm)

20080201606 - Recovery routine masking and barriers to support phased recovery development: A method, computer program product, and data processing system for providing optional exception recovery features in operating system kernel code are disclosed. In a preferred embodiment, a segment of mainline code may designate a recovery routine for that segment by calling a kernel service provided for that purpose. The kernel... Agent: Ibm Corp. (mrn) C/o Law Office Of Michael R. Nichols

20080201609 - Method and system for automatically diagnosing disability of computer peripheral devices: A method and a system for automatically diagnosing disability of computer peripheral devices are provided. In the method, a set of interrupt configuration data relevant to a disabled PCI peripheral device, including relevant setting values of a hardware IRQ routing, is input and compared with a PCI IRQ routing table... Agent: J C Patents, Inc.

20080201610 - Integrated test method on multi-operating system platform: An integrated test method on a multi-operation system (OS) platform for performing an integrated test of a file system and disk performance in a computer with an extended firmware interface (EFI) system environment on multiple OS platforms is provided. The method includes the following steps. Scan sectors of an entire... Agent: Rabin & Berdo, PC

20080201611 - Defect resolution methodology target assessment process: Embodiments of the invention are generally related to computer systems, and more specifically to the analysis of defects in computer software products. Defects uncovered during software testing may be stored in a data structure as data defects, code defects, or environment defects, along with further data describing a particular nature... Agent: Ibm Corporation, Intellectual Property Law Dept 917, Bldg. 006-1

20080201612 - Defect resolution methodology and data defects quality/risk metric model extension: Methods, systems, and articles of manufacture for analyzing defects associated with a software development project. Descriptions of defects identified during the testing of a software product may be stored in a data structure. One or more of the defects may be identified as data defects. If data defects are determined... Agent: Ibm Corporation, Intellectual Property Law Dept 917, Bldg. 006-1

20080201613 - Methods and systems for first occurence debugging: An embodiment relates generally to an apparatus for debugging. The apparatus includes a memory configured to store data and an arithmetic logic unit configured to perform logical and arithmetic operations. The apparatus also includes a control unit configured to interface with the memory and arithmetic logic unit and to decode... Agent: Mh2 Technology Law Group (cust. No. W/red Hat)

20080201614 - Peripheral component interconnect bus test system and method therefor: A peripheral component interconnect (PCI) bus test system and method therefor, that is applied in a PCI test card. The PCI test card includes a static random-access-memory (SRAM). In the method, the data transaction of the PCI bus signal is disintegrated into a separate data operation, while eliminating the waveform... Agent: Rabin & Berdo, PC

20080201615 - Apparatus and computer program product for implementing atomic data tracing: A method, apparatus and computer program product are provided for implementing atomic data tracing in a processor system including an auxiliary processor unit (APU) coupled to a central processor unit (CPU). The auxiliary processor unit (APU) processes a trace instruction. When a trace instruction is identified by the APU, the... Agent: Ibm Corporation RochesterIPLaw Dept 917

20080201617 - Network device and network system: A network device and a network system are disclosed. The network device (100) includes a storage (120), a transmitter (122a), a receiver (122a) and a controller (122b). The storage has stored therein the information (124) of the file store region linked to the function executed by the device. The transmitter... Agent: Mcdermott Will & Emery LLP

20080201616 - Redundant storage controller system with enhanced failure analysis capability: A redundant storage controller system that robustly provides failure analysis information (FAI) to an operator of the system is disclosed. The system includes first and second storage controllers in communication with one another, such as via a PCI-Express link. When one of the controllers fails, the FAI is transferred from... Agent: Huffman Law Group, P.C.

20080201618 - Method for running a computer program on a computer system: Errors which may be detected by an error detection unit may occur during execution of a computer program which runs on a computer system and includes at least one run-time object. In order to handle a detected error particularly flexibly and to keep the computer system available as much as... Agent: Kenyon & Kenyon LLP

20080201619 - Error correcting device, error correcting method and disk system: There is provided an error correcting device, including: a demodulation circuit that reads data from an optical disk and demodulates the data to generate demodulated data; a PI syndrome generation circuit that generates a PI syndrome of the demodulated data and outputs the PI syndrome to an external memory; a... Agent: Arent Fox LLP

20080201620 - Method and system for uncorrectable error detection: A system, method and program product for utilizing error correction code (ECC) logic to detect multi-bit errors. In one embodiment, a first test pattern and a second test pattern are applied to a set of hardware bit positions. The first and second patterns are multiple logic level patterns and the... Agent: Dillon & Yudell LLP

20080201622 - Non-volatile memory device manufacturing process testing systems and methods thereof: Systems and methods of manufacturing and testing non-volatile memory (NVM) devices are described. According to one exemplary embodiment, a function test during manufacturing of the NVM modules is conducted with a system comprises a computer and a NVM tester coupling to the computer via an external bus. The NVM tester... Agent: Roger H. Chu

20080201621 - Test apparatus: It is an object of the test apparatus according to the present invention to effectively manage test results. The test apparatus includes a test section that executes testing of each cell of the memory under test; a fail information storage section that stores in a fail memory fail information corresponding... Agent: Jianq Chyun Intellectual Property Office

20080201623 - Embedded architecture with serial interface for testing flash memories: A flash memory device includes a flash memory array, a set of non-volatile redundancy registers, a serial interface, and testing logic coupled to the serial interface, the testing logic configured to accept a set of serial commands from an external tester; erase the array; program the array with a test... Agent: Schwegman, Lundberg & Woessner / Atmel

20080201624 - Sequential semiconductor device tester: A sequential semiconductor device tester, and in particular to a sequential semiconductor device tester is disclosed. In accordance with the sequential semiconductor device tester, a function of generating a test pattern data for a test of a semiconductor device and a function of carrying out the test are separated to... Agent: The Nath Law Group

20080201625 - Error correction system and method: A method includes receiving payload data from a data source at error correction code (ECC) logic, where the ECC logic is adapted to process a block of data of a particular size via a plurality of stages. The ECC logic is initialized to a selected stage of the plurality of... Agent: Toler Law Group

20080201626 - Power savings for memory with error correction mode: The present invention includes a memory device with a data memory and an error correction code control circuit. The data memory stores data parity information for error correction. The error correction code control circuit is configured to receive a selection signal indicative of whether an error correction mode is to... Agent: Dicke, Billig & Czaja

20080201627 - Communication device, communication method, and computer program: A communication device configured to perform packet reception processing, with the header of a packet including a header sequence and a Reed-Solomon code, includes: a header check sequence inspecting unit configured to detect, based on the header check sequence included in a received packet header, an error of the header;... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20080201628 - Apparatus and method for determining a detected punctured position in punctured convolutional codes: An apparatus for generating a detected punctured position in punctured convolutional codes. A delay line circuit has a plurality of delay elements connected in series, storing a finite sequence of an input bit stream. A logic gate circuit, coupled to outputs of a part of the delay elements of the... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20080201629 - Method and system for detecting synchronization errors in programs: A method and system for error detection in programs with collective synchronization and/or procedures are provided. In one aspect, the method and system may use interprocedural analysis for matching synchronizations in a program in order to detect synchronization errors, and, if no such errors exist, may determine the synchronization phases... Agent: Scully, Scott, Murphy & Presser, P.C.

20080201630 - Storage controlling device and storage controlling method: According to an aspect of an embodiment, a method of storing user data (UD) with parity data (PD) for correcting the UD in a storage apparatus comprising disk units, each of the disk units storing data in data blocks(DBs), each of the DBs storing the UD or associated PD and... Agent: Staas & Halsey LLP

20080201631 - Method for error correction coding comprising local error detection codes, corresponding decoding method, transmitting, receiving and storage device and program: The disclosure relates to a coding method for associating redundant and source data and for carrying out a plurality of local codes associating at least one input status word and at least one output status word according to at least one label word and permutations applicable on at least certain... Agent: Westman Champlin & Kelly, P.A.

20080195886 - Disk controller and method thereof: A disk controller and method thereof having a configuration where when a disk apparatus fails, information on the failed disk apparatus is prevented from unauthorized access including a read operation. The disk controller in a disk system connected with a plurality of disk apparatuses includes a control information storage area... Agent: Staas & Halsey LLP

20080195887 - Dram cache with on-demand reload: Embodiments include a DRAM cache structure, associated circuits and method of operations suitable for use with high-speed caches. The DRAM caches do not require regular refresh of its data and hence the refresh blank-out period and refresh power are eliminated, thus improving cache availability and reducing power compared to conventional... Agent: Cantor Colburn LLP-ibm Yorktown

20080195888 - Repair of memory hard failures during normal operation, using ecc and a hard fail identifier circuit: A memory sub-system and a method for operating the same. The memory sub-system includes (a) a main memory, (b) an ECC circuit, (c) a hard fail identifier circuit, (d) a repair circuit, (e) a redundant memory, and (f) a threshold setting circuit. The ECC circuit is capable of (i) detecting... Agent: Schmeiser, Olsen & Watts

20080195890 - Data protection system: The present invention provides systems and methods for logically organizing data for storage and on a data storage medium using a multi-level format. The present invention also provides systems and for protecting data stored on data storage medium so that the data may be recovered without errors.... Agent: Jagtiani + Guttag

20080195889 - Method for controlling memory access: A cyclic redundancy check (CRC) is used for improving error check coverage during memory access. In memory reading process, a part of read data is outputted from the memory via a CRC bus, and a CRC result and the other part of the read data are outputted from the memory... Agent: Jianq Chyun Intellectual Property Office

20080195891 - Computer-implemented methods, systems, and computer program products for autonomic recovery of messages: Computer-implemented methods, systems, and computer program products for autonomic recovery of messages are provided. A computer-implemented method includes creating a temporary file for a communication session. The temporary file identifies a communication partner to the communication session and a start time of the communication session. The computer-implemented method also includes... Agent: Cantor Colburn LLP-ibm Yorktown

20080195892 - Template based parallel checkpointing in a massively parallel computer system: A method and apparatus for a template based parallel checkpoint save for a massively parallel super computer system using a parallel variation of the rsync protocol, and network broadcast. In preferred embodiments, the checkpoint data for each node is compared to a template checkpoint file that resides in the storage... Agent: Martin & Associates, Llc

20080195893 - A repairable semiconductor memory device and method of repairing the same: A repairable semiconductor memory device including a memory cell array having a first block to store first system data and a second block to store second system data identical to the first system data. A controller transmits the first system data to a memory unit in response to a reset... Agent: Volentine & Whitt Pllc

20080195894 - Memory array error correction apparatus, systems, and methods: Various embodiments include apparatus, methods, and systems that operate to extend the processes of reading, modifying, and writing data stored in or being provided to a memory array without interrupting a continual stream of data to be written into the memory array. Embodiments may include an apparatus comprising a memory... Agent: Schwegman, Lundberg & Woessner, P.a.

20080195895 - Method and management system for configuring an information system: According to the method for configuring an information system (1), components (2) are provided for the information system (1) and component-specific error susceptibility data (3) on the individual components (2). For a given system configuration (5), error susceptibility information (7) is determined for the information system (1) in this given... Agent: Slater & Matsil, L.l.p.

20080195896 - Apparratus and method for universal programmable error detection and real time error detection: The present invention relates to a method for the real-time detection and prevention or correction of errors within an IC environment. The method comprises the steps of determining an event, or a sequence of events set, wherein these event set serve as triggers for a defect event within an IC,... Agent: Cantor Colburn LLP - Ibm Tuscon Division

20080195897 - Methods, systems, and computer-readable media for assisting in troubleshooting: Methods, systems, and computer-readable media for troubleshooting a problem associated with a communication system are provided. First information regarding the communication system is retrieved, and a determination is made whether the first information indicates a probable cause of the problem associated with the communication system. If the first information does... Agent: Hope Baldauff Hartman, Llc

20080195898 - Message- passing and forced convergence decoding method: The invention relates to an iterative decoding method of the message-passing type for decoding an error correcting code susceptible of representation by a bipartite graph including a plurality of variable nodes and a plurality of control nodes, said messages being expressed in terms of a log likelihood ratio. At each... Agent: Thelen Reid Brown Raysman & Steiner LLP

20080195899 - Apparatus and method for deciding adaptive target packet error rate in wireless communication system: An apparatus and method for deciding a target Packet Error Rate (PER) in a wireless communication system are provided. The method includes setting a target PER, comparing a variance of the target PER (Δp(k)) with a previous target PER variance (Δp(k−1)), and updating a next target PER variance (Δp(k+1)) using... Agent: Docket Clerk

20080195900 - Flash memory system and method for controlling the same: A flash memory system comprises a group of pages each consisting of a plurality of memory zones with various sizes; a read/write controller for controlling reading or writing of data from or to one of the pages; an error correction unit including at least two ECC (Error Correction Code) engines... Agent: Bacon & Thomas, Pllc

20080195901 - Op-code based built-in-self-test: A built-in-self-test (BIST) system for testing a memory that includes a scheduler module that generates a first test algorithm based on a set of operational codes. Each operational code defines a test operation to be performed by the first test algorithm on the memory. The BIST system also includes an... Agent: Brinks Hofer Gilson & Lione/marvell

20080195902 - Method, apparatus and program product to concurrently detect, repair, verify and isolate memory failures: Method and system for repairing memory failure in a computer system in one aspect determines one or more test patterns and time duration for testing the new memory unit that replaced a failed memory unit. The test pattern is written to the new memory unit and read from the new... Agent: Scully, Scott, Murphy & Presser, P.c.

20080195903 - Non-volatile memory device with built-in test control unit and methods of testing and repairing a cell array: A memory device including a cell array is disclosed. One embodiment includes a plurality of memory cells, wherein each memory cell is capable of showing at least two distinguishable states, a programmable read voltage source adapted to supply an alterable read voltage and a test control unit. The test control... Agent: Dicke, Billig & Czaja

20080195904 - Test point insertion and scan chain reordering for broadcast-scan based compression: A method for increasing fault coverage and compression with a broadcast scan-based test data compression circuit includes inserting test points for breaking correlations existing between scan inputs that belong to same scan slices making some faults un-testable with a broadcast scan-based test data compression circuit; and reordering scan inputs for... Agent: Nec Laboratories America, Inc.

20080195905 - Method and apparatus for shutting off data capture across asynchronous clock domains during at-speed testing: A method for testing logic devices configured across asynchronous clock domains includes deactivating, during at-speed fault testing, a local clock signal for each of a first plurality of latches having at least one data input thereto originating from a source located within an asynchronous clock domain with respect thereto. The... Agent: Cantor Colburn LLP-ibm Burlington

20080195906 - Test pattern generation apparatus and test pattern generation method: A test pattern generation apparatus extracts processing that coincides with input combinational test confirmation processing from program test patterns stored in a file, extracts execution conditions of the extracted processing from program test pattern lists, rearranges the execution conditions, generates one test pattern, extracts data handling processing that satisfies conditions... Agent: Mattingly, Stanger, Malur & Brundidge, P.c.

20080195907 - Circuit arrangement and method of testing an application circuit provided in said circuit arrangement: The object being to develop an integrated circuit arrangement (100) with at least one application circuit (40) to be tested, and with at least one self-test circuit (10, 20, 32, 34, 36, 50) provided for testing the application circuit (40) and generating at least one pseudo-random test sample, wherein said... Agent: Nxp, B.v. Nxp Intellectual Property Department

20080195908 - Method and apparatus for generating expect data from a captured bit pattern, and memory device using same: Expect data signals are generated for a series of applied data signals having a known sequence to determine if groups of these applied data signals have been properly captured. A first group of the applied data signals is captured, and a group of expect data signals are generated from the... Agent: Jennifer M. Lane, Esq. Dorsey & Whitney LLP

20080195909 - Data error measuring circuit for semiconductor memory apparatus: A data error measuring circuit for a semiconductor memory apparatus includes a data error correction unit that compares data with parity data to correct data, a data selection unit that outputs the data or the corrected data as selected data in response to a test selection signal, and a test... Agent: Baker & Mckenzie LLP Patent Department

20080195910 - Method and apparatus to update parameter of error frame: In a method and apparatus to conceal an error in an audio signal, when the current frame has no error and a past frame input prior to the current frame has an error, a parameter for the past frame is generated using a parameter for the current frame and a... Agent: Stanzione & Kim, LLP

20080195911 - Automatic repeat request (arq) reset method: An Automatic Repeat-reQuest (ARQ) Reset method for an ARQ transmitter disables (120) transmission, starts (130) an ARQ transmitter window at a first unacknowledged block, and discards (140) service data units (SDUs) in the ARQ transmitter window having zero blocks in a ‘not-sent’ state. Thus, for all SDUs having no blocks... Agent: Motorola Inc

20080195913 - Decoder for low-density parity-check convolutional codes: Decoder for low-density parity check convolutional codes. In at least some embodiments, a decoder (200) for arbitrary length blocks of low-density, parity-check codes includes a plurality of interconnected processors (202), which further include a plurality of interconnected nodes. A memory can be interconnected with the nodes to store intermediate log... Agent: Moore & Van Allen Pllc

20080195912 - Method of communicatoin: A sending node comprising a processor configured to generate an error checking message, said error checking message being generated from data, said error checking message providing order information; and a transmitter configured to transmit said error checking message and said data.... Agent: Foley & Lardner LLP

20080195914 - Memory system and command handling method: A memory system including a memory controller and a memory and a related method are disclosed. The method includes communicating a command and error detection/correction (EDC) data associated with the command from the memory controller to the memory, decoding the command and executing an EDC operation related to the EDC... Agent: Volentine & Whitt Pllc

20080195915 - Apparatus for pipelined cyclic redundancy check circuit with multiple intermediate outputs: A CRC redundancy calculation circuit is presented which is pipelined to run at high frequencies and configured to operate on an arbitrary multiple of the base granularity of the data packet. Additionally, the CRC redundancy calculation circuit provides the same multiple of outputs that provide intermediary output remainder values. Thus,... Agent: Scully, Scott, Murphy & Presser, P.c.

20080195916 - Method and apparatus of correcting error data caused by charge loss within non-volatile memory device: Example embodiments provide a method and apparatus of correcting error data due to charge loss within a non-volatile memory device including a plurality of memory cells. The method of correcting error data within the non-volatile memory devices may include detecting error data in a second data group by comparing a... Agent: Harness, Dickey & Pierce, P.L.C

20080195917 - Method and apparatus for low complexity soft output decoding for quasi-static mimo channels: A method and apparatus for soft output decoding of multi-input multi-output (MIMO) channels in order to improve throughput performance is provided. In particular, a low-cost alternative to exhaustive brute-force maximum-likelihood search by using a variant of list decoding that exploits pre-coder linearity to reduce the computational complexity in generating a... Agent: Volpe And Koenig, P.c. Dept. Icc

20080195918 - Preferential transmission of non-coded data over forward error correction code data for efficient power management of a remote device: In one embodiment of the invention, a forward error correction system comprises a client device having a FEC encoder module generating FEC encoded data based on input data and a selector module forwarding either the input data or the FEC encoded data as transmission data. The system further comprises a... Agent: Murabito, Hao & Barnes, LLP

20080195919 - Semiconductor memory device for byte-based masking operation and method of generating parity data: A semiconductor memory device includes a memory cell array and an error correction code (ECC) engine. The memory cell array stores bits of normal data and parity data therein. The ECC engine performs a masking operation in a masking mode, the ECC engine calculating the parity data using the normal... Agent: F. Chau & Associates, Llc

20080195920 - Self-test structure and method of testing a digital interface: A digital interface (22) includes a self-test structure (56). The structure (56) includes a transmit section (52) and a receive section (36) having a correlator (68). A method (114) of testing the interface (22) entails coupling the receive section (36) with the transmit section (52) and communicating a test data... Agent: Meschkow & Gresham, P.L.C

20080195921 - Method and apparatus for encoding and precoding digital data within modulation code constraints: Embodiments of the invention include a method and apparatus for encoding data and a system for transmitting and/or storing data, in which the data is encoded and precoded in a manner that does not violate previously established data constraints, such as modulation encoding constraints. The method includes the steps of... Agent: Smith Frohwein Tempel Greenlee Blaha Llc

20080195922 - Memory system and command handling method: A memory system including a memory controller and a memory and a related method are disclosed. The method includes communicating a command and error detection/correction (EDC) data associated with the command from the memory controller to the memory, decoding the command and executing an EDC operation related to the EDC... Agent: Volentine & Whitt Pllc

20080195923 - System and method for digital signal transmission with reduced error rate: A signal processing system is provided with a transmitting-side apparatus transmitting a digital signal, and a receiving-side apparatus receiving the digital signal. The transmitting-side apparatus includes a digital signal transmitter transmitting the digital signal and a signal controller controlling the digital signal. The receiving-side apparatus includes a digital signal receiver... Agent: Sughrue Mion, Pllc

20080189570 - I/o device fault processing method for use in virtual computer system: An input/output (I/O) device fault processing method for executing, without contradiction, fault recovery processing of a physical I/O device which is commonly used or shared by a plurality of virtual computers in such a way that no influence is exerted on a virtual computer which does not presently use the... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20080189571 - Method and apparatus for managing defective area on recording medium, and recording medium using the same: A method and apparatus for managing a defective area of a recording medium, are discussed. According to an embodiment, the method includes identifying a finalization state by searching identification information indicating whether or not the recording medium is finalized; searching a location of defect list information recorded in a management... Agent: Birch Stewart Kolasch & Birch

20080189572 - Application transparent autonomic availability on a storage area network aware file system: Techniques are provided for locating data. Mapping information for blocks associated with a file is provided. It is determined that a copy service has copied source blocks to target blocks. It is determined whether the mapping information should be updated to refer to the target blocks. Then, updated mapping information... Agent: Konrad Raynes & Victor, LLP. Attn: Ibm37

20080189573 - Fault recovery on a massively parallel computer system to handle node failures without ending an executing job: A method and apparatus for fault recovery of on a parallel computer system from a soft failure without ending an executing job on a partition of nodes. In preferred embodiments a failed hardware recovery mechanism on a service node uses a heartbeat monitor to determine when a node failure occurs.... Agent: Martin & Associates, LLC

20080189574 - Data processing apparatus and recording medium: A data processing apparatus includes a data reading unit that reads data from a non-contact tag, and a restoration unit that restores a file when the data reading unit reads, from the non-contact tag, (i) location information indicating a storage location where the file is previously stored and (ii) at... Agent: Banner & Witcoff, Ltd. Attorneys For Client Nos. 0166889, 006760

20080189575 - Methods and apparatus for data analysis: A method and apparatus for data analysis according to various aspects of the present invention is configured to automatically identify a characteristic of a component fabrication process guided by characteristics of the test data for the components.... Agent: Noblitt & Gilmore, LLC.

20080189576 - Device, method and computer program product for responding to error events: A method, system and computer program product for responding to error events are provided. The method includes: detecting a detected error event while executing a computer readable program; looking for a predefined response to the detected error event in a modifiable error event response data structure; validating the modifiable error... Agent: Stephen C. Kaufman IBM Corporation

20080189577 - Isolation of input/output adapter error domains: Method, apparatus and system for isolating input/output adapter error domains in a data processing system. Errors occurring in one input/output adapter are isolated from other input/output adapters of the data processing system by functionality in a host bridge that connects the input/output adapters to a system bus of the data... Agent: Ibm Corp (ya) C/o Yee & Associates PC

20080189578 - Disk failure prevention and error correction: The subject disclosure pertains to systems and methods that facilitate prevention of hard disk drive failure. Sophisticated drives are likely to be capable of detecting many of the conditions that either cause or precede hard disk drive failure. Such information can be provided to a host operating system, analyzed and... Agent: Amin. Turocy & Calvin, LLP

20080189579 - Method and system for a process monitor using a hardware communication format: A method and system for a process monitor using a hardware communication format is described. The system includes a process monitor and a hardware device to send and/or receive messages in a hardware communication format to a management server. Hardware communication formatted messages are sent to a management server when... Agent: Blakely Sokoloff Taylor & Zafman

20080189580 - Automated testing device and method of data broadcasting receivers based on test scenario: Disclosed are a method and an apparatus for automatically testing a data broadcast receiver, so that a sub-system can be constructed with an independent module and a distributed processing can be easy to achieve, in which both an interface between sub-systems and an interface between a test manager and a... Agent: Lahive & Cockfield, LLP

20080189581 - Testing hardware components to detect hardware failures: A system for testing hardware components includes a test pattern injector and a test pattern detector coupled to verification paths that pass through hardware components. The test pattern injector generates unique test patterns. A test pattern tests hardware features of the hardware components of a corresponding verification path. The test... Agent: Baker Botts LLP

20080189582 - Analysis techniques for multi-level memory: A system and method for defect analysis of multi-level memory cell devices and embedded multi-level memory in system-on-chip integrated circuits are disclosed wherein a defect data set is input into the system. When a defect data set is received, an automated test engineering system running a memory test program analyzes... Agent: William C. Milks, Iii Russo & Hale LLP

20080189583 - Apparatus, and computer program product for implementing deterministic based broken scan chain diagnostics: A method, apparatus and computer program product are provided for implementing deterministic based broken scan chain diagnostics. A deterministic test pattern is generated and is loaded into each scan chain in the device under test using lateral insertion via system data ports applying system clocks. Then each scan chain is... Agent: Ibm Corporation RochesterIPLaw Dept 917

20080189584 - System and apparatus for improving logical built-in self test (lbist) ac fault isolations: A system, apparatus and method of isolating a plurality of limiting logical cones in a chip during a logical built-in self test (LBIST) are provided. An LBIST is performed on the chip in order to locate a first latch that fails the test. Particularly, latches on the chip are arranged... Agent: Ibm Corporation (ve) C/o Volel Emile

20080189585 - Semiconductor testing system: There is provided a semiconductor testing system capable of achieving a higher speed in transmission of signals while holding back an increase in the number of transmission paths, and preventing occurrence of a delay time difference between the respective transmission paths. Processing is executed in the semiconductor testing system whereby... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20080189586 - Data communications system and data communications method: A data communications system comprising a plurality of processing devices 100 connected to a serial bus 101 via a serial bus interface 103. The processing device 100 provides a communication control line 102 which connects each processing device in order and performs the transfer of transmission right of the serial... Agent: Antonelli, Terry, Stout & Kraus, LLP

20080189587 - Video transmitting apparatus, video receiving apparatus, and video transmission system: A video transmitting apparatus includes a providing unit configured to provide retransmission request information including information for retransmitting video information to be transmitted to a video receiving apparatus, a control unit configured to perform connection control for communication with the video receiving apparatus, a transmitting unit configured to transmit the... Agent: Canon U.s.a. Inc. Intellectual Property Division

20080189588 - Bit error prevention method and information processing apparatus: Whether the comparison value of temporarily stored data which is read out from a flash memory by a host system exceeds a threshold value related to a bit error or not is checked, and if the comparison value exceeds the threshold value, the temporarily stored data which is read out... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080189589 - Apparatus and method for receiving signal in a communication system: Provided are an apparatus and method for receiving a signal in a communication system, in which a signal is received and decoded by setting an offset indicating a start position of a node operation for each block column of a parity check matrix of a Low Density Parity Check (LDPC)... Agent: The Farrell Law Firm, P.C.

20080189590 - Magnetic disc controller and method: A magnetic disk controller includes an error check code generating unit that generates error check codes associated with the encoded pieces of writing data; a first buffer that stores a first encoded piece of writing data and a first error check code associated with the first encoded piece; a second... Agent: Fish & Richardson P.C.