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USPTO Class 714 | Browse by Industry: Previous - Next | All 07/2008 | Recent | 09: Oct | Sept | Aug | Jul | Jun | May | Apr | Mar | Feb | Jan | | 08: Dec | Nov | Oct | Sp | Aug | Jul | Jun | May | Apr | Mar | Feb | Jan | | 07: Dec | Nov | Oct | Sep | Aug | Jul | Jun | May | Apr | Mar | Feb | Jan | | 06: Dec | Nov | Oct | Sep | Aug | Jul | Jun | May | Apr | Error detection/correction and fault detection/recovery inventions 07/08Recently published patent applications awaiting approval from the USPTO. Recent week's RSS XML file available below.Listing format for abstract view: USPTO application #, Title, Abstract excerpt,Patent Agent. Listing format for list view: USPTO National Class full category number, title of the patent application. 07/31/2008 > patent applications in patent subcategories. 20080184057 - Methods and apparatus for employing redundant arrays to configure non-volatile memory: Systems, methods and apparatus are disclosed for employing redundant arrays to configure non-volatile memory. The present invention may include a substrate including a plurality of memory arrays, wherein the memory arrays include a data array and at least three redundant configuration arrays. The configuration arrays may each be adapted to... Agent: Dugan & Dugan, PC 20080184058 - Analysis of event information to perform contextual audit: Analysis of audit information that takes into account a wide context allows for a rich picture from which system conditions may be assessed. Event information about various events that have occurred or are occurring, on various sources in the computing arrangement, is maintained. Each entity has an “activity identifier”, which... Agent: Woodcock Washburn LLP (microsoft Corporation) 20080184059 - Dual redundant server system for transmitting packets via linking line and method thereof: The present invention discloses a dual redundant server system for transmitting packets via a linking line. The server system includes a primary server and a standby server, and the linking line is installed between the primary server and the standby server and the primary server continuously produces a heartbeat packet.... Agent: Bacon & Thomas, PLLC 20080184060 - Facilitating recovery in a coordinated timing network: Recovery is provided in a timing network. A configuration is defined for that network, and in that configuration, an active primary server is identified that provides a clock source for the network. Additionally, an alternate server is identified that can perform the role of the active primary server, should the... Agent: Heslin Rothenberg Farley & Mesiti P.C. 20080184061 - Managing a node cluster: A system for managing a cluster of nodes, the cluster comprising a plurality of groups of nodes, each node being associated with a vote, the system further comprising an arbitration device, the arbitration device being associated with a number of votes dependent on the number of nodes in the cluster,... Agent: Hewlett Packard Company 20080184062 - System and method for detecting write errors in a storage device: A system for detecting write errors in a storage device is disclosed. The system comprises a storage device; within the storage device, means for storing one or more data blocks in a storage group, the storage group comprising the one or more data blocks and a check block, wherein the... Agent: Dillon & Yudell LLP 20080184064 - Method and apparatus for high efficiency redundancy scheme for multi-segment sram: The disclosure generally relates to a method and apparatus for a high efficiency redundancy scheme for a memory system. In one embodiment, the disclosure relates to a memory circuit having: a memory array defined by a plurality of memory cells arranged in one or more columns and one or more... Agent: Duane Morris LLP 20080184065 - Methods and apparatus for employing redundant arrays to configure non-volatile memory: Systems, methods and apparatus are disclosed for employing redundant arrays to configure non-volatile memory. The present invention may include a substrate including a plurality of memory arrays, wherein the memory arrays include a data array and at least three redundant configuration arrays. The configuration arrays may each be adapted to... Agent: Dugan & Dugan, PC 20080184067 - Raid system and data recovery apparatus using galois field: Disclosed is an apparatus for recovering data in the case of single or double failures of N partial data blocks generated by dividing the data where N is a natural number greater than 1. The apparatus recovers the data on the basis of a Galois field product computation table including... Agent: Greer, Burns & Crain 20080184066 - Redundant system: A redundant system comprising at least two hosts is provided. The redundant system randomly selects one active host under normal operating conditions, and sets the other hosts on stand-by. The active host controls the other hosts and peripheral devices connecting thereto through buses.... Agent: Patterson, Thuente, Skaar & Christensen, P.A. 20080184063 - System and method of error recovery for backup applications: A system and method of error recovery for backup applications that utilizes error recovery logic provided in the storage controller itself are provided. With the system and method, error recovery logic is provided in the storage controller for generating and maintaining error recovery logs for one or more backup operations... Agent: Ibm Corp. (wip) C/o Walder Intellectual Property Law, P.C. 20080184069 - Image forming apparatus, method of controlling image forming apparatus, program, and storage medium: An image forming apparatus includes a process execution unit which processes data input to a storage area by using the attribute of a process set in the storage area, an error event generation unit which generates an error event to execute an error process when an error is detected during... Agent: Fitzpatrick Cella Harper & Scinto 20080184068 - Management device and management method: A management device stores configuration history information indicating a history of system configuration changes, from this information, specifies a system configuration of a recovery time, which is a certain point in time in the past, specifies a system configuration of the current time, and compares the system configuration of the... Agent: Mattingly, Stanger, Malur & Brundidge, P.C. 20080184070 - Raid capacity expansion interruption recovery handling method and system: A RAID capacity expansion interruption recovery handling method and system is proposed, which is designed for use with a RAID (Redundant Array of Independent Disks) unit for providing a capacity-expansion interruption recovery function that allows the RAID unit to recover after an event of an unexpected interruption to a capacity-expansion... Agent: Edwards Angell Palmer & Dodge LLP 20080184071 - Cyclic redundant multiple computer architecture: A multiple computer system incorporating redundancy is disclosed. Data to be stored (A, B, C) is distributed (A1, A2, A3, . . . B1, B2, B3, . . . C1, C2, C3, . . . ) amongst a multiplicity of computers (M1, M2, . . . Mn). A parity form... Agent: Perkins Coie LLP 20080184072 - Firmware rom patch method: A system in which firmware residing in ROM may be upgraded without re-spinning silicon. A one-bit flag may be assigned for each patchable function representing a firmware upgrade. The first statement of each function may check its associated flag and determine if patch-code should be executed in place of the... Agent: Meyertons, Hood, Kivlin, Kowert & Goetzel, P.C. 20080184073 - Power on self test method: A power on self test (POST) method is provided. The method is a hardware detecting program applicable for a BIOS of a computer, which requires loading a detecting firmware. The method includes steps (a) running a POST program; (b) testing a hardware device by a first sequence of detecting firmware... Agent: Rabin & Berdo, PC 20080184074 - Diagnostic operations within a switched fibre channel arbitrated loop system: Provided are a method, system, and article of manufacture wherein at least a first zone is maintained in a fibre channel arbitrated loop system, and wherein a plurality of storage devices is included in the first zone. A determination is made that diagnostic operations have to be performed on a... Agent: Konrad Raynes & Victor, LLP. Attn: Ibm37 20080184075 - Break and optional hold on failure: Break and optional hold preserves a state of a computing environment on which a software program has failed. Being able to examine the status of the environment existing upon the occurrence of the failure, including the condition of various processes and values facilitates resolution of the cause of the failure.... Agent: Merchant & Gould (microsoft) 20080184076 - Data processing apparatus, control method thereof, and image processing apparatus: A image data processing apparatus comprises: a user interface; an input device; a processor that converts original data; a first monitoring unit that monitors operation of the user interface or the input device; a second monitoring unit that monitors processing of the processor; a first storage unit that sequentially stores... Agent: Oliff & Berridge, PLC 20080184078 - Manipulating a configuration file for a network switch: A method of manipulating a configuration file for a network switch is described. The method comprises generating a difference list based on a comparison of an existing configuration file and a new configuration file for a network switch. The method further comprises executing commands from the generated difference list to... Agent: Hewlett Packard Company 20080184077 - Method and system for handling input/output (i/o) errors: A method and system for handling errors on an Input/Output (I/O) link of a system is provided. The link is being shared by a plurality of devices of the system; each device may be shared by one or more operating systems. The method of error handling during configure of the... Agent: Hewlett Packard Company 20080184079 - Tracking down elusive intermittent failures: Computing environments, each executing at least one software program, are monitored for failures occurring during execution of the software program. Information associated with the failure, such as an identification of the software program and a failure type describing the failure, is recorded. The failure information is quantified to report the... Agent: Merchant & Gould (microsoft) 20080184080 - Data relay device, storage device and data-relay method: In a data relay device, it is judged whether a destination address of data received from an adapter matches with an address specified for an interruption process. Only data that is judged appropriate is sent to a controller.... Agent: Staas & Halsey LLP 20080184081 - Data communication apparatus, method, and program: A data communication apparatus determines whether the error type is a burst error or not based on an error occurrence state of the data received from a data transmitting apparatus and transmits error type-basis error information. The data communication apparatus receives the error type-basis error information and sets the redundancy... Agent: Nec Corporation Of America 20080184082 - Nonvolatile semiconductor memory and method of access evaluation to the same: A nonvolatile memory includes a memory cell array having a plurality of memory cells, a read-out circuit outputting data stored in the memory cell array asynchronously in response to an input address signal, a selection circuit outputting an selection signal for selecting a location of the memory cell to be... Agent: Junichi Mimura Oki America Inc. 20080184083 - Circuit and method for physical defect detection of an integrated circuit: A semiconductor integrated circuit device having a physical damage testing capability and a method for testing for physical damage caused during fabrication, assembly or test of the semiconductor integrated circuit are provided. A dedicated conductive test path is formed during fabrication of the integrated circuit device. The test path is... Agent: Edell, Shapiro & Finnan, LLC 20080184084 - Check matrix generating apparatus and communication apparatus: A check matrix generating apparatus calculates a parameter for pseudo-random-number permutation matrices using a predetermined information length, a coding rate, and a maximum column degree, generates the pseudo-random-number permutation matrices from the calculated parameter for the pseudo-random-number permutation matrices by using a pseudo-random-number sequence and a Latin square matrix, determines,... Agent: Birch Stewart Kolasch & Birch 20080184085 - Semiconductor ic including pad for wafer test and method of testing wafer including semiconductor ic: Provided are a semiconductor integrated circuit (IC) including a pad for a wafer test and a method of testing a wafer including a semiconductor IC. The semiconductor IC includes a first address generator, a second address generator, and an address output unit. The first address generator generates a normal address... Agent: Marger Johnson & Mccollom, P.C. 20080184086 - Semiconductor memory system performing data error correction using flag cell array of buffer memory: A buffer memory includes a memory cell array, a flag cell array, and a error correction block. The memory cell array has a plurality of word lines. Each of the plurality of word lines are electrically connected to a plurality of memory cells storing data. The flag cell array has... Agent: F. Chau & Associates, LLC 20080184087 - Transmitting device, receiving device, packet transmission method, packet reception method, and programs for same: A network interface unit of a server determines whether the transmission method of transmitting a packet is multicast transmission or unicast transmission; adds to the packet a second FEC when the transmission method of the packets is determined to be multicast transmission and adds to the packet an error detection... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP 20080184088 - System and method for encoding and decoding in wireless communication systems: A control channel encoder, e.g., in a UMB system, uses a channel structure that can efficiently transmit more information bits, yet achieve sufficient detection and false alarm performance. A control channel encoder can use a fixed encoder packet size, tail-biting convolutional coding, and Cyclical Redundancy Check (CRC). A control channel... Agent: Baker & Mckenzie LLP Patent Department 20080184089 - Error correction in codeword pair headers in a data storage tape format: Error correction coding is provided for codeword headers in a data tape format, such as a Linear Tape-Open, Generation 4 (LTO-4) data tape format. The data tape format defines a codeword quad as having first and second codeword headers interleaved with first and second codeword pairs, each codeword header comprising... Agent: Law Office Of Dan Shifrin, PC - Ibm 20080184091 - Error detection code generating circuit and encoding circuit utilizing which and method thereof: An EDC generating circuit includes a memory unit, an EDC generating circuit, a header generator and an EDC correcting circuit. The EDC generating circuit, which is coupled to the memory unit, is used for generating a first EDC according to at least one main data, and for storing the first... Agent: North America Intellectual Property Corporation 20080184090 - Storage apparatus: According to one embodiment, a storage apparatus includes: a data transmission unit capable of transmitting data to a host apparatus in a data format in which a content to be transmitted to the host apparatus is accompanied by a CRC; a storage medium in which the content is stored; an... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP 20080184092 - Apparatus and method for recording and/or reproducing data on an information storage medium using padding information, and the information storage medium: An apparatus and method for recording and/or reproducing data on a disc are provided using padding information, and a corresponding information storage medium. The recording method includes recording a recording unit block in which invalid data is padded in part of the block and recording padding information indicating that the... Agent: Stein, Mcewen & Bui, LLP 20080184093 - Error correction algorithm selection based upon memory organization: A method is provided for implementing at least one of a number of error correction algorithms operable on a memory. In the method, each of the error correction algorithms is provided. At least one of the error correction algorithms is then selected based on the organization of the memory. At... Agent: Hewlett Packard Company 20080184094 - Programming management data for nand memories: Methods, apparatus, systems, and data structures may operate to generate or store error correction data for each of a plurality of sectors of a page except for a particular sector in the page and combining a block management data with the particular sector to generate a modified sector. Additionally, various... Agent: Schwegman, Lundberg & Woessner, P.A. 20080184095 - Double-pumped/quad-pumped variation mechanism for source synchronous strobe lockout: An apparatus for locking out a source synchronous strobe receiver, including a delay-locked loop (DLL) and receivers. The DLL receives a reference clock, and generates a select vector and an encoded select vector. The select vector is employed to select a delayed version of the reference clock that lags the... Agent: Huffman Law Group, P.C. 20080184096 - Repair techniques for memory with multiple redundancy: In one aspect, the present invention features techniques for generating a repair solution for a memory having a set of IOs including a plurality of main IOs and a plurality of redundant IOs. For example, techniques are provided for selecting a mapping between input/output ports of the memory and a... Agent: Hewlett Packard Company 07/24/2008 > patent applications in patent subcategories.20080178035 - Failback to a primary communications adapter: Methods, systems, and program products are provided for failback to a primary communications adapter. Embodiments of the present invention include receiving, in a driver for a primary communications adapter and a backup communications adapter, a link up event for the primary communications adapter; inferring that the primary communications adapter is... Agent: International Corp (blf) 20080178036 - Method for detecting errors and supporting reconfiguration decisions in mobile radio networks comprising reconfigurable terminals, and corresponding network elements and components: A respective agent platform in network elements and producer-specific agents that are installed directly on platform or by way of agent proxies of agent providers are disclosed. The agents then receive raw information on arising operating errors by way of a defined interface of the agent platform, and, together with... Agent: Staas & Halsey LLP 20080178037 - Process for detecting the availability of redundant communication system components: A process is disclosed for detecting the availability of components of a redundant communication system in which hardware components are available at least in duplicate, the redundant system components taking over the function of the previously active operating system components when one or more hardware components break down. The system... Agent: Bell, Boyd & Lloyd, LLP 20080178039 - Apparatus and method to assign addresses to a plurality of information storage devices: A method to assign addresses to a plurality of data storage devices, by providing a switch and (N) data storage devices, where each of those (N) data storage devices is interconnected with said switch. The method further establishes (M) arbitrated loop physical addresses (“AL_PAs”), where (M) is less than (N),... Agent: Dale F. Regelman Quarles & Brady, LLP 20080178038 - Low cost raid with seamless disk failure recovery: A storage subsystem such as an array of disk drives, method of managing disk drives in the storage subsystem and program product therefor. The storage subsystem may be a redundant array of independent disks (RAID) and the individual disks drives may be Self-Monitoring, Analysis and Reporting Technology (SMART) capable drives.... Agent: Law Office Of Charles W. Peterson, Jr. Tucson 20080178041 - Data processing system and copy processing method thereof: The invention is a copy processing technique in a data processing system, which can simultaneously achieve long-distance communication and no data loss when disaster occurs. Among a production site, a local site, and a remote site, long-distance remote copying from a disk array device at the production site to a... Agent: Antonelli, Terry, Stout & Kraus, LLP 20080178040 - Disk failure restoration method and disk array apparatus: If a disk fails, another disk is used to rebuild the data of the failed disk on a first spare disk. When finishing being rebuilt, the first spare disk is separated from the disk array apparatus. Data to be updated while the first spare disk separated is written in another... Agent: Staas & Halsey LLP 20080178042 - Troubleshooting support device, troubleshooting support method and storage medium having program stored therein: A troubleshooting support device includes a keyword file storage unit in which keyword files holding keywords constituted with character strings contained in logs related to trouble that occurs in the substrate processing apparatus stored in advance, are stored. A keyword to be used for log search, selected from a keyword... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.c. 20080178043 - Pipelining of input/output parameters between application tests written in a dbms procedural language: To implement pipelining, data from a first test written in a DBMS procedural language (such as PL/SQL) is automatically passed to a second test which may or may not be in the same language. A user creates a container test to identify names of the two tests, and adds one... Agent: Silicon Valley Patent Group LLP 20080178044 - Method and apparatus for inserting faults to test code paths: One embodiment of the present invention provides a system that inserts faults to test code paths. The system starts by placing fault-inserting method calls at join points within methods in program code. The system then executes the program code during a testing process. As a method is executed during the... Agent: Pvf -- Intuit, Inc. C/o Park, Vaughan & Fleming LLP 20080178046 - Fault-tolerant dynamic editing of gui display and source code: A fault-tolerant method of bottom-up editing whereby simultaneous display of the GUI view and source code view are available, and wherein real-time bottom-up editing is provided. In accordance with a preferred embodiment of the present invention, changes to the source code are isolated, first by isolating and analyzing source code... Agent: (saul-rsw) Patent Docketing Clerk Ibm Corporation (saul-rsw) C/o Saul Ewing LLP 20080178047 - Software test system, method, and computer readable recording medium having program stored thereon for executing the method: A software test system includes: a terminal device in which software to be tested is installed; and a software test device that stores a test driver for testing the test-target software according to test data and a test procedure of the test-target software, wherein the test driver is transmitted to... Agent: Wolf, Block, Shorr And Solis-cohen LLP 20080178045 - Verification system and method for body control module software: To this end, the present invention provided a verification system for BCM software which comprises a BCM for controlling functions of convenience equipment in a vehicle; a computer equipped with a verification program and capable of exchanging information with the BCM through serial communication; and a power supply unit for... Agent: Morgan, Lewis & Bockius LLP (sf) 20080178049 - Power failure warning in logically partitioned enclosures: A method of providing a power failure warning in a storage system includes partitioning early power off warning (EPOW) control logic of a storage enclosure to be symmetric with a power distribution network power domain. A power failure warning system for a storage system having a plurality of storage enclosures... Agent: Ingrassia Fisher & Lorenz, P.c. (ibm) 20080178048 - System and method for the capture and preservation of intermediate error state data: A multiprocessor chip system having the capability to capture and preserve intermediate machine error state data, wherein the system comprises a second level cache, wherein the second level cache is commonly interfaced with a primary and secondary processing core, and at least two primary error event registers, wherein each primary... Agent: Cantor Colburn LLP-ibm Poughkeepsie 20080178050 - Data backup system and method for synchronizing a replication of permanent data and temporary data in the event of an operational error: A data backup system and a method for sychronizing a replication of permanent data between primary and secondary disk subsystems and a replication of temporary data between primary and secondary computer servers in the event of an operational error are provided. The method includes detecting an operational error. The method... Agent: Cantor Colburn LLP-ibm Poughkeepsie 20080178051 - Dvb-h system and method for performing forward error correction: A DVB-H system for performing forward error correction is disclosed, including: a tuner for receiving a data stream; a base-band receiver, coupled to the tuner, for extracting data bytes of an MPE-FEC frame, and performing syndrome calculation on each extracted data byte to determine a corresponding partial syndrome; an embedded... Agent: North America Intellectual Property Corporation 20080178052 - Providing high availability in a pci-expresstm link in the presence of lane faults: A method, device, and system are disclosed. In one embodiment, the method comprises discovering a failure on a PCI Express interconnect, determining whether a failure override bit has been set to override the standard PCI Express Polling.Compliance state for the failure on the PCI Express interconnect, and if the failure... Agent: Intel Corporation C/o Intellevate, Llc 20080178053 - Hybrid built-in self test (bist) architecture for embedded memory arrays and an associated method: Disclosed are embodiments of a built-in self-test (BIST) architecture that incorporates a standalone controller that operates at a lower frequency to remotely perform test functions common to a plurality of embedded memory arrays. The architecture also incorporates command multipliers that are associated with the embedded memory arrays and that selectively... Agent: Frederick W. Gibb, Iii Gibb & Rahman, Llc 20080178054 - Test circuits of semiconductor memory device for multi-chip testing and method for testing multi chips: A test circuit of a semiconductor memory device for performing a test in cooperation with a tester having a plurality of input/output pins connected to a plurality of input/output lines. The test circuit may include a first comparing unit adapted to compare, on a bit-by-bit basis, read data that may... Agent: Lee & Morse, P.c. 20080178055 - Test pattern generation circuit having plural pseudo random number generation circuits supplied with clock signals at different timing respectively: A test pattern generation circuit has multiple pseudo random number generation circuits and a clock control circuit. The pseudo random number generation circuits are provided corresponding to the respective signal lines in a bus wiring, and have predetermined first initial values, which take the same value. In response to first... Agent: Mcginn Intellectual Property Law Group, Pllc 20080178056 - Redundant transmission of data messages for information and control for hvdc transmission systems: A method for securely transmitting data messages between at least one transmitting unit and at least one receiving unit of an HVDCT system. Each transmitting unit is connected to each receiving unit via at least two connection channels. Each data message is provided with a message counter that uniquely characterizes... Agent: Lerner Greenberg Stemer LLP 20080178057 - Pipelined ldpc arithmetic unit: An improvement to an arithmetic unit of a low-density parity-check decoder, where the arithmetic unit has a pipelined architecture of modules. A first module calculates a difference between absolute values of md_R and md_g_in, and passes the result to a first Gallager module. The first Gallager module converts this value... Agent: Lsi Corporation 20080178058 - Decoding apparatus and method: A decoding apparatus includes a decoding unit and an updated erasure data generating unit. The decoding unit receives read data and updated erasure data, and generates decoding data including flag information according to the read data and the updated erasure data. The updated erasure data generating unit is coupled to... Agent: Gallagher & Lathrop, A Professional Corporation 20080178059 - Method of enhancing information security in a wireless communications system and related apparatus: A method for enhancing information security in a wireless communications system comprises receiving a data or control bit sequence and a user identity sequence, performing a CRC operation on the data/control bit sequence to generate a CRC bit sequence, and masking the CRC bit sequence with the user identity sequence... Agent: Birch Stewart Kolasch & Birch 20080178060 - Signal processing apparatus and a data recording and reproducing apparatus including local memory processor: In a data recovery processing, the conventional overhead, primarily, latency due to a rotational recording media is removed. Secondary, in a signal processing or in a recording and reproducing apparatus, reliability of data reproduction is improved by repeatedly processing data. These processing are achieved that input signal, i.e., raw analog... Agent: Mattingly, Stanger, Malur & Brundidge, P.c. 20080178061 - Segregation of redundant control bits in an ecc permuted, systematic modulation code: Segregation of redundant control bits in an ECC permuted, systematic modulation code. Appropriately encoding of user information via combined modulation and RS (Reed-Solomon) encoding ensures segregation of scrambled user information, modulation redundancy bits, and RS redundancy bits in such a way that each of the components thereof can be segregated... Agent: Garlick Harrison & Markison 20080178063 - Generic, reduced state, maximum likelihood decoder: A decoder includes at least one programming input for a plurality of programmable reduced-state trellis parameters. A programmable device is connected to the at least one programming input and implements a reduced-state maximum likelihood decoder that is operable for processing a continuous phase modulated (CPM) signal and returning up to... Agent: Allen, Dyer, Doppelt, Milbrath & Gilchrist 20080178062 - Reduced state trellis decoder using programmable trellis parameters: A programmable decoder includes at least one programming input for a plurality of programmable, reduced state trellis parameters. A programmable device is connected to the at least one programming input and implements a Reduced-State Sequence Estimation (RSSE) decoder comprising at least one reduced-state trellis structure based upon the plurality of... Agent: Allen, Dyer, Doppelt, Milbrath & Gilchrist P.a. 20080178064 - Rate matching device and method for a data communication system: A device and method for rate matching channel-encoded symbols in a data communication system. The rate matching device and method can be applied to a data communication system which uses one or both of a non-systematic code (such as a convolutional code or a linear block code) and a systematic... Agent: The Farrell Law Firm, P.c. 20080178065 - Ldpc encoding and decoding of packets of variable sizes: Techniques to support low density parity check (LDPC) encoding and decoding are described. In an aspect, LDPC encoding and decoding of packets of varying sizes may be supported with a set of base parity check matrices of different dimensions and a set of lifting values of different powers of two.... Agent: Qualcomm Incorporated 20080178066 - Method and apparatus for receiving data in communication system: Disclosed is an apparatus for receiving data in a communication system, the apparatus including: a first memory for receiving data and storing input messages (i.e. V2C messages) of respective check nodes in a low-density parity check (LDPC) matrix of the received data; a second memory for storing a summation value... Agent: Docket Clerk 07/17/2008 > patent applications in patent subcategories.20080172570 - Data line repair mechanism and method for a display: A data line repair mechanism for a display including a data driver, a plurality of data lines, at least one rescue line is disclosed, wherein each data line includes a second end and a first end coupled to the data driver, the rescue line is coupled to the data driver,... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP 20080172571 - Method and system for providing backup storage capacity in disk array systems: A method and system utilizing backup disk drives in disk array systems. In one aspect, a disk array system includes one or more disk arrays, each including two or more disk drives. The system includes a spare disk drive, and a controller operative to assign the spare disk drive to... Agent: Sawyer Law Group LLP 20080172572 - Using virtual copies in a failover and failback environment: Provided are a method, system, and article of manufacture for using virtual copies in a failover and failback environment. Updates are copied from a primary first storage at the primary site to a secondary first storage at the secondary site during system operations. A second storage is maintained at at... Agent: Konrad Raynes & Victor, LLP. Attn: Ibm37 20080172573 - Method for ensuring backup function to an electrical system in a vehicle and an electrical system as such: A method and an electrical system for a vehicle. A digital information carrier sends digital data on. A first computing device is arranged to execute an installed first application software. A second computing device includes an installed backup application software, identical to the first application software. The second computing device... Agent: Venable LLP 20080172574 - Technical support agent and technical support service delivery platform: An embodiment of a method for providing technical support service includes generating a plurality of problem resolutions that are determined to resolve an identified technical problem; attributing weights to each of said plurality of problem resolutions according to frequency of use; and in response to a request to resolve said... Agent: Hensley Kim & Holzer, LLC 20080172575 - Simulated internet for testing internet software: A simulated internet is connected to a corporate network to more easily and effectively facilitate testing the impact of internet security devices and settings on internet software. The simulated internet has communications pathways between two firewall devices, a web proxy and a publishing firewall, that also protect the corporate network.... Agent: Merchant & Gould (microsoft) 20080172576 - Method for enhancing the diagnostic accuracy of a vlsi chip: A diagnostic process applicable to VLSI designs to address the accuracy of diagnostic resolution. Environmentally based fail data drives adaptive test methods which hone the test pattern set and fail data collection for successful diagnostic resolution. Environmentally based fail data is used in diagnostic simulation to achieve a more accurate... Agent: International Business Machines Corporation Dept. 18g 20080172577 - Testing apparatus and method using test script in mobile communication system: Provided are a testing apparatus and method using a test script in a mobile communication terminal. The testing method includes receiving a test scenario to be tested: loading the test script according to the test scenario, performing a test based on the test script; generating a test oracle during the... Agent: The Farrell Law Firm, P.C. 20080172578 - Detection device capable of detecting main-board and method therefor: A detection device and a method therefor are provided. The detection device is used to activate the main-board, when the power-on interval of the main-board is equal to the predetermined power-on interval. The detection device compares the value of the status signal transmitted with the predetermined status value. In case... Agent: Rabin & Berdo, PC 20080172579 - Test device for verifying a batch processing: The invention relates to a test device (1) and associated method for verifying a batch processing in a data processing device (2) comprising a first scheduling device (3) for controlling a data processing which processes the script library (5) scripts by means of a first script interface (4), thereby carrying... Agent: Fraser Clemens Martin & Miller LLC 20080172580 - Collecting and reporting code coverage data: Code coverage data may be collected and reported. First, in response to running a plurality of different test cases, a first plurality of traces may be received. Each of the first plurality of traces may respectively correspond to a first plurality of outputs respectively produced by running each of the... Agent: Merchant & Gould (microsoft) 20080172581 - Load test load modeling based on rates of user operations: Various technologies and techniques are disclosed for performing load tests based upon user pace. A load test application is provided. Load test settings are received from a user that includes a test mix based upon user pace. A test start interval is calculated using the text mix. A load test... Agent: Microsoft Corporation 20080172582 - Method and system for providing peer liveness for high speed environments: Security peer failure, in a network, is reduced by detecting peer liveness after a session has been established between a first and a second peer utilizing a protocol for setting up a security association. A protocol for detecting faults establishes a session between the first and second peer and the... Agent: Ericsson Inc. 20080172583 - Objective assessment of application crashes from a customer environment: A computerized method for collecting error data and providing error reports relating to occurrences of errors of software applications installed on one or more computing devices is disclosed. Data for describing software applications and identifying software application errors is collected from the computing devices and stored in a catalog. Data... Agent: Senniger Powers LLP (msft) 20080172584 - Method and system for in-place updating content stored in a storage device: Methods and systems for in-place updating original content of an original version stored in a non-volatile storage device and for yielding updated content of an updated version. Some of the described embodiments illustrate the possibilities for reduction in storage operations, storage blocks, and/or update package size. Some of the described... Agent: Browdy And Neimark, P.l.l.c. 624 Ninth Street, Nw 20080172585 - System and method for self-test of integrated circuits: A system and method for self-test of an integrated circuit are disclosed. As one example, an integrated circuit is disclosed. The integrated circuit includes a digital signal processing chain, a random sequence generator coupled to an input of the digital signal processing chain, and a checksum calculator coupled to an... Agent: Fogg & Powers LLC 20080172586 - Direct scan access jtag: The present disclosure describes novel methods and apparatuses for directly accessing JTAG Tap domains that exist in a scan path of many serially connected JTAG Tap domains. Direct scan access to a selected Tap domain by a JTAG controller is achieved using auxiliary digital or analog terminals associated with the... Agent: Texas Instruments Incorporated 20080172587 - Lowering power consumption during logic built-in self-testing (lbist) via channel suppression: A method, system and computer readable medium for on-chip testing is presented. In one embodiment, the method, system or computer readable medium includes identifying which LBIST channels of a plurality of LBIST channels do not contribute to a particular test and excluding from that particular test each LBIST channel that... Agent: Ibm Corporation 20080172588 - System and method for testing multiple packet data transmitters: A system and method for testing a plurality of packet data transmitters in which multiple devices-under-test (DUTs) are tested by providing similar transmit data streams to the DUTs each of which, in response thereto, provides a respective packet data signal. At least a portion of each packet data signal is... Agent: Vedder Price P.C. 20080172589 - Forward error correction scheme compatible with the bit error spreading of a scrambler: A method for combining a simple forward error correction code i.e., a Hamming-like code with scrambling and descrambling functions is disclosed. Therefore, irrespective of the information to be transported, received data may be corrected, bit error spreading effects being handled, while providing desirable signal characteristics such as signal DC balance... Agent: Ibm Coporation (rtp) C/o Schubert Osterrieder & Nickelson PLLC 20080172591 - Formulaic flexible collision-free memory accessing for parallel turbo decoding with quadratic polynomial permutation (qpp) interleave: Formulaic flexible collision-free memory accessing for parallel turbo decoding with quadratic polynomial permutation (QPP) interleave. A means is presented by which any desired number of parallel implemented turbo decoding processors can be employed to perform turbo decoding that has been performed using a QPP interleave. This approach is presented to... Agent: Garlick Harrison & Markison 20080172590 - Quadratic polynomial permutation (qpp) interleaver providing hardware savings and flexible granularity adaptable to any possible turbo code block size: Quadratic polynomial permutation (QPP) interleaver providing hardware saving and flexible granularity adaptable to any possible turbo code block size. A means is presented by which only a very small number of coefficients need be stored to effectuate a wide variety of QPP interleaves as can be employed in the context... Agent: Garlick Harrison & Markison 20080172592 - Method and device for controlling the decoding of a ldpc encoded codeword, in particular for dvb-s2 ldpc encoded codewords: This is a method for controlling the decoding of a LDPC encoded codeword composed of several digital data, said LDPC code being represented by a bipartite graph between check nodes (CN1) and variable nodes (VNi). Said method comprises updating messages exchanged iteratively between variable nodes (VN1) and check nodes (CN1).... Agent: Allen, Dyer, Doppelt, Milbrath & Gilchrist P.A. 20080172593 - Broadcasting of digital video to mobile terminals: A method for communication includes encoding data using at least one Error Correction Code (ECC) to generate first and second output data streams. The first output data stream is processed to generate a first output signal, which has a first acquisition time. The second output data stream is processed to... Agent: Banner & Witcoff, Ltd. 20080172594 - Data error detection during media write: Data error detection comprises storing in a first buffer data to be written to a medium and a first digital signature of the data. If the first digital signature matches a second digital signature of data read from the first buffer, a compressed form of data read from the first... Agent: Law Office Of Mark J. Spolyar 07/10/2008 > patent applications in patent subcategories.20080168300 - Methods, systems, and computer products for detection of and policy directed resolution of signaling sympathy sickness in a multisystem cluster: A system and method for detection of and a policy directed resolution of signaling sympathy sickness. Embodiments include a system having a communication among the members, each member having a cross-system coupling facility (XCF), and a method of managing sympathy sickness, the method including detecting a sympathy sickness condition affecting... Agent: Cantor Colburn LLP-ibm Poughkeepsie 20080168299 - Recovery mechanism for embedded device: A device can be recovered by detecting a recovery event in a device having read-only and read-write memory partitions; selecting a set of recovery instructions stored in the device's read-only memory partition; booting the device based on the selected set of recovery instructions; and restoring a set of operating instructions... Agent: Fish & Richardson P.C. 20080168301 - Method of automatically adjusting storage sources for server a system: A method of automatically adjusting storage resources for a server system is disclosed, and the server system includes a plurality of allocators each corresponding to a plurality of network servers. If one of the network servers corresponding to one of the allocators is overloaded, the corresponding allocator will become a... Agent: Bacon & Thomas, PLLC 20080168302 - Systems and methods for diagnosing faults in a multiple domain storage system: Systems and methods for diagnosing faults in a multiple domain storage system. Exemplary embodiments include a system for diagnosing faults, the system including independent servers coupled to a serial attached SCSI switch module, end devices coupled to the serial attached SCSI module, at least one external cable connected between the... Agent: Cantor Colburn LLP - IBM Tuscon Division 20080168303 - Storage management in cascaded replication of data: Provided are a method, system, and article of manufacture, wherein synchronous replication of data is initiated from a first site to a second site. At least one part of the data is sent asynchronously from the second site to a third site, wherein the asynchronously sent at least one part... Agent: Konrad Raynes & Victor, LLP. Attn: Ibm37 20080168304 - Apparatus, system, and method for data storage using progressive raid: An apparatus, system, and method are disclosed for data storage with progressive redundant array of independent drives (“RAID”). A storage request receiver module, a striping module, a parity-mirror module, and a parity progression module are included. The storage request receiver module receives a request to store data of a file... Agent: Kunzler & Mckenzie 20080168305 - Soft error handling in microprocessors: A method for low cost handling of soft error in a microprocessor system is described, which includes detecting a soft error, indicating a register having soft error to an instruction unit, flushing microprocessor pipelines, identifying locations from which to recover a good architectural state based on execution resources used for... Agent: Cantor Colburn LLP-ibm Yorktown 20080168306 - Method, apparatus and software for providing recovery data for program code: A method, apparatus and computer program product for providing recovery data for program code. A first version of an object code module is received. A second version of the object code module is received, the second version being a subsequent version to the first version. A unique identifier is inserted... Agent: Ibm Corp (ya) C/o Yee & Associates PC 20080168307 - System and method for recovery of memory transactions: A method for transactional writing of data into a persistent memory comprising memory cells includes a transactional writing step and a transaction recovery step. The transactional writing step comprises one or more memory cell writing steps comprising the sub-steps of writing in a transaction buffer as transaction buffer entry the... Agent: Anne Vachon Dougherty 20080168308 - Adjusting sliding window parameters in intelligent event archiving and failure analysis: A computerized method, program product, and an autonomic data processing system that oversees real-time log data acquired by a logging application of an executing computer program. In response to an event occurring, the logging application communicates the occurrence of the event to an event correlation engine, and invokes a window-resizing... Agent: Hamre, Schumann, Mueller & Larson, P.c 20080168309 - On-chip service processor: An integrated circuit is described that includes a stored program processor for test and debug of user-definable logic plus external interface between the test/debug circuits and the component pins. The external interface may be via an existing test interface or a separate serial or parallel port. Test and debug circuits... Agent: Connolly Bove Lodge & Hutz LLP 20080168310 - Hardware diagnostics and software recovery on headless server appliances: Described is a headless server appliance configured with a secondary actuation mechanism that when actuated, enters the headless server appliance into a diagnostic mode. For example, the diagnostic mode may correspond to a secondary operating system booted from a BIOS component activated by the secondary actuation mechanism. In the diagnostic... Agent: Microsoft Corporation 20080168311 - Configuration debugging comparison: Various technologies and techniques are disclosed for performing configuration debugging comparisons. Snapshots are acquired from at least two computer systems to be compared. The snapshots from the computer systems are then compared. Heuristics are used to determine which differences are actually logically equivalent and thus not to be identified as... Agent: Microsoft Corporation 20080168312 - Wireless link to transmit digital audio data between devices in a manner controlled dynamically to adapt to variable wireless error rates: A communication system including a host transceiver, one or many device transceivers, and a wireless or wired link, in which encoded digital audio data and optionally also other auxiliary data are transmitted and received between the host transceiver and one or many device transceivers. The wireless link can but need... Agent: Blakely Sokoloff Taylor & Zafman 20080168313 - Memory error monitor: The present invention relates to a method for the active real-time monitoring of memory errors, the method comprising the steps of monitoring a plurality of compute nodes within a computing system for memory errors by at least one performance counter, monitoring the at least one performance counter, wherein the at... Agent: Cantor Colburn LLP - IBM Rochester Division 20080168314 - Method of predicting availability of a system: The computer availability is predicted by determining a hazard fail rate for the computer system that is based on the hazard fail rate of the individual computer components and the computer system structure s6, as well as the mean repair rate for the system. The computer hazard rates of individual... Agent: Hewlett Packard Company 20080168315 - Modified defect scan over sync mark/preamble field: A technique to detect defects when reading a defect scan pattern stored on a disk in which the detected defects are processed differently depending on which region of a sector the defect is resident. In one implementation, a mask is used to identify the defects of different regions. By differentiating... Agent: Garlick Harrison & Markison 20080168316 - Parallel bit test apparatus and parallel bit test method capable of reducing test time: A parallel bit test (PBT) apparatus, included in memory chips that are stacked in a multi-chip package (MCP) and that share a set of data signal lines, may include: a comparing unit to output a data signal representative of a comparison between test data signals provided to a given one... Agent: Lee & Morse, P.C. 20080168317 - Linked random access memory (ram) interleaved pattern persistence strategy: A method and apparatus is provided for detecting random access memory (RAM) failure for data with a plurality of addresses. The method comprises generating a plurality of RAM test patterns in a predetermined order, implementing a RAM test pattern on each data address in an initial testing pass, based on... Agent: General Motors Corporation Legal Staff 20080168318 - Voltage identifier sorting: A voltage identifier (VID) sorting system is provided that optimizes processor power and operating voltage guardband at a constant processor frequency. The VID sorting system determines a voltage versus current curve for the processor. The VID sorting system then uses the voltage versus current characteristics to calculate the power for... Agent: Ibm Corp. (wip) C/o Walder Intellectual Property Law, P.C. 20080168320 - Codes for limited magnitude asymetric errors in flash memories: Error correction is tailored for the use of an ECC for correcting asymmetric errors with low magnitude in a data device, with minimal modifications to the conventional data device architecture. The technique permits error correction and data recovery to be performed with reduced-size error correcting code alphabets. For particular cases,... Agent: Townsend And Townsend And Crew, LLP 20080168319 - Flash memory device error correction code controllers and related methods and memory systems: An ECC controller for a flash memory device storing M-bit data (M: a positive integer equal to or greater than 2) includes an encoder and a decoder. The encoder generates first ECC data for input data to be stored in the flash memory device using a first error correction scheme... Agent: Myers Bigel Sibley & Sajovec 20080168322 - Communication device, radio communication terminal, radio base station and communication method: The present invention aims to largely improve a probability of successfully receiving a PDU retransmitted by a transmitter. To this end, provided is a communication method for continuously receiving multiple PDUs from a radio base station via a radio link. The method includes the steps of: determining whether or not... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C. 20080168321 - Method and apparatus for transmitting reverse ack/nack for forward control channel in mobile communication system supporting harq: A method and apparatus for transmitting a reverse ACK/NACK for a forward control channel in a mobile communication system supporting HARQ are provided. Control information is received for decoding a packet from a base station over the forward control channel. The packet from the base station is received in an... Agent: The Farrell Law Firm, P.C. 20080168324 - Basic matrix based on irregular ldpc, codec and generation method thereof: Basic matrix based on irregular LDPC codes, codec and generation method thereof. The codec includes an encoding/decoding operation module and a basic matrix storage module. In the stored basic matrix Hb, for all girths with length of 4, any element of i, j, k or l constituting the girths in... Agent: Welsh & Katz, Ltd 20080168323 - Pipelined cyclic redundancy check for high bandwith interfaces: Techniques for validating the integrity of a data communications link are provided. By executing error correction/detection calculations, such as CRC calculations, in a pipelined manner, logic may be distributed over multiple machine cycles. As a result, delay involved in the logic for each cycle may be reduced, allowing calculations in... Agent: Ibm Corporation, Intellectual Property Law Dept 917, Bldg. 006-1 20080168326 - Receiving apparatus and method in a wireless communication system: A receiving apparatus and a receiving method for interference cancellation in a wireless communication system are provided. The receiving apparatus includes a detector for estimating a desired signal and an interference signal by Multiple Input Multiple Output (MIMO)-detecting received signals; a first decoder for iteratively decoding the interference signal output... Agent: Docket Clerk 20080168325 - Semiconductor memory device and method for driving the same: A semiconductor memory device includes: a first bank and a second bank; one or more first data input/output pads disposed at one side of the first bank and used in access to data of the first bank; one or more second data input/output pads disposed at one side of the... Agent: Mcdermott Will & Emery LLP 20080168327 - Decoding method and device using error correction codes: s 20080168328 - Information recording medium to which extra ecc is applied, and method and apparatus for managing the information recording medium: An information recording medium to which data extra ECC is applied, and a method and apparatus for managing the information storage medium is provided. The method includes: determining whether extra ECC is applied with respect to data that is to be recorded on the information recording medium, and deciding an... Agent: Stein, Mcewen & Bui, LLP 20080168329 - Error control coding methods for memories with subline accesses: A two-level error control protocol detects errors on the subline level and corrects errors using the codeword for the entire line. This enables a system to read small pieces of coded data and check for errors before accepting them, and in case errors are detected, the whole codeword is read... Agent: Whitham, Curtis & Christofferson, P.C. 20080168330 - Systems and methods for prioritizing error correction data: Various systems and methods for generating and/or ordering error indications are disclosed herein. In some cases, the error indication is used as an erasure pointer in a memory access system. As one particular example, a system for ordering erasure pointers is disclosed that includes a group of N sort cells,... Agent: Hamilton And Desanctis 20080168331 - Memory including error correction code circuit: A memory includes an array of memory cells and an error correction code circuit. The error correction code circuit is configured to receive a first portion of a first data word from an external circuit and a second portion of the first data word from the array of memory cells,... Agent: Dicke, Billig & Czaja 20080168332 - Fec code and code rate selection based on packet size: Techniques for encoding and decoding data are described. In an aspect, multiple code rates for a forward error correction (FEC) code may be supported, and a suitable code rate may be selected based on packet size. A transmitter may obtain at least one threshold to use for code rate selection,... Agent: Qualcomm Incorporated 20080168333 - Decoding method and decoding apparatus as well as program: A decoding method for sorting received words in the order of the magnitude of the reliability of the received words, performing belief propagation using a parity check matrix diagonalized in the order to update the reliabilities, and repetitively performing the sorting and the belief propagation for the updated values, includes... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP 20080168334 - Low complexity ldpc encoding algorithm: d 20080168335 - Area efficient on-the-fly error correction code (ecc) decoder architecture: Area efficient on-the-fly error correction code (ECC) decoder architecture. A novella means is presented by which only 2 banks of registers are employed (as opposed to 3 or more banks) when generating an error location polynomial in accordance with decoding of a Reed-Solomon (RS) coded signal. Berlekamp-Massey decoding processing can... Agent: Garlick Harrison & Markison 20080168337 - Data encoding method and apparatus for flash-type signaling: Embodiments disclosed herein relate to preamble configuration in wireless communication systems (e.g., UHDR-DO type systems). Disclosed embodiments disclose receiving a plurality of information bits, generating a plurality of preamble codewords based on a determined a set of monitored MAC_IDs, correlating the information bits with each of the plurality of preamble... Agent: Qualcomm Incorporated 20080168336 - Simplified rs (reed-solomon) code decoder that obviates error value polynomial calculation: Simplified RS (Reed-Solomon) code decoder that obviates error value polynomial calculation. A novel means is presented herein by which error magnitudes (or error values) can be calculated directly without requiring the generation of an error value polynomial (EVP). Modification of the Koetter decoding approach and the Forney formula are employed... Agent: Garlick Harrison & Markison 20080168338 - Parity error detecting circuit and method: A parity error detecting circuit includes a first operation unit, a second operation unit, and a shift register. The first operation unit receives a serial data signal and a first signal, performs a logic operation on the two received signals, and outputs the result of the logic operation as the... Agent: F. Chau & Associates, LLC 20080168339 - System and method for automatic environmental data validation: A method for identifying anomalies in time series data, the method comprising the steps of computing parity vectors for one or more data points in a predetermined sample of data points in the time series, the parity vector representing redundancy between an estimated true value and an error term for... Agent: Gowling Lafleur Henderson LLP (ott) 07/03/2008 > patent applications in patent subcategories.20080162981 - Method of maintaining traffic services through congestion caused by network failovers: In a method for controlling data traffic in a wireless or other communication network, one or more hardware/software agents are deployed to interface with one or more network entities such as routers, switches, backhaul transmission lines, and wireless base stations. The agents monitor the L1 (physical) and L2 (data link)... Agent: Mccormick, Paulding & Huber LLP 20080162983 - Cluster system and failover method for cluster system: Provided is a failover method for a cluster system for realizing smooth failover of the guest OS's, even when there are many guest OS's, while reducing consumption of computer resources of a server. Smooth failover is realized by preventing competition during failover even when the number of guest OS's is... Agent: Stanley P. Fisher Reed Smith LLP 20080162982 - Methods and apparatus to change a configuration of a processor system: Methods and apparatus to change a configuration of a processor system are disclosed. An example disclosed method calculates system configuration data during a non-quiesce state of a processing system, stores information based on the calculated system configuration data in a data buffer during the non-quiesce state of the processing system,... Agent: Hanely Flight & Zimmerman, Llc 20080162985 - Method and apparatus for customizable surveillance of network interfaces: A method in a data processing system for monitoring for errors on a network. Responsive to detecting a change in a state of the network, determine whether the change in state is a loss of a communications link to a remote data processing system. If the change in state is... Agent: Ibm Corp (ya) C/o Yee & Associates Pc 20080162984 - Method and apparatus for hardware assisted takeover: The present invention includes a processing system. The processing system includes a controller to manage the processing system. The processing system also includes a remote management module coupled to said controller and a network. The remote management module to monitor operating conditions of said controller and to send a message... Agent: Jordan M. Becker Blakely, Sokoloff, Taylor & Zafman LLP 20080162986 - Memory cell bit valve loss detection and restoration: For one disclosed embodiment, an apparatus may comprise a memory cell to store a bit value, wherein the memory cell may lose the bit value in response to a memory access operation. The apparatus may also comprise first circuitry to detect whether the memory cell loses the bit value in... Agent: Intel/blakely 20080162987 - System and method for connecting sas raid controller device channels across redundant storage subsystems: A system comprising a first expander device and a second expander device. The first expander device and the second expander device comprise a subtractive port and a table mapped port and are suitable for coupling a first serial attached SCSI controller to a second serial attached SCSI controller. The first... Agent: Lsi Corporation 20080162988 - System and method for predictive processor failure recovery: A system, method, and computer program product for reporting and recovering from an internal processor error in a multiprocessor system supporting system management mode. In accordance with the method of the present invention one or more replacement agents are allocated such as during system startup within the multiprocessor system. Machine... Agent: Dillon & Yudell LLP 20080162989 - Method, operating system and computing hardware for running a computer program: A method for executing a computer program on computing hardware, e.g., on a microprocessor, is provided, the computer program including multiple program objects and errors being detected in this method while the computer program is running on the computing hardware. When an error is detected, at least one program object,... Agent: Kenyon & Kenyon LLP 20080162990 - Compiler technique for efficient register checkpointing to support transaction roll-back: A method and apparatus for efficient register checkpointing is herein described. A transaction is detected in program code. A recovery block is inserted in the program code to perform recovery operations in response to an abort of the first transaction. A roll-back edge is potentially inserted from an abort point... Agent: Intel Corporation C/o Intellevate, Llc 20080162993 - Image forming device to perform a system diagnosis and method thereof: An image forming device which enables a user to determine a diagnostic item and to perform a system diagnosis easily. The image forming device includes a storage unit to store information corresponding to diagnostic items and keyword information for the respective diagnostic items, an input unit to receive an input... Agent: Stanzione & Kim, LLP 20080162992 - Method and apparatus for intelligently re-sequencing tests based on production test results: Techniques for sequencing tests in a test program include determination of failure detection efficiency for tests in a test program, and sequencing the tests into a test sequence wherein tests having higher associated failure detection efficiencies are sequenced before tests having lower associated failure detection efficiencies.... Agent: Verigy, Ltd. 20080162994 - Method for remotely diagnosing devices: A method for diagnosing devices via a remote testing device which is connectable to devices to be diagnosed via a communication network. Diagnosing is performed by exchanging diagnostics information between the remote-testing device and the devices to be tested via the communication network. The process of exchanging diagnostics information is... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.c. 20080162991 - Systems and methods for improving serviceability of a memory system: Systems and methods for improving serviceability of a memory system including a method for identifying a failing memory element in a memory system when two or more modules operate in unison in response to a read request. The method includes receiving syndrome bits and an address associated with an uncorrectable... Agent: Cantor Colburn LLP-ibm Poughkeepsie 20080162995 - In-cycle system test adaptation: Disclosed are an information processing system and computer readable medium for performing a system test on a program. A test plan associated with a system test is created. The system test is for testing a program within an environment. At least one test trigger to be monitored for during the... Agent: Fleit, Kain, Gibbons, Gutman, Bongini & Bianco P.l. 20080162997 - Channel scan logic: A device that can autonomously scan a sensor panel is disclosed. Autonomous scanning can be performed by implementing channel scan logic. In one embodiment, channel scan logic carries out many of the functions that a processor would normally undertake, including generating timing sequences and obtaining result data; comparing scan result... Agent: Apple C/o Morrison And Foerster ,llp Los Angeles 20080162996 - Multi-touch auto scanning: A system and method for autonomously scanning a sensor panel device, such as a multi-touch panel, is disclosed. In one embodiment, the system and method disables a sensor panel processor after a first predetermined amount of time has elapsed without the sensor panel device sensing any events. One or more... Agent: Morrison & Foerster, LLP 20080162998 - Automatic reconfiguration of an i/o bus to correct for an error bit: A test pattern is loaded into a driver data shift register and sent from a driver chip to a receive chip over an M bit bus (0 to M−1). The test pattern is also generated at the receiver chip and used to compare to the actual received data. Failed compares... Agent: Ibm Corp (wsm) C/o Winstead Sechrest & Minick P.c. 20080162999 - Method and system for validation of data extraction: Validation of an extraction process from an operation system to an on-line analytics and processing (“OLAP”) system may be achieved utilizing a function module that reads data from a queue and outputs the data in a structured form. A second function module may be used to perform an existence and... Agent: Brake Hughes Bellermann LLP 20080163000 - Communications system for implementation of synchronous, multichannel, galvanically isolated instrumentation devices: An apparatus and method for synchronous communications using a serial data stream employs a housing with a controller and a back plane. The housing accepts one or more modules for interconnection with the back plane. The back plane distributes power to the modules and provides a communication link from the... Agent: Agilent Technologies Inc. 20080163001 - Method for facilitating bios testing: A method for facilitating basic input and output system (BIOS) testing is provided. In the method, a BIOS program code to be tested is loaded into a memory unit by a BIOS debugging card to execute a boot operation testing. The method of BIOS testing utilizes an uninterruptible power supply... Agent: Morris Manning Martin LLP 20080163002 - Blind estimation of control channel: A method, system, apparatus, and computer program product for decoding control information, wherein a total number of allocation blocks defining control channels to be allocated to users for at least one of uplink and downlink directions is determined. Then, a format which determines resource allocation within allocation blocks is selected,... Agent: Squire, Sanders & Dempsey L.l.p. 20080163003 - Method and system for autonomic target testing: A target is autonomically tested using a number of test cases. Dependencies among the test cases exist. A dependency between a first test case and a second test case means that where testing of the target using the first test case results in failure, testing of the target using the... Agent: Hamilton, Brook, Smith & Reynolds 20080163004 - Minimizing software downtime associated with software rejuvenation in a single computer system: An approach is provided that rejuvenates a software application to reduce the effects of software aging. An active replica corresponding to a software application is identified. If rejuvenation of the software application is appropriate, a new replica is created and state information is transferred from the active replica to the... Agent: Ibm Corporation- Austin (jvl) C/o Van Leeuwen & Van Leeuwen 20080163005 - Error injection in pci-express devices: Method and system for forcing PCI-Express errors in a downstream path and upstream path is provided. The downstream path method includes enabling an error forcing function; determining if an additional stimulus is used for enabling an error condition; sending the additional stimulus to trigger error detection; and detecting a forced... Agent: Klein, O'neill & Singh, LLP 20080163006 - Input/output device with configuration, fault isolation and redundant fault assist functinoality: An I/O device is provided for use in a process control system having a controller operating under a particular version of communication software. The I/O device has a storage device for storing a plurality of potential versions of I/O communication software. An I/O device processor determines the particular version of... Agent: Marshall, Gerstein & Borun LLP (fisher) 20080163007 - System to detect and identify errors in control information, read data and/or write data: An integrated circuit, such as an integrated circuit memory or buffer device, method and system, among other embodiments, generate a plurality of error codes, such as CRC codes, corresponding to control information, write data and read data transactions, respectively. The plurality of separately generated CRC codes is logged or stored... Agent: Deniro/rambus 20080163010 - Fault detection: Methods and apparatus to efficiently detect faults are described. In an embodiment, an encoded value may be generated based on a portion of an instruction address and a portion of a corresponding result value. The encoded value may be used to determine whether an entry corresponding to the encoded value... Agent: Caven & Aghevli C/o Intellevate, Llc 20080163009 - Method and system for providing enhanced memory error messages: A system and method are provided to provide an enhanced memory error message. In one embodiment, a first message is associated to a memory error occurring at a virtual machine, the first message indicating the memory error has occurred. A second message is associated to the memory error when the... Agent: Sap/blakely 20080163008 - Speculative cache tag evaluation: A cache tag comparison unit in a cache controller evaluates tag data and error correction codes to determine if there is a cache hit or miss. The cache tag comparison unit speculatively compares the tag data with the request tag without regard to error correction. The error correction code verifies... Agent: Townsend And Townsend And Crew, LLP 20080163011 - Method and testing arrangement for testing a device using 8b/10b encoding and an 8b/10b encoder and decoder: The invention relates to a method, a testing arrangement, a testing device, an 8B/10B encoder and an 8B/10B decoder, with which the recovery from a 8B/10B encoding error of a device using serial data transmission may be tested. The 8B/10B encoder (302) according to the invention in a transmitting device... Agent: Young & Thompson 20080163012 - Apparatus for configuring a usb phy to loopback mode: A circuit includes a universal serial bus physical layer interface (USB PHY), programmable storage elements in communication with control inputs of the USB PHY, and a processor to set the programmable storage elements. The processor initiates the loopback mode of the USB PHY by sending the appropriate control signal sequence... Agent: Brinks Hofer Gilson & Lione/sandisk 20080163013 - Memory testing system and method: Methods, circuits and systems are provided for testing random-access memory (RAM) devices. In one embodiment, one or more test vectors are written to a RAM device. Bit-signals are read from the RAM device one line at a time and are segregated into respective sub-pluralities. Each sub-plurality is tested to determine... Agent: Texas Instruments Incorporated 20080163014 - Tracking health of integrated circuit structures: Methods and apparatus to track the health of integrated circuit structures are described. In an embodiment, a counter may be updated when the status of a portion of a storage unit (e.g., a cache) transitions to a defective status (e.g., as determined by reference to one or more corresponding status... Agent: Caven & Aghevli C/o Intellevate, Llc 20080163015 - Framework for automated testing of enterprise computer systems: An automated testing framework enables automated testing of complex software systems. The framework can be configured for test selection, flow definition, and automated scheduled testing of complex computer systems. The framework has facilities for result analysis, comparison of key performance indicators with predefined target values, and test management.... Agent: Abelman, Frayne & Schwab 20080163016 - System and method of providing error detection and correction capability in an integrated circuit using redundant logic cells of an embedded fpga: A system and method of providing error detection and correction capability in an IC using redundant logic cells and an embedded field programmable gate array (FPGA). The system and method provide error correction (EC) to enable a defective logic function implemented within an IC chip design to be replaced, wherein... Agent: Scully, Scott, Murphy & Presser, P.c. 20080163017 - Dynamic frequency scaling for jtag communication: A system comprising a system under test (SUT) having a control logic. The SUT further comprises testing logic coupled to the SUT and adapted to provide to the SUT a clock signal to facilitate communications between the testing logic and the SUT. The control logic monitors a number of activated... Agent: Texas Instruments Incorporated 20080163018 - Test control circuit and semiconductor memory device including the same: The present invention relates to a test control circuit controlling a test of an internal circuit and a semiconductor memory device including the same. The present invention provides a test control circuit having: an encoding unit encoding test mode signals input from the external and transferring them to global lines;... Agent: Ladas & Parry LLP 20080163019 - Scanning latches using selecting array: A method and system for scanning data from a specific latch in a matrix array of latches. The matrix array is made up of vertical selector lines and horizontal data lines. Each latch is coupled at an intersection of a selector line and a data line by a transistor. By... Agent: Dillon & Yudell LLP 20080163020 - Variable clocked scan test improvements: Addition of specific test logic may improve the level of test vector compression achieved from existing variable scan test logic. Methods for determining the compressed vectors' states, given the desired uncompressed vectors' values may be used, and techniques for selectively enabling test or other features on a chip by inserting... Agent: Connolly Bove Lodge & Hutz LLP 20080163021 - Optical line terminal and optical network terminal: There are provided an optical line terminal and an optical network terminal, which can process with the same forward error correction code even if an EFC frame size of G-PON descending signals is different between two types of 255 and 120. The optical network terminal includes a photoelectric converter, a... Agent: Mcdermott Will & Emery LLP 20080163023 - Ecc controller for use in flash memory device and memory system including the same: An ECC (error correction code) controller of a flash memory device which stores an M-bit data (M being a positive integer equal to or greater than 2) comprises a first ECC block which generates a first ECC data from a program data to be stored in the flash memory device... Agent: Volentine & Whitt Pllc 20080163022 - Efficient ctc encoders and methods: Embodiments of encoding input data into parity data in mechanisms are described generally herein. Other embodiments may be described and claimed.... Agent: Schwegman, Lundberg & Woessner, P.a. 20080163024 - Ultra-wideband communication apparatus and methods: Apparatus and methods of ultra-wideband (UWB) communication are provided. In one embodiment, an ultra-wideband transmitter includes a processor configured to generate data for transmission in the form of a plurality of ultra-wideband pulses. The transmitter includes a FEC encoder that generates a code word based on the data. The FEC... Agent: Pulse-link, Inc. 20080163025 - Bit-interleaved ldpc-coded modulation for high-speed optical transmission: A transmitter includes a plurality of encoders configured to receive source bit streams from m information sources, each of the plurality encoders including identical (n,k) low-density parity check (LDPC) codes of code rate r=k/n, where k is a number of information bits and n is codeword length. An interleaver is... Agent: Nec Laboratories America, Inc. 20080163026 - Concatenated codes for holographic storage: Systems and methods for constructing concatenated codes for data storage channels, such as holographic storage channels, are provided. The concatenated codes include an outer BCH code and an inner iteratively decodable code, such as an LDPC code or turbo code. The correction power and coding rate of one or both... Agent: Ropes & Gray LLP 20080163027 - Ldpc encoding methods and apparatus: A flexible and relatively hardware efficient LDPC encoder is described. The encoder can be implemented with a level of parallelism which is less than the full parallelism of the code structure used to control the encoding process. Each command of a relatively simple microcode used to describe the code structure... Agent: Straub & Pokotylo 20080163028 - Page by page ecc variation in a memory device: A data structure for a memory device is provided. The device includes an array having a plurality of rows of storage elements divided into logical units composed of a plurality of data structures. The data structure includes a data sector including user data and user attribute data. The user attribute... Agent: Vierra Magen/sandisk Corporation 20080163029 - Error correction code generation method and memory control device: A correct error correction code can be generated even if a RAM error occurs before writing store data in cache memory (RAM) after confirming that cache line data for storage includes no errors. Before writing the store data, cache line data for storage is stored in a register, the store... Agent: Staas & Halsey LLP 20080163030 - Nonvolatile memory with error correction for page copy operation and method thereof: The disclosure is a NAND flash memory with the function of error checking and correction during a page copy operation. The NAND flash memory is able to prohibit transcription of erroneous bits to a duplicate page from a source page. Embodiments of the inventive flash memory include a correction circuit... Agent: Marger Johnson & Mccollom, P.c. 20080163031 - Method of facilitating reliably accessing flash memory: A method of facilitating reliably accessing flash memory is provided. During the write-in process, the present invention utilizes the steps of coding write-in data to generate extra data, and then generating the first error correction code by performing an error-correcting operation on the write-in data and the extra data. Finally,... Agent: Kirton And Mcconkie 20080163033 - Error correction circuit and method for reducing miscorrection probability and semiconductor memory device including the circuit: An error correction circuit and method for reducing a miscorrection probability and a semiconductor memory device including the circuit are provided. The error correction circuit includes an error check and correction (ECC) encoder and an ECC decoder. The ECC encoder generates syndrome data enabling h-bit error correction based on information... Agent: Volentine & Whitt Pllc 20080163032 - Systems and methods for error detection in a memory system: A method for error detection in a memory system. The method includes calculating one or more signatures associated with data that contains an error. It is determined if the error is a potential correctable error. If the error is a potential correctable error, then the calculated signatures are compared to... Agent: Cantor Colburn LLP-ibm Yorktown 20080163035 - Method for data distribution and data distribution unit in a multiprocessor system: A unit and method for distributing data from at least one data source in a system provided with at least two computer units, containing switching means which are used to switch between at least two operating modes of the system, wherein data distribution and/or selection of a data source is... Agent: Kenyon & Kenyon LLP 20080163034 - Providing error correction coding for probed data: In one embodiment, the present invention includes a method for receiving an error correction code for information from a first port of a first agent and receiving the information from a second port of the first agent by probing a first link under test that couples the first agent and... Agent: Trop Pruner & Hu, Pc 20080163036 - Cyclic redundancy check code generating circuit, semiconductor memory device, and method of driving semiconductor memory device: Disclosed are a semiconductor memory device, and a method of driving the same, and a cyclic redundancy check code generating circuit capable of performing cyclic redundancy check. A semiconductor memory device according to an aspect of the present invention includes a memory cell array, a data processing unit receiving data... Agent: Mills & Onello LLP 20080163037 - Signal control circuit and signal control apparatus: A signal control circuit and a signal control apparatus that can reduce processing time and can send or receive correct data with reliability. When a data generation block outputs data, a data judgment block judges the number of changed bits by comparing each bit of the data output in the... Agent: Arent Fox LLP Previous industry: Electrical computers and digital processing systems: supportNext industry: Data processing: presentation processing of document ###### RSS FEED for 20091112: Integrate FreshPatents.com into your RSS reader/aggregator or website to track weekly updates. For more info, read this article. ###### Thank you for viewing Error detection/correction and fault detection/recovery patents on the FreshPatents.com website. These are patent applications which have been filed in the United States. There are a variety ways to browse Error detection/correction and fault detection/recovery patent applications on our website including browsing by date, agent, inventor, and industry. If you are interested in receiving occasional emails regarding Error detection/correction and fault detection/recovery patents we recommend signing up for free keyword monitoring by email. ### FreshPatents.com Support Results in 1.09269 seconds |
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