Error detection/correction and fault detection/recovery inventions 02/08

20080052558 - Systems and methods for reduced complexity ldpc decoding: Systems and methods for generating check node updates in the decoding of low-density parity-check (LDPC) codes use new approximations in order to reduce the complexity of implementing a LDPC decoder, while maintaining accuracy. The new approximations approximate the standard sum-product algorithm (SPA), and can reduce the approximation error of min-sum... Agent: Baker & Mckenzie LLP Patent Department

20080052559 - Fault diagnosis: Health statuses of components expressing a normal, a suspected faulty or a confirmed faulty condition are estimated. Based on results of tests minimal conflicts are identified explaining the test results. Readiness statuses are derived indicating a final value or a non-final value depending on whether or not additional testing of... Agent: Moore & Van Allen PLLC

20080052560 - Field bus communication diagnosing device and field bus communication diagnosing method: A communication state storing unit stores the communication error states of the field bus communication. A connecting state updating unit updates a connecting state of the field bus communication of two systems. A diagnosing unit sequentially and periodically obtains the communication error states stored in the communication state storing unit... Agent: Edwards Angell Palmer & Dodge LLP

20080052561 - Method and system for triggering a protocol analyzer: A protocol analyzer is provided including a monitoring state machine for tracking a communication protocol. A trigger mechanism triggers a trace by the analyzer when the state of the protocol differs from the monitoring state machine. The state of the protocol differs from the monitoring state machine when no state... Agent: Kunzler & Mckenzie

20080052562 - Fault detection unit for rotation angle detecting device: A fault detection unit detects a fault occurred in a detecting device which detects a rotational angle of a rotor with respect to a stator from sine and cosine wave signals having amplitudes modulated in a sinusoidal wave shape in a cycle of rotation of the rotor. The unit produces... Agent: Nixon & Vanderhye, PC

20080052556 - System and method for maintaining resiliency of subscriptions to an event server: A system and method for maintaining resiliency of subscriptions to an event server includes receiving a subscription request to establish a subscription to receive event state information of an event source, a primary event server providing the event state information. The event state information is received from the primary event... Agent: Baker Botts L.L.P.

20080052557 - Method, system, and program for error handling in a dual adaptor system where one adaptor is a master: Provided is a method, system, and program for processing Input/Output (I/O) requests to a storage network including at least one storage device and at least two adaptors, wherein each adaptor is capable of communicating I/O requests to the at least one storage device. An error is detected in a system... Agent: Konrad Raynes & Victor, LLP. Attn: Ibm37

20080052563 - Apparatus and method for reducing false triggering of a signal due to an electrostatic discharge event: An apparatus and method for reducing false triggering of a signal due to an electrostatic discharge event are disclosed. The method includes detecting a high voltage on a signal received at an input of a delay circuit and delaying the signal between the input of the delay circuit and an... Agent: Baker Botts, LLP

20080052564 - Error correction circuit and method, and semiconductor memory device including the circuit: An error correction circuit, an error correction method, and a semiconductor memory device including the error correction circuit are provided. The error correction circuit includes a partial syndrome generator, first and second error position detectors, a coefficient calculator, and a determiner. The partial syndrome generator calculates at least two partial... Agent: Volentine & Whitt PLLC

20080052565 - Data read-out circuit in semiconductor memory device and method of data reading in semiconductor memory device: A data read-out circuit is provided with a sense amplifier circuit and a selector. The sense amplifier circuit senses a stored data stored in a memory cell array by using a plurality of reference levels to generate a plurality of read data, respectively. Thus, the sense amplifier circuit outputs the... Agent: Sughrue Mion, PLLC

20080052566 - System and method for detecting routing problems: A system includes an adapter and a string of switches having a head-of-string switch and a tail-of-string switch. The adapter is connected to the head-of-string switch. Each switch in the string is connected to an adjacent switch. The system further includes one or more devices connected to each respective switch.... Agent: Law Offices Of Michael Dryja

20080052567 - Semiconductor memory device and method thereof: A semiconductor memory device and method thereof are provided. The example method may be directed to performing a memory operation in a semiconductor memory device, and may include receiving data and a data masking signal corresponding to at least a portion of the received data, the received data scheduled to... Agent: Harness, Dickey & Pierce, P.L.C

20080052569 - Error detection on programmable logic resources: Error detection circuitry is provided on a programmable logic resource. Programmable logic resource configuration data is loaded into a cyclic redundancy check (CRC) module where a checksum calculation may be performed. In one embodiment, the checksum may be compared to an expected value, which is a precomputed checksum on data... Agent: Ropes & Gray LLP Patent Docketing 39/361

20080052568 - System and method for managing mirrored memory transactions and error recovery: In a data processing system having a memory control device including at least two mirrored memory ports, a method, system, and article of manufacture for processing read requests are disclosed herein. In accordance with the method of the present invention, a read request is received on a system interconnect coupling... Agent: Ibm Corporation

20080052570 - Memory device testable without using data and dataless test method: Example embodiments of the present invention include a memory device testable without using data and a dataless test method. The memory device includes a plurality of registers to store test patterns, the registers being coupled to input/output DQ pads. The test patterns are stored in the registers when a mode... Agent: Marger Johnson & Mccollom, P.C.

20080052571 - Memory test system including semiconductor memory device suitable for testing an on-die termination, and method thereof: Example embodiments relate to a memory test system having a semiconductor memory device, a coupling circuit and a tester. The semiconductor memory device may include a plurality of first output nodes and a plurality of second output nodes. The first output nodes may be connected to respective first on-die termination... Agent: Lee & Morse, P.C.

20080052574 - Circuits and associated methods for improved debug and test of an application integrated circuit: Circuits and associated methods for testing internal operation of an application integrated circuit. Features and aspects hereof add configurable test interrupt circuits to an application circuit design to permit dynamic, configurable interrupt generation from an integrated circuit based on conditions determined from monitoring of internal signals of the application circuit.... Agent: Lsi Corporation

20080052575 - Digital apparatus and method of testing the same: A digital apparatus and a method of testing the same according to example embodiments which may reduce the amount of data exchanged because the digital apparatus may provide a pass/fail signal to the tester.... Agent: Harness, Dickey & Pierce, P.L.C

20080052572 - Pipelined data processor with deterministic signature generation: A pipelined data processing system includes functional circuitry having a plurality of test points located at predetermined circuit nodes within the functional circuitry, at least one staging storage element associated with a pipeline stage of the data processing system which is coupled to receive test data directly from the plurality... Agent: Freescale Semiconductor, Inc. Law Department

20080052573 - Test mode for multi-chip integrated circuit packages: When a test mode of a controller of a multi-chip integrated circuit package is activated, external signal lines coupled to the controller are re-mapped to signal lines of one of the integrated circuit devices of the multi-chip integrated circuit package to permit direct testing of the integrated circuit device.... Agent: Leffert Jay & Polglaze, P.A. Attn: Tod A. Myrum

20080052576 - Processor fault isolation: Methods, apparatus, and products for processor fault isolation are disclosed that include sending, by an embedded system microcontroller to a programmable logic device (‘PLD’) a selection signal identifying one processor for boundary scan operations; sending boundary scan input signals to be sent to the identified processor; multiplexing by the PLD... Agent: Ibm (rps-blf) C/o Biggers & Ohanian, LLP

20080052577 - Circuit and method for controlling quality of random numbers: A random number quality control circuit capable of fast control of the level of random number quality is present. When a “0” output section and a “1” output section generate random numbers by individually receiving a random number signal, a random number quality monitor monitors an unbalance between the numbers... Agent: Sughrue Mion, PLLC

20080052578 - Decompressors for low power decompression of test patterns: Disclosed below are representative embodiments of methods, apparatus, and systems used to generate test patterns for testing integrated circuits. Embodiments of the disclosed technology can be used to provide a low power test scheme and can be integrated with a variety of compression hardware architectures (e.g., an embedded deterministic test... Agent: Klarquist Sparkman, LLP

20080052580 - Signal output circuit, and test apparatus: A signal output circuit for outputting an output signal in accordance with a predetermined system timing is provided. The signal output circuit includes a shift register that delays an input signal in accordance with the system timing, a flip-flop that receives the input signal delayed by the shift register in... Agent: Osha Liang L.L.P.

20080052579 - System and method for advanced logic built-in self test with selection of scan channels: A system and method for advanced logic built-in self test with selection of scan channels is present. An LBIST controller loads scan patterns into a device's scan channels through sequential or interleaved loading techniques in order to minimize instantaneous power requirements. During interleave loading, the LBIST controller loads a scan... Agent: Ibm Corporation- Austin (jvl) C/o Van Leeuwen & Van Leeuwen

20080052582 - Jtag to system bus interface for accessing embedded analysis instruments: Disclosed are, inter alia, methods, apparatus, data structures, computer-readable media, mechanisms, and means for providing a JTAG to system bus interface for accessing embedded analysis system(s). JTAG commands are received and converted into commands sent out a bus to a device including an embedded analysis instrument, with results received over... Agent: The Law Office Of Kirk D. Williams

20080052581 - Logic built-in self-test channel skipping during functional scan operations: A method and system for built-in self-testing architecture, including: a logic built-in self-test (LBIST) controller in operable communication with a pseudo-random pattern generator; a multiple input signature register in operable communication with a plurality of scan channels; and circuitry in operable communication with the pseudo-random pattern generator and the multiple... Agent: Cantor Colburn LLP - IBM Rochester Division

20080052583 - Method and apparatus for monitoring an optical network signal: A method is disclosed for monitoring a communication link between a first apparatus and a second apparatus, the method comprising receiving concurrently from the first apparatus (e.g., a central office) at the second apparatus (e.g., an optical demarcation point at a customer premises) a communication signal at a communication wavelength,... Agent: G. Michael Roebuck, PC

20080052584 - Test apparatus and test method: There is provided a test apparatus for testing a semiconductor device. The test apparatus includes a pattern generating section that sequentially reads and outputs waveform information to be used for testing the semiconductor device, where the waveform information is made up by a plurality, of pieces of data, a waveform... Agent: Osha Liang L.L.P.

20080052585 - Integrated testing apparatus, systems, and methods: Embodiments herein may enable an algorithmic pattern generator (APG) to present iterative values of one or more operational parameters to a device under test (DUT). At each iteration, one or more test patterns may be presented to the DUT. The APG may capture test results from a set of iterations... Agent: Schwegman, Lundberg & Woessner, P.A.

20080052586 - Low power decompression of test cubes: Disclosed below are representative embodiments of methods, apparatus, and systems used to generate test patterns for testing integrated circuits. Embodiments of the disclosed technology can be used to provide a low power test scheme and can be integrated with a variety of compression hardware architectures (e.g., an embedded deterministic test... Agent: Klarquist Sparkman, LLP

20080052587 - Unit test extender: A unit test extending system and method use a unit test extender engine and a test pattern to extend a unit test written to validate code under test. The unit test has a first function configured to return a single hard coded value to the code under test. A test... Agent: Westman Champlin (microsoft Corporation)

20080052589 - Data retransmission method, communications device, and computer program: A method for retransmitting data from a transmitting side to a receiving side during communications between a base station and a mobile telephone terminal. Upon accepting a request for retransmission of the data from the mobile telephone terminal, which is the receiving side (S1 in FIG. 17), the base station,... Agent: Bingham Mccutchen LLP

20080052590 - Method and system for reliable multicast data transmission: Provided is a method and system for reliably multicasting a data transmission from a server to one or more clients, which may be connected via a control channel and a multicast data channel. In one example, the method includes sending a first data transmission to the clients over the multicast... Agent: Haynes And Boone, LLP

20080052588 - System and method to send ack/nack within assignment message for reverse link traffic in a communication system: A method and system to send an acknowledgement/negative acknowledgement (ACK/NACK) for High Rate Packet Data (HRPD) transmission. An ACK/NACK is encoded within an assignment message on a Forward Shared Signaling Channel (F-SSCH), which in turn saves bandwidth separately reserved for ACK/NACK transmission and also transmit power to send the ACK/NACK... Agent: The Farrell Law Firm, P.C.

20080052591 - User equipment using hybrid automatic repeat request: A user equipment comprises a transmitter and an adaptive modulation and coding controller. The transmitter is configured to transmit data over an air interface in a single transmission time interval with a first specified modulation and coding scheme, where the single transmission time interval has a plurality of transport block... Agent: Volpe And Koenig, P.C. Dept. Icc

20080052593 - Combined ldpc (low density parity check) encoder and syndrome checker: Combined LDPC (Low Density Parity Check) encoder and syndrome checker. A novel approach is presented by which the encoding processing and at least a portion of the decoding processing of an LDPC coded signal can be performed using a shared circuitry. The LDPC encoding processing and syndrome calculation operations (in... Agent: Garlick Harrison & Markison

20080052596 - Method and device for decoding blocks encoded with an ldpc code: The blocks may be stored temporarily and successively in an input memory before decoding them successively in an iterative manner. The input memory has a memory size allowing the storage of more than two blocks. A current indication representative of a permitted maximum number of iterations for decoding a current... Agent: Allen, Dyer, Doppelt, Milbrath & Gilchrist P.A.

20080052594 - Method and system for replica group-shuffled iterative decoding of quasi-cyclic low-density parity check codes: A block of symbols are decoded using iterative belief propagation. A set of belief registers store beliefs that a corresponding symbol in the block has a certain value. Check processors determine output check-to-bit messages from input bit-to-check messages by message-update rules. Link processors connect the set of belief registers to... Agent: Mitsubishi Electric Research Laboratories, Inc.

20080052595 - Methods and apparatus for low-density parity check decoding using hardware-sharing and serial sum-product architecture: Methods and apparatus are provided for decoding codes that can be described using bipartite graphs having interconnected bit nodes and check nodes. A magnitude of a check-to-bit node message from check node j to bit node i is computed based on a sum of transformed magnitudes of bit-to-check node messages... Agent: Ryan, Mason & Lewis, LLP

20080052592 - Systems and methods for tri-column code based error reduction: Various systems and methods for tri-column code based error reduction are disclosed herein. For example, a digital information system is disclosed that includes channel detector. Such a channel detector receives an encoded data set and provides an output representing the encoded data set. The exemplary system further includes a decoder... Agent: The Hamilton Law Firm PC

20080052597 - Burst error correction based on fire code: According to an example embodiment, an apparatus may include logic. The apparatus may be configured to: determine, based on an error location polynomial, an error location syndrome corresponding to an actual location of a burst error in a data block; select a burst error pattern that is less than or... Agent: Brake Hughes Bellermann LLP C/o Intellevate

20080052600 - Data corruption avoidance in dram chip sparing: A memory controller, system, and methods are disclosed. The system comprises a memory controller interconnected to a plurality of memory chips. Each memory chip stores data at a plurality of locations. The memory controller performs a sparing transaction comprising reading data from a given location of one or more of... Agent: Mhkkg/sun

20080052599 - Dynamic electronic correction code feedback to extend memory device lifetime: Unrecoverable electronic correction code (ECC) errors in memory storage devices are usually preceded by recoverable ECC errors. A memory storage device controller is provided notice of the recoverable errors and associated information. The memory storage device controller can cause the data having the recoverable information to be rewritten on the... Agent: Merchant & Gould (microsoft)

20080052598 - Memory multi-bit error correction and hot replace without mirroring: The invention is directed to memory multi-bit error correction and hot replace without mirroring. A memory configuration in accordance with an embodiment of the present invention includes: a plurality of memory modules; a memory controller for reading/writing data from/into the memory modules; and an error correcting memory module for storing... Agent: Hoffman Warnick & Dalessandro LLC

20080052601 - Writing and reading of data in probe-based data storage devices: Methods and apparatus are provided for controlling writing and reading of data in an array of A storage fields of a probe-based data storage device in which data is written to and read from the array of storage fields by a corresponding array of probes. One method provides error-tolerance by... Agent: Michael Buchenhorner, P.A.

20080052602 - Writing and reading of data in probe-based data storage devices: Methods and apparatus are provided for controlling writing and reading of data in an array of A storage fields of a probe-based data storage device in which data is written to and read from the array of storage fields by a corresponding array of probes. One method provides error-tolerance by... Agent: Michael Buchenhorner, P.A.

20080052603 - Method and apparatus for error detection in a data block: A transmitting device generates a data block including a first field having a first plurality of bits that includes an error detection portion and a second field having a second plurality of bits; selects an error injection mask based on the second plurality of bits; modifies the first plurality of... Agent: Motorola, Inc.

20080052604 - Method and system for redundancy-based decoding of voice content in a wireless lan system: Aspects of a method and system for redundancy-based decoding of voice content in a wireless local area network (WLAN) system are provided. A WLAN receiver may determine whether a decoded portion of a received packet comprises voice content and may select a redundancy-based decoder to decode a remaining portion of... Agent: Mcandrews Held & Malloy, Ltd

20080052605 - Method for restoring the missing data packets: The present invention discloses a method for recovering a lost data unit, the method including: partitioning data to be transmitted into one or more data units, sorting the data units according to importance levels of the data units, and determining a check rule for the one or more data units;... Agent: Ladas & Parry LLP

20080052606 - Distribution method, preferably applied in a streaming system: The invention relates to a data live streaming system comprising at least one data live streaming broadcaster LSB and at least two live streaming recipients LSR, said at least two live streaming recipients LSR forming at least a part of a peer-to-peer streaming network and said at least two live... Agent: Cantor Colburn, LLP

20080052607 - Apparatus and method for soft decision viterbi decoding: When a convolution code is decoded, electric power consumption is certainly suppressed keeping error correction capability. In a Viterbi decoder 100 which decodes received signal, a convolution code, having plural series with a soft decision Viterbi decoding method, an estimation control unit 30 estimates quality of the received signal and... Agent: Sughrue Mion, PLLC

20080052608 - Variable rate soft information forwarding: A method including transmitting a binary vector from a source node to a relay node and receiving a signal vector at the relay node. The method also includes compressing the signal at the relay node by multiplying the signal with a matrix using probabilities and converting output probabilities from the... Agent: Squire, Sanders & Dempsey L.L.P.

20080052609 - Method and apparatus to perform erasure forecasting in communication systems: Methods and apparatus to perform erasure forecasting in communication systems are disclosed. A disclosed example apparatus comprises a forward error correction (FEC) decoder to decode a first codeword and to provide a first error indication for the first codeword, an erasure forecaster to make an erasure decision for a second... Agent: Texas Instruments Incorporated

20080052610 - Parity prediction circuit and logic operation circuit using same: In a parity prediction circuit which corrects the predicted parity using AND/OR parity inversion condition generation circuits, predicted parity and inversion conditions are corrected using an EOR condition of one of data buses. Two parity prediction logics are sufficient; the added correction logic circuit requires only the EOR condition for... Agent: Staas & Halsey LLP

20080052611 - Csa 5-3 compressor circuit and carry-save adder circuit using same: At least two EOR circuits for carry-out which output carry-out bits and the complementary signals thereof are provided in the 5-3 compressor circuits constituted by an EOR circuit group, and dual lanes are employed at least for carry-out. As a result, the number of inverters required can be reduced, increases... Agent: Staas & Halsey LLP

20080046777 - Device retry mechanisms for content distribution: A system and method are provided for enabling a user device to retry a unicast transaction with a server. The user device includes a unicast retry module having both an inner loop retry module and an outer loop retry module. The inner loop retry module handles common transient error while... Agent: Qualcomm Incorporated

20080046778 - Memory controller and semiconductor memory device: When data-read from a memory is a data moving process in the memory, a correction process is omitted in a case where the number of errors is less than a threshold value or the threshold value or less, and the correction process is executed in a case where the number... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080046785 - Timeout request scheduling using grouping and nonsynchronized processing to enhance performance: An invention is disclosed for a computer software timeout algorithm that reduces the amount of list manipulation needed to satisfy system or network requirements for scheduling and cancelling timeout requests to determine whether the expiration time has been reached for execution of an input/output (I/O) request, thereby requiring action to... Agent: Gerald J. Iwanejko, Jr.

20080046779 - Redundant data assigment in a data storage system: The present invention provides techniques for assignment and layout of redundant data in data storage system. In one aspect, the data storage system stores a number M of replicas of the data. Nodes that have sufficient resources available to accommodate a requirement of data to be assigned to the system... Agent: Hewlett Packard Company

20080046780 - Nonvolatile memory: It is aimed to detect, notify, and save an abnormal area in semiconductor memory for greatly improving reliability. An inside of semiconductor memories provided for a memory card comprises a user area, a substitution area, an area substitution information storage area, and a management area. An inside of semiconductor memories... Agent: Miles & Stockbridge PC

20080046781 - System and method for booting alternate mbr in event of virus attack: In the event of a virally infected MBR on a hard disk drive that might prevent booting, a service MBR in a hidden protected area (HPA) can be used to boot a service O.S., and then the service MBR can be replaced with a previously backed-up MBR, also in the... Agent: Rogitz & Associates

20080046782 - Automated hang detection in java thread dumps: A system and method for analyzing Java thread deadlocks. A snapshot of threads in a Java Virtual Machine is generated, producing a thread dump file which can be analyzed offline. The thread dump file is optimistically parsed to identify threads which are deadlocked. A user is provided with an interface... Agent: Duke W. Yee

20080046783 - Methods and structure for detection and handling of catastrophic scsi errors: Methods and associated structure for rapidly detecting a catastrophic failure of a bus structure within a storage subsystem. Features and aspects hereof associated with SCSI bus storage system configurations coordinate such failure detection with standard monitoring features of the SAF-TE, enclosure monitoring specifications. In particular, standard polling operations of a... Agent: Lsi Corporation

20080046784 - Method, system and programming language for device diagnostics and validation: A method and system for performing diagnostics and validation operations on a device under test uses near natural language commands. A host machine controls the testing either locally or remotely, such as through the Internet. Various options for running a test or battery of tests on the device under test... Agent: Lsi Corporation

20080046786 - System and method for detecting, reporting, and repairing of software defects for a wireless device: A system and method for detecting, reporting, and repairing software defects in a wireless device is disclosed. The system has a wireless subscriber unit for communicating to a support server. The wireless subscriber unit maintains an action file indicative of the historical operation of the wireless subscriber unit. When the... Agent: Kyocera Wireless Corp.

20080046787 - Writing error verification method of pattern writing apparatus and generation apparatus of writing error verification data for pattern writing apparatus: A generation apparatus of writing error verification data for a pattern writing apparatus includes a data extraction part configured to extract, from layout data including a figure pattern to be written, part of the layout data required for an operation of a function having a writing error occurred after starting... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080046788 - Semiconductor memory device: The present invention provides a semiconductor memory device comprising a memory cell array including a plurality of memory regions, an address decoding portion for decoding an address applied from an external portion for simultaneously selecting all of the plurality of memory regions during a test read operation, a data IO... Agent: F. Chau & Associates, LLC

20080046789 - Apparatus and method for testing memory devices and circuits in integrated circuits: This patent describes a method for varying the amplitude and frequency of power supply oscillations produced by content addressable memories or other critical circuits using BIST. Supply oscillations are produced by performing noisy (high switching activity—high current demand) searches followed by quiet (low switching activity—low current demand) searches. The amplitude... Agent: Ibm Microelectronics Intellectual Property Law

20080046790 - Random number test circuit, random number generation circuit, semiconductor integrated circuit, ic card and information terminal device: A random number test circuit includes a counting unit to count number of repetitions of a certain-value bit in a random number sequence, the repetitions occurring in series, a detecting unit to detect a plurality of numbers corresponding to a kind of bits in the random number sequence, and a... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080046791 - Software testing method and system: A software product is tested by first obtaining a performance matrix for the software product, the performance matrix containing the profile results of a plurality of tests on the software product, and an expected result vector for the plurality of tests. A test sequence is then executed for the software... Agent: Ibm Corporation

20080046792 - Node device, control device, control method and control program: A control device managing a plurality of nodes transmitting and receiving data containing an error correcting code, comprises means accepting, when any one of the nodes detects an uncorrectable error from the data containing the error correcting code, a signal transmitted by the node detecting the error, means judging from... Agent: Staas & Halsey LLP

20080046793 - Method and apparatus for transmitting/receiving ack/nack in a frequency division multiple access system: A method and apparatus for transmitting/receiving an ACKnowledgement/Negative ACKnowledgement (ACK/NACK) signal to support packet data retransmission in an Frequency Division Multiple Access (FDMA) wireless communication system are provided, in which a User Element (UE) generates an ACK/NACK signal for received packet data, determines whether the UE is set to support... Agent: The Farrell Law Firm, P.C.

20080046794 - Information recording device and method, information reproducing device and method, recording medium, program, and disc recording medium: An ECC block is constituted by RS(248,216,33). Of a data length of 216 bytes (symbols), only 16 bytes are allocated to BCA data and the remaining 200 bytes are used for fixed data having a predetermined value. Using the fixed data of 200 bytes and the BCA data of 16... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080046797 - Apparatus, method and program product to generate and use crc in communications network: The CRC for the CPS Header of an ATM AAL2 cell is generated by a CRC generator which uses the 8 bits of the CID field to generate partial 5 bits CRCs which are loaded in a first table. The 6 bits LI field and 5 bits UUI field are... Agent: Driggs, Hogg & Fry Co. L.p.a.

20080046795 - System, method and storage medium for providing fault detection and correction in a memory subsystem: A memory subsystem with a memory bus and a memory assembly. The memory bus includes multiple bitlanes. The memory assembly is in communication with the memory bus and includes instructions for receiving an error code correction (ECC) word in multiple packets via the memory bus. The ECC word includes data... Agent: Cantor Colburn LLP-ibm Poughkeepsie

20080046796 - System, method and storage medium for providing fault detection and correction in a memory subsystem: A memory subsystem with a memory bus and a memory assembly. The memory bus includes multiple bitlanes. The memory assembly is in communication with the memory bus and includes instructions for receiving an error code correction (ECC) word in multiple packets via the memory bus. The ECC word includes data... Agent: Cantor Colburn LLP-ibm Poughkeepsie

20080046798 - Method and system for reducing volatile dram power budget: A portable device (114) includes a power source (120), a volatile memory (118) requiring refreshing to avoid data loss, and a memory management module (116). The volatile memory (118) is operably coupled to the power source (120) for power. The memory management module (116) is operably coupled to the volatile... Agent: Schwabe, Williamson & Wyatt, P.C. Pacwest Center, Suite 1900

20080046799 - Method for iteratively decoding block codes and decoding device therefor: Each received word is subjected to SISO turbodecoding consisting in generating decoded test words using an iterative algorithm, calculating the analog weight of the decoded test word, which weight is the half-sum of the products of the value of each bit mapped to ±1 of this decoded test word and... Agent: Young & Thompson

20080046800 - Detection, avoidance and/or correction of problematic puncturing patterns in parity bit streams used when implementing turbo codes: Detecting, avoiding and/or correcting problematic puncturing patterns in parity bit streams used when implementing punctured Turbo codes is achieved without having to avoid desirable code rates. This enables identification/avoidance of regions of relatively poor Turbo code performance. Forward error correction comprising Turbo coding and puncturing achieves a smooth functional relationship... Agent: Volpe And Koenig, P.C. Dept. Icc

20080046801 - Low density parity check codes decoder and method thereof: It is an object of the present invention to provide a low density parity check codes decoder that can decode an LDPC code with an arbitrary coding rate by the same configuration. The low density parity check codes decoder according to the present invention is configured to enable decoding of... Agent: Foley And Lardner LLP Suite 500

20080046802 - Memory controller and method of controlling memory: An estimating unit estimates, when there is a request for data in a system in which an error checking unit of data is formed with a plurality of memories each of which is a dual memory having an independent address line, whether an error has occurred on the address line... Agent: Staas & Halsey LLP

20080040628 - Method of managing nodes in computer cluster: A method is described of managing nodes in a computer cluster comprising: each node repeatedly broadcasting a cluster summary message; a cluster coordinator node identifying failed nodes by analysing cluster summary messages received from other nodes in the cluster; and the cluster coordinator node broadcasting an updated cluster organization status,... Agent: Hewlett Packard Company

20080040629 - Computer system having raid control function and raid control method: RAID control of multiple hard disk drives in a computer system includes performing a fault-tolerant data computing operation for a written data. The timing for performing the fault-tolerant data computing operation is determined by accessing a data stored in one of the hard disk drives, detecting a partial data length... Agent: Kirton And Mcconkie

20080040632 - Baseboard testing interface and testing method thereof: The present invention relates to a baseboard testing interface, which comprises: a baseboard, on which a plurality of first electronic components, a plurality of signal lines, and a first connection interface are configured, and the first electronic components are coupled to the signal lines; a slot disposed on the baseboard... Agent: John G. Chupa Law Offices Of John Chupa & Associates, P.C.

20080040633 - Traceability management apparatus, storage medium storing program, and tracing method: A hardware-information acquisition part, in the case of modification or addition to hardware configurations of semiconductor manufacturing devices to be managed, obtains that update information. To check the range of influence of a failure, as a first step, a software-condition conforming device extracting part extracts devices which have installed software... Agent: Mcdermott Will & Emery LLP

20080040634 - Performance monitor device, data collecting method and program for the same: A performance monitor device includes an input unit to input both of address information and event occurrence information, an address mask unit to determine an address area to which each piece of the inputted address information belongs, an execution frequency counter to count a number of times of execution of... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080040630 - Time-value curves to provide dynamic qos for time sensitive file transfers: A method and apparatus has been shown and described which allows Quality of Service to be controlled at a temporal granularity. Time-value curves, generated for each task, ensure that mission resources are utilized in a manner which optimizes mission performance. It should be noted, however, that although the present invention... Agent: Mcguinness & Manaras LLP

20080040631 - Enabling high availability and load balancing for jmx mbeans: Provided is a method for programming module load balancing and failover in a distributed computing environment. The Java Management extensions (JMX) specification is enhanced to support load balancing and provide a high-availability of JMX management beans (Mbeans). Also provided are enhancements to the programming model and infrastructure to support the... Agent: Greg Goshorn, P.C.

20080040635 - System and method for real-time validation of structured data files: Validating data of and/or indicating errors of a structured data file using eXtensible Markup Language (XML) elements and/or XML Path (XPATH) expression are described.... Agent: Microsoft Corporation

20080040636 - Integrated circuit having a subordinate test interface: An integrated circuit having a subordinate test interface and method for transmitting digital data is disclosed. The integrated circuit includes at least one test interface that is adapted to write and read data in and from a data memory, the at least one test interface includes, for transmitting and receiving... Agent: Dicke, Billig & Czaja

20080040637 - Diagnosing mixed scan chain and system logic defects: Technologies disclosed herein can be used to diagnose defects on die having both scan chain and system logic defects, including in situations where the presence of one or more faults in the system logic potentially obscures the detectability of one or more faults in the scan chains (or channels) and... Agent: Klarquist Sparkman, LLP

20080040638 - Evaluation circuit and method for detecting and/or locating faulty data words in a data stream tn: An evaluation circuit and method for detecting faulty data words in a data stream is disclosed. In one embodiment the evaluation circuit according to the invention includes a first linear automaton circuit and also a second linear automaton circuit connected in parallel, each having a set of states z, which... Agent: Dicke, Billig & Czaja

20080040639 - Apparatus and method for generating test pattern data for testing semiconductor device: An apparatus and a method for generating a test pattern data for testing a semiconductor device are disclosed. In accordance with and in particular to the apparatus and the method, a test pattern program is compiled by predicting a data operation to generate a test pattern data in an interleaved... Agent: Sughrue Mion, PLLC

20080040640 - Semiconductor integrated circuit and bist circuit design method: A semiconductor integrated circuit comprising a plurality of memory circuits; a BSIT circuit 140 operable to output test vectors; and one or more register circuit(s) 150 each allocated on a signal line that transmits test vectors output by the BIST circuit 140 to any of the memory circuits, and operable... Agent: Mcdermott Will & Emery LLP

20080040641 - System and method for performing processing in a testing system: A system and method is provided for performing processing in a test system. A flexible platform may be provided for developing test programs for performing automated testing. In one such platform, the tester and its instruments are isolated from the tester operating system, permitting any tester operating system to be... Agent: Lowrie, Lando & Anastasi, LLP

20080040642 - Content playback apparatus, content playback method, content playback system, content data providing apparatus, content data providing method, data structure, program, and storage medium: When a content playback apparatus has detected a content data acquisition error in a process of acquiring title screen content serving as next content that is to be reproduced after top screen content, the content playback apparatus reproduces sub-content contained as error-handling information in the top screen content, and then... Agent: Birch Stewart Kolasch & Birch

20080040643 - Forward error correction for 64b66b coded systems: A network component comprising a processor configured to implement a method that comprises applying a forward error correction (FEC) algorithm to a plurality of data blocks to generate a plurality of redundancy data, encapsulating an integer number of the data blocks and the redundancy data in an FEC codeword, and... Agent: Conley Rose, P.C.

20080040644 - Method of correcting message errors using cyclic redundancy checks: A method of correcting errors in a message transmitted over a digital communication channel, where the message was encoded using a CRC for purposes of error detection. A parity-check matrix representation of the CRC is computed for any fixed-length message, and that parity-check matrix is combined with the parity-check matrix... Agent: Polster, Lieder, Woodruff & Lucchesi

20080040645 - Error correction for disk storage media: Embodiments of the invention provide methods and systems for improving the reliability of data stored on disk media. Logical redundancy is introduced into the data, and the data within a logical storage unit is divided into sectors that are spatially separated by interleaving them with sectors of other logical storage... Agent: Fenwick & West LLP

20080040646 - Raid environment incorporating hardware-based finite field multiplier for on-the-fly xor: A hardware-based finite field multiplier is used to scale incoming data from a disk drive and XOR the scaled data with the contents of a working buffer when performing resync, rebuild and other exposed mode read operations in a RAID or other disk array environment. As a result, RAID designs... Agent: Wood, Herron & Evans, L.L.P. (ibm)

20080040647 - Apparatus and method for improving error correction capability using stuffing byte: A decoding circuit and method for improving error correction capability using a stuffing byte, in which in the decoding method, an input data packet is decoded. When it is determined that error correction is impossible based on a decoding result, a stuffing byte section is detected in the input data... Agent: F. Chau & Associates, LLC

20080040648 - Method, system, and access device for implementing error correction: A method, a system and an access device for implementing error correction are disclosed. The method includes upon receiving a data stream, identifying, by an access device, the data stream on which a forward error correction (FEC) needs to be performed and performing FEC coding on the data stream, and... Agent: Ladas & Parry

20080040649 - Apparatus and method of early decoding in communication systems: A method and apparatus are disclosed for forming a frame of interleaved information bits in a communication system, where the decoding of the frame of interleaved information bits may begin before all of the bits in the frame are received. An exemplary interleaved frame is formed by receiving a frame... Agent: Qualcomm Incorporated

20080040650 - Symbol reconstruction in reed-solomon codes: Symbol reconstruction methods by applying Galois Field arithmetic to Reed Solomon codewords have been disclosed. Reconstruction methods by applying n-valued reversing logic functions are also provided. A correct codeword can be selected from calculated codewords by comparing a calculated codeword with the Reed-Solomon codeword in error. A correct codeword can... Agent: Diehl Servilla LLC

20080040651 - Encoding apparatus, decoding apparatus, encoding method, decoding method, and storage device: An ECC decoder outputs, to a likelihood substituting unit, information on data in data blocks that is corrected to be valid. Based on the information, the likelihood substituting unit substitutes likelihood corresponding to the data corrected to be valid by the maximum value, and outputs it to an LDPC decoder.... Agent: Greer, Burns & Crain

20080040652 - Memory error detection device and method for detecting a memory error: A memory error detection device for a memory having cells arranged in memory rows and columns, wherein the memory is occupied such that the protection memory row or column has a predetermined reference parity value in a state of integrity, the parity value is chosen so that a row or... Agent: Eschweiler & Associates LLC

20080034253 - Ferroelectric memory with spare memory cell array and ecc circuit: A semiconductor memory comprising a memory cell array, a spare memory cell array, a spare data replacing circuit, a syndrome computing circuit, and an ECC circuit is disclosed. The data in the memory cell replaced with a memory cell in the spare memory cell array is set to 0 and... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20080034248 - Method and device for a safety-orientated wireless signal transmission: A method for safety-directed wireless signal transmission is provided. The method includes duplicating an input signal; supplying each copy of the duplicated input signal within a source unit to a transmitter module over separate, independent software paths; transmitting the copies using the transmitter module over a common wireless transmission link... Agent: Brinks Hofer Gilson & Lione

20080034249 - Fail-over in a multi-computer system: System and method for managing data fail-over for a computing system comprising a plurality of computers, e.g., computer blades, coupled through a network. A fail-over condition may indicate a component failure, an imminent failure, and/or a need to modify or replace some aspect of a computer. Computers in the system... Agent: Jeffrey C. Hood Meyertons, Hood, Kivlin, Kowert & Goetzel PC

20080034250 - Transfer of error-analysis and statistical data after retry in a fibre channel input/output system: A computer Input/Output system having a fabric, a control unit (CU) and a host computes including a channel, the channel having a channel port connected by a first link to a channel neighbor port of the fabric, and the control unit having a CU port connected by a second link... Agent: International Business Machines Corporation

20080034251 - High availability via data services: Application-level replication, the synchronization of data updates within a cluster of application servers, may be provided by having application servers themselves synchronize all updates to multiple redundant databases, precluding the need for database-level replication. This may be accomplished by first sending a set of database modifications requested by the transaction... Agent: Fenwick & West LLP

20080034252 - Memory management method and portable terminal device: A memory management method for managing a non-volatile memory into which writing is performed in units of blocks includes the steps of assigning a plurality of blocks of the non-volatile memory to a management area formed of at least one block for storing management information, to a code area formed... Agent: Rader Fishman & Grauer PLLC

20080034254 - Test system and method: A system and method for configuration of general purpose test equipment is provided. According to various examples of the invention, performance specification documents in electronic form are input using mark-up language and a mark-up language reader converts the performance specification document into, selectively, a human readable document and a delimited... Agent: Arnold & Knobloch, L.L.P.

20080034255 - Program failure analysis system, failure analysis method, and emulator device: A CPU forced stop signal is used as means for stopping execution of a program executed on a ROM by a CPU of a target system. A time required for stopping the CPU from the issuance of the CPU forced stop signal between an ICE device and the CPU is... Agent: Antonelli, Terry, Stout & Kraus, LLP

20080034256 - Iso-parallel ups system configuration: An Iso-Parallel UPS system may combine the system redundancy, isolation and fault-limiting properties of isolated-redundant systems, with the ability to spread system load evenly across all modules like paralleled systems. This system may have the following features: (1) the critical load can be divided into two or more portions, and... Agent: Miles & Stockbridge PC

20080034257 - Remote diagnosis system for medical appliances of modular design: A method is disclosed for determining a configuration for a computer tomograph for the purpose of error diagnosis, a module, a computer tomograph and a system of appropriate design. The computer tomograph includes a multiplicity of detector modules. In at least one embodiment, a respective detector module is designed to... Agent: Harness, Dickey & Pierce, P.L.C

20080034258 - Fault management apparatus, fault management method, fault management program and recording medium recording the same: A fault management apparatus that enables calculation of evaluation values relating to a fault occurring to a management target as objective values without involvement of human judgment is provided. Fault information containing fault content information showing content of a fault occurring to a process in a production line, and detection... Agent: Foley And Lardner LLP Suite 500

20080034259 - Data recorder: A data recorder includes a first memory element including read/write capability, a second memory element including non-volatile memory and a controller for realizing memory management functions. The controller responds to a predetermined triggering event by writing selected data from the first memory element to the second memory element. The selected... Agent: Technology Law Group, LLC

20080034260 - Method for structured storage of error entries: In a method for structured storage of error entries of the users of a data bus in a motor vehicle, upon occurrence of an error, a function possibly influenced by the error and the members of an associated function-specific group of diagnostic-relevant users is determined, an error entry is prepared... Agent: Crowell & Moring LLP Intellectual Property Group

20080034261 - System and method for reducing test time for loading and executing an architecture verification program for a soc: A system and method for reducing test time for loading and executing an architecture verification program for a system-on-a-chip (SoC) are provided. The mechanisms of the illustrative embodiments reorganize the scan chains of the SoC and provide an algorithm for organizing and pipelining architectural verification program (AVP) data for scanning... Agent: Ibm Corp. (wip) C/o Walder Intellectual Property Law, P.C.

20080034262 - Double data rate test interface and architecture: A device test architecture and a reduced device test interface are provided to enable efficient testing of embedded cores and other circuits within devices. The reduced device test interface is achieved using a double data rate (DDR) signaling technique between the tester and the device. The DDR test interface allows... Agent: Texas Instruments Incorporated

20080034263 - Semiconductor integrated circuit device and internal power control system including the same: One object of the present invention is to provide an LSI that can dynamically perform appropriate adjustment for a power voltage to be supplied to an internal circuit, not only at the time of the occurrence of the initial change of a performance due to a variation or variety factors... Agent: Ibm Microelectronics Intellectual Property Law

20080034264 - Dynamic redundancy checker against fault injection: A method and system for checking data stored in a memory of in a computer system is disclosed. The memory includes a plurality of memory addresses. The method and system include providing a signature generator coupled with the memory, providing a checker memory coupled with the signature generator and separate... Agent: Sawyer Law Group LLP

20080034265 - Tester for testing semiconductor device: A tester for testing a semiconductor device is disclosed. In accordance with the tester, a data is fetched using a data strobe signal transmitted from a DUT, thereby increasing an accuracy of the fetched data, securing a window for fetching a last portion of the data using a data strobe... Agent: Sughrue Mion, PLLC

20080034266 - Tester for testing semiconductor device: A tester for testing a semiconductor device is disclosed. The tester for testing the semiconductor device employs a data selector for converting a logical test pattern data transmitted from a pattern generator into a physical test pattern data and an expected data based on the logical test pattern data, thereby... Agent: Sughrue Mion, PLLC

20080034267 - Switch with error checking and correcting: Data error often occurs during the process of data transmission or storage. Typically, a store-and-forward data switch uses the frame check sequence portion of a data frame to detect for error that occurred during transit to the switch. However, error could be introduced into the data frame when it is... Agent: Sterne, Kessler, Goldstein & Fox P.l.l.c.

20080034268 - Data compression and storage techniques: Provided are systems and methods for use in data archiving. In one arrangement, compression techniques are provided wherein an earlier version of a data set (e.g., file folder, etc) is utilized as a dictionary of a compression engine to compress a subsequent version of the data set. This compression identifies... Agent: Marsh, Fischmann & Breyfogle LLP

20080034269 - Apparatus and method for recording data in information recording medium to which extra ecc is applied or reproducing data from the medium: A data recording and/or reproducing apparatus and method for an information recording medium includes: an extra ECC encoder; and an extra ECC controller determining whether extra ECC is applied to the information recording medium, and controlling the extra ECC encoder to generate an extra parity data block corresponding to data... Agent: Stein, Mcewen & Bui, LLP

20080034270 - Semiconductor memory device capable of changing ecc code length: The data memory cell array and parity memory cell array in the memory cell array has a constitution that is capable of corresponding with a plurality of ECC code lengths. An input-side parity generation circuit that generates parities from write data, an output-side parity generation circuit that generates parities from... Agent: Arent Fox LLP

20080034271 - Interleaver mode detection in a digital video receiver: A method and apparatus for decoding received digital data representing video, audio, information or a combination thereof. After a forward error correction (FEC) frame sync lock is detected, a counter is incremented corresponding to the number of identical control words decoded from the received data. If the number of identical... Agent: Thomson Licensing LLC

20080034272 - System and method for correcting errors in non-volatile memory using product codes: A product code encoder for non-volatile (NV) memory includes a first encoder that encodes data in codewords in a first dimension that is stored in the NV memory. The product code encoder also includes a second encoder that encodes data in codewords in a second dimension that is stored in... Agent: Harness, Dickey & Pierce P.L.C

20080034273 - Information additive code generator and decoder for communication systems: An encoder uses an input file of data and a key to produce an output symbol. An output symbol with key I is generated by determining a weight, W(I), for the output symbol to be generated, selecting W(I) of the input symbols associated with the output symbol according to a... Agent: Townsend And Townsend And Crew, LLP

20080034274 - Decoder and decoding method in consideration of input message characteristics: Provided are a decoder and decoding method wherein decoding is performed in consideration of input message characteristics. The decoder includes a fixed information checking unit for checking whether input data corresponds to fixed information; and a Branch Metric Calculation (BMC) unit for allowing the fixed information checking unit to check... Agent: Roylance, Abrams, Berdo & Goodman, L.L.P.