Error detection/correction and fault detection/recovery inventions 08/07

20070204187 - Method, system and storage medium for a multi use water resistant or waterproof recording and communications device: A method, system and storage medium for a multi-use water resistant or waterproof recording and communications device. A network system of embodiments herein comprises an information engine to integrate a plurality of system components and a server to execute the information engine. The system further comprises a storage system to... Agent: Frederick W. Gibb, Iii Gibb & Rahman, LLC

20070204188 - Error correction method and reproduction apparatus: A reproduction method includes a step of performing error correction of the first coded data piece and generating error location information which represents an error location of the first coded data; a step of generating erasure locator information which represents an erasure position of the second coded data piece, based... Agent: Mark D. Saralino (mei) Renner, Otto, Boisselle & Sklar, LLP

20070204189 - Method and system for testing a random access memory (ram) device having an internal cache: A method for testing an internal bus of a random access memory (“RAM”) device, the RAM device having an internal cache coupled to a memory array by the internal bus, the method comprising: writing a value to an address in the RAM device, the value being stored in the internal... Agent: Kramer & Amado, P.C.

20070204190 - Test algorithm selection in memory built-in self test controller: An integrated circuit chip is provided that comprises on-chip memory and test circuitry. The test circuitry is configured to perform operational testing of the on-chip memory. The test circuitry comprises a controller which is configured to perform a selection out of a plurality of test algorithms to perform the operational... Agent: Meyertons, Hood, Kivlin, Kowert & Goetzel (amd)

20070204191 - Method for detecting a malfunction in a state machine: A method for detecting a malfunction in a state machine is described. The state machine has an operation modeled by a set of states linked to each other by transitions, the state machine generating, upon each transition, output signals according to input signals comprising signals generated during a previous transition.... Agent: Seed Intellectual Property Law Group PLLC

20070204192 - Method for detecting defects of a chip: A method for detecting a defect of a chip includes: utilizing a plurality of scan patterns to scan a plurality of scan chains of the chip; for each of the scan patterns, obtaining a suspected defect set and an unsuspected defect set; obtaining an intersection of all suspected defect sets... Agent: North America Intellectual Property Corporation

20070204193 - Microcontroller for logic built-in self test (lbist): Built-in self-test (BIST) microcontroller integrated circuit adapted for logic verification. Microcontroller includes a plurality of hardware description language files representing a hierarchical description of the microcontroller, the plurality of hardware description language files including a library of circuit design elements, a plurality of library design circuit elements adapted to store... Agent: Greenblum & Bernstein, P.L.C

20070204194 - Testing of multiple asynchronous logic domains: A digital system and a method for operating the same. The digital system includes (a) a first and a second pins, (b) first and second logic domains, and (c) first and second test pulse generator circuits. The first test pulse generator circuit is electrically coupled to the first pin and... Agent: Schmeiser, Olsen & Watts

20070204195 - Apparatus and method for tracking packets in a reliably connected transmission system: A method and apparatus tracks packets and reliably transmits data over a computer transmission system with a reduced amount of memory needed in the transmission interface. The invention eliminates the need to keep all the packets of data queued until the acknowledge message for that data has arrived. Instead, it... Agent: Martin & Associates, LLC

20070204196 - Streaming and buffering using variable fec overhead and protection periods: Data is streamed from a transmitter to a receiver, wherein streaming is transferring data with an assumption that the receiver will begin using the data before it is all transmitted and received and the streamed data includes forward error correction (“FEC”) and the rates of data consumption can vary. The... Agent: Townsend And Townsend And Crew, LLP

20070204198 - Apparatus and method for transmitting/receiving signal in communication system: Disclosed is an apparatus and a method for transmitting/receiving a signal in a communication system, which generates an Affine Permutation Matrix-Low Density Parity Check (APM-LDPC) codeword by encoding an information vector in an APM-LDPC encoding scheme which is a preset structured LDPC encoding scheme, and detects the information vector by... Agent: The Farrell Law Firm, P.C.

20070204197 - Decoding device, control method, and program: A decoding device for decoding LDPC (Low Density Parity Check) codes includes a message calculation unit for performing a variable node calculation for decoding the LPDC codes using a message to be supplied, or performing a check node calculation, and outputting the message to be obtained as a result of... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070204199 - Semiconductor memory device and memory system including the same: A semiconductor memory device and a memory system including the same are provided. The semiconductor memory device may include a first memory cell array block generating first data, a second memory cell array block generating second data, and first and second error detection code generators. The first error detection code... Agent: Harness, Dickey & Pierce, P.L.C

20070204200 - High reliability memory module with a fault tolerant address and command bus: A high reliability dual inline memory module with a fault tolerant address and command bus for use in a server. The memory module is a card approximately 151.35 mm or 5.97 inches long provided with about a plurality of contacts of which some are redundant, a plurality of DRAMs, a... Agent: Cantor Colburn LLP-ibm Poughkeepsie

20070204201 - High reliability memory module with a fault tolerant address and command bus: A high reliability dual inline memory module with a fault tolerant address and command bus for use in a server. The memory module is a card approximately 151.35 mm or 5.97 inches long provided with about a plurality of contacts of which some are redundant, a plurality of DRAMs, a... Agent: Cantor Colburn LLP-ibm Poughkeepsie

20070204202 - Information recording disc, recording and/or reproducing device and method: Four ECC blocks are recorded in a burst cutting area of an optical disc. Each ECC block is constituted by a BCA content code of 1 byte, content data length of 1 byte, and content data of 14 bytes. Of the BCA content data, the leading 6 bits are used... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070204203 - Layered multiple description coding: A data sequence may be encoded in a plurality of layers of multiple description coding. The layers of multiple description coding may include a first and a second layer of multiple description coding. The first layer of multiple description coding may include an initial part of a data sequence as... Agent: Wolf Greenfield (microsoft Corporation) C/o Wolf, Greenfield & Sacks, P.C.

20070204204 - Concurrent code checker and hardware efficient high-speed i/o having built-in self-test and debug features: Method, device, and system for testing for errors in high-speed input/output systems. System and device may include a concurrent code checker for checking for errors in encoded data packets through data packets static properties and dynamic properties of the data stream including the packets. Method may involve detecting invalid encoded... Agent: Perkins Cole LLP

20070204205 - Method and system for application of unequal error protection to uncompressed video for transmission over wireless channels: A method and system of wireless communication is provided which involves inputting information bits, wherein certain bits have higher importance level than other bits, and applying unequal protection to the bits at different importance levels. As such, important bits are provided with more protection for transmission and error recovery. Applying... Agent: Kenneth L. Sherman, Esq. Myers Dawes Andras & Sherman, LLP

20070204206 - Electronic data flash card with reed solomon error detection and correction capability: One embodiment of the present includes a electronic data storage card having a Reed Solomon (RS) decoder having a syndrome calculator block responsive to a page of information, the page being organized into a plurality of data sections and the overhead being organized into a plurality of overhead sections. The... Agent: Law Offices Of Imam

20070204207 - Error correction code decoder: An ECC decoder for correcting a coded signal received, which includes a syndrome calculation and errata evaluation device to receive a code word of the coded signal for performing a syndrome calculation to thereby output a syndrome polynomial, and to receive an erasure and errata evaluator polynomial and an errata... Agent: Bacon & Thomas, PLLC

20070204208 - Device and method for correcting kinescope scan distortion: We describe a device and an associated method that includes an EHT signal processing module to generate a compensated gain signal responsive to a first EHT signal. A field fly-back processing module generates a first correcting signal responsive to a first VFB signal. A horizontal scanning correction module generates a... Agent: Marger Johnson & Mccollom, P.C.

20070198874 - Electronic control apparatus for vehicles: An electronic control apparatus for vehicles is provided. The apparatus comprises a volatile memory storing control data therein, a control component performing control necessary to the vehicle using the control data in the volatile memory, and an update component updating the control data in the volatile memory based on controlled... Agent: Nixon & Vanderhye, PC

20070198873 - Method of operation of a microprocessor: The invention relates to a microprocessor and a method of operation thereof. More particularly this invention relates to a microprocessor, having at least three pipeline execution units which operate in lockstep. In an embodiment, the method of operation of a microprocessor accounts for the occurrence of transient faults or Single... Agent: Greenlee Winner And Sullivan P C

20070198875 - Method for trunk line duplexing protection using a hardware watchdog: The present invention relates to a method for switching dualized trunk lines, more particularly a method for switching dualized trunk lines using a hardware Watchdog function in communication equipments. According to the present invention, trunk interfacing boards are dualized so that a failure of the board does not lead to... Agent: Mcdonnell Boehnen Hulbert & Berghoff LLP

20070198876 - Digital broadcasting transmission apparatus and robust stream coding method thereof: A digital broadcasting transmission apparatus and robust stream coding method thereof. The digital broadcasting transmission apparatus includes a robust processor that codes a robust stream of a dual transport stream where a normal stream and the robust stream are combined. The robust processor includes a demultiplexer (DE-MUX) that separates the... Agent: Stein, Mcewen & Bui, LLP

20070198877 - Wireless mobile device: A wireless mobile device comprising a base band receiver for providing received data to an application processor for storage in memory, wherein the application processor is arranged to provide to the base band receiver the data extracted from the memory in interleaved form for error correction.... Agent: Freescale Semiconductor, Inc. Law Department

20070198879 - Method, system, and medium for providing interprocessor data communication: A method of transmitting data between processors, including: establishing and storing an encoding method for each area of virtual address space of a first processor in a predetermined storage device; determining an area of virtual address space corresponding to data to be transmitted to a second processor; and determining the... Agent: Staas & Halsey LLP

20070198878 - Two-way communication method, apparatus, system, and program: Two-way communication apparatuses 101 and 103 communicating with each other via a transmission line 102 have an encoding part and a decoding part, and also has at least one of a combination of an interleaver and a de-interleaver and a combination of an error correcting encoding part and an error... Agent: Sughrue Mion, PLLC

20070198880 - Semiconductor integrated circuit and testing method thereof: There are provided a plurality of bridge circuits which convert the test data information from a common test bus connected to a plurality of memories of different access data widths and address decode logics to the inherent access data widths of each memory and also convert the test address information... Agent: Stanley P. Fisher Reed Smith LLP

20070198881 - Test system and method for testing electronic devices using a pipelined testing architecture: A test system for performing tests on devices under test (DUTs) includes a storage device storing test data for performing the tests on the DUTs, a shared processor for generating the test data, storing the test data in the storage device and generating a test control signal including one or... Agent: Agilent Technologies Inc.

20070198882 - Method and circuit for lssd testing: A method and integrated circuit for LSSD testing. The integrated circuit includes a plurality of clock domains supplied with test clocks from separate clock generation circuits. In each clock domain, a scan latch at a clock domain boundary receiving an input from another clock domain includes a master latch for... Agent: Schmeiser, Olsen & Watts

20070198883 - Scan read block wherein a scan latch circuit and a bit cell have substantially identical circuit structures: A scan read block has a relatively short latch circuit and an acceptable noise margin. The scan read block includes a bit cell array and a scan latch block. The bit cell array includes bit cells transmitting data through a corresponding bit line and inverted bit line. The data is... Agent: Frank Chau, Esq. F. Chau & Associates, LLC

20070198884 - Peripheral connector with boundary-scan test function: A peripheral connector includes a peripheral signal terminal set and a test signal terminal set for respectively electrically connecting a peripheral interface and a boundary scan interface of a microcomputer. A socket is selectively connectable to a peripheral device for data transmission between the peripheral device and the microcomputer or... Agent: Browdy And Neimark, P.l.l.c. 624 Ninth Street, Nw

20070198885 - Semiconductor integrated circuit and test system for testing the same: A semiconductor integrated circuit includes a pin section, internal circuits, an interface section, an expectation value generation circuit, a comparison circuit and a waveform generation circuit. In a first test mode, the expectation value generation circuit generates expectation values of operation signals to be generated by the interface section when... Agent: Mcdermott Will & Emery LLP

20070198886 - Controller of electronic device, bus control device: Processing ability can be easily decreased in a processor connected by a bus to a device that is a bus master. A controller of an electronic device has a processor and a bus controller that is the bus master of the processor, the bus controller including a mode determining section... Agent: Sughrue Mion, PLLC

20070198887 - Apparatus and method for applying unequal error protection during wireless video transmission: Wireless transmission of high-definition video, whether essentially uncompressed or compressed, is prone to errors during reception due to the condition of the wireless link. To ensure video quality during changing link conditions it is desirable to ensure that those portions of the video that represent the more important components of... Agent: Glenn Patent Group

20070198888 - Hard-decision iteration decoding based on an error-correcting code with a low undecectable error probability: A decoding system decodes forward error correction (FEC) encoded data. Factor graph circuitry (such as trellis decoder circuitry) processes the FEC encoded data according to at least one factor graph. Order restoring circuitry (such as convolutional deinterleaver circuitry) is coupled to an output of the factor graph circuitry and restores... Agent: Beyer Weaver LLP

20070198891 - Communication system: A communication system comprises a transmitting device and a receiving device. The transmitting device includes means for connecting an addition bit string containing at least one bit 1 to information data, means for generating a CRC code corresponding to a remainder at a polynomial ring on a Galois field defined... Agent: Leydig Voit & Mayer, Ltd

20070198889 - Method and system for repairing partially damaged blocks: A method for reconstructing a logical block, wherein the logical block comprises a first set of sectors. The method including obtaining a copy of the logical block comprising a second set of sectors, determining which of the sectors in the first set of sectors are identical to sectors in the... Agent: Osha Liang L.L.P./sun

20070198890 - Method for creating an error correction coding scheme: The present invention relates to a method for reducing data loss comprising a first computing step for computing an intermediate result for each redundancy information entity of a redundancy set by processing respectively associated data information entities of a given data set on at least two main diagonals of a... Agent: Richard M. Goldman

20070198892 - Systems and methods for detecting a failure event in a field programmable gate array: An embodiment generally relates to a method of self-detecting an error in a field programmable gate array (FPGA). The method includes writing a signature value into a signature memory in the FPGA and determining a conclusion of a configuration refresh operation in the FPGA. The method also includes reading an... Agent: National Aeronautics And Space Administration Langley Research Center

20070198893 - Error correction block, method and apparatus for generating error correction block, and error correction method: An error correction block having an extended format compatible with a standardized format of a conventional error correction block, a method and apparatus for generating the error correction block, and a method of correcting an error using the error correction block. The method of generating an error correction block includes... Agent: Stein, Mcewen & Bui, LLP

20070198894 - Information recording disc, recording and/or reproducing device and method: Four ECC blocks are recorded in a burst cutting area of an optical disc. Each ECC block is constituted by a BCA content code of 1 byte, content data length of 1 byte, and content data of 14 bytes. Of the BCA content data, the leading 6 bits are used... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070198896 - Decoding with a concatenated error correcting code: A concatenated channel decoding method wherein the bits of a set of N1 bits decoded using a first iterative block decoding algorithm and intended to be decoded using a second block decoding algorithm, are sent in parallel in at least one subset of P bits to a buffer for temporary... Agent: Seed Intellectual Property Law Group PLLC

20070198895 - Iterative decoding of a frame of data encoded using a block coding algorithm: A method for the iterative decoding of a block of bits having a number N of bits to be decoded where N is a whole number greater than or equal to two, using an iterative decoding algorithm, comprises the generation of a current block of N intermediate decision bits by... Agent: Seed Intellectual Property Law Group PLLC

20070198898 - Device and method for mitigating effects of impulse noise on data packet transfer: A device (112) for mitigating effects of impulse noise on data packet transfer over a communication line (102) is configured at least partially according to physical layer characteristics of the communication line (102). As an example, a data packet retransmission device (112) might be configured to retransmit in response to... Agent: Sughrue Mion, PLLC

20070198900 - Network intermediate device and method thereof: A network intermediate device and method are provided. The network intermediate device according to an exemplary embodiment of the present invention comprises a data transmitting/receiving part which receives frames which have header error check information, and a control part which controls the data transmitting/receiving part to start forwarding the frame... Agent: Roylance, Abrams, Berdo & Goodman, L.L.P.

20070198899 - Low complexity channel decoders: A packet of encoded data is received and decoded using a look-up table that stores information approximating output of an algorithmic decoding process.... Agent: Fish & Richardson, PC

20070198897 - Method and apparatus to perform error control: Embodiments to perform improved error control using packet fragments are described.... Agent: Kacvinsky LLC C/o Intellevate

20070198901 - Configurable interface for connecting various chipsets for wireless communication to a programmable (multi-)processor: Among the embodiments of the present invention, one of the embodiment thereof includes a heterogeneous, high-performance, scalable processor including at least one W-type sub-processor capable of processing W bits, or more, in parallel, W being an integer value, at least one N-type sub-processor capable of processing N bits in parallel,... Agent: Maryam Iman, Esq. Law Offices Of Imam

20070198902 - Semiconductor memory device: A semiconductor memory device has a built-in error detection and correction system, wherein the error detection and correction system is formed to have a cyclic code, with which multiple error bits are correctable, and wherein the cyclic code is configured in such a manner that a certain number of degrees... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070198903 - Clocking chien searching at different frequency than other reed-solomon (rs) ecc decoding functions: Clocking Chien searching at different frequency than other Reed-Solomon (RS) ECC decoding functions. An efficient implementation allows for a fast clock signal to govern the operation of the more computationally and time-intensive portions of the error correction code (ECC) time budget. For example, at least one module and/or decoding function... Agent: Garlick Harrison & Markison

20070198904 - Error correction processing apparatus and error correction processing method: According to one embodiment, when a digital data row A is error-uncorrectable, error correction is carried out on the basis of an error pattern which can be acquired without using syndromes. When a digital data row B after the error correction is error-correctable, error correction is carried out by generating... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070198905 - Transmitter for a communications network: c

20070198906 - Sport action coding: A method of compressing data representing a sequence of images in dependence upon data defining at least one region of particular interest within at least one image in the sequence includes causing data representing an image region that is not of particular interest to be more highly compressed than data... Agent: Fish & Richardson PC

20070192652 - Restricting devices utilizing a device-to-server heartbeat: A method of automatically locking a client can include a step of a client automatically establishing a heartbeat interval. A determination can be automatically made regarding whether a proper server response is received within the heartbeat interval. When no proper response is received, the client can be automatically placed in... Agent: Patents On Demand, P.A.

20070192653 - Data defect detection using soft decision result: A defect detection device, apparatus, and method for detecting a defect of data recorded on a recording medium. The defect detection device includes a waveform state detection part generating information representing a state of a waveform of a reproduced signal from the recording medium based on soft decision results obtained... Agent: Staas & Halsey LLP

20070192654 - System and method for diagnostics execution and data capture in a storage system using nonvolatile memory: The present invention provides a system and method for diagnostics execution in which diagnostics code is stored in a designated partition on a removable nonvolatile memory device, such as a compact flash or a personal computer (PC) card that is interfaced with the motherboard of a file server system. The... Agent: Cesari And Mckenna, LLP

20070192655 - Methods and apparatus for generating permutations: Methods and apparatus for determining at least one permutation of a set of a K number of values are disclosed. The methods and apparatus utilize a first permutation functionality that maps an index value to another value within the set of K values according to the first outputting the mapped... Agent: Qualcomm Incorporated

20070192656 - Error detection device and method for error detection for a command decoder: An error detection device for a command decoder is described, the command decoder reading out an associated sequence of control signal words from a command memory based on an input word, wherein the sequence of control signal words has at least one control signal word, having: a controller designed to... Agent: Dickstein Shapiro LLP

20070192657 - Configuring flash memory: A system for configuring or testing memory may cycle a memory array while substantially concurrently performing other functional testing. In particular implementations, the system may configure, or cycle, a flash memory using a serial interface and test other functional units using the same serial interface substantially concurrently with cycling the... Agent: Fish & Richardson P.C.

20070192658 - Measuring the internal clock speed of an integrated circuit: A system and methods to transfer data between a testing interface and an IC. The system may include a synchronization subsystem to monitor the transitions of the test interface clock and/or IC clock to determine a clock adjustment appropriate to substantially synchronize the clocks. In certain implementations, a synchronization unit... Agent: Fish & Richardson P.C.

20070192660 - Semiconductor device and method of adding tester circuit for the same: A semiconductor device according to an embodiment of the present invention includes: a plurality of clock domains including a plurality of logic circuits operating in accordance with a clock signal; and a control circuit selectively supplying the clock signal to a predetermined number of clock domains selected from the plurality... Agent: Foley And Lardner LLP Suite 500

20070192659 - Shift register, scan driving circuit and display device having the same: A shift register includes a plurality of stages, each of the stages generate an output signal, in sequence. Each of the shift register includes a present stage and a first capacitor. The present stage outputs an output signal based on one of a scan start signal and a carry signal... Agent: Cantor Colburn, LLP

20070192661 - Automatic test equipment (ate) realized through sharing same memory space by instruction data and vector data: An improved Automatic Test Equipment (ATE) in which Instruction Memory and a Vector Memory are combined together into a tester pattern memory in order to share the same memory space. As such, reducing the memory, size, and cost of the Automatic Test Equipment.... Agent: Wpat, PC Intellectual Property Attorneys

20070192662 - Dmb system and method for downloading bifs stream and dmb terminal: A DMB (Digital Multimedia Broadcasting) system and a method for re-downloading an erroneous BIFS (Binary Format for Scene) stream received by a DMB terminal in a terrestrial DMB system, as well as a DMB terminal. The method includes determining whether an error has occurred in a BIFS object contained in... Agent: The Farrell Law Firm, P.C.

20070192663 - Methods and apparatus to select tornado error correction parameters: Methods and apparatus to select Tornado forward error correction parameters for delivery systems are disclosed. A disclosed example system includes a transmitter station comprising a processor to select a Tornado error correction parameter based on an error correction configuration for a file and to indicate to a receiver the selected... Agent: The Direvtv Group, Inc.

20070192664 - Semiconductor memory: A conversion control unit sets a converting function of a write data conversion unit or a read data conversion unit enabled or disabled for each controller. Accordingly, for a controller which needs original external data, the external data can be inputted and outputted, whereas for a controller which needs converted... Agent: Arent Fox PLLC

20070192665 - System with read protecting function: The present invention relates to a system with read protecting function that comprises a record medium, having a data substrate with a control data zone and a data zone thereon, wherein the control data zone has a plurality of blocks, and every block has a plurality of sectors, and every... Agent: Troxell Law Office PLLC One Skyline Place

20070192667 - Cyclic redundancy check (crc) based error correction method and device: The communication method includes the use of CRC codes for additional error correaction in addition to the error detection capability. The method is for error detection and correaction in a received message that includes N message bits and M Cyclic Redundancy Check (CRC) bits appended thereto. It is determined whether... Agent: Allen, Dyer, Doppelt, Milbrath & Gilchrist P.A.

20070192666 - Systems and methods for error reduction associated with information transfer: Various systems and methods for error reduction in a digital information system are disclosed herein. As one example, a digital storage system is provided that includes a storage medium that with an encoded data set accessible via a buffer. The systems further include a soft output Viterbi algorithm channel detector... Agent: Hamilton And Desanctis

20070192668 - Implicit message sequence numbering for locomotive remote control system wireless communications: A method for providing wireless communications between a locomotive control unit (LCU) (14) on board a locomotive (16) and a portable operator control unit (OCU) (12) for use in controlling operation of the locomotive from an off-board location includes calculating a transmit bit error check value for a wireless message.... Agent: Beusse Wolter Sanks Mora & Maire, P.A.

20070192669 - Combined encoder/syndrome generator with reduced delay: A combined encoder/syndrome generator is provided that has a reduced delay. The combined encoder/syndrome generator generates check symbols during an encoding process and error syndromes during a decoding process. The combined encoder/syndrome generator has two or more blocks. The output of each block is fed as an input into a... Agent: Steven J. Cahill

20070192670 - Decoding device and decoding method: The decoding device decoding coded data coded by a low density parity check code by using a plurality of parity check matrixes, comprises a pattern storing unit storing information about the parity check matrix and the segmentation pattern of the parity check matrix, which is formed by segmenting the parity... Agent: Bingham Mccutchen LLP

20070186126 - Fault tolerance in a distributed processing network: A distributed processing network is disclosed. The network includes at least one network switch, coupled to one or more end nodes, and adapted to simultaneously receive and route a plurality of data packets between the one or more end nodes. Within the network, the one or more end nodes are... Agent: Honeywell International Inc.

20070186127 - Verification of computer backup data: A backup method for a computer system network avoids generating hashes from data that may be inaccurate due to network errors affords verification of source data written to backup media includes reading at a network client a portion of the source data from a source storage volume and generating a... Agent: Law Offices Of Barry N. Young

20070186128 - Mips recovery technique: Self-calibration of devices such as computer and graphics processors permits adjustment of processor clock rates, and access to normally unused processor capacity. Processor clock rates specified by device manufacturers are normally selected to insure operation across the entire manufacturer-specified range of operating temperatures and supply voltages. By limiting processor clock... Agent: Mcandrews Held & Malloy, Ltd

20070186129 - Address generation apparatus for turbo interleaver and deinterleaver in w-cdma systems: There is provided an address generation apparatus for one of an interleaver and a deinterleaver in a Wideband Code Division Multiple Access (W-CDMA) system. The apparatus includes an address pair generator for generating an address pair (n, P(n)) in real-time for one of an interleaver operation and a deinterleaver operation... Agent: Joseph J. Laks, Vice President Thomson Licensing LLC

20070186130 - Reduced size transmission data packet header format for a medical device: The present invention relates to a reduced size format for transmission packet header wherein a source address is encoded together with a check code in a medical device. The packet header thus contains one single field now in place of two i.e. the check code and source address. At the... Agent: Novo Nordisk, Inc. Patent Department

20070186131 - Low cost imbedded load board diagnostic test fixture: In a method and system for testing an intermediary device, a tester provides a test signal to a device under test (DUT) via a first circuit path on the intermediary device. A first response is received from the DUT to verify that the DUT and the first circuit path are... Agent: Texas Instruments Incorporated

20070186132 - Testing of circuits with multiple clock domains: A circuit under test (24) has a scan chain comprising flip-flop cells (IOa-c) with inputs and outputs operationally connected to the logic circuits (12). Different clock domains each contain a respective part of the flip-flop cells (10a-c) that are clocked by a respective domain clock signal (CLKa, CLKb, CLKc). A... Agent: Nxp, B.v. Nxp Intellectual Property Department

20070186133 - Data transmission system: A Digital Video Broadcasting system comprises a service provider generating first digitally coded information; a broadcast network provider receiving the first digitally coded information, said broadcast network provider includes a protocol stack having an MPEG2 TS layer below an IP layer; and encapsulates digitally coded information into MPEG-2 TS packages,... Agent: Birch Stewart Kolasch & Birch

20070186134 - Method and system for generating block ancknowledgements in wireless communications: The present invention provides a method and a system for generating a block acknowledgment for aggregated MSDUs (A-MSDU) transmitted from a sender to a receiver over a wireless channel. Upon receiving the A-MSDU, the receiver generates a MSDU Block Acknowledgment (MSDU-BA) that includes an acknowledgment for each received MSDU. Based... Agent: Kenneth L. Sherman, Esq. Myers Dawes Andras & Sherman, LLP

20070186136 - Multiplexed coding for user cooperation: A method and system for decoding a combination of a first message and a second message that were encoded using a generating matrix of a systematic linear block code is described. The combination of the first message and the second message may be decoded using a parity check matrix. If... Agent: Nec Laboratories America, Inc.

20070186135 - Processor system and methodology with background error handling feature: A processor system is disclosed that integrates error correcting code (ECC) detection and correction hardware within an memory management circuit. ECC hardware circuitry provides detection, correction and generation of ECC data bits in conjunction with memory data read and writes. The disclosed methodology permits the detection and correction of soft... Agent: Mark P. Kahler

20070186137 - Dtv receiver and method of processing broadcast signal in dtv receiver: A DTV receiver includes a tuner tuning to a channel to receive a broadcast signal, and a demodulator demodulating the broadcast signal. The receiver further includes a first decoder which decodes main and enhanced data included in the demodulated signal by calculating soft decision values for the enhanced data and... Agent: Lee, Hong, Degerman, Kang & Schmadeka

20070186138 - Techniques for providing greater error protection to error-prone bits in codewords genetated from irregular codes: Greater error protection is provided to error-prone bits that are generated from irregular soft-decoded error correction codes. Error protection is increased to error-prone bits that of interest in a particular system (e.g., parity check bits). One or more extra bits are added to each codeword in the encoding process. The... Agent: Steven J. Cahill

20070186139 - Interleaving method for low density parity check encoding: An interleaving method for use in a low density parity check (LDPC) encoding process employed by a network across which data is transmitted and/or in a recording/reproducing apparatus when information is stored on a recording medium. The method includes generating more than one code word vector by generating parity information... Agent: Stein, Mcewen & Bui, LLP

20070186140 - Parity check matrix generation method, data transmission system, encoding device, decoding device, and a parity check matrix generation program: A method is disclosed that allows the easy generation of low-density parity-check codes that can realize superior error-correcting characteristics. A processor (50) of a transmission line encoder constructs parity check matrix H from partial matrix H1 of m rows and k columns on the left side and partial matrix H2... Agent: Sughrue Mion, PLLC

20070186141 - Method and information apparatus for improving data reliability: Reliability of data that is stored in a disk drive by a storage system is enhanced. An information apparatus has a processor, a memory, an interface control unit, and a system control unit, which controls communications between the processor, the memory, and the interface control unit. The system control unit... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20070186142 - Data sending device, data receiving device, date sending method, and data receiving method: A data receiving device which comprises a decoder which generates a plurality of decoded data based on 1) input data and 2) a plurality of pairs of control data and redundant data, in each the pair, the control data defining a selected encoding process and the redundant data being generated... Agent: Young & Thompson

20070186143 - Error resilience methods for multi-protocol encapsulation forward error correction implementations: Transport stream (TS) packets containing sections of IP datagrams for an application level process are received and correct ones of said sections are stored into an MPE-FEC frame buffer of a receiver. Stored ones of said sections are reorganized within the frame buffer so as to leave appropriate positions, marked... Agent: Sonnenschein Nath & Rosenthal LLP

20070180288 - Method, system and program for securing redundancy in parallel computing sytem: In a parallel computing system having a plurality of computing node groups including at least one spare computing node group, a plurality of managing nodes for allocating jobs to the computing node groups and an information management server having respective computing node group status information are associated with the computing... Agent: Ibm Corporation RochesterIPLaw Dept. 917

20070180300 - Raid and related access method: A RAID includes at least three disks, and the three disks includes respective first blocks corresponding to one another and respective second blocks corresponding to one another. Each of the first and second blocks is divided into a plurality of sub-blocks. One of the first blocks is used as a... Agent: Kirton And Mcconkie

20070180310 - Multi-core architecture with hardware messaging: Disclosed herein are a system and method for designing digital circuits. In some embodiments, the digital circuits include processors having dedicated messaging hardware that enable processor cores to minimize interrupt activity related to inter-core communications. The messaging hardware receives and parses any message in its entirety prior to passing the... Agent: Texas Instruments Incorporated

20070180315 - Reconfigurable processor and reconfiguration method executed by the reconfigurable processor: A reconfigurable processor which is capable of carrying out or continuing processing even after occurrence of an error in a data processing unit within the reconfigurable processor. The reconfigurable processor has a processing element matrix comprised of a plurality of processing elements. The reconfigurable processor reconfigures the processing element matrix... Agent: Rossi, Kimms & Mcdowell LLP.

20070180317 - Error correction method: This method is an error correction method such that, when an error is detected in a CPU with pipeline struct, a content of a register file is restored by a delayed register file which holds an execute completion state of an [Instruction N] correctly executed before this error, and a... Agent: Antonelli, Terry, Stout & Kraus, LLP

20070180318 - Failure diagnostic apparatus and method of storing failure information: A failure diagnostic apparatus determines the environment in which the condition of a vehicle is examined and selects an appropriate storage location for information regarding the condition of the vehicle. In particular, the failure diagnostic apparatus includes a vehicle-condition diagnostic portion, a plurality of failure-information storage portions, a diagnostic-environment determination... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070180326 - Software test method and software test apparatus: A software test method and an apparatus thereof. The software test method includes operating a test mode to start a software test, inputting a test target function, reading token information of the test target function, displaying an information selecting screen to ask for information on the token information, generating test... Agent: Stanzione & Kim, LLP

20070180337 - Method and apparatus for managing storage of data: In a method and apparatus for storage of data, data is stored. The stored data is checked, for example periodically and/or on data access, for development of a fault in the stored data. If a fault is detected, at least one of: (i) increased protection and (ii) increased error correction... Agent: Pillsbury Winthrop Shaw Pittman, LLP

20070180286 - Method and apparatus for converting multichannel messages into a single-channel safe message: The invention relates to a method and to an apparatus, which has been adapted to carry out the method, for the coupling of a safety-critical process from a safe environment, which has at least two redundant processing channels, to an environment which is not safe or to an environment which... Agent: Demont & Breyer, LLC

20070180287 - System and method for managing node resets in a cluster: A method of managing node resets in a cluster is provided. Status information from a node cluster including a plurality of nodes may be received. A determination of whether a time delay associated with a first node of the cluster is greater than a node reset time may be made... Agent: Baker Botts, LLP

20070180289 - Systems and methods for restoring data: In a network that includes a first database located on a first client and a second database located on a second client, a user or administrator initiates a restore operation. A dynamic mirror relationship existing between the first and second clients is terminated and a backup version of a database... Agent: Workman Nydegger (f/k/a Workman Nydegger & Seeley)

20070180290 - Assigning disks during system recovery: Aspects of the subject matter described herein relate to providing adaptive system recovery for computer systems. This may include receiving restoration information from a first computer system wherein the restoration information defines each storage component associated with the first computer system and the restoration information includes a storage component status,... Agent: Workman Nydegger/microsoft

20070180291 - Image rescue: An image rescue system includes an application program for communication with a mass storage device, said application program being in communication with an operating system layer for accessing said mass storage device to read and write information, in accordance with an embodiment of the present invention. The image rescue system... Agent: Law Offices Of Imam

20070180296 - Back-annotation in storage-device array: In one embodiment, a method for reading data from a storage-device array including three or more storage devices. The array has a plurality of sector levels, each sector level containing one sector on each storage device in the array at corresponding addresses across the storage devices. Each sector level includes... Agent: Mendelsohn & Associates, P.C.

20070180293 - Data storage system, data storage control apparatus and fault location diagnosis method: A controller discriminates the abnormality between a plurality of disk devices and a transmission path in a storage system having controllers for controlling a plurality of disk storage devices. When one controller in pairs of controllers for controlling the plurality of disk storage devices detects an error during an access... Agent: Staas & Halsey LLP

20070180292 - Differential rebuild in a storage environment: Differential rebuild in a storage environment is disclosed. In one embodiment, a method includes applying a fault-tolerant algorithm (e.g., a redundant array of independent disk (RAID) level 1, level 3, level 4, level 5, level 6, level 10, level 30, level 50, and/or level 60 algorithm) to process commands associated... Agent: Raj Abhyanker, LLP C/o Portfolioip

20070180301 - Logical partitioning in redundant systems: Provided are a method, system, and article of manufacture, wherein a plurality of processing nodes in a storage system are partitioned into a plurality of logical processing units, and wherein the plurality of logical processing units can respond to I/O requests from a host coupled to the storage system. At... Agent: Konrad Raynes & Victor, LLP. Attn: Ibm37

20070180304 - Mapping apparatus for backup and restoration of multi-generation recovered snapshots: Restoration of data is facilitated in the storage system by combining data snapshots made by the storage system itself with data recovered by application programs or operating system programs. This results in snapshots which can incorporate crash recovery features incorporated in application or operating system software in addition to the... Agent: Townsend And Townsend And Crew, LLP

20070180307 - Method & system for resynchronizing data between a primary and mirror data storage system: Disclosed is system and method for mirroring data from a primary data storage system on a mirroring data storage system. According to some embodiments to the present invention, prior to resynchronization of a data unit on the mirroring system with corresponding data on a primary unit, a consistent snap-shot of... Agent: Katten Muchin Rosenman LLP

20070180299 - Method of data placement and control in block-divided distributed parity disk array: A method of data placement and control in a block-divided distributed disk array is provided. At first, data to store is divided into logical blocks, and each of the divided logical blocks is further divided into a plurality of data blocks. Then, a parity block is created through performing an... Agent: Ladas & Parry LLP

20070180305 - Methods for controlling storage devices controlling apparatuses: A storage device controller including: channel control portions each including a circuit board on which a file access processing portion for receiving file-by-file data input/output requests sent from information processors and an I/O processor for outputting I/O requests corresponding to the data input/output requests to storage devices are formed, the... Agent: Townsend And Townsend And Crew, LLP

20070180298 - Parity rotation in storage-device array: In one embodiment, a method for writing data to a storage-device array (i) including three or more storage devices and (ii) having a plurality of stripes, each stripe having two or more sector levels, each sector level containing one sector on each storage device in the array at corresponding addresses... Agent: Mendelsohn & Associates, P.C.

20070180297 - Ping-pong state machine for storage-device array: In one embodiment, an apparatus for reading from a physical storage-device array including a plurality of storage devices. The physical storage-device array has a plurality of sector levels, each sector level containing one sector on each storage device in the array at corresponding addresses on across the storage devices. The... Agent: Mendelsohn & Associates, P.C.

20070180294 - Storage system, control method, and program: A storage apparatus composed of a plurality of magnetic disk devices are provided. An encoding unit generates, after dividing original data, a plurality pieces of encoded data equal to or more than the number of division by use of a code of which redundancy is variable. A redundancy control unit... Agent: Staas & Halsey LLP

20070180302 - System and method for failover: The present invention provides a novel system and method for failover. In an embodiment, a primary server and a backup server are available to a plurality of clients. Messages containing requests are processed by the primary server, while a mirror image of transaction records generated by the processing of those... Agent: Patent Administrator Katten Muchin Rosenman LLP

20070180309 - System and method for mirroring data: Disclosed is a data processing and/or storage system. The data processing and/or storage system may include at least two interfaces, wherein each of the at least two interfaces includes a non-dedicated communication port for communicating data to and form external data systems or clients based on a rule base.... Agent: Katten Muchin Rosenman LLP

20070180308 - System, method and circuit for mirroring data: Disclosed is a system and method from mirroring data from a data storage server/system. A mirroring module on a primary mirror server/system may forward one or more data packets received from the data storage server/system to a secondary mirror server/system. The one or more packets maybe received over a synchronous... Agent: Katten Muchin Rosenman LLP

20070180303 - Uniform and symmetric double failure correcting technique for protecting against two disk failures in a disk array: A uniform and symmetric, double failure-correcting technique protects against two or fewer disk failures in a disk array of a storage system. A RAID system of the storage system generates two disks worth of “redundant” information for storage in the array, wherein the redundant information (e.g., parity) is illustratively derived... Agent: Cesari And Mckenna, LLP

20070180306 - Virtual disk drive system and method: A disk drive system and method capable of dynamically allocating data is provided. The disk drive system may include a RAID subsystem having a pool of storage, for example a page pool of storage that maintains a free list of RAIDs, or a matrix of disk storage blocks that maintain... Agent: Dorsey & Whitney LLP Intellectual Property Department

20070180295 - Virtual profiles for storage-device array encoding/decoding: In one embodiment, a method for accessing a physical storage-device array comprising a plurality of storage devices. The method includes (1) obtaining at least one parameter from a profile selected from two or more profiles concurrently defining two or more virtual arrays, each profile defining (i) a different virtual array... Agent: Mendelsohn & Associates, P.C.

20070180313 - Apparatus for policy based storage of file data and meta-data changes over time: A time domain server includes a version storage. The time domain server declares epochs for a source server, then requests events from the source server. As the time domain server receives events, it uses the events to update the version storage to store versions of files from the source server.... Agent: Marger Johnson & Mccollom, P.C. - Novell

20070180311 - Redundancy in routing devices: Providing redundancy between an active component and a standby component in a network router comprises maintaining a first route input information base associated with the active component, synchronizing with the first route information base a second route input information base associated with the standby component, generating a route output information... Agent: Van Pelt, Yi & James LLP

20070180312 - Software duplication: In one embodiment, the present invention is directed to a software duplication process in which write faults are used to track memory areas that have been changed by the active processor.... Agent: Sheridan Ross P.C.

20070180314 - Computer system management method, management server, computer system, and program: This invention provides a method of controlling switching of computers according to a cause of failure without preparing one standby node for each active node. For n active nodes (200), m standby nodes (300) of different characteristics (in terms of CPU performance, I/O performance, communication performance, and the like) are... Agent: Antonelli, Terry, Stout & Kraus, LLP

20070180316 - Methods and systems for management of system metadata: The present invention relates to a method of updating SMD in an array of storage devices. In an embodiment, the method employs an array controller to change the start tag values of a copy set X, write an updated SMD of the copy set X, change the end tag values... Agent: Robert Moll

20070180319 - Protection of the execution of a program executed by an integrated circuit: A method and a circuit for protecting the execution of a program, including initializing at least one counter, carrying on with the normal program execution, interrupting this execution when the counter reaches a given value, and executing at least one integrity check of the calculation after this interrupt.... Agent: Stmicroelectronics Inc. C/o Wolf, Greenfield & Sacks, P.C.

20070180320 - Apparatus, method and computer program product providing system information advertisement extension for dynamic networks: Disclosed herein are apparatus, methods and computer program products for using access point availability information in a wireless communications system. In aspects of the method performed at an access point in a wireless communications system, the access point generates a message indicating the level of availability of the access point;... Agent: Harrington & Smith, PC

20070180321 - Systems and methods for accumulation of summaries of test data: In one embodiment, there is disclosed a system for accumulation of summaries of test data. The system includes a data populator having code to: (1) generate data objects from the test data and store the data objects in a data model, (2) arrange the data objects in a tree structure,... Agent: Agilent Technologies Inc.

20070180322 - Debug support device, and program for directing computer to perform debugging method: A debug support device for debugging a multiprocessor configured by a plurality of unit processors includes a unit processor stop section realized by a plurality of the unit processors executing a program for each of the threads, and any one of the plurality of unit processors performing a process of... Agent: Oliff & Berridge, PLC

20070180323 - Interactive debug system for multiprocessor array: A debug network on a multiprocessor array includes communication channels, a master controller, and one or more individual debug units in communication with one or more of the processors. The master controller soilcits information from the debug units by sending messages along the communication channels. The debug units can control... Agent: Ambric, Inc. C/o Marger Johnson & Mccollom PC

20070180324 - Apparatus and program for process fault analysis: A process fault analysis apparatus according to the present invention includes a process data editing unit which extracts process features from process data stored in a process data storage unit and stores the process features in a process feature data storage unit, a fault analysis rule data storage unit in... Agent: Foley And Lardner LLP Suite 500

20070180325 - Method and apparatus for testing request -response service using live connection traffic: The present invention provides for a method and apparatus for comparison of network systems using live traffic in real-time. The inventive technique presents real-world workload in real-time with no external impact (i.e. no impact on the system under test), and it enables comparison against a production system for correctness verification.... Agent: Law Office Of David H. Judson

20070180327 - Trace control from hardware and software: A system and method for program counter and data tracing is disclosed. The tracing mechanism of the present invention enables increased visibility into the hardware and software state of the processor core.... Agent: Cooley Godward Kronish LLP Attn: Patent Group

20070180329 - Method of latent fault checking a management network: A method of latent fault checking a management network may include a management bus communicating management data for a computing module on the management network; a management controller managing the computing module; a master management controller operating the management bus; and a buffer module between the management bus and each... Agent: Motorola, Inc.

20070180328 - Monitoring health of non-volatile memory: A host processor is coupled to a memory controller and configurable to retrieve from the memory controller information indicative of the health of a non-volatile memory device operatively coupled to the memory controller. A host system uses the information to monitor the health of the non-volatile memory device.... Agent: Fish & Richardson P.C.

20070180330 - Systems and methods for management and capturing of optical drive failure errors: The systems and methods herein may be used for management and capturing of optical drive failure errors. One implementation of a method for capturing a failure error of an optical storage drive may include detecting the failure error of the optical storage drive. The failure error may be characterized by... Agent: Roger Fulghum Baker Botts L.L.P.

20070180331 - Method and system for isolation of a fault location in a communications device: The present invention provides a system and method of identifying a failure location in a datapath in a communication element, the datapath traversing from an ingress point through at least a first component to an egress point. In an embodiment the method comprises: providing a diagnostic cell to adapted to... Agent: Mccarthy Tetrault LLP

20070180332 - System and method for multipath i/o support for fibre channel devices: A system and method enables a file server, to support multi path input/output operations for Fibre Channel devices. Upon each Fibre Channel Arbitrated Loop initialization event generated, the system and method updates a path and device instance to track multiple paths to a given device. While the file server is... Agent: Cesari And Mckenna, LLP

20070180333 - External trace synchronization via periodic sampling: A system and method for program counter and data tracing is disclosed. The tracing mechanism of the present invention enables increased visibility into the hardware and software state of the processor core.... Agent: Cooley Godward Kronish LLP Attn: Patent Group

20070180334 - Multi-frequency debug network for a multiprocessor array: A debug network on a multiprocessor array having multiple clock domains includes a backbone communication channel which communicates with information nodes on the channel. The information nodes store and access information about an attached processor. The nodes are also coupled to registers within the attached processor, which operate at the... Agent: Ambric, Inc. C/o Marger Johnson & Mccollom PC

20070180335 - Method and apparatus for providing help content corresponding to the occurrence of an event within a computer: A method and apparatus are provided for displaying help content corresponding to the occurrence of an event occurring within a computer. An alert help data file is periodically downloaded at a client computer. When a program alert occurs within a client computer, the alert help data file is searched to... Agent: Merchant & Gould (microsoft)

20070180336 - Multi-initiator control unit and method: The multi-initiator control unit for performing packet-unit communication with each of a plurality of devices connected via a transmission line includes: a packet filter for analyzing a received packet and outputting the results; a plurality of command control circuits each for controlling a command processing sequence performed with the corresponding... Agent: Mcdermott Will & Emery LLP

20070180338 - Antenna reconfiguration verification and validation: A method of testing the electrical functionality of an optically controlled switch in a reconfigurable antenna is provided. The method includes configuring one or more conductive paths between one or more feed points and one or more test point with switches in the reconfigurable antenna. Applying one or more test... Agent: Honeywell International Inc.

20070180339 - Handling mixed-mode content in a stream of test results: In one embodiment, a system for formatting test data is provided with at least one data formatter to i) upon receiving notifications of test events, retrieve test data from a data store, and ii) generate a number of test records based on the test data. The system is also provided... Agent: Agilent Technologies Inc.

20070180340 - Semiconductor integrated circuit: A semiconductor integrated circuit includes: a first circuit having a plurality of scan chains; a second circuit connected with input/output signals of the first circuit; and a third circuit connected with the second circuit through the first circuit. The plurality of scan chains comprises a first scan chain that contains... Agent: Sughrue Mion, PLLC

20070180341 - Tap and linking module for scan access of multiple cores with ieee 1149.1 test access ports: An architecture for testing a plurality of circuits on an integrated circuit is described. The architecture includes a TAP Linking Module located between test pins on the integrated circuit and 1149.1 Test Access Ports (TAP) of the plurality of circuits to be tested. The TAP Linking Module operates in response... Agent: Texas Instruments Incorporated

20070180342 - System, method and apparatus for completing the generation of test records after an abort event: In one embodiment, a system for formatting test data is provided with at least one data formatter to i) upon receiving notifications of test events, retrieve test data from a data store, and ii) generate a number of test records based on the test data. The system is also provided... Agent: Agilent Technologies Inc.

20070180343 - Dtv transmitter and method of coding data in dtv transmitter: A DTV transmitter includes a pre-processor which pre-processes enhanced data by coding the enhanced data for forward error correction (FEC) and expanding the FEC-coded enhanced data, a data formatter which generates enhanced data packets having the pre-processed enhanced data and known data, and a multiplexer which multiplexes the enhanced data... Agent: Lee, Hong, Degerman, Kang & Schmadeka

20070180344 - Techniques for low density parity check for forward error correction in high-data rate transmission: A system, apparatus, and method includes a decoder to decode information including a low density parity check (LDPC) codeword received at a node using entries defined in a parity check base matrix. Other embodiments are described and claimed. The system further includes an antenna.... Agent: Kacvinsky LLC C/o Intellevate

20070180345 - Wireless communications system: Wireless transmission of data is effected across a communications channel defined by a communications medium by means of an encoder, operable to apply a low density parity check (LDPC) code to data for transmission. The LDPC code is irregular with respect to the degree of variable nodes, and so the... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070180346 - method of arranging data in a multi-level cell memory device: A method of storing data includes storing a first portion of data in bit positions of a non-volatile memory having a first probability of error; storing a second portion of the data in bit positions of the non-volatile memory having a second probability of error, wherein the second probability of... Agent: Dr. Mark M. Friedman C/o Bill Polkinghorn - Discovery Dispatch

20070180347 - Data input method and apparatus, and liquid crystal display device using the same: For a data input method and apparatus capable of latching data from a memory by using a clock of optimal timing, and a liquid crystal display device using the same, a clock of an optimal margin is set by reading out check data stored in a memory, and the check... Agent: Cantor Colburn, LLP

20070180348 - Row-diagonal parity technique for enabling efficient recovery from double failures in a storage array: A method for enabling recovery from concurrent failure of a plurality of storage devices in a storage array is disclosed. The method stores data on a first plurality of storage devices of the storage array. The first plurality of storage devices may have a number of storage devices equal to... Agent: Cesari And Mckenna, LLP

20070180349 - Techniques for uequal error protection for layered protection applications: A system, apparatus, and method includes an encoder to encode information comprising a codeword to be transmitted at a node using variable length block codes applied to a packet having a variable length data payload. Other embodiments are described and claimed. The system further includes an antenna and a transceiver... Agent: Kacvinsky LLC C/o Intellevate

20070180350 - Dtv transmitter and method of coding main and enhanced data in dtv transmitter: A DTV transmitter includes a pre-processor pre-processing enhanced data, a data formatter generating enhanced data packets including the pre-processed enhanced data, and a multiplexer multiplexing the enhanced data packets with main data packets. The transmitter further includes an RS encoder RS-coding the multiplexed packets by adding systematic RS parity data... Agent: Lee, Hong, Degerman, Kang & Schmadeka

20070180351 - Decoding device, decoding method , and receiving apparatus: A decoding apparatus includes a first decoder and a second decoder as a decoding processor for performing iterative decoding on received data, a hard decision section for calculating hard decision results based on logarithmic likelihood ratios L1 and L2 from the first and second decoders, and a stop determination section... Agent: Sughrue Mion, PLLC

20070180352 - Memory system and method for use in trellis-based decoding: Systems and modules for use in trellis-based decoding of encoded sets of data bits. A memory system has multiple arrays for storing an index for each one of multiple states. With each array element being associated with a state through which a decoding path may pass through, the contents of... Agent: Marger Johnson & Mccollom, P.C.