Error detection/correction and fault detection/recovery inventions 07/07

20070174682 - Apparatus, system, and method for a storage device's enforcing write recovery of erroneous data: An apparatus, system, and method are disclosed for a storage device's enforcing write recovery of erroneous data. The storage device enforces write recovery leading to a reassignment and re-write for the defective data block by the storage controller at a subsequent write opportunity with a usual write without verify command.... Agent: Allen King

20070174692 - Image processing apparatus including function of backing up data by storing data in another device, backup program executed in image processing apparatus, and backup method: In order to reliably back up data in the event of a disaster, an MFP includes a data communication control unit for communicating with a backup device connected to LAN or the Internet, a warning reception unit acquiring a disaster occurrence signal output by a disaster warning detection unit, a... Agent: Buchanan, Ingersoll & Rooney PC

20070174690 - Restarting method using a snapshot: The active server A101 notifies its own operating status to the administration server 106, and the administration server 106 acquires a snapshot and copies a disk according to the policy established by a user. When the active server A101 or the active disk 113 fails, the administration server 106 chooses... Agent: Townsend And Townsend And Crew, LLP

20070174725 - Display apparatus having electronic album function and method thereof: A display device having electronic album function and the method thereof is disclosed. The present invention includes an Electronic Photo Frame (EPF) controller which checks the existence of the memory and reads image data from the memory if any, an interface device which converts the interface format of the image... Agent: Birch Stewart Kolasch & Birch

20070174730 - Electronic device and method for retrieving data from a pci bus: A device and method are disclosed for monitoring and recording keystrokes and other activity on a computer. The preferred embodiment is a passive computer PCI expansion board (1) that has pins for engaging in a PCI slot on a motherboard; an electronic circuit capable of receiving, filtering, translating, and controlling... Agent: Louis Ventre, Jr

20070174652 - Parts recovery method and system: A system and method for tracking parts (components that may include assemblies) used for warranty and repair service, and analyzing the information to determine quality performance of suppliers, vendors, and manufacturers and to recover and invoice the suppliers for warranty service expenses.... Agent: Pearne & Gordon LLP

20070174653 - Distributed system and method for error recovery: An automated laboratory device that comprises a mechanism that performs operations on laboratory samples, a scheduler that causes the mechanism to process laboratory samples in accordance with programmed processes, logic that detects an error occurring in a process controlled by the scheduler, logic that accepts a user-defined error handling routine... Agent: Wilson Sonsini Goodrich & Rosati

20070174654 - System and method for error recovery: An automated laboratory device that comprises a mechanism that performs operations on laboratory samples, a scheduler that causes the mechanism to process laboratory samples in accordance with programmed processes, logic that detects an error occurring in a process controlled by the scheduler, logic that accepts a user-defined error handling routine... Agent: Wilson Sonsini Goodrich & Rosati

20070174655 - System and method of implementing automatic resource outage handling: A method, apparatus, and computer-usable medium for determining that at least one resource among a collection of resources implemented in a data processing system has become unavailable, identifying at least one dependent resource among the collection of resources that is dependent on at least one unavailable resource, in response to... Agent: Dillon & Yudell LLP

20070174658 - Failure recovery method: The reliability is improved at a low cost even in a virtualized server environment. The number of spare servers is reduced for improving the reliability and for saving a licensing fee for software on the spare servers. A server system comprises a plurality of physical servers on which a plurality... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20070174656 - Manager/remote content architecture: Embodiments of a manager/remote content architecture are described herein. The architecture, for instance, may provide management of content received from a content provider, such as to determine which client devices are authorized to output the content. Techniques are also described which allow one of the remote client devices to act... Agent: Lee & Hayes PLLC

20070174659 - Storage switch system, storage switch method, management server, management method, and management program: When a failure is detected in a server currently being used, a management server changes the network topology for the server currently being used and another server which substitutes the server. Then, the management server instructs the network SW with the changed network topology so as to cause the network... Agent: Antonelli, Terry, Stout & Kraus, LLP

20070174660 - System and method for enabling site failover in an application server environment: A system and method for enabling site failover in an application server or clustered environment. In addition to providing HTTP session state replication across servers within a cluster, the invention provides the ability to replicate HTTP session state across multiple clusters. This improves high-availability and fault tolerance by allowing clusters... Agent: Fliesler Meyer LLP

20070174661 - System and method for providing singleton services in a cluster: A system and method for providing singleton services in a cluster of servers, where one server is designated as a cluster master, other servers are designated as migratable servers and where all servers in the cluster heartbeat their liveness information against a database. The cluster master monitors the heartbeats of... Agent: Fliesler Meyer LLP

20070174657 - System and method for the management of failure recovery in multiple-node shared-storage environments: A storage architecture and method for managing the operation of a network in a RAID environment is provided in which a storage management agent is included in each server node of the network. The storage management agents monitor the status of the drives of the storage array in shared storage.... Agent: Roger Fulghum Baker Botts L.L.P.

20070174663 - Analysis of mutually exclusive conflicts among redundant devices: A system for analyzing mutually exclusive conflicts among a plurality of redundant devices in a computer system includes a data management module operable on the computer system. The data management module parses through status data generated by the plurality of redundant devices to identify an error condition in one of... Agent: Quarles & Brady Streich Lang LLP

20070174664 - Data recovery application: A system for the recovery of data from a failing or failed hard drive including a computer, computer software and a chamber. The computer has a first hard drive and a second hard drive attached thereto. The first hard is the failed or failing hard drive, and the second hard... Agent: Polster, Lieder, Woodruff & Lucchesi

20070174666 - Disk device, control circuit, and disk controlling method: A timer measures an idling time of a disk. When the idling time is equal to or longer than an idle-time threshold, a head reads each data among a multiplexed data and a comparing unit compares read data with other of the multiplexed data to detect data error in the... Agent: Patrick G. Burns, Esq. Greer, Burns & Crain, Ltd.

20070174665 - Method to adjust error thresholds in a data storage and retrieval system: A method is disclosed to adjust error thresholds in a data storage and retrieval system. The method supplies a data storage and retrieval system comprising memory and microcode, wherein that microcode comprises one or more default error thresholds. The method determines if the memory comprises one or more operational error... Agent: Dale F. Regelman

20070174662 - Methods and apparatus for reconfiguring a storage system: One embodiment relates to a computer system comprising at least one host, at least one object addressable storage (OAS) system and at least one communication medium that couples the at least one host to the at least one OAS system. The at least one OAS system has a plurality of... Agent: Emc Corporation C/o Wolf, Greenfield & Sacks, P.C.

20070174672 - Apparatus and method to reconfigure a storage array disposed in a data storage system: A method is disclosed to reconfigure a storage array disposed in a data storage system. The method supplies a data storage system comprising a plurality of data storage devices, wherein each of the plurality of data storage devices is assigned to one of a plurality of data storage arrays, or... Agent: Dale F. Regelman

20070174667 - Apparatus, system, and method for accessing redundant data: An apparatus, system, and method are disclosed for accessing redundant data. A verification value module calculates a first verification value for a first redundant memory. In addition, the verification value module calculates a second verification value for a second redundant memory. In one embodiment, a validation module validates the first... Agent: Kunzler & Mckenzie

20070174677 - Data processing apparatus: Data processing can be performed even if a trouble occurs in a hard disk device. If a trouble occurs in a first hard disk device, it is recognized that a spare hard disk device is on standby, and operation of the spare device is checked. The first hard disk device... Agent: Edwards Angell Palmer & Dodge LLP

20070174676 - Disk array system and failure recovering control method: In a disk array system composed of a disk controller connected to a host system and a maintenance terminal and a disk array connected to the disk controller via a disk channel, when failure occurs in a drive in the disk array, the disk controller writes data stored in a... Agent: Townsend And Townsend And Crew, LLP

20070174675 - Imaging apparatus having automatic backup function and method for controlling the same: An imaging apparatus having an automatic backup function and a method for controlling the same are disclosed which can more securely store particular data, considered to be important by the user, in a memory of the imaging apparatus, and can automatically read out the particular data. The imaging apparatus includes... Agent: Ked & Associates, LLP

20070174668 - Method and system for redundancy suppression in data transmission over networks: Methods, systems and apparatus for suppressing redundancy in data transmission over networks are provided. Data segments are transmitted from a transmitting DPU to a receiving DPU. Initially, only signatures of the transmitted data segments are stored in a cache at the transmitting DPU. A data segment is stored in the... Agent: Trellis Intellectual Property Law Group, PC

20070174669 - Method for restoring snapshot in a storage system: Provided is a technique which solves a problem of a long-time reduction in a service level after service restoration and a problem of a failure caused by a disk capacity shortage during primary volume restoration. According to the technique, reference is made to a differential block management unit (217) setting... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20070174674 - Raid control apparatus, and raid control program and raid control method: A RAID control apparatus is able to cooperate with another RAID control apparatus to control at least one RAID apparatus. The RAID control apparatus comprises a diagnosis unit and a control unit. The diagnosis unit diagnoses the other RAID control apparatus when an disk error is detected. The control unit... Agent: Staas & Halsey LLP

20070174671 - Restoring data to a distributed storage node: A method is disclosed for operating a data storage system having one or more network interfaces and a plurality of data storage nodes configured to provide redundant storage locations. The method includes storing a set of node partitions on a given storage node of the plurality of data storage nodes.... Agent: Katten Muchin Rosenman LLP

20070174673 - Storage system and data restoration method thereof: This storage system includes a first storage sub system having a first logical volume where a first data area is dynamically allocated to each prescribed area, and which stores data transmitted from a host computer in the first data area, and a second storage sub system having a second data... Agent: Antonelli, Terry, Stout & Kraus, LLP

20070174670 - Unique response for puncture drive media error: A system and method for identifying physical blocks marked as logically “bad” or “punctured” during a drive rebuild process enabling the information handling system to process these blocks more intelligently and preventing existing drive physical media errors from needlessly being copied and propagated to new drives. Various implementations of the... Agent: Hamilton & Terrile, LLP

20070174678 - Apparatus, system, and method for a storage device's enforcing write recovery of erroneous data: An apparatus, system, and method are disclosed for a storage device's enforcing write recovery of erroneous data. The storage device enforces write recovery leading to a reassignment and re-write for the defective data block by the storage controller at a subsequent write opportunity with a usual write without verify command.... Agent: Allen King

20070174679 - Method and apparatus for processing error information and injecting errors in a processor system: A method and apparatus are disclosed for injecting errors in the functional units of a processor system, and for observing non-injected errors that occur in those functional units. A local error handler layer provides error injection for the various functional units at a local level. A global fault isolation register... Agent: Mark P. Kahler

20070174680 - Method for patching built-in code in read only memory: The invention discloses a patching method to correct the built-in code in read only memory (ROM), which loads the patching address stored in an external storage device and the patching content into a register and a RAM respectively. When the executing sequence reaches the patching address in the ROM, the... Agent: Bruce H. Troxell

20070174681 - Stored memory recovery system: Various embodiments of systems and methods for preserving saved memory states to which a computer system can be restored are disclosed. In certain embodiments, the systems and methods intercept write operations to protected memory locations and redirect them to alternate memory locations. Embodiments of the systems and methods include creation... Agent: Meyertons, Hood, Kivlin, Kowert & Goetzel, P.C.

20070174684 - Data logging in a motor vehicle: The invention relates to a method for logging messages on a data bus and temporarily storing the sent messages in a cyclically overwritable volatile storing means. The temporarily stored messages can be examined in a targeted manner for attributes of interest by using a verification program. A storage of the... Agent: Fitch, Even, Tabin & Flannery

20070174683 - Method for operating software modules: A method for operating a software module on a processor unit in a vehicle optimizes the processor utilization level in networked controllers. The controller on which the software module is operated is selected based on the available computation capacity of the controllers which are currently in operation.... Agent: Crowell & Moring LLP Intellectual Property Group

20070174685 - Method of ensuring consistent configuration between processors running different versions of software: A method of establishing and maintaining a consistent configuration state of a first processor, running on a first version of operating software, and a second processor, running on a second version of operating software, is described. The method involves determining a current configuration state of the first processor, where the... Agent: Marger Johnson & Mccollom, P.C.

20070174686 - Apparatus, system, and method for non-interruptively updating firmware on a redundant hardware controller: An apparatus, system, and method are disclosed for non-interruptively updating firmware on a redundant hardware controller. The apparatus includes a routing module, a receiving module, and a forwarding module. The routing module routes communications between a redundant hardware controller and a service processor associated with a flash update. The receiving... Agent: Kunzler & Mckenzie

20070174689 - Computer platform embedded operating system backup switching handling method and system: A computer platform embedded operating system backup switching handling method and system is proposed, which is designed for use with a computer platform for providing an embedded operating system backup switching handling function, and which is characterized by the provision of an operating system health status flag for indicating whether... Agent: Fulbright And Jaworski LLP

20070174691 - Enterprise service availability through identity preservation: Systems and methods are described for service availability that provides automated recovery of server service in a timely and application intelligent manner, maintaining application consistency and integrity, while preserving server identity. The systems and methods, referred to herein as a Service Preservation System (SPS), manage complete recovery of server data... Agent: Courtney Staniford & Gregory LLP

20070174688 - Method for optimizing the transmission of logging data in a multi-computer environment and a system implementing this method: s

20070174687 - Systems and methods for maintaining lock step operation: A system is provided for rapidly synchronizing two or more processing elements in a fault-tolerant computing system. Embodiments of this system allow for the rapid synchronization of two processing elements through partial copies of the contents of memory associate with each processing element.... Agent: Kirkpatrick & Lockhart Preston Gates Ellis LLP (formerly Kirkpatrick & Lockhart Nicholson Graham)

20070174694 - Data recovery method for computer system: To reduce a burden imposed on a system administrator in restore operation, there is provided a computer system including at least one storage system, at least one host computer, and a management computer, in which: the storage system includes: a first processor; a first memory; and a disk drive; the... Agent: Townsend And Townsend And Crew, LLP

20070174695 - Log-based rollback-recovery: Log-Based Rollback Recovery for system failures. The system includes a storage medium, and a component configured to transition through a series of states. The component is further configured to record in the storage medium the state of the component every time the component communicates with another component in the system,... Agent: Mcdermott Will & Emery LLP

20070174693 - System and method for automated and assisted resolution of it incidents: A computer implemented method for assisted and automated resolving of Information Technology (IT) incidents is provided. The method facilitates one or more users to define repair workflows to resolve the IT incidents. The defined repair workflows are stored in a flow repository. The stored repair workflows are accessed and invoked... Agent: Schwabe, Williamson & Wyatt, P.C. Pacwest Center, Suite 1900

20070174696 - External storage and data recovery method for external storage as well as program: The data is automatically recovered to a desired arbitrary point in an external storage without imposing a burden on the host computer. An application on a host computer instructs data recovery control processing of a disk control apparatus to set a recovery opportunity. It is possible to register arbitrary plural... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20070174697 - Generic, wsrf-compliant checkpointing for ws-resources: A generic, WSRF-compliant checkpointing mechanism for grid services that is based upon the information found in a resource properties document. The resource properties document gives the structure of the entire state of a WS-Resource as a set of properties and their values. The checkpointing mechanism also is based upon the... Agent: Foley & Lardner LLP

20070174698 - Methods and apparatuses for supplying power to processors in multiple processor systems: Methods and apparatuses for supplying power to processors in multiple processor systems are disclosed. Embodiments comprise a method of monitoring a parameter that is related to a first voltage potential coupled to the processor. When the parameter or condition monitored indicates that the first voltage is bad or faulty, the... Agent: Ibm Coporation (rtp) C/o Schubert Osterrieder & Nickelson PLLC

20070174699 - Automated generation of operational monitor platform for computer boards: A method of testing a system architecture within a computer board including receiving an input software model, an input system model and an input hardware model at a development computer, retrieving software module information from a software module library, retrieving system module information from a system module, and retrieving hardware... Agent: Honeywell International Inc.

20070174700 - Connector ports for anti-tamper: An anti-tamper system including an interface key having a first surface and a second surface, the interface key adapted to mate with a test connector at the first surface and adapted to mate with an interface port in a chassis at the second surface. One or more electronic circuit boards... Agent: Honeywell International Inc.

20070174701 - Selective test method and test apparatus thereof: A selective test method and an apparatus thereof are provided. The selective test method includes storing test information including one or more test cases implemented by a test script, if one of the test cases is selected, storing selected test information including the selected test case, comparing the stored test... Agent: Sughrue Mion, PLLC

20070174702 - Test effort estimator: A system, method, and computer program product for evaluating the test effort to be provided for functional testing during an application development project is disclosed. The major influencing parameters within testing applications in complex systems are used to compute a test case management effort and a defect effort, those parameters... Agent: Schmeiser, Olsen & Watts

20070174703 - Method for enhancing debugger performance of hardware assisted breakpoints: A method for enhancing debugger performance of hardware assisted breakpoints across multiple units includes deferring all active location breakpoints within the multiple modules, and subsequently activating each valid location breakpoint in a present one of the multiple modules being entered.... Agent: Cantor Colburn LLP-ibm Poughkeepsie

20070174704 - Computer program automatic recovery activation control method and system: A computer program automatic recovery activation control method and system is proposed, which is designed for use with a computer platform for providing the computer platform with an automatic recovery activation control function; and which is characterized by the capability of tracking the total number of failed startup procedures the... Agent: Fulbright And Jaworski LLP

20070174705 - Post (power on self test) debug system and method: A POST (power on self test) debug system and method applicable to an electronic device is proposed. First, a reading module reads a POST code of a sub-routine to be executed when the electronic device is started up to execute a power on self test, and sends the POST code... Agent: Fulbright And Jaworski LLP

20070174707 - Collecting debug information according to user-driven conditions: Collecting debug information includes facilitating a communication session for an endpoint operated by a user. One or more user-driven conditions are monitored, where a user-driven condition results from an action by the user. Data is gathered during the monitoring. Whether the communication session is satisfactory or unsatisfactory is determined from... Agent: Baker Botts L.L.P.

20070174706 - Managing statements relating to a computer system state: Operations to manage statements relating to a computer system state include obtaining, in a computer system and from any of several sources, statements that relate to a current state of the computer system. Each statement comprises several elements. The operations comprise assigning focus values to the elements of each statement,... Agent: Fish & Richardson, P.C.

20070174708 - Method for controlling a policy: The method includes confirmation policy processing for acquiring confirmation item information indicating a condition every confirmation item to distinguish a cause at time of fault occurrence, reading presumed cause information indicating a presumed cause corresponding to each pattern in the confirmation item information when a confirmation item value of a... Agent: Antonelli, Terry, Stout & Kraus, LLP

20070174710 - Apparatus and method for collecting and displaying data for remote diagnostics: Systems and methods for automating database table and application data collection into one process to facilitate remote diagnostics of a computer problem are disclosed. A customized batch file is created by a remote support technician that can be run on a user computer that has the actual data to be... Agent: Canady & Lortz LLP- Ibm

20070174714 - Method and device for debugging a program executed by a multitask processor: A method for debugging a multitask program executed by a processor includes interrupting the processor during the execution of a task of the program, and activating a debugging mode of the processor, wherein the instructions executed by the processor are supplied by an external emulator. The method comprises steps during... Agent: Seed Intellectual Property Law Group PLLC

20070174713 - Method, system and computer program for testing a command line interface of a software product: A solution (200) for facilitating the test of a command line interface (CLI) of a software product is proposed. For this purpose, the process is divided into two phases. The first phase relates to the generation of a scenarios matrix (235). This result is achieved by defining each command of... Agent: Ibm Corporation Intellectual Property Law

20070174712 - Method, system and computer program product for facilitating the analysis of automatic line insulation testing data: A method for analyzing automatic line insulation testing (ALIT) data comprising receiving an electronic version of ALIT test results and parsing the ALIT test results to extract error data. The error data is inserted into an ALIT database. The ALIT database includes one record for each exception located in the... Agent: Cantor Colburn LLP - Bellsouth

20070174715 - Remote debugging: A system and method are described for remotely debugging an application server. In one embodiment, a plurality of application servers are organized into groups referred to as “instances.” Each instance may include a group of redundant application servers, one or more debug nodes, and a dispatcher. The dispatcher distributes service... Agent: Sap/blakely

20070174711 - Software test management program software test management apparatus and software test management method: A software test management program, a software test management apparatus and a software test management method can integrally manage test-related information that are to be effectively exploited among test support functions. The software test management apparatus includes a design model registration section 31 that registers a design model, a source... Agent: Staas & Halsey LLP

20070174709 - Testing measurements: Embodiments of the invention include an arbiter facility included in a test script. The arbiter facility includes properties defining a method for evaluating the status of a step or process, a method for evaluating verification point results and the steps to execute during execution of the test script. The arbiter... Agent: Jeffrey S. Labaw International Business Machines

20070174717 - Approach for testing instruction tlb using user/application level techniques: A technique for testing instruction TLB hardware involves (i) allocating a memory segment, (ii) writing instructions to pages in the memory segment for testing the instruction TLB hardware, where the instructions comprise at least one control transfer instruction, (iii) executing the instructions, and (iv) monitoring a count of events in... Agent: Osha Liang L.L.P./sun

20070174716 - Health check monitoring process: A health check monitoring process embedded in a client system provides automation of monitoring processes of system and application components and creates and pushes incidents and/or administration tasks to a user or user interface if a critical situation or event, such as a monitored status of a component exceeds a... Agent: Fish & Richardson, P.C.

20070174720 - Apparatus, system, and method for predicting storage device failure: An apparatus, system, and method are disclosed for predicting storage device failure. A technology descriptor module associates a technology descriptor with a storage device. A failure threshold module sets a predictive failure threshold for the storage device in response to the technology descriptor. In one embodiment, a workload management detection... Agent: Kunzler & Mckenzie

20070174718 - Generation and use of system level defect tables for main memory: Methods and apparatus for maintaining and utilizing system memory defect tables that store information identifying defective memory locations in memory modules. For some embodiments, the defect tables may be utilized to identify and re-map defective memory locations to non-defective replacement (spare) memory locations as an alternative to replacing an entire... Agent: Patterson & Sheridan, L.L.P.

20070174722 - Input/output control method, computer product, and disk control apparatus: In a device control apparatus, a state judging unit, to which an I/O request received by an I/O request receiving unit is passed, acquires a device state by issuing a state check command to a control command queue of a magnetic disk device. When the device state acquired is normal,... Agent: Patrick G. Burns, Esq. Greer, Burns & Crain, Ltd.

20070174719 - Storage control device, and error information management method for storage control device: The storage control device of the present invention detects faults on the disk drives at an early stage, thus enhancing convenience of use. The disk drives are switchingly connected to a subordinate communication control unit via a switching circuit. An error information collection unit of an error monitoring unit detects... Agent: Stanley P. Fisher Reed Smith LLP

20070174721 - Volume and failure management method on a network having a storage device: Provided is an environment that storage device configuration management can be efficiently done in a data center having a virtualization device. A SAN manager acquires configuration information from a device constituting a SAN and prepares a correspondence relationship between a host computer and a virtual volume in the SAN, and... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20070174724 - Apparatus and method for detecting network failure location: A L2 loop failure location generated in any one of a plurality of search target apparatuses disposed in network is detected in a short time. A network failure location detecting apparatus executes the steps of broadcasting packets with a plurality of different source MAC addresses; acquiring statistical information that is... Agent: Bingham Mccutchen LLP

20070174729 - Primary server and backup server that share an ip address and a limited number of message identifiers: A primary server and a backup server that both run a RADIUS client in a cold start configuration share a single IP address that includes a limited number of message identifiers (MIDs). The primary server and the backup server each have a small number of fixed message identifiers. In addition,... Agent: Law Offices Of Mark C. Pickering

20070174723 - Sub-second, zero-packet loss adapter failover: A computer implemented method, data processing system, and a computer program product are provided for managing an adapter failure. A first adapter is monitored for adapter failure. A second adapter is activated in response to detecting the adapter failure of the first adapter. In response to detecting the first adapter... Agent: Ibm Corp (ya) C/o Yee & Associates PC

20070174726 - System and method for monitoring group of devices on network: A system and a method are provided for monitoring fault of a group including a plurality of device connected via a network, and taking action about the fault. The system includes: one or more slave devices testing fault of a belonging device and outputting the test result, and a master... Agent: Sughrue Mion, PLLC

20070174728 - Systems and methods for routing data in a network device: A system detects an error in a network device that receives data via a group of data streams. The system receives a data unit, where the data unit is associated with at least one of the streams and a sequence number for each of the associated streams. The system determines... Agent: Harrity Snyder, LLP

20070174727 - Usb apparatus: The present invention disclosed a Universal Serial Bus (USB) apparatus. The apparatus includes: a signal detecting unit for detecting a packet signal transmitted from a USB host and generating an acknowledgment signal according to a detection result; an error detecting unit, coupled to the signal detecting unit, for generating a... Agent: North America Intellectual Property Corporation

20070174731 - Contextual enterprise software support tools: A key user for responding to support requests may receive an incident message triggered by an end user. The incident message includes user-generated input data and collected context data both characterizing a state of a computing system. The context data may be associated with a subset of a plurality of... Agent: Fish & Richardson, P.C.

20070174732 - Monitoring system and method: A monitoring system and method. The monitoring system receives specified rules related to at least one component within a computing system. The monitoring system receives first data comprising information related to at least one component within a computing system. The monitoring system comprises a repository. The first data is stored... Agent: Schmeiser, Olsen & Watts

20070174734 - Failure resistant multiple computer system and method: The updating of only some memory locations in a multiple computer environment in which at least one applications program (50) executes simultaneously on a plurality of computers M1, M2 . . . Mn each of which has a local memory, is disclosed. Memory locations (A, B, D, E, X) in... Agent: Perkins Coie LLP

20070174733 - Routing of shared i/o fabric error messages in a multi-host environment to a master control root node: A computer-implemented method, apparatus, and computer program product are disclosed for routing error messages in a multiple host computer system environment to only those host computer systems that are affected by the error. The environment includes multiple host computer systems that share multiple devices utilizing a switched fabric. An error... Agent: Ibm Corp (ya) C/o Yee & Associates PC

20070174735 - Method and control system for recognizing a fault when processing data in a processing system: The invention relates to a method for recognizing a fault when processing input data in a processing system to form a data packet which contains output data and a test data item, the test data item being formed in order to confirm the validity of the output data. The following... Agent: Dorsey & Whitney LLP Intellectual Property Department

20070174736 - Storage medium management apparatus, storage medium management program, and storage medium management method: A storage medium management apparatus includes: a memory write section that reads out first defect management information which is defective address information written in a storage medium, writes all defective address information which is based on the first defect management information in a memory as total defect information, and, in... Agent: Patrick G. Burns Greer, Burns & Crain, Ltd.

20070174737 - Storage medium management apparatus, storage medium management program, and storage medium management method: A storage medium management apparatus includes: a memory write section that reads out first defect management information which is defective address information written in a storage medium, writes all defective address information which is based on the first defect management information in a memory as total defect information, and writes... Agent: Greer, Burns & Crain

20070174740 - Apparatus, method and computer program product for reading information stored in storage medium: An apparatus for reproducing information includes a memory unit which stores charge; a reading unit which obtains an amount of the charge stored in the memory unit, and reads information by determining a value based on a comparison of the amount of the charge with a first threshold; an error... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070174738 - Disk device, method of writing data in disk device, and computer product: A disk device includes a buffer memory and a temporary memory. The temporary memory temporarily stores packet data received from a higher-level device. The capacity of the temporary memory is equal to or larger than a maximum size of packet data that can be received from the higher-level device. It... Agent: Patrick G. Burns, Esq. Greer, Burns & Crain, Ltd.

20070174739 - Disk device, method of writing data in disk device, and computer product: In a disk device, data received from a higher-level device is written in an unused area in the buffer memory. It is checked whether the received data includes a error data. If there is error data, effective data among the received data is specified. It is then checked whether there... Agent: Patrick G. Burns, Esq. Greer, Burns & Crain, Ltd.

20070174743 - Image forming apparatus with memory properly error-checked: The whole area of volatile memories is equally divided into 16 memory blocks which are separated into 4 groups each having 4 memory blocks located away from each other. Every one of the 4 groups is selected for error-checking on memory at a power-on and is shifted sequentially. An image... Agent: Browdy And Neimark, P.l.l.c. 624 Ninth Street, Nw

20070174741 - Method and apparatus for implementing persistence and refreshing of validation error messages based upon hierarchical refresh levels: A method, apparatus and computer program product are provided for implementing persistence and refreshing of validation error messages based upon hierarchical refresh levels. A validation level is identified when a validation completes. Error messages stored in a message repository with a refresh tag level less than or equal to the... Agent: Ibm Corporation RochesterIPLaw Dept 917

20070174742 - Remote maintenance system, mail connect confirmation method, mail connect confirmation program and mail transmission environment diagnosis program: When a fault is detected by a surveillance agent mounted in a user device, fault information is reported to a maintenance center device by an electronic mail through an internet. The user device is provided with a connect confirmation unit to prepare and transmit connect confirmation mails of a plurality... Agent: Katten Muchin Rosenman LLP

20070174744 - Semiconductor memory device storing repair information avoiding memory cell of fail bit and operating method thereof: A semiconductor memory device including a memory array having a plurality of memory cells and a data input/output unit. A part of the memory array is assigned as a repair information region. The repair information region has a plurality of information packets. The data input/output unit reads a first and... Agent: Frank Chau, Esq. F. Chau & Associates, LLC

20070174745 - Error checking using a field of a frame: A method for field error checking begins by decoding a predetermined pattern of a field of a frame to produce a decoded pattern. The method continues by determining, for the decoded pattern, a path metric distance of a predetermined state of a plurality of states of the decoding. The method... Agent: Garlick Harrison & Markison

20070174746 - Tuning core voltages of processors: A method, apparatus, and system are disclosed for tuning core voltages of processors. One embodiment is a method for software execution. The method includes varying core voltages of plural processors operating in lockstep to determine an operating range for each of the plural processors, and adjusting the core voltages of... Agent: Hewlett Packard Company

20070174747 - Scan chain extracting method, test apparatus, circuit device, and scan chain extracting program: A scan-chain extracting method of the present invention includes a defining step of defining control-circuit scan chains provided in a test control circuit; an initial-value setting step of setting an initial value for the sequence circuit devices of the control-circuit scan chains; a state setting step of setting the scan... Agent: Staas & Halsey LLP

20070174749 - Diagnostics unit using boundary scan techniques for vehicles: A test system including a diagnostics unit comprising a plurality of diagnostics-unit interfaces to communicatively couple the diagnostic unit to a plurality of units under test and a unit diagnostic communication port via which a unit diagnostic control device is communicatively coupled to the diagnostics unit. Each unit under test... Agent: Honeywell International Inc.

20070174748 - Method and system for backplane testing using generic boundary-scan units: A test system for testing a backplane comprising an adapter assembly and a generic boundary-scan test unit. The adapter assembly includes an application-specific mating connector to communicatively couple the adapter assembly to an application-specific port of a backplane and an adapter generic connector. The generic boundary-scan test unit includes a... Agent: Honeywell International Inc.

20070174750 - Apparatus and method for software-based control flow checking for soft error detection to improve microprocessor reliability: A method and apparatus for software-based control flow checking for soft error detection. In one embodiment, the method includes the instrumentation of one basic block of a target program to update a signature register with a successor basic block signature at an end of the basic block. In addition, the... Agent: Blakely Sokoloff Taylor & Zafman

20070174751 - Method of using virtual inputs and outputs to automate testing of application software and hardware: The invention relates to automated hardware in the loop testing. A method of automated diagnostic testing is described as monitoring, modifying, overwriting, providing and/or providing read-only access to input data given to a tested application and output data provided by a tested application to compare a desired relationship between input... Agent: Baker & Daniels LLP

20070174752 - Content distribution method, encoding method, reception/reproduction method and apparatus, and program: There are provided a content data transmission method, device, and program that minimize serious disturbances in reproduced content on the reception side, caused by a transmission error of encoded data, without sending feedback information from the reception side to the transmission side. When an encoder 103 creates encoded data to... Agent: Dickstein Shapiro LLP

20070174753 - Device and method for reading out a data word and device and method for storing a data block: A device for reading out a predetermined data word from a memory in which a data block is divided into a plurality of data words including the predetermined data word, an error identification value associated with the respective data word per data word of the plurality of data words, and... Agent: Dickstein Shapiro LLP

20070174754 - Secure error-correction code: A method and a system for coding digital data represented by source symbols (Si) with an error-correction code. The error-correction code generates parity symbols (Pj) based on, for each parity symbol, several source symbols and at least one parity symbol of preceding rank. At least a part of the source... Agent: Docket Clerk

20070174755 - Post viterbi error correction apparatus and related methods: A Post-Viterbi processor generates a plurality of candidate codewords based on a plurality of dominant error patterns for a particular communication channel. The Post-Viterbi processor selects one among the candidate codewords as a corrected codeword upon determining that the candidate codeword is error free.... Agent: Volentine & Whitt PLLC

20070174756 - Reproducing circuit: A reproducing circuit includes an output circuit that selectively outputs serial two-channel pulse code modulation data and serial two-channel direct stream digital data; a digital-to-analog converter circuit that converts digital data into a first-channel analog signal and a second-channel analog signal; and a conversion circuit. The two-channel pulse code modulation... Agent: Wolf Greenfield & Sacks, P.C.

20070174757 - Decoder and method for decoding a tail-biting convolutional encoded signal using viterbi decoding scheme: A decoder and method for decoding a tail-biting convolutional encoded signal using Viterbi decoding scheme performs a traceback operation for a first portion of a total code block, which includes a code block of the tail-biting convolutional encoded signal and a padded block. During the traceback operation for the first... Agent: Wilson & Ham Pmb: 348

20070168697 - Distributed data server and an operating method thereof: A distributed data server is a portable data server that is built by incorporating it with an embedded system. The distributed data server can receive outside data through an input unit, process the outside data via a control unit and then store the processed data to a storage unit. The... Agent: Rosenberg, Klein & Lee

20070168725 - System and method for rebooting a computer automatically when a system critical error occurs: A system for rebooting a computer automatically when a system critical error occurs is disclosed. The system includes: a timer (201) for counting down from a preset initial time when started, and for sending a reset signal to restart the computer (10) if the timer (201) counts down to zero;... Agent: PCe Industry, Inc. Att. Cheng-ju Chiang Jeffrey T. Knapp

20070168735 - System and method for automatic testing: An automatic testing system (100) for testing an electronic device (300) includes a testing plan module (130), a testing storage and management module (120), a testing script generating module (140), and an automatic testing module (110). The testing plan module is used for receiving a testing plan. The testing storage... Agent: PCe Industry, Inc. Att. Cheng-ju Chiang Jeffrey T. Knapp

20070168689 - Device and method for recording information with remapping of logical addresses to physical addresses when defects occur: A device for recording records information in blocks having logical addresses at a physical address (52) in a track on a record carrier. The logical addresses are translated into the physical addresses in dependence of defect management information, such as remapping tables, maintained in defect management areas. For avoiding remapping... Agent: Philips Intellectual Property & Standards

20070168690 - Highly available computing platform: System resources can be monitored for error or failure. In the event of a failure, an availability module can fail the system over from the corrupt resource to a backup resource.... Agent: Blakely Sokoloff Taylor & Zafman

20070168695 - Method and apparatus for re-utilizing partially failed resources as network resources: A method and apparatus for re-utilizing partially failed compute resources in a massively parallel super computer system. In the preferred embodiments the compute node comprises a number of clock domains that can be enabled separately. When an error in a compute node is detected, and the failure is not in... Agent: Martin & Associates, LLC

20070168691 - Recovery and debugging of failed network-accessible service construction: In response to determining that computer generation of an abstract workflow plan for a network-accessible service resulted in failure, a method attempts to automatically recover from the failure. Where attempting to automatically recover from this failure is unsuccessful, the method applies remedy rules, to assist in debugging the failure. In... Agent: Frederick W. Gibb, Iii Mcginn & Gibb, PLLC

20070168692 - Remote location failover server application: A method and system for performing a failover process on a production server. A source server and disaster recovery server are assigned indicators when operating in failover mode. A version match is performed to validate that the Exchange server applications and the storage area network vendor resources are compatible for... Agent: Shook, Hardy & Bacon L.L.P. (c/o Microsoft Corporation)

20070168693 - System and method for failover of iscsi target portal groups in a cluster environment: A system and method for the failover of iSCSI target portal groups (TPGs) is provided. Each network portal within a storage system is associated with a network portal data structure identifying a destination storage system in the event of failover/takeover operation. A management module ensures that all network portals associated... Agent: Cesari And Mckenna, LLP

20070168694 - System and method for identifying and removing pestware using a secondary operating system: Systems and methods for detecting and managing pestware are described. In one variation, a secondary operating system operates simultaneously with a primary operating system of a computer, and an anti-pestware application or service utilizes the secondary operating system to scan for indicia of pestware-related activity that may adversely affect a... Agent: Cooley Godward Kronish LLP Attn: Patent Group

20070168696 - System for inventing computer systems and alerting users of faults: A first embodiment of the system and method of this invention is disclosed in a distributed computer system. The system is monitored by detecting activity signatures of individually identifiable network components, programs and/or PCs by sensing operations (keystrokes on a keyboard or mouse clicks) and/or codes embedded in data streams... Agent: Goodwin Procter L.l.p

20070168699 - Method and system for extracting log and trace buffers in the event of system crashes: A method and system for extracting data of a buffer after a failure of an operating system. An application is registered prior to the failure. The registering includes identifying a buffer in which the data to be extracted is stored prior to the failure. The buffer is reserved to maintain... Agent: Schmeiser, Olsen & Watts

20070168700 - Method, system and computer program product for recovery of formatting in repair of bad sectors in disk drives: A method for correcting a formatting error in a boot sector of a hard disk drive is disclosed. An error in a first formatting of a first hard disk drive is discovered, and a second formatting is extracted from a second hard disk drive storing second data. The erroneous first... Agent: Dillon & Yudell LLP

20070168698 - Recovering from a non-volatile memory failure: Write operations store data in different physical memory locations. Each of the physical memory locations are associated with a logical address that is shared in common among the physical addresses. Sequence information stored in the physical memory location indicates which one of the write operations occurred last. The available erased... Agent: Trop Pruner & Hu, PC

20070168709 - Anomaly notification control in disk array: In a storage device incorporating a plurality of kinds of disk drives with different interfaces, the controller performs sparing on a disk drive, whose errors that occur during accesses exceed a predetermined number, by swapping it with a spare disk drive that is prepared beforehand.... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20070168703 - Apparatus and method to assign network addresses in a storage array: A method is disclosed to assign network addresses in a storage array disposed in a data storage and retrieval system comprising (P) data storage devices disposed in (N) data storage device assemblies. The method configures the (N) data storage device assemblies to comprise a spare data storage device assembly and... Agent: Dale F. Regelman

20070168707 - Data protection in storage systems: Provided are a method, system, and article of manufacture wherein a command is received for writing data to a first storage location. A determination is made that previously written data is stored in the first storage location. The previously written data is copied to a second storage location, in response... Agent: Konrad Raynes & Victor, LLP. Attn: Ibm37

20070168705 - Disk array device and path failure detection method thereof: This disk array device includes a first control unit connected to a host system via a first path through which data is transmitted and received, a second control unit connected to the host system via a second path through which data is transmitted and received upon a failure, a memory... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20070168706 - Method for reducing rebuild time on a raid device: The present invention provides a method for reducing rebuild time on a Redundant Array of Independent Disks (RAID) device. A first stripe of the RAID device is selected. Write-back caching on a drive being built is enabled. Data and/or parity may be read from at least one other drive. The... Agent: Peter Scott Lsi Logic Corporation

20070168702 - Method, system and computer program product for recovery of formatting in repair of bad sectors in flash memory: A method for correcting a formatting error in a flash memory is disclosed. An error in a first formatting of a first flash memory is discovered, and a second formatting is extracted from a second flash memory storing second data. The erroneous first formatting is replaced with a modification of... Agent: Dillon & Yudell LLP

20070168708 - Remotely repairing files by hierarchical and segmented cyclic redundancy checks: A method, comprising: recursively generating a sequence of sections of check codes of a local corrupted file to produce a local repair file; selectively retrieving at least one part of a remote repair file and at least one part of a remote original file, based on differences between at least... Agent: Procopio, Cory, Hargreaves & Savitch LLP

20070168701 - Storing raid configuration data within a bios image: A system, apparatus and method for storing and maintaining drive configuration data related to disk drives within a RAID. In one embodiment of the invention, configuration data is stored external to the disk drives within the RAID. A scan(s) is performed of the RAID disk drive configuration and/or configuration data... Agent: Lsi Logic Corporation

20070168704 - System and method of configuring a database system with replicated data and automatic failover and recovery: A graphical user interface based method of configuring automatic failover from a primary database system to a standby database system that is coupled to the primary database system by a network. Also coupled to the network is an observer process that is independent of the database systems and that initiates... Agent: Gordon E. Nelson, Patent Attorney, PC

20070168711 - Computer-clustering system failback control method and system: A computer-clustering system failback control method and system is proposed, which is designed for use with a computer-clustering system, such as a server-clustering system, for providing the server-clustering system with a failback control function which is characterized by the capability of performing an operating condition inspecting procedure on a once-failed... Agent: Pearl Cohen Zedek Latzer, LLP

20070168710 - Hot standby method and apparatus: An apparatus provides hot standby operation with normal and standby processors, each of which includes vital inputs electrically interconnected with the vital inputs of the other processor, vital outputs, and an application routine inputting the vital inputs and outputting the vital outputs. Communication ports communicate with communication ports of the... Agent: Eckert Seamans Cherin & Mellott

20070168713 - Managing failures in mirrored systems: Provided are a method, system and program from managing failures in a mirrored system. A copy relationship between primary and secondary storage locations, wherein updates to the primary storage locations are copied to the secondary storage locations. A failure is detected preventing an application from writing updates to the primary... Agent: Konrad Raynes & Victor, LLP. Attn: Ibm37

20070168712 - Method and apparatus for lockstep processing on a fixed-latency interconnect: Methods of operating two or more devices in lockstep by generating requests at each device, comparing the requests, and forwarding matching requests to a servicing node are described and claimed. A redundant execution system using the methods is also described and claimed.... Agent: Blakely Sokoloff Taylor & Zafman

20070168715 - Emergency data preservation services: Methods and systems of initiating a data backup process on a computer system are described. One method calls for the data to be backed up to be identified. The computer system is monitored for the occurrence of a backup trigger event. If the trigger occurs, a data backup process is... Agent: Wagner, Murabito & Hao LLP Third Floor

20070168716 - Failsoft system for multiple cpu system: A cpu-set type multiprocessor system allows a cpu of a cpu-set that has a hardware exception to disable itself and notify the system. The system assigns processes of the cpu-set that include the problem cpu to another cpu-set. The disabling of the problem cpu and transfer of the related processes... Agent: Staas & Halsey LLP

20070168714 - Portable computing device with a non-volatile memory drive: A portable computing device, in which an internal non-volatile memory drive that is used to boot to a functional device GUI is automatically swapped with a temporary RAM drive if the internal non-volatile memory drive is found to be corrupted. The non-volatile memory is typically Flash memory, but the principle... Agent: Synnestvedt Lechner & Woodbridge LLP

20070168717 - Method of data protection for computers: A data protection method includes switching a power source of a dual bank DRAM to a battery when external power fails, and placing a bank 1 of the dual bank DRAM into a self refresh mode. A data protection method further includes checking if a power failure occurred previously when... Agent: North America Intellectual Property Corporation

20070168723 - Adaptive recovery from system failure for application instances that govern message transactions: Mechanisms for adaptively entering and exiting recovery mode. When a message is received from a particular message transaction, the appropriate processing instance is loaded from persistent memory to system memory. The processing instance then determines from its own state information whether or not it is in recovery mode. This indication... Agent: Workman Nydegger/microsoft

20070168722 - Method and apparatus for detecting a fault condition and restoration thereafter using user context information: A processing unit of a system detects a fault condition associated with the co-processing unit and, upon detection, restores the processing unit using stored user context information. During normal operation, user context information used to execute operation commands are stored by the co-processing unit in memory and maintained after fault... Agent: Advanced Micro Devices, Inc. C/o Vedder Price Kaufman & Kammholz, P.C.

20070168720 - Method and apparatus for providing fault tolerance in a collaboration environment: A fault processor in a collaboration server models collaborative operations as a state machine. The fault processor divides collaboration operations into discrete segments, in which each segment corresponds to a repository update. A state definition defines the progression of states between the segments, and defines transitions to recovery states in... Agent: Barry W. Chapin, Esq. Chapin Intellectual Property Law, LLC

20070168721 - Method, network entity, system, electronic device and computer program product for backup and restore provisioning: A method, network entity, system, electronic device and computer program product for backing up and restoring data are provided. More specifically, a means for distributing responsibility for providing backup and restore services to multiple service providers is provided. In particular, in lieu of storing actual backup data (i.e., copies of... Agent: Alston & Bird LLP

20070168719 - Plug-in problem relief actuators: Systems and methods for managing errors that occur in operating system and software applications are disclosed where plug-in problem relief actuators are employed. The plug-in problem relief actuators are small plug-in programs for dealing with software errors. A typical system utilizes a relief manager that loads and invokes one or... Agent: Canady & Lortz LLP- Ibm

20070168718 - Reconfigurable system with corruption detection and recovery: A system and method for detecting corrupted configuration data stored in a configuration memory of a reconfigurable circuit are described herein.... Agent: Schwabe, Williamson & Wyatt, P.C. Pacwest Center, Suite 1900

20070168724 - High-speed restart method, information processing device, and program: Process information saving unit 131 and process restoration unit 132 are provided. A process table 201 and other information required for restoring a process present in an OS 130 are copied in a save area 124 on a main memory area 120 during execution of an application. At the restart,... Agent: Sughrue Mion, PLLC

20070168728 - Automated context-sensitive operating system switch: An automated technique for switching operating systems, responsive to current context of an executing test scenario. A test designer specifies, in a process control file, a required operating system for appropriate command blocks. A test sequencer packages the required operating system name with each command to be executed, and sends... Agent: Marcia L. Doubet Law Firm

20070168727 - Hole query for functional coverage analysis: Functional coverage techniques during design verification using cross-product coverage models and hole analysis are enhanced by the use of coverage queries. After running a test suite, a core set of non-covered events is specified. A coverage query is then automatically constructed and executed on the test results to identify a... Agent: Stephen C. Kaufman IBM Corporation

20070168726 - Processes for assisting in troubleshooting: A systematic process is disclosed for isolating customer issues with computer systems and implementing solutions to those issues. A basic troubleshooting methodology provides a systematic approach by which a technician can efficiently define and resolve a customer's problem. The methodology seeks to identify the symptoms and scope of a customer's... Agent: Merchant & Gould Bellsouth Corporation

20070168732 - Debugging apparatus and method for information storage apparatus: A debugging apparatus is provided for debugging an information storage apparatus. The debugging apparatus includes a debugging control unit, an information converting circuit, and a computer device. The debugging control unit captures raw data and then generates a coded data sequence representing the raw data. The information converting circuit receives... Agent: North America Intellectual Property Corporation

20070168731 - Dual cpu on-chip-debug low-gate-count architecture with real-time-data tracing: The same microcontroller chip is configured to be either a Target version or a Link version of a microcontroller. The Target version runs an application program. To debug the Target microcontroller, the Link version of the microcontroller functions as a master debug microcontroller to the slave Target microcontroller running the... Agent: Schneck & Schneck

20070168730 - Integrated circuit analysis system and method using model checking: A method and system for verifying an integrated circuit using a Model Checker at post-silicon time to improve post-silicon assertion-based verification. A dialog is established between the Model Checker and a fabricated integrated circuit under test (ICUT), to increase the state space which is explored. ICUT-based traces from the integrated... Agent: Greenberg Traurig, LLP

20070168729 - System and method for testing and debugging electronic apparatus in single connection port: A method applied in a test host for testing and debugging an electronic apparatus is provided. The test host and the electronic apparatus are connected by a connection port. The method comprises the following steps. The method is started when the test host is at a command mode. The test... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20070168734 - Apparatus, system, and method for persistent testing with progressive environment sterilzation: An apparatus, system, and method are disclosed for automatically testing a plurality of software test cases. The testing executes a quick test of the test cases which executes each test case in a test environment that is initialized just prior to the first test case and after subsequent test case... Agent: Kunzler & Mckenzie

20070168733 - Method and system of coherent design verification of inter-cluster interactions: A method and system comprises creating a test case that is dependent upon known sequences and executing the test case on an originating processor until it reaches a known point. The method further includes executing the test case on a different processor to perform an action and informing the originating... Agent: Greenblum & Bernstein, P.L.C

20070168736 - Breakpoint groups: A method and software architecture for grouping breakpoints. A plurality of breakpoints for halting execution of a program are created. A breakpoint group for logically associating one or more of the breakpoints is created. A portion of the breakpoints is added to the breakpoint group. The portion of the breakpoints... Agent: Blakely Sokoloff Taylor & Zafman

20070168737 - Debugging device using an lpc interface capable of recovering functions of bios, and debugging method therefor: The present invention discloses a debugging device using an LPC interface and capable of recovering the BIOS functions and a debugging method therefor. The debugging device comprises a firmware hub, an LPC interface, a decoder, and a display unit. The LPC interface electrically connects to the decoder, the firmware hub,... Agent: Jianq Chyun Intellectual Property Office

20070168738 - Power-on error detection system and method: A power-on error detection system and method applicable in an electronic device having a motherboard is proposed, wherein the motherboard is provided with a memory for storing a BIOS program and a signal outputting unit. The power-on error detection system and method are used to indicate an operation state of... Agent: Edwards Angell Palmer & Dodge LLP

20070168739 - System and method for self-diagnosing system crashes: A system and method for self-diagnosing a likely cause of a system crash is disclosed. A mechanism within an operating system checks for the existence of a stop code at startup of the machine. The existence of the stop code indicates that the system crashed during the previous session, and... Agent: Workman Nydegger/microsoft

20070168745 - Automation test systems: An automated testing system is provided that includes a computer system, a handset, script and scripting interface, a test module, and a data comparison component. The handset has at least one application resident thereon to be tested. The handset is coupled to communicate with the computer system. The script executes... Agent: Conley Rose, P.C.

20070168743 - Distributed exception handling testing: A distributed testing system for testing exception handling code paths is provided. The system may include multiple workstations configured to distributively test an executable component for exception handling. Each workstation includes a local data structure with data indicating code paths that have been traversed by a test performed by the... Agent: Microsoft Corporation

20070168748 - Functional validation of a packet management unit: A validation system is disclosed for validating function of a packet-management unit operationally coupled through a system interface to a processing unit of a processor system. The validation system comprises a user interface for creating an inputting test parameters and test code into the system, a test generator coupled to... Agent: Huffman Law Group, P.C.

20070168747 - Information processing device and process control method: A remote machine uses a process control unit to monitor a process for a Web browser program. When the process for the Web browser program starts to operate, an operating time therefor starts to be measured. When the operating time reaches a predetermined time, the process for the Web browser... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20070168742 - Isolating code modules: Execution of at least portions of applications, programs, functions, and other assemblages of programmable and executable code may be monitored to build effective test cases therefore. That is, by extracting, e.g., individual methods that occur, including input and output data, functional tests may be built and performance tests may be... Agent: Microsoft Corporation

20070168740 - Method and apparatus for dumping a process memory space: A method and apparatus for facilitating postmortem debugging of a computer hardware failure. When an error occurs, a controller places a memory, such as a synchronous dynamic random access memory (SDRAM), in a self refresh mode in which the memory is able to retain its data contents. The data contents... Agent: Ericsson Inc.

20070168744 - Method and system for testing a software application interfacing with multiple external software applications in a simulated test environment: A method and system for testing a software application. A description of a test suite for testing the software application being tested (ABT) is inserted into a test database. The ABT is invokes multiple external software applications during execution of a test script of the test suite. Each external application... Agent: Schmeiser, Olsen & Watts

20070168741 - Method, system and program product for facilitating debugging of simulation results obtained for an optimized simulation model of a device design having hierarchically-connected components: A computer-implemented processing tool is provided for facilitating debugging of simulation results obtained for an optimized simulation model of a device having hierarchically-connected components. The tool includes: receiving a component port name of the device to be searched; automatically checking a hardware descriptive language description of the device for a... Agent: Ibm Corporation Department 417

20070168746 - System and method for debugging a target computer using smbus: Methods and systems for debugging a software program, such as BIOS is provided. The methods and systems make use of a debugger application executing on a host computer and configured to communicate with a debugger module executing on a target computer via serial/parallel/USB port of host computer, an adapter and... Agent: Myers & Kaplan Intellectual Property Law, L.L.C.

20070168750 - End-user signal analysis programming: Described herein is a logic analysis system that allows a user to analyze waveforms using programs created or supplied by the user of the system.... Agent: Lee & Hayes, PLLC Portfolioip

20070168749 - Method and system for tracing program execution in field programmable gate arrays: A method and system for tracing program execution in field programmable gate arrays and other suitable programmable logic devices is described.... Agent: Agilent Technologies Inc.

20070168751 - Quantitative measurement of the autonomic capabilities of computing systems: The present invention is directed to the quantitative measurement of the autonomic capabilities of computing systems. A method in accordance with an embodiment of the present invention includes: subjecting the computing system to a workload; injecting a disturbance into the computing system; providing a notification that the computing system has... Agent: Hoffman, Warnick & D'alessandro LLC

20070168753 - Exception handling framework: Systems and techniques for implementing an exception handling framework are described. An exception register is configured to store multiple error messages and rules comprising instructions for responding to the error messages. An exception handler in communication with first and second process components is configured to: detect an error message generated... Agent: Fish & Richardson, P.C.

20070168754 - Method and apparatus for ensuring writing integrity in mass storage systems: A method for ensuring integrity of a data portion written by a controller and stored on a disk drive is provided that includes, among other things, forming at least one queue of a plurality of verification tasks associated with the disk drive and executing at least one verification task associated... Agent: Katten Muchin Rosenman LLP

20070168752 - Method for detecting hang or dead lock conditions: A scheme for monitoring links in a point-to-point architecture computer system is discussed. The scheme monitors labels for transactions to determine if they have been reissued within a user selected time window. A corresponding position in a register is updated to reflect the value of the transaction identifier. Subsequently, after... Agent: Blakely Sokoloff Taylor & Zafman

20070168755 - Compliance of master-slave modes for low-level debug of serial links: Methods and apparatuses for testing transmission and/or receiving circuit functionality.... Agent: Blakely Sokoloff Taylor & Zafman

20070168756 - Method and system for fault protection in communication networks, related network and computer program product: A method of providing fault protection of special purpose devices included in at least one communication network and performing respective functions, includes the steps of providing a set of general purpose devices adapted to be configured to perform the respective functions and in the presence of a faulty condition in... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070168757 - Systems, methods, and media for managing software defects: Systems, methods and media for managing software defects by aggregating potential software defect information from a plurality of user computer systems are disclosed. Embodiments may include receiving a plurality of software state logs each from an originating user computer system, where each software state log is associated with a potential... Agent: Ibm Corporation (jss) C/o Schubert Osterrieder & Nickelson PLLC

20070168758 - User interface assistant: A diagnostic system provides help to a user utilizing a data store that stores one or more solutions to at least one error. A storage component logs error data and associates errors, responses to the errors, and information indicative of whether each of the error responses was successful or unsuccessful.... Agent: Patrick R. Roche Fay, Sharpe, Fagan, Minnich & Mckee, LLP

20070168759 - Method and system for extending the useful life of another system: Disclosed are embodiments of a method and an associated first system for extending product life of a second system in the presence of phenomena that cause the exhibition of both performance degradation and recovery properties within system devices. The first system includes duplicate devices incorporated into the second system (e.g.,... Agent: Frederick W. Gibb, Iii Gibb & Rahman, LLC

20070168760 - Saving state data in parallel in a multi-processor system: A method, system and program product save state data in a multi-processor system. A problem in the multi-processor system is detected and a statesave thread is spawned for each processor in the system. Each statesave thread directs a processor, in parallel with the other processors to attempt to identify a... Agent: Law Office Of Dan Shifrin, PC - Ibm

20070168761 - Method for centralization of process sequence checking: A method for centralization of process sequence checking includes defining a set of steps in a sequence for a process and defining an order of steps in said set of steps. The method includes determining whether one of said steps started independently of others of said steps and determining whether... Agent: General Motors Corporation Legal Staff

20070168762 - Method and apparatus for implementing directory organization to selectively optimize performance or reliability: A method, and apparatus are provided for implementing a directory organization to selectively optimize performance or reliability in a computer system. A directory includes a user selected operational modes including a performance mode and a reliability mode. In the reliability mode, more directory bits are used for error correction and... Agent: Ibm Corporation RochesterIPLaw Dept 917

20070168764 - Apparatus and method for persistent report serving: A computer-readable medium is configured to receive a report processing request at a hierarchical report processor. The hierarchical report processor includes a parent process and at least one child process executing on a single processing unit, and is configured to process the report processing request as a task on the... Agent: Cooley Godward Kronish LLP Attn: Patent Group

20070168765 - Method for detecting and transmitting error messages: A method for detecting and transmitting the error messages is provided. The method is suitable for outputting an error message from a local module to a remote module. The method comprises the following steps. First, a controller inside the local module performs an error test procedure and obtains a test... Agent: Jianq Chyun Intellectual Property Office

20070168763 - System and method for auxiliary channel error messaging: Information handling system errors are presented at a display with the information handling system graphics subsystem inoperative by communicating an identified error to the display through an auxiliary channel and generating a presentation of the error information with a microcontroller of the display. For example, errors determined by BIOS firmware... Agent: Hamilton & Terrile, LLP

20070168767 - Flexible scan architecture: A testing architecture for testing a complex integrated circuit in which each functional unit may be tested independently of the others. Embodiments of the invention allow testing of functional units to take place at slower or faster clock speeds than other portions of the processor without incurring delay or other... Agent: Caven & Aghevli C/o Intellevate

20070168766 - Providing precise timing control between multiple standardized test instrumentation chassis: Precise timing control across multiple standardized chassis such as PXI is obtained by providing several control signals over PXI_LOCAL within each chassis, and by providing these control signals to other chassis. A Least Common Multiple (LCM) signal enables all clocks to have coincident clock edges occurring at every LCM edge.... Agent: Morrison & Foerster, LLP

20070168768 - Ecc coding for high speed implementation: Methods and apparatus for performing error correction code (ECC) coding techniques for high-speed implementations. The ECC code word is structured to facilitate a very fast single-error-detect (SED) that allows state machines to be stopped within a single cycle when an error is detected and enables a corresponding single-error-correct (SEC) operation... Agent: Blakely Sokoloff Taylor & Zafman

20070168769 - Multilevel semiconductor memory, write/read method thereto/therefrom and storage medium storing write/read program: A semiconductor device has multilevel memory cells, each cell storing at least three levels of data each. At least a first data composed of first data bits and a second data composed of second data bits are arranged in order that at least a bit of an N-order of the... Agent: Meyertons, Hood, Kivlin, Kowert & Goetzel, P.C.

20070168770 - System and method for determining on-chip bit error rate (ber) in a communication system: A method and system for evaluating performance of a device by on-chip determination of BER may include establishing a closed communication path internally within a physical layer device (PLD). A bit error rate for the PLD may be determined from within the PLD based on a ratio of a number... Agent: Mcandrews Held & Malloy, Ltd

20070168771 - Circuits and methods for repairing defects in memory devices: Some embodiments of the invention include a memory device has a number of memory segments connected to a supply source through a supply control circuit. The supply control circuit isolates a selected memory segment from the supply source when the selected memory segment is defective. The memory device replaces a... Agent: Schwegman, Lundberg, Woessner & Kluth, P.A.

20070168772 - Circuits and methods for repairing defects in memory devices: Some embodiments of the invention include a memory device has a number of memory segments connected to a supply source through a supply control circuit. The supply control circuit isolates a selected memory segment from the supply source when the selected memory segment is defective. The memory device replaces a... Agent: Schwegman, Lundberg, Woessner & Kluth, P.A. Attn: Viet V. Tong

20070168774 - Method for error test, recordation and repair: In a memory device, an on-die register is provided that is configured to store a row address as well as a column address of a memory cell that fails a test. Storing the row address frees testing from being limited to activating at one time only rows related to a... Agent: Trask Britt, P.C./ Micron Technology

20070168773 - Semiconductor memory unit with repair circuit: A semiconductor memory unit with a repair circuit includes a controller, a 2-to-1 selector, an address decoder and an address comparator. The controller supplies the 2-to-1 selector and the address comparator with a setup signal to carry out the following control. When the 2-to-1 selector is controlled to supply the... Agent: Buchanan, Ingersoll & Rooney PC

20070168778 - Apparatus and methods for testing memory devices: Each match line of a memory device such as a content addressable memory (CAM) device and a related part of a priority encoder can be separately tested. In test mode, all match lines are first reset/disabled. A write enable pulse signal enables a match line corresponding to a CAM word... Agent: Dickstein Shapiro LLP

20070168777 - Error detection and correction in a cam: An error detection and correction circuit is connected to at least one memory bank of a CAM device. During background processing (i.e., when the CAM is not performing reading, writing or searching functions) the error detection and correction circuit tests all of the CAM locations that it is connected to... Agent: Dickstein Shapiro LLP

20070168782 - External storage device and memory access control method thereof: A storage device, including: a non-volatile semiconductor memory which is electrically erasable; a system interface coupled with an external host system; and a controller reading data from the non-volatile semiconductor memory and transmitting data to the host system via the system interface in response to a read command received by... Agent: Antonelli, Terry, Stout & Kraus, LLP

20070168781 - Fully-buffered dual in-line memory module with fault correction: A memory module comprises first memory that stores data in memory blocks; second memory that temporarily stores data from at least one of the memory blocks and third memory for storing a relationship between addresses of the at least one of the memory blocks in the first memory and corresponding... Agent: Harness, Dickey & Pierce P.L.C

20070168780 - Memory with test mode output: Methods of operating an apparatus allow a memory to generate a test mode signal to trigger a test, in response to the memory detecting a predetermined command from a system bus.... Agent: Schwegman, Lundberg, Woessner & Kluth, P.A.

20070168775 - Programmable memory test controller: Providing a programmable test controller integrated along with a random access memory (RAM). The programmable test controller can be programmed to test desired memory locations. Due to such a feature, the same design of the test controller can be integrated into several implementations (varying by design, fabrication parameters, design rules,... Agent: Texas Instruments Incorporated

20070168783 - Rom redundancy in rom embedded dram: Redundancy in a read only memory (ROM) embedded dynamic random access memory (DRAM) is accomplished by programming redundancy elements such as antifuses or registers with ROM data which is read instead of erroneous data. Multiple identical arrays of ROM bits can also be used for redundancy.... Agent: Leffert Jay & Polyglaze, P.A.

20070168776 - Systems and methods for improved memory scan testability: Systems, methods and circuits for implementing efficient device testing. As one example, a method is disclosed for testing a device that includes both a digital and analog portion. In some cases, the digital portion includes a plurality of latch devices, and the analog portion includes a plurality of memory cells... Agent: Texas Instruments Incorporated

20070168779 - Testing of a cam: A system and method for validating a memory device using a Gray Code is described. The system and method tests data segments of a memory storage location concurrently, where a data segment may be a nibble. Each data segment cycles through the possible Gray Code states. Once a data segment,... Agent: Dickstein Shapiro LLP

20070168784 - Multilevel semiconductor memory, write/read method thereto/therefrom and storage medium storing write/read program: A semiconductor device has multilevel memory cells, each cell storing at least three levels of data each. At least a first data composed of first data bits and a second data composed of second data bits are arranged in order that at least a bit of an N-order of the... Agent: Meyertons, Hood, Kivlin, Kowert & Goetzel, P.C.

20070168793 - Device and method capable of verifying program operation of non-volatile memory and method card including the same: A method of verifying programming of an integrated circuit card includes transferring program data to a page buffer of a non-volatile memory, copying the program data to a buffer memory, calculating a first checksum value with respect to program data in the buffer memory, updating the program data in the... Agent: F. Chau & Associates, LLC

20070168790 - Apparatus and method for reducing test resources in testing drams: An apparatus and a method are disclosed for reducing the pin driver count required for testing computer memory devices, specifically Rambus DRAM, while a die is on a semiconductor wafer. By reducing the pin count, more DRAMs can be tested at the same time, thereby reducing test cost and time.... Agent: Knobbe Martens Olson & Bear LLP

20070168791 - Circuit and method for testing embedded phase-locked loop circuit: In a method for testing an embedded phase-locked loop (PLL) circuit, a first clock signal is provided to an embedded phase-locked loop (PLL) circuit to be tested. A PLL clock signal of a first frequency is generated by the embedded PLL in response to the first clock signal. The PLL... Agent: Volpe And Koenig, P.C.

20070168788 - Detector in parallel with a logic component: One or more detectors are provided for processing input in parallel with a logic component receiving the same input. Apparatus described herein include one or more logic components that are configured to perform logical operations on an input vector, and one or more detectors that are configured to receive a... Agent: Lee & Hayes, PLLC C/o Portfolioip

20070168787 - Interace circuit for using a low voltage logic tester to test a high voltage ic: The present invention provides an interface circuit for using a low voltage logic tester to test a high voltage IC. The interface circuit is between the high voltage IC and the low voltage logic tester, and is used for converting each output of the high voltage IC to a voltage... Agent: Birch Stewart Kolasch & Birch

20070168794 - Memory with element redundancy: A memory device to perform an erase operation algorithm that specifically deals with different types of defects in a memory array. The memory array of one embodiment of the present invention has primary and redundant elements. A register is used for each redundant element to store the address of a... Agent: Leffert Jay & Polglaze, P.A.

20070168786 - Method and apparatus for soft-error immune and self-correcting latches: A scanned value is stored by loading the value into at least three latch stages, generating an output value based on a majority of the latch stage outputs, and feeding the output value back to the inputs of the latch stages to reload the latch stages with the latch circuit... Agent: Ibm Corporation (jvm)

20070168792 - Method to reduce leakage within a sequential network and latch circuit: A method to reduce leakage within a sequential network comprising at least one latch and a combinatorial logic proximate to said latch, by applying an input vector on said sequential network during idle mode is described, the method comprising the steps of: overriding a static feedback of a latch comprising... Agent: International Business Machines Corporation

20070168795 - On-chip sampling circuit and method: Through addressing circuitry, a sampling circuit can choose a unique internal node/signal on an encapsulated/packaged chip to be output to one or more drivers. The chosen signals available at the target node are directed either through a select circuit to an output pin, or directly to an output pin. In... Agent: Jones Day

20070168796 - On-chip sampling circuit and method: Through addressing circuitry, a sampling circuit can choose a unique internal node/signal on an encapsulated/packaged chip to be output to one or more drivers. The chosen signals available at the target node are directed either through a select circuit to an output pin, or directly to an output pin. In... Agent: Jones Day

20070168789 - Queuing methods for distributing programs for producing test data: Circuit test algorithms, or portions thereof, can be executed in a non-sequential manner over a network comprising a plurality of processors. Such distributed processing can improve the speed with which results are obtained and processed. Circuit testing algorithms can include, but are not limited to, test pattern generation algorithms and... Agent: Klarquist Sparkman, LLP

20070168785 - Virtual concatenation sequence mismatch defect detection: Methods and apparatus for identifying sequence mismatch defects associated with members of a virtual concatenation (VCAT) group are disclosed. According to one aspect of the present invention, a method for detecting sequence mismatch defects associated with a VCAT group that substantially terminates at a VCAT sink includes obtaining a first... Agent: Aka Chan LLP / Cisco

20070168801 - Adapting scan architectures for low power operation: Scan architectures are commonly used to test digital circuitry in integrated circuits. The present invention describes a method of adapting conventional scan architectures into a low power scan architecture. The low power scan architecture maintains the test time of conventional scan architectures, while requiring significantly less operational power than conventional... Agent: Texas Instruments Incorporated

20070168804 - Burn-in test circuit, burn-in test method, burn-in test apparatus, and a burn-in pattern generation program product: A burn-in test circuit according to the present invention includes a scan chain formed by a plurality of scan flip-flips connected in series, a circuit under test input with an output from one of the plurality of scan flip-flops as an activation signal, and a scan chain loop circuit being... Agent: Sughrue Mion, PLLC

20070168799 - Dynamically configurable scan chain testing: An integrated circuit comprises a circuit under test, a plurality of scan chains coupled to the circuit under test, and a dynamically configurable input selection logic. The dynamically configurable input selection logic couples to the scan chains, receives one or more scan input bit streams, and provides a scan input... Agent: Texas Instruments Incorporated

20070168803 - Method and apparatus for diagnosing failures in an integrated circuit using design-for-debug (dfd) techniques: A method and apparatus for inserting design-for-debug (DFD) circuitries in an integrated circuit to debug or diagnose DFT modules, including scan cores, memory BIST (built-in self-test) cores, logic BIST cores, and functional cores. The invention further comprises using a DFD controller for executing a plurality of DFD commands to debug... Agent: Jim Zegeer, Esq.

20070168797 - Method, apparatus and computer program product for designing logic scan chains for matching gated portions of a clock tree: Methods, apparatus, and computer program product are provided for designing logic scan chains for matching gated portions of a clock tree. A clock tree includes a plurality of sections, each section including a gate receiving inputs of a global clock and a chain-specific clock control signal for a particular scan... Agent: Ibm Corporation RochesterIPLaw Dept 917

20070168805 - Scan chain diagnostics using logic paths: A structure and method for optimzing scan chain fail disgnosis. First, logic paths from target latches in a target scan chain to observation latches in at least one other observation scan chain are identified. Then, the locations of the observation latches within the other scan chains are optimized.... Agent: Schmeiser, Olsen & Watts

20070168798 - Scan string segmentation for digital test compression: A new technique to determine the placement of exclusive-ors in each scan string of a chip may be used to achieve improved test vector compression, and this may be used along with methods to minimize the overhead of the exclusive-or logic, to eliminate clock enable logic for multiple scan strings,... Agent: Connolly Bove Lodge & Hutz LLP

20070168802 - Semiconductor integrated circuit with test circuit: A semiconductor integrated circuit has a scan path that includes, between the output of the first logic section and the input of the functional block, a parallel path and a serial shift path for serially transferring data, and that includes first selectors for connecting the output of the first logic... Agent: Buchanan, Ingersoll & Rooney PC

20070168800 - Sequential scan technique providing enhanced fault coverage in an integrated circuit: According to an aspect of the present invention, multiple scan enable signals (controlling corresponding scan chains) are used in an integrated circuit, and the scan chains are placed in evaluation mode in non-overlapping durations between scan-in and scan-out operations. In an embodiment, a single clock signal drives the elements in... Agent: Texas Instruments Incorporated

20070168806 - Scan path circuit and semiconductor integrated circuit comprising the scan path circuit: Each of D flip-flops (FFs) 13a to 13f constituting a scan path circuit has a normal operation input circuit to be selected in a normal operation and a test operation input circuit to be selected in a test operation, and a control signal having an intermediate voltage between a supply... Agent: Mcdermott Will & Emery LLP

20070168808 - Integrated circuit testing module including data compression: Systems and methods of testing integrated circuits are disclosed. The systems include a test module configured to operate between automated testing equipment and an integrated circuit to be tested. The testing interface is configured to test the integrated circuit at a higher clock frequency than the automated testing equipment is... Agent: Carr & Ferrell LLP

20070168807 - Start/stop circuit for performance counter: A circuit for tracking a number of clock cycles between occurrences of an event of interest is described. The circuit comprises logic for asserting a run signal responsive to a first occurrence of the event of interest; logic for deasserting the run signal responsive to a second occurrence of the... Agent: Hewlett Packard Company

20070168809 - Systems and methods for lbist testing using commonly controlled lbist satellites: Systems and methods for performing logic built-in self-tests (LBISTs) in which an LBIST controller provides control signals to multiple LBIST satellites that are co-located with different functional blocks of the device under test, such as processor cores in a multiprocessor integrated circuit. Because the data paths for each satellite are... Agent: Law Offices Of Mark L. Berrier

20070168810 - Fully-buffered dual in-line memory module with fault correction: A memory module comprises first memory that includes memory blocks, second memory, and non-volatile memory. A control module, during testing of at least one of the memory blocks having a first address, stores data from the at least one of the memory blocks in the second memory at a second... Agent: Harness, Dickey & Pierce P.L.C

20070168811 - Fully-buffered dual in-line memory module with fault correction: A memory system comprises first memory that includes memory cells. Content addressable memory (CAM) includes CAM memory cells, stores addresses of selected ones of the memory cells, stores data having the addresses in corresponding ones of the CAM memory cells and retrieves data having the addresses from corresponding ones of... Agent: Harness, Dickey & Pierce P.L.C

20070168812 - Fully-buffered dual in-line memory module with fault correction: A memory system comprises first memory that includes memory cells that are selectively refreshed at a refresh rate. A test module tests operation of the memory cells at the refresh rate and that identifies T of the memory cells that are inoperable when refreshed at the refresh rate, where T... Agent: Harness, Dickey & Pierce P.L.C

20070168815 - Compositions and methods for use in three dimensional model printing: Compositions for use in the manufacture of three-dimensional objects including compositions for use as a support and/or release material in the manufacture of the three-dimensional objects are provided. There is thus provided, in accordance with an embodiment of the present invention, a composition suitable for building a three-dimensional object. The... Agent: Pearl Cohen Zedek Latzer, LLP

20070168814 - Device and method for testing and for diagnosing digital circuits: A test apparatus includes a test input signal generator that generates a test input signal of word width N, and terminals that connect to inputs and outputs of an electrical circuit to be tested. The electrical circuit includes N digital test inputs and M digital test outputs. The terminals for... Agent: Edell, Shapiro & Finnan, LLC

20070168813 - System and methods for authoring domain specific rule-driven data generators: An automated data generation system and methods are provided to facilitate generation of test data sets for computerized platforms while mitigating the need to store massive quantities of potentially invalid test data. In one aspect, a computerized test system is provided. A rules component is provided to specify one or... Agent: Amin. Turocy & Calvin, LLP

20070168816 - Testing apparatus and testing method for an integrated circuit, and integrated circuit: An apparatus enables a high quality test to be carried out within a short time, without forcing a severe design limitation on the designer and without an expensive tester. The apparatus includes a pattern generator built in an integrated circuit to generate pseudo random patterns as test patterns. A plurality... Agent: Staas & Halsey LLP

20070168817 - Data capture in automatic test equipment: A method for use with automatic test equipment (ATE) having a site that holds a device under test (DUT) includes receiving data from the DUT at a first rate, storing the data in a buffer, moving the data out of the buffer at a second rate, where the second rate... Agent: Fish & Richardson P.C.

20070168818 - Semiconductor test device with heating circuit: A semiconductor test device includes a test circuit having contacts for applying an electrical signal and measuring electrical parameters of the test circuit. The semiconductor test device also includes an integrally formed heating circuit comprising at least one circuit meander positioned adjacent the test circuit for raising a temperature within... Agent: Fox Rothschild, LLP

20070168819 - Digital microphone: The invention relates to a process for the transmission of digitized audio information of high quality and with a short delay, in particular processes for the transmission of digitized audio information in an audio pickup (microphone) and/or playback path. According to the invention there is proposed a channel filter which... Agent: Reed Smith, LLP Attn: Patent Records Department

20070168820 - Linear approximation of the max* operation for log-map decoding: A decoder for a wireless communication device comprising a calculator for calculating the modulo of a linear approximation of a MAX* function; and a selector for selecting a MAX* output value from the group a(n)modF, b(n)modF, and the calculated modulo based upon a determination as to whether a predetermined threshold... Agent: Freescale Semiconductor, Inc. Law Department

20070168821 - Arq control in an hsdpa communications system: A method of Automatic Repeat request (ARQ) control in a High Speed Downlink Packet Access (HSDPA) communication system. The method includes transmitting (300) control information from a first station to a second station; commencing receipt (312) of the control information at the second station; checking (502) whether the control information... Agent: Young & Thompson

20070168824 - Data transmission method and data transmission apparatus: A data transmission apparatus including a receiving unit for receiving transmitted packets; a priority decision unit; a retransmission packet storage unit; a retransmission instruction receiving unit for receiving a retransmission request from a terminal at the receiving end; a retransmission decision unit; a transmission queue management unit; and a transmission... Agent: Wenderoth, Lind & Ponack L.L.P.

20070168825 - Method and an apparatus for a quick retransmission of signals in a communication system: A method and an apparatus for quick retransmission of signals in a communication system are disclosed. A transmitting terminal, e.g., a base station, transmits signals in a form of packets to a receiving terminal, e.g., a subscriber station. The receiving terminal determines if the packet was intended for the receiving... Agent: Qualcomm Incorporated

20070168823 - Method and apparatus for preventing network outages: A computer implemented method, apparatus, and computer usable program code to determine whether an acknowledgment packet from an end point acknowledges receipt of unsent data in response to receiving the acknowledgement packet over a connection with the end point. A determination is made as to whether acknowledgement packets for unsent... Agent: Ibm Corp (ya) C/o Yee & Associates PC

20070168826 - Method and system for implementing h-arq-assisted arq operation: A method and system for implementing hybrid automatic repeat request (H-ARQ)-assisted automatic repeat request (ARQ) in a wireless communication system are disclosed. When an H-ARQ negative acknowledgement (NACK)-to-positive acknowledgement (ACK) error occurs, the H-ARQ receiver sends an H-ARQ NACK-to-ACK error indicator to the H-ARQ transmitter unless a maximum retransmission limit... Agent: Volpe And Koenig, P.C. Dept. Icc

20070168822 - System and method for dynamically adjusting hybrid arq transmissions: There is provided a system and method for dynamically adjusting the maximum number of hybrid ARQ transmissions in a wireless system. More specifically, in one embodiment, there is provided a method comprising generating a plurality of hybrid ARQ sub-packets associated with a packet, wherein a transmitter is configured to transmit... Agent: Michael G. Fletcher Fletcher Yoder

20070168827 - Harq protocol with synchronous retransmissions: The present invention relates to a hybrid automatic repeat request (HARQ) method for transmitting data packets from a transmitting entity to a receiving entity via a data channel. Further, the present invention is related to mobile stations, base stations, radio network controllers and communication systems performing in the HARQ method.... Agent: Stevens, Davis, Miller & Mosher, LLP

20070168828 - Decompressing method and device for matrices: Decompressing a matrix having a plurality of redundant matrix rows by reading selected matrix rows including at least all non-redundant matrix rows of the matrix from a memory and computing remaining matrix rows of the matrix from the read matrix rows, wherein several matrix rows are computed simultaneously. The read... Agent: Anne Vachon Dougherty

20070168829 - Methods to make dram fully compatible with sram: This invention provides practical methods to make a DRAM fully compatible with existing SRAM products. This is accomplished by design and manufacture methods according to the invention, which includes a method to reduce standby power of reference voltage generators and a method to avoid the alpha particle problem using a... Agent: Mcdermott, Will & Emery

20070168830 - Fast h-arq acknowledgement generation method using a stopping rule for turbo decoding: A stopping rule for Turbo decoding that is applied for both good and bad code blocks is disclosed. If the iteration either converges or diverges, decoding is terminated. In an alternative embodiment, the result of the stopping rule testing may be used for H-ARQ acknowledgement generation: if the iteration converges,... Agent: Volpe And Koenig, P.C. Dept. Icc

20070168831 - Reverse transmission apparatus and method for improving transmission throughput in a data communication system: There is provided a method for encoding input information bits by a quasi-complementary turbo code (QCTC) at a predetermined code rate to generate codeword symbols and transmitting the generated codeword symbols. The method comprises selecting one pattern among predetermined patterns corresponding to at least one of the generated codeword symbols... Agent: The Farrell Law Firm, P.C.

20070168833 - Apparatus and method for receiving signal in a communication system using a low density parity check code: An apparatus and a method for receiving a signal in a communication system using a Low Density Parity Check (LDPC) code. The apparatus and the method includes decoding a received signal according to a hybrid decoding scheme, wherein the hybrid decoding scheme is generated by combining two of a first... Agent: The Farrell Law Firm, P.C.

20070168832 - Memory efficient ldpc decoding methods and apparatus: Methods and apparatus for implementing memory efficient LDPC decodes are described. In accordance with the invention message information is stored in a compressed state for check node processing operations. The state for a check node is fully updated and then subject to an extraction process to generate check node to... Agent: Straub & Pokotylo

20070168834 - Method and system for routing in low density parity check (ldpc) decoders: An approach is provided for decoding a low density parity check (LDPC) coded signal. Edge values associated with a structured parity check matrix used to generate the LDPC coded signal are retrieved from memory. The edge values specify the relationship of bit nodes and check nodes, and are stored within... Agent: The Directv Group Inc

20070168835 - Serial communications system and method: A communications system and method are disclosed. A transmitter includes a scrambler for scrambling original data, an ECC encoder for converting scrambled data into ECC data, and a serializer for converting the ECC data into a serial stream. A receiver includes a frame recoverer for converting the serial data into... Agent: Agilent Technologies, Inc. Legal Department, Dl429

20070168837 - Method for implementing error-correction codes in flash memory: The present invention teaches a method and device for implementing error-correction code (ECC) in flash memory. The present invention discloses methods which utilize a modified ECC algorithm, and a flash memory device which incorporates these methods.... Agent: Dr. Mark Friedman Ltd. C/o Bill Polkinghorn

20070168836 - Repair bits for a low voltage cache: A method and apparatus for repairing cache memories/arrays is described herein. A cache includes a plurality of lines and logically viewable in columns. A repair cache coupled to the cache includes a repair bit mapped to each logically viewable column. A repair module determines a bad bit to be repaired... Agent: Intel Corporation C/o Intellevate, LLC

20070168839 - Interface apparatus for connecting a device and a host system, and method of controlling the interface apparatus: According to one embodiment, a serial ATA interface apparatus having an S-ATA bridge. The S-ATA bridge is to be connected to a host system by a serial ATA bus. The S-ATA bridge has a shadow register and a buffer memory. The shadow register stores commands. The buffer memory can access... Agent: Foley And Lardner LLP Suite 500

20070168840 - Memory block quality identification in a memory device: If a memory block in a flash memory device is found to have a defect, a memory block quality indication is generated in response to the type of memory defect. This indication is stored in the memory device. In one embodiment, the quality indication is stored in a predetermined location... Agent: Leffert Jay & Polglaze, P.A.

20070168838 - Reproduction apparatus and method for reproducing a unique medium identifier: The present invention relates to reproducing a unique identifier (ID) from a record carrier (5), a data which has area for storing data and a defect management area for storing data reallocated from defective sectors and for storing reallocation information. To prevent users from copying the unique identifier a reproduction... Agent: Philips Intellectual Property & Standards

20070168841 - Frame format for millimeter-wave systems: A single frame format is employed by a millimeter wave communication system for single-carrier and OFDM signaling. A Golay-coded sequence in the start frame delimiter (SFD) field identifies the data transmission as single carrier or OFDM. Complementary Golay codes are employed in a channel estimation field to allow a perfect... Agent: Steven J. Shattil

20070168842 - Transmitter and system for transmitting/receiving digital broadcasting stream and method thereof: A digital broadcasting transmission system processes dual transport stream (TS) including multi turbo streams. The digital broadcasting transmission system includes a turbo processor to detect a turbo stream from a dual transport stream (TS) which includes a multiplexed normal stream and a turbo stream, encoding the detected turbo stream and... Agent: Stein, Mcewen & Bui, LLP

20070168843 - Decoder, decoding method, and encoder: A decoder decodes a code by selecting, based on a predetermined condition, a path out of paths representing a transition of each of states in a trellis diagram. A storing unit stores, when a path at time k is selected, information on a selection history of a path selected at... Agent: Patrick G. Burns, Esq. Greer, Burns & Crain, Ltd.

20070168844 - Digital broadcasting transmission system and method thereof: A digital broadcasting transmission system and method thereof. The digital broadcasting transmission system, comprises an RS encoder to encode a dual transport stream (TS) which includes a normal stream and a plurality of turbo streams multiplexed together, an interleaver to interleave the encoded dual TS, a turbo processor to detect... Agent: Stein, Mcewen & Bui, LLP

20070168846 - Data decoding apparatus and method in a communication system: A majority voting Viterbi decoder includes a branch metric calculator (BMC) for measuring a difference between a received symbol and a reference symbol and outputting branch metrics from the difference; an add-compare-selection (ACS) unit for determining an optimal path using the branch metrics; a survival path memory unit for outputting... Agent: Dilworth & Barrese, LLP

20070168847 - Equalization techniques using viterbi algorithms in software-defined radio systems: A system and method for channel equalization using a Viterbi algorithm. Information from an output of a matched filter and channel parameters from a channel estimation circuit are correlated and passed on to a reconfigurable data path. The reconfigurable data path includes a reconfigurable branch metric calculation block. The reconfigurable... Agent: Docket Clerk

20070168845 - Viterbi decoder: In the present invention, the most likely transition source state bits are selected according to the path metric of the state bits corresponding to the state bits that could be taken for the encoded bits to be input, and are stored in the survival path memory. Therefore in the trace... Agent: Arent Fox PLLC

20070168848 - Error-detection flip-flop: An error-detection flip-flop is disclosed for identifying timing errors in digital circuits. The error-detection flip-flop is a master-slave flip-flop including logic to determine whether an input signal is received during a predetermined clock period, signifying a timing error. The error-detection flip-flop produces a variable-length error pulse, which may be combined... Agent: Carrie A. Boone, P.C.

20070168849 - Identifying design issues in electronic forms: A technology for identifying design issues during an electronic form generating process is disclosed. In one method approach, a user selected runtime environment to be applied to an electronic form is received. A form design check is performed on the electronic form. A reporting object generates a list of design... Agent: Microsoft Corporation

20070168850 - Connection verification apparatus for verifying interconnection between multiple logic blocks: A connection verification apparatus verifies interconnection between a plurality of logic blocks constituting a semiconductor integrated circuit or the like. It includes a connection verification section for verifying interconnection between a first logic block and a second logic block by comparing a signal level of an output terminal of the... Agent: Buchanan, Ingersoll & Rooney PC

20070162785 - Capturing and restoring application state after unexpected application shutdown: During unexpected application shutdowns, application settings states are captured, and displayed application states are restored upon subsequent application restart. User data displayed prior to shutdown may also be restored to pre-shutdown states. Data representing in-use application settings states and in-use user data are stored on a periodic basis, or upon... Agent: Merchant & Gould (microsoft)

20070162781 - Lithographic apparatus and device manufacturing method: Apparatus and methods for compensating for the movement of a substrate in a lithographic apparatus during a pulse of radiation include providing a pivotable mirror configured to move a patterned radiation beam incident on the substrate in substantial synchronism with the substrate.... Agent: Pillsbury Winthrop Shaw Pittman, LLP

20070162782 - Method for error processing in electronic controllers: A method for error processing in electronic controllers particularly, in motor vehicles, is provided whereby errors determined on each vehicle start are permanently written in an error memory. On repeated recognition of similar errors, an error counter, provided for the error, is increased. In the case where it is determined... Agent: Kramer Levin Naftalis & Frankel LLP Intellectual Property Department

20070162783 - System and method for virtual router failover in a network routing system: In a network routing system,a control blade provides for redundancy and failover of virtual routers (VRs) instantiated by objects running on processing engines of the several virtual routing engines (VREs). When the control blade detects a failure of one processing engines, it may identify the virtual private networks (VPNs) and/or... Agent: Hamilton Desanctis & Cha Michael A. Desanctis

20070162784 - Information recording medium, recording apparatus and method for an information recording medium, reproducing apparatus and method for an information recording medium computer program for controlling record or reproduction, and data structure including co: An information recording medium (100) is provided with: a user data area (108) for recording therein record data; a plurality of temporary defect management areas (104, 105) for temporarily recording therein defect management information (120) which is a basis of defect management for a defect in the data area; and... Agent: Young & Thompson

20070162786 - Repair of memory hard failures during normal operation, using ecc and a hard fail identifier circuit: A memory sub-system and a method for operating the same. The memory sub-system includes (a) a main memory, (b) an ECC circuit, (c) a hard fail identifier circuit, (d) a repair circuit, (e) a redundant memory, and (f) a threshold setting circuit. The ECC circuit is capable of (i) detecting... Agent: Schmeiser, Olsen & Watts

20070162787 - Monitoring vrm-induced memory errors: A method and system for improving Field Replacement Unit (FRU) isolation in memory sub-systems by monitoring Voltage Regulator Module (VRM) induced memory errors. A comparator compares the output voltage coming from the VRM to memory. If the comparator detects a VRM output voltage transient that is outside a rated threshold,... Agent: Dillon & Yudell LLP

20070162788 - Method and device for calculating bit error rate of received signal: System and method of estimating radio channel bit error rate (BER) in a digital radio telecommunications system wherein the soft output of the turbo decoder is used as pointer or index to look-up-tables containing the bit-wise BER of a certain bit in the data field of the received frame. A... Agent: Ericsson Inc.

20070162789 - Method and system for controlling an interleaver: Systems and Methods for controlling an interleaver are disclosed. Generally, a first and second signal are received, wherein the first and second signals are selected from the group consisting of a signal to noise ration signal, a data rate signal, and a bit error rate signal. An interleaver control signal... Agent: Brinks Hofer Gilson & Lione

20070162791 - Information recording medium, information recording method and information recording/reproduction system: An information recording medium including a plurality of sectors of the present invention includes: a first spare area including a spare sector for replacing a defective sector among the plurality of sectors; a defect management information area for managing the replacement of the defective sector by the spare sector; and... Agent: Mark D. Saralino (mei) Renner, Otto, Boisselle & Sklar, LLP

20070162790 - Recording medium having spare area for defect management and information on defect management, and method of allocating spare area and method of managing defects: A recording medium having a spare area for defect management and the management information of the spare area, a spare area allocation method, and a defect management method. When a primary spare area is allocated for slipping replacement and linear replacement upon initialization, and a remaining portion of the primary... Agent: Stein, Mcewen & Bui, LLP

20070162792 - Method for increasing the manufacturing yield of programmable logic devices: A method for increasing the manufacturing yield of field programmable gate arrays (FPGAS) or other programmable logic devices (PLDs). An FPGA or other PLD is formed in several sections, each of the sections having its own power bus and input/output connections. Each section of the FPGA or other PLD is... Agent: Connolly Bove Lodge & Hutz LLP (ibm Microelectronics Division)

20070162793 - Multiple embedded memories and testing components for the same: A method of sharing testing components for multiple embedded memories and the memory system incorporating the same. The memory system includes multiple test controllers, multiple interface devices, a main controller, and a serial interface. The main controller is used for initializing testing of each of the dissimilar memory groups using... Agent: Docket Clerk

20070162794 - Semiconductor memory test device and method thereof: A semiconductor memory test device and method thereof are provided. The example semiconductor memory test device may include a fail memory configured to store at least one test result of a memory under test, a mode selecting unit configured to output a selection signal for selecting a memory address protocol... Agent: Harness, Dickey & Pierce, P.L.C

20070162795 - Test apparatus and test method: A test apparatus of the invention includes a pattern generator that generates an address signal and a test pattern signal to be supplied to a memory under test and an expectation signal to be output from the memory under test according to the address signal and the test pattern signal,... Agent: Osha Liang L.L.P.

20070162799 - Burn-in test signal generating circuit and burn-in testing method: A burn-in test signal path is provided in parallel with an ordinary signal path with respect to an analog circuit. A signal waveform converting circuit for converting a burn-in test signal of a digital waveform into a burn-in test signal of an analog waveform is provided in the burn-in test... Agent: Mcdermott Will & Emery LLP

20070162796 - Method and portable device for testing electronic device: Portable device capable of testing an electronic device is disclosed. An embodiment of a portable device comprises a memory device and a processing unit. The memory device stores a test program describing a test flow including a series of test instructions. The processing unit, coupled to the memory device, acquires... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20070162800 - Semiconductor test system: There are included a mother board (11), which has therein a multiplexer and a test pass/fail determining part, and a daughter board (12) that has therein an A/D converting part and an averaging part. The mother board (11) multiplexes a plurality of analog signals outputted from a plurality of output... Agent: Connolly Bove Lodge & Hutz LLP

20070162798 - Single event upset error detection within an integrated circuit: An integrated circuit 2 includes logic circuitry 10 and sequential storage elements 8. Both the logic circuit 10 and sequential storage elements 8 can be subject to particle strikes giving rise to single event upset errors. These single event upset errors can be detected by detecting a transition in the... Agent: Nixon & Vanderhye, PC

20070162797 - Test device and method for testing electronic devices: A method for testing electronic devices, and to a test device that is, for test purposes, configured to be connected to an electronic system instead of an electronic device is disclosed. In one embodiment, the device includes at least one means for supplying a signal supplied by the electronic system... Agent: Dicke, Billig & Czaja

20070162801 - Wireless radio frequency technique design and method for testing of integrated circuits and wafers: Various embodiments are described herein for an apparatus and method for the wireless testing of Integrated Circuits and wafers. In one embodiment, the apparatus comprises a test unit external from the wafer and at least one test circuit that is fabricated on the wafer that contains the Integrated Circuit. The... Agent: Bereskin And Parr

20070162802 - Scan flip-flop circuit and semiconductor integrated circuit device: Disclosed is a scan flip-flop that includes a latch section, a hold section, a first output node and a second output node. The latch section holds data. The hold section captures an inner state, responsive to a control signal, to hold an output state. The first output node outputs a... Agent: Young & Thompson

20070162803 - Accelerated scan circuitry and method for reducing scan test data volume and execution time: An architecture and methodology for test data compression using combinational functions to provide serial coupling between consecutive segments of a scan-chain are described. Compressed serial-scan sequences are derived starting from scan state identifying desired Care_In values and using symbolic computations iteratively in order to determine the necessary previous scan-chain state... Agent: Connolly Bove Lodge & Hutz LLP

20070162805 - Automatable scan partitioning for low power using external control: Scan architectures are commonly used to test digital circuitry in integrated circuits. The present invention describes a method of adapting conventional scan architectures into a low power scan architecture. The low power scan architecture maintains the test time of conventional scan architectures, while requiring significantly less operational power than conventional... Agent: Texas Instruments Incorporated

20070162804 - Method of generating test patterns to efficiently screen inline resistance delay defects in complex asics: A methodology for generating scan based transition patterns (i.e., ATPG pattern generation for transition delay faults (“TDF”)) wherein when either a slow-to-rise (STR) or a slow-to-fall (STF) transition fault is detected, that specific fault is removed from a fault universe as well as its companion TDF, wherein the companion fault... Agent: Lsi Logic Corporation

20070162806 - Random number test circuit: The random number test circuit includes a shift register which operates based on a clock and which successively stores serial random numbers generated by a random number generation element, a first random number being output from a predetermined stage of the shift register; a comparison circuit which compares the first... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070162807 - High-speed serial transfer device test method, program, and device: A test pattern generating unit generates a test pattern in which unconverted data is arranged such that same values of 0 or 1 bits in converted data according to a code conversion table are successively transferred to each of a plurality of serial transfer channels that a high-speed serial transfer... Agent: Staas & Halsey LLP

20070162808 - Semiconductor device testing: An apparatus and method to test components in a semiconductor test structure. On a semiconductor wafer, a test module implemented in one or more scribe lines between a plurality of semiconductor dies is used to test components in the semiconductor test structure. The test module may, for example, test electrical... Agent: Robert D. Marshall, Jr. Texas Instruments Incorporated

20070162809 - Hardware generator for uniform and gaussian deviates employing analog and digital correction circuits: A hardware random number generator (RNG) (10) comprises a source of entropy (12) for providing a bit stream (DIS) comprising successive bits of a first state and a second state and a first digital corrector circuit (28). The first circuit being configured to provide from two successive bits in the... Agent: Schwegman, Lundberg, Woessner & Kluth, P.A.

20070162810 - Retransmission control method and system for multicast information distribution service, retransmission control apparatus, wireless base station and wireless terminal: In a retransmission control method for a multicast information distribution service, when information which requires retransmission is generated, a wireless terminal transmits the retransmission request for the information to an information distribution apparatus when a timing determined for the wireless terminal is reached. The information distribution apparatus which receives the... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070162812 - Decoding and reconstruction of data: When applying chase combining in the retransmission protocol of a telecommunication system or other schemes of retransmission protocols which use selfdecodable incremental redundancy, it may not in all cases be the best solution to combine the initial transmission of data up to the latest received. retransmission of the data and... Agent: Philips Electronics North America Corporation Intellectual Property & Standards

20070162811 - Re-transmission control method and communication device: A re-transmission control method for a transmitting device that transmits a codeword generated based on a first parity-check matrix to a receiving device, and re-transmits a k-th additional parity generated based on a k-th parity-check matrix to the receiving device when receiving a NAK for the codeword or a (k−1)-th... Agent: Birch Stewart Kolasch & Birch

20070162813 - Transmitting station, receiving station, communications method, communications program, computer-readable storage medium containing the program: The current Draft IEEE 802.11e standard specifies two types of schemes for obtaining an acknowledgement from a receiving station: BlockAck and NormalAck. The current specifications allow temporary use of NormalAck while transmitting data frames in a BlockAck scheme. The specifications however does not explicitly describe the data frames that are... Agent: Birch Stewart Kolasch & Birch

20070162814 - Ldpc (low density parity check) code size adjustment by shortening and puncturing: LDPC (Low Density Parity Check) code size adjustment by shortening and puncturing. A variety of LDPC coded signals may be generated from an initial LDPC code using selected shortening and puncturing. Using LDPC code size adjustment approach, a single communication device whose hardware design is capable of processing the original... Agent: Garlick Harrison & Markison

20070162816 - Method for constructing a parity check matrix of an irregular low density parity check code: A method for generating a parity check matrix of a Low Density Parity Check (LDPC) code. A base matrix is generated in which elements with a value of 1 are arranged at predefined distances. The elements with the value of 1 in the base matrix are replaced with predefined sub-matrices.... Agent: Dilworth & Barrese, LLP

20070162815 - System and method for providing h-arq rate compatible codes for high throughput applications: In one embodiment, the present patent application comprises a method and apparatus to generate low rate protographs from high rate protographs, comprising copying a base graph; permuting end points of edges of a same type in copies of the base graph to produce a permuted graph; and pruning systematic input... Agent: Qualcomm Incorporated

20070162817 - Data structure, recording apparatus, reproducing apparatus, program, and record medium: A data structure having at least content data and reproduction control information with which reproduction of the content data is controlled is disclosed. The data structure includes an index table, an object, a play list, and clip information. With the index table, reproduction of content data is managed. The object... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070162818 - Bandwidth efficient coded modulation scheme based on mlc (multi-level code) signals having multiple maps: Bandwidth efficient coded modulation scheme based on MLC (Multi-Level Code) signals having multiple maps. The use of multiple maps is adapted to various types of coded signals including multi-level LDPC coded modulation signals and other MLC signals to provide for a significant performance gain in the continual effort trying to... Agent: Garlick Harrison & Markison

20070162821 - Parity check matrix, method of generating parity check matrix, encoding method and error correction apparatus: A parity check matrix making it possible to encode through decoding, a method of generating a parity check matrix, an encoding method and an error correction apparatus including defining an M×N parity check matrix H=[Hm|Hp], and generating an M×M matrix as a sub-matrix Hp wherein all row vectors are linearly... Agent: Stein, Mcewen & Bui, LLP

20070162822 - Apparatus and method for transmitting/receiving signal supporting variable coding rate in a communication system: Provided are an apparatus and method for transmtting/receiving signal, supporting a variable coding rate, in a communication system. The method includes receiving an information vector, generating a child parity check matrix based on a parent parity check matrix according to a coding rate to be applied for generating a block... Agent: The Farrell Law Firm, P.C.

20070162820 - Checksum generation apparatus and method thereof: A checksum generation apparatus and method thereof. The checksum generation apparatus includes a control unit which, in response to information on a predetermined length, outputs a control signal when an amount of data corresponding to the predetermined length is received; an addition unit which receives data, performs an addition on... Agent: Stein, Mcewen & Bui, LLP

20070162824 - Error detection and correction scheme for a memory device: Data is read from a memory array. Before being stored in a data buffer, a Hamming code detection operation and a Reed-Solomon code detection operation are operated in parallel to determine if the data word has any errors. The results of the parallel detection operations are communicated to a controller... Agent: Leffert Jay & Polglaze, P.A.

20070162819 - Signal transmitting method and transmitter in radio multiplex transmission system: A disclosed signal transmission method in a radio multiplex transmission system comprises the steps of: serial-to-parallel converting serial data to be transmitted into N (N: two or more) parallel data series; independently performing an error-correcting encoding process on the parallel signals of the N data series serial-to-parallel converted; parallel-to-serial converting... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070162823 - System and method for optimizing iterative circuit for cyclic redundency check (crc) calculation: A system for generating CRC code words associated with data ranging up to w-bytes in width to be communicated over a communications channel includes a first plurality of serially coupled code-generation blocks each for generating a CRC value based on data input to each block, respective blocks of the first... Agent: Scully, Scott, Murphy & Presser, P.C.

20070162826 - Method for detecting error correction defects: A method, device and system for detecting error correction defects calculates a written error checking and correction (ECC) code for a written data and writes the written data and the written ECC code into a plurality of memory cells. When data is read from the memory cells including data representing... Agent: Trask Britt, P.C./ Micron Technology

20070162825 - Unidirectional error code transfer for a bidirectional data link: A controller includes a link interface that is to couple to a first link to communicate bi-directional data and a second link to transmit unidirectional error-detection information. An encoder is to dynamically add first error-detection information to at least a portion of write data. A transmitter, coupled to the link... Agent: Morgan Lewis & Bockius LLP/rambus Inc.

20070162827 - Sphere detection and rate selection for a mimo transmission: Techniques for performing sphere detection to recover data symbols sent in a MIMO transmission are described. In an aspect, sphere detection is performed for data symbols generated with at least two modulation schemes. In another aspect, sphere detection is performed for the data symbols in an order determined based on... Agent: Qualcomm Incorporated

20070162828 - Coding method and apparatus, and computer program and computer-readable storage medium: Data in multidimensional space such as a two-dimensional image is encoded with high efficiency. Further, as two-dimensional data can be decomposed to one-dimensional bases, the problem of wiring for two-dimensional parallelizing in a convolution arithmetic unit can be solved. For this purpose, two-dimensional image data f(x,y) to be encoded is... Agent: Fitzpatrick Cella Harper & Scinto

20070162831 - Communication apparatus, transmitter, receiver, and error correction optical communication system: A communication apparatus includes a transmitter and a receiver, wherein the transmitter further includes: an interleaver that rearranges positions of bits of an information frame; an FEC encoder that performs an error correction encoding to the information frame whose bit positions have been rearranged; and a selector that inserts FEC... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070162829 - Method and apparatus for transmitting and receiving a block of data in a communication system: A method and apparatus for transmitting and receiving data provide for efficient use communication resources by encoding data in accordance with a first code to produce a block of data, determining transmission data rate of a time frame, selecting a portion of the block of data based on the determined... Agent: Qualcomm Incorporated

20070162830 - Method of encoding and decoding: encoding said first block of data symbols using an ECC encoder (2) to obtain a codeword having a fixed number of symbols, said codeword comprising said first block of data symbols and a second block of a fixed forth number of parity symbols, and generating a codevector by selecting a... Agent: Philips Intellectual Property & Standards

20070162832 - Write once recording medium, recording device and recording method for write one recording medium, and reproduction device and reproduction method for write once recording medium: A temporary defect management area 14 is placed between a control information recording area 12 and a data area 11. Before a recording medium 10 is finalized, defect management information is temporarily recorded into the temporary defect management area. Upon finalizing, the defect management information is recorded into a definite... Agent: Young & Thompson

20070162833 - Reconfigurable bit-manipulation node: A reconfigurable bit-manipulation node is disclosed. The node includes an execution unit configured to perform a number of bit-oriented functions and a control unit configured to control the execution unit to allow one of the bit-oriented functions to be performed. The execution unit includes a number of elements interconnected with... Agent: Patterson & Sheridan, L.L.P.

20070162834 - Devices and system for exchange of digital high-fidelity audio and voice through a wireless link: Systems and methods for communicating source data between a source device and a listener device are disclosed. In an exemplary embodiment, source data is encoded by organizing at least a selected portion of source data into a data block having rows and columns. Encoded columns are formed by appending to... Agent: Ganz Law, P.C.

20070162835 - Dtv transmitter and method of coding main and enhanced data in dtv transmitter: A DTV transmitter includes a pre-processor pre-processing enhanced data, a data formatter generating enhanced data packets including the pre-processed data and inserting known data place holders to the data packets, and a multiplexer multiplexing the enhanced data packets with main data packets. It further includes an RS encoder which RS-codes... Agent: Lee, Hong, Degerman, Kang & Schmadeka

20070162836 - Arithmetic circuit: An arithmetic circuit includes a NOR circuit for outputting 1-bit inverted logical OR sf from all of a first bit group x(6) to x(10) containing 0 or more high-order bit of a path metric value composed of a plurality of bits, an inverter for inverting each bit of a second... Agent: Mcginn Intellectual Property Law Group, PLLC

20070162837 - Method and arrangement for decoding a convolutionally encoded codeword: An arrangement and method for decoding a convolutionally encoded codeword employs a window sliding over the codeword. Path metrics are computed simultaneously forwards and backwards in the sliding window. A decoding result is computed in a synthesis unit on the basis of the path metrics. The sliding window is divided... Agent: Perman & Green

20070162838 - Data writing apparatus and a storage system: An LDPC encoder (304) includes a timing adjustment circuit (326) for performing timing adjustment on main data and outputting to a writing circuit (334), a parity generation circuit (328) for performing LDPC encoding on input signal series, generating the parity data, and outputting to the writing circuit (334), and the... Agent: Cantor Colburn, LLP

20070157051 - Method and system for managing core configuration information: Embodiments of a method and system for managing a system are disclosed herein. The method and system provides a means to permanently and/or securely store core system configuration information so that the core system configuration information stays with a particular system, such as a computing device or motherboard for example.... Agent: Courtney Stanford & Gregory LLP C/o Intellevate

20070157052 - Protection of devices in a redundant configuration: A network communication device is provided, comprising a control processor for controlling operation of the device, a reset module which is controllable independently of the control processor for performing a reset operation of the device, and a reset control interface for receiving a reset signal, the reset module being responsive... Agent: Eckert Seamans Cherin & Mellott, LLC.

20070157053 - Power-switching circuit with overload protection from a serial bus interface and method of driving the same: A power-switching circuit includes an interface, a voltage regulator, a voltage detector and a power switch. The interface is for coupling a peripheral device. The voltage regulator provides constant-power output at an output end. An input end of the voltage detector is coupled to the output end of the voltage... Agent: North America Intellectual Property Corporation

20070157054 - Error monitoring for serial links: Methods, apparatuses and systems for physical link error data capture and analysis.... Agent: Blakely Sokoloff Taylor & Zafman

20070157055 - Detection of tap register characteristics: According to some embodiments, first data including a token is shifted into an IEEE 1149.1-compliant shift register and second data is received, the second data being shifted out from the IEEE 1149.1-compliant shift register as a result of the shifting of the first data. Next, it is determined whether the... Agent: Buckley, Maschoff & Talwalkar LLC

20070157057 - Digital jitter detector: In one embodiment, a jitter detector comprises a logic circuit coupled to receive a plurality of inputs indicative of states captured from a plurality of outputs of a delay chain responsive to a first clock input and a plurality of clocked storage devices coupled to the logic circuit. The logic... Agent: Meyertons, Hood, Kivlin, Kowert & Goetzel, P.C.

20070157056 - Method and apparatus for detecting defects in integrated circuit die from stimulation of statistical outlier signatures: A method and computer program for detecting and locating defects in integrated circuit die from stimulation of statistical outlier signatures includes receiving as input a test value of an electrical parameter measured for each of a plurality of identically designed electrical circuits, identifying one of the identically designed electrical circuits... Agent: Lsi Logic Corporation

20070157058 - Interconnect delay fault test controller and test apparatus using the same: An interconnect delay fault test controller and a test apparatus using the same wherein an update operation and a capture operation may be carried out in one interval of a system clock or a core clock when carrying out an interconnect delay fault test between an IEEE P1500 wrapped cores... Agent: Sughrue Mion, PLLC

20070157059 - Apparatus and method for integrated functional built-in self test for an asic: We describe, in exemplary embodiments, an on-chip Functional Built-In Self Test (“FBIST”) mechanism for testing integrated circuits with internal memory state and complex transaction based interfaces. Such interfaces include system-on-chip applications, memory chip applications, and input/output (“IO”) protocol adapter chips.... Agent: Frank Chau, Esq. F. Chau & Associates, LLC

20070157062 - Implementation of ldpc (low density parity check) decoder by sweeping through sub-matrices: Implementation of LDPC (Low Density Parity Check) decoder by sweeping through sub-matrices. A novel approach is presented by which an LDPC coded signal is decoded processing the columns and rows of the individual sub-matrices of the low density parity check matrix corresponding to the LDPC code. The low density parity... Agent: Garlick Harrison & Markison

20070157061 - Sub-matrix-based implementation of ldpc (low density parity check ) decoder: Sub-matrix-based implementation of LDPC (Low Density Parity Check) decoder. A novel approach is presented by which an LDPC coded signal is decoded by processing 1 sub-matrix at a time. A low density parity check matrix corresponding to the LDPC code includes rows and columns of sub-matrices. For example, when performing... Agent: Garlick Harrison & Markison

20070157060 - Techniques to perform forward error correction for an electrical backplane: Techniques to perform forward error correction for an electrical backplane are described. An apparatus may comprise a physical layer unit having a forward error correction sublayer to perform forward error correction using a single bit to represent a two bit synchronization header. Other embodiments are described and claimed.... Agent: Kacvinsky LLC C/o Intellevate

20070157063 - Method for iterative decoding in a digital system and apparatus implementing the method: In a digital system using a turbo code, a method for performing iterative decoding in accordance with a Log-MAP Algorithm comprises the steps of: generating a look-up table comprising a plurality of values representative of a correcting factor; performing a first calculation to obtain a forward metric; performing a second... Agent: Seed Intellectual Property Law Group PLLC

20070157064 - Systems and methods for error corrections: Systems and methods for error correction of data. In one embodiment of the invention, a plurality of error correction schemes are applied when encoding data and depending on the circumstances, one or more of those schemes is selected to decode the data. In one of these embodiments, the applied error... Agent: Browdy And Neimark, P.l.l.c. 624 Ninth Street, Nw

20070157065 - Self-protection against non-stationary disturbances: Included are embodiments for self protection. At least one embodiment includes Self-protection Unit for protecting a signal that includes a first receiving component configured to receive data, the received data being received as at least one frame and a subframing component configured to subframe at least a portion of the... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20070157066 - Method for iterative decoding employing a look-up table: A method performs iterative decoding of information coded by an error correction code. The method includes: defining a transcendent first function representing a quantity to be evaluated for the decoding method; defining a quantized second function approximating the first function; computing first values of the second function obtained based on... Agent: Seed Intellectual Property Law Group PLLC

20070157068 - Reed-solomon decoding apparatus and method having high error correction capability: A Reed-Solomon (RS) decoding apparatus having high error correction capability and a method thereof are disclosed. The apparatus includes: error location and analysis polynomial generating units for performing a modified Euclid algorithm by receiving syndrome data upon receipt of an enable signal, and suspending input of the syndrome data and... Agent: Blakely Sokoloff Taylor & Zafman

20070157067 - Techniques for reducing error propagation using modulation codes having a variable span: Techniques are provided for reducing error propagation in encoded data using Fibonacci modulation codes. The Fibonacci modulation codes have a Fibonacci base with a variable span that limits error propagation. Some of the elements in the Fibonacci base have a larger span than limited span elements in the base. Errors... Agent: Steven J. Cahill

20070157069 - Incremental forward error correction redundancy: A data frame includes multiple data blocks that are block encoded in a forward error correction (FEC) scheme. When received data blocks are corrupted, encoded versions of the data blocks are stored, and retransmission of the corrupted data blocks is requested. Upon receiving retransmitted data blocks, the retransmitted encoded data... Agent: Lemoine Patent Services, PLLC C/o Portfolioip

20070157070 - Method for checking of video encoder and decoder state integrity: The present invention provides a method and a system for verifying a match between states of a first video processor and a second video processor, wherein one of said first and second video processors is a video encoder utilizing predictive video encoding and the other one of said first and... Agent: Hollingsworth & Funk, LLC Suite 125