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USPTO Class 714 | Browse by Industry: Previous - Next | All 04/2007 | Recent | 08: Jun | May | Apr | Mar | Feb | Jan | | 07: Dec | Nov | Oct | Sep | Aug | Jul | Jun | May | Apr | Mar | Feb | Jan | | 06: Dec | Nov | Oct | Sep | Aug | Jul | Jun | May | Apr | Mar | Feb | Jan | Error detection/correction and fault detection/recovery inventions 04/07Recently published patent applications awaiting approval from the USPTO. Recent week's RSS XML file available below.Listing format for abstract view: USPTO application #, Title, Abstract excerpt,Patent Agent. Listing format for list view: USPTO National Class full category number, title of the patent application. 04/26/2007 > patent applications in patent subcategories. 20070094530 - Data transfer method and remote copy system: This invention provides data transfer control with no throughput reduction or possibility thereof in data transfer between a sender port and a receiver port, separated by a great distance, for example, in the case where the sender port and the receiver port, between which data is transferred according to Fibre... Agent: Mattingly, Stanger, Malur & Brundidge, P.C. 20070094531 - Expandable storage apparatus for blade server system: An expandable storage apparatus for a blade server system is provided. In one preferred embodiment of the invention, the storage apparatus inserted within a blade server system comprises a storage system for storing desired information which can be accessed by the blade server system; a control module to control access... Agent: Rabin & Berdo, P.C. 20070094529 - Method and apparatus for increasing throughput in a storage server: Multiple domains are created for processes of a storage server. The processes are capable of execution on a plurality of processors in the storage server. The domains include a first domain, which includes multiple threads that can execute processes in the first domain in parallel, to service data access requests.... Agent: Network Appliance/blakely 20070094532 - Kernel debugging in a cluster computing system: An embodiment of a method of maintaining operation of a cluster of computing devices includes an initial step of detecting a suspended kernel process on a first of the computing devices. In addition to the step of detecting the suspended kernel process the method includes the step of issuing a... Agent: Hewlett Packard Company 20070094533 - System and method for data backup: A method and system of data backup for a computer system is disclosed. Full and incremental backups of data stored to a first storage device coupled to the computer system are stored to a backup storage device coupled to the computer system. The backup storage device may be remotely located... Agent: Ogilvy Renault LLP 20070094534 - Rram memory error emulation: A method for verifying the functionality of a repair system of configurable memory that functions to replace memory that fails predetermined tests with unused memory that passes the tests. The method includes the steps of providing a matrix comprising a plurality of reconfigurable memory blocks, providing an emulation system, generating... Agent: Lsi Logic Corporation 20070094535 - Datacenter with automated robotic maintenance: A datacenter with automated robotic maintenance comprises: a plurality of computer systems disposed at different locations therein, each system including: a cabinet rack; and a plurality of system cell units disposed therein for operation of the corresponding computer system; a robotic vehicle operative to move to each of the cabinet... Agent: Hewlett Packard Company 20070094537 - Address range comparator for detection of multi-size memory accesses with data matching qualification and full or partial overlap: An memory access address comparator includes two comparators comparing an input memory access address with respective reference addresses. The comparators produce a match indication on selectable criteria, such as address size, full or partial overlap, greater than, less than, equal to, not equal to, less than or equal to, and... Agent: Robert D. Marshall, Jr. Texas Instruments Incorporated 20070094536 - Multiplexing a communication port: Methods, systems, and computer program products for multiplexing a target communication port to provide an additional independent communication channel sharing at least some portion of hardware associated with the target port. Typically, a device, such as a disk drive, is also connected to the target port. An out-of-band signal indicates... Agent: Workman Nydegger/microsoft 20070094538 - Error reporting method and system: An error reporting method is used for reporting errors in testing a computer system. The error reporting method includes the following steps: testing the computer system to find errors; generating an error code corresponding to a specific error during the test; and displaying the error code. An error reporting system... Agent: North America Intellectual Property Corporation 20070094543 - Automated software testing architecture using a multi-level framework: A software testing architecture can comprise a three-level framework. The three-level framework can comprise a first level (comprising a first data source), a second level (comprising a second data source), and a third level (comprising a third data source). The framework can further comprise an intermediate entity data source. The... Agent: Klarquist Sparkman, LLP 20070094539 - Computer virus check method in a storage system: Upon detection of a virus definition file update, a virus check server mounts a computer's storage area in a storage apparatus via a network to check whether or not a file stored in the storage area is infected with a virus. For the virus check, the virus check server communicates... Agent: Antonelli, Terry, Stout & Kraus, LLP 20070094541 - Method and apparatus for generating test execution sequences automatically for a software testing process: The present invention provides a method for generating test execution sequences automatically for a software testing process. A method in accordance with an embodiment of the present invention includes: inputting scripts of test cases; generating test execution sequences based on the scripts; and selecting valid test execution sequences according to... Agent: Hoffman, Warnick & D'alessandro LLC 20070094542 - Method, system and computer program for managing test processes based on customized uml diagrams: A method for facilitating the management of a test process is proposed. For this purpose, the different test scenarios included in the process and their execution dependencies are represented by means of a customized UML activity diagram (300a). An execution weight is also associated with each test scenario (for example,... Agent: Ibm Corporation Intellectual Property Law 20070094540 - Program analysis program, program analysis device, and program analysis method: The present invention provides a program analysis program, a program analysis device, and a program analysis method which can analyze programs and obtain input/output information of the programs effectively. The program analysis device includes an execution path detection unit that detects an execution path and a variable from a group... Agent: Staas & Halsey LLP 20070094544 - System and method for triggering software rejuvenation using a customer affecting performance metric: A computer-implemented method for triggering a software rejuvenation system and/or method includes receiving a plurality of requests for resources, determining to take a sample of the requests with a probability, determining an estimated average response time to the sample of the requests for resources, determining that the estimated average response... Agent: Siemens Corporation Intellectual Property Department 20070094545 - Progressive extended compression mask for dynamic trace: This invention provides trace address compression by comparing respective bytes of a current trace address with a stored prior trace address. Only the least significant bytes of the current trace address that do not match the stored prior trace address or are less significant than any section of the current... Agent: Robert D. Marshall, Jr. Texas Instruments Incorporated 20070094546 - Progressive extended compression mask for dynamic trace: This invention provides trace address compression by comparing respective bytes of a current trace address with a stored prior trace address. Only the least significant bytes of the current trace address that do not match the stored prior trace address or are less significant than any section of the current... Agent: Texas Instruments Incorporated 20070094548 - Method and apparatus for monitoring host to tool communications: An aspect of the present invention includes a method and device for listening to communications between processes and tools, recording report and report trigger definitions, matching reports from tools with the recorded definitions, and translating messages into a context-insensitive format. Other aspects of the present invention include dynamically enhancing tool... Agent: Haynes Beffel & Wolfeld LLP 20070094547 - Method for the automatically determining the indirect and direct extent of damages resulting from a failure of technical components in objects integrated in a production cycle: A method is provided for the automated determination of the indirect and direct extent of damages in objects resulting from a failure of technical components integrated in a production cycle. The invention involves the detection of the components that are affected by a failure, a determination of the number of... Agent: Norris, Mclaughlin & Marcus 20070094549 - Phase error determination method and digital phase-locked loop system: In a digital PLL system, instead of measuring a binarized playback RF signal with a high frequency clock, pulse-length data is generated by using N phase clocks (for example, 16 phase clocks). The pulse-length data is then counted with a virtual channel clock so as to extract run-length data. In... Agent: Robert J. Depke Lewis T. Steadman 20070094551 - Data storage apparatus and method for handling data on a data storage apparatus: In an embodiment, a data storage apparatus having a plurality of spare area arrays may be provided additional to remote spare areas or alone and each of the spare area arrays respectively may be assigned to essentially each of a plurality of format features of the data storage medium and... Agent: Philips Intellectual Property & Standards 20070094550 - Information recording device: An information recording device is provided, which is capable of performing physical reformatting at a high speed while avoiding unnecessary substitution processing after the physical reformatting. A disc recording and reproduction drive 1020 records information on an information recording medium including a volume space for recording user data, a spare... Agent: Hamre, Schumann, Mueller & Larson P.C. 20070094552 - Method for accessing data of defected optical disk: A method for accessing data in an optical disk with a drive. The drive has a memory. The optical disk has data blocks for recording data, and spare blocks for replacing defect data blocks. The method includes reading a predetermined number of spare blocks into the memory, and while reading... Agent: North America Intellectual Property Corporation 20070094553 - Method of and apparatus for immediately writing or reading files on a disc-like recording medium having control information on defect management stored in a predefined location and such a disc-like recording medium: A method of recording digital information signals on a removable rewritable disc like recording medium, the method comprising recording user data on a logical area of the disc and, prior to removal of the disc out of a recording/reproducing apparatus, finalizing the disc with a lead-in and lead-out area comprising... Agent: Philips Intellectual Property & Standards 20070094554 - Chip specific test mode execution on a memory module: A test mode for component-specific testing of a memory module. Data is written to and stored in each memory component of a memory module, which data indicates whether the memory component is to execute a particular test mode. Upon receiving a test mode command supplied in common to all of... Agent: Edell, Shapiro & Finnan, LLC 20070094555 - Component testing and recovery: Disclosed are systems and methods of producing electronic devices. These electronic devices include excess circuits to be used as replacements for circuits that are found to be defective within the electronic device. The excess circuits are included in a different device component than the circuits that are found to be... Agent: Carr & Ferrell LLP 20070094558 - Apparatus and method for testing an ieee1394 port: An apparatus for testing an IEEE1394 port of a motherboard test device includes an IEEE1394 connector, a cable transceiver arbiter connected to the IEEE1394 connector, a first converting chip connected to the cable transceiver arbiter, a second converting chip connected to the first converting chip, and a flash chip connected... Agent: Morris Manning Martin LLP 20070094556 - Methods for distributing programs for generating test data: Described herein are methods and systems for distributed execution of circuit testing algorithms, or portions thereof. Distributed processing can result in faster processing. Algorithms or portions of algorithms that are independent from each other can be executed in a non-sequential manner (e.g., parallel) over a network of plurality of processors.... Agent: Klarquist Sparkman, LLP 20070094557 - Semiconductor integrated circuit tester: A semiconductor integrated circuit tester includes a host computer having a parallel data bus segment, a test head including at least one instrument having a parallel data bus segment, a first network bridge interfacing the data bus segment of the host computer to a switched serial network, and a second... Agent: Smith-hill And Bedell, P.C. 20070094559 - Wiring structure and method of semiconductor integrated circuit: To provide wiring structure and method capable of supplying a scan clock signal for each clock domain without requesting a user to add a test circuit. The wiring structure of a semiconductor integrated circuit according to an embodiment of the present invention includes: a fixed layer where a common line... Agent: Foley And Lardner LLP Suite 500 20070094560 - Reducing the soft error vulnerbility of stored data: Embodiments of apparatuses and methods for reducing the soft error vulnerability of stored data are disclosed. In one embodiment, an apparatus includes storage logic, determination logic, and selection logic. The determination logic is to determine a condition of a dataword. The storage logic includes logic to store a first portion... Agent: Intel/blakely 20070094561 - Methods for distribution of test generation programs: As described herein, circuit testing algorithms, or portions thereof, can be executed in a distributed manner so that their execution can be over a network of processors. In one aspect, the results that are obtained by such distributed execution are ensured to be consistent with the results that would be... Agent: Klarquist Sparkman, LLP 20070094562 - Apparatus and method for unified debug for simulation: In one embodiment of the invention, a method for unified debug for simulation, includes: generating a transaction from a hardware verification language (HVL) testbench; copying signal states in the HVL testbench after the transaction is generated, wherein the signal states are copied in a hardware description language (HDL) mirror; generating... Agent: Hewlett Packard Company 20070094563 - Method and apparatus for controlling error using reserved bits: An apparatus for controlling an error using reserved bits including a mask indicator a pre-decoder and a decoder. The mask indicator is operable to provide mask data. The pre-decoder is operable to mask reserved bits of received data using the mask data. The decoder is operable to decode the pre-decoded... Agent: Sughrue Mion, PLLC 20070094565 - Decoding of multiple data streams encoded using a block coding algorithm: A system implemented for example in the form of an SoC comprises a first demodulator for generating a first data stream to be decoded, and a second demodulator for generating a second data stream to be decoded, and a block decoder. The block decoder comprises an input memory for storing... Agent: Seed Intellectual Property Law Group PLLC 20070094564 - Systems and methods for message encoding and decoding: Presented herein are systems and methods for checking the integrity of data transmissions between or within one or more digital processing systems by identifying a data characteristic that is likely to change if there is an error in transmission. According to one embodiment, data messages are modified to achieve a... Agent: Fish & NeaveIPGroup Ropes & Gray LLP 20070094567 - Digital broadcasting transmission system, and a signal processing method thereof: A digital broadcasting transmission system, and a signal processing method thereof, includes a parity area generating unit preparing a first area for parity insertion with respect to a dual transport stream (TS) which includes a normal stream and a turbo stream as multiplexed, a first interleaver interleaving the dual TS... Agent: Stein, Mcewen & Bui, LLP 20070094566 - Method for turbo transmission of digital broadcasting transport stream, a digital broadcasting transmission and reception system, and a signal processing method thereof: A digital broadcasting transmission/reception system, and a signal processing method thereof for turbo-processing digital broadcasting transport stream and transmitting the processed stream, includes a parity area generating unit preparing a first area for parity insertion with respect to a dual transport stream (TS) which includes a normal stream and a... Agent: Stein, Mcewen & Bui, LLP 20070094568 - Method for updating check node in low density parity check decoder: A method is provided for updating a check node in a low density parity check (LDPC) decoder, including: transmitting log-likelihood ratio (LLR) messages from variable nodes to a plurality of check nodes; decomposing the LLR messages in a plurality of node messages for each check node; and updating each check... Agent: Sughrue Mion, PLLC 20070094572 - Data processing method and apparatus, recording medium, reproducing method and apparatus using the same method: A burst error-correcting capability is largely improved. At least the even-number row and at least the odd-number row of the data block which is a set of data sectors are separated. An outer parity is created for each column and an inner parity is created for each row. Then, the... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C. 20070094569 - Determining hard errors vs. soft errors in memory: In a preferred embodiment, the invention provides a method for determining soft and hard errors in memory. First one or more errors are detected in memory. Next correct data is written back to the memory locations were the error(s) were detected. Data is then read from the memory locations where... Agent: Hewlett Packard Company 20070094571 - Ecc circuit of semiconductor memory circuit: An error detection and correction (EEC) circuit of a semiconductor memory device includes first through m'th ECC engines (m is a natural number) connected in series, and a flipflop that receives output data from the m'th ECC engine, outputs an error detection/correction signal in response to a clock signal, and... Agent: F. Chau & Associates, LLC 20070094570 - Error detection in storage data: Provided are a method, system, and an article of manufacture for detecting errors while accessing a storage device. A host system writes an identical initialization pattern into each block of a plurality of blocks while formatting the storage device. Each block of the plurality of blocks has a checksum field... Agent: Dorsey & Whitney, LLP Intellectual Property Department 20070094573 - Method and device for error analysis of optical disc: A method and device for error analysis particularly adoptable for a recording medium such as an optical disc are disclosed. The present invention executes an encoding-like operation such as an interleaving operation to error flags during reproducing data from the optical disc, so as to obtain number and distribution of... Agent: Madson & Austin Gateway Tower West 20070094574 - Method and device for storing data: A method is provided for storing data by distributing the data into plural storage units that are accessible independently of one another. The method includes the steps of dividing data to be stored into plural data blocks, generating parity data corresponding to the data blocks, distributing the plural data blocks... Agent: Patrick G. Burns Greer, Burns & Crain, Ltd. 20070094575 - Coding system and decoding system: In a coding system wherein an error correction/detect-ion coding is combined with a synchronization recovering technique using a synchronization code, the problems of a pseudo synchronization and a step out due to error detect-ion are solved. There is provided a coding part 212 for coding an input multiplexed code string... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP 20070094576 - Coding system and decoding system: In a coding system wherein an error correction/detect-ion coding is combined with a synchronization recovering technique using a synchronization code, the problems of a pseudo synchronization and a step out due to error detect-ion are solved. There is provided a coding part 212 for coding an input multiplexed code string... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP 20070094577 - Coding system and decoding system: In a coding system wherein an error correction/detect-ion coding is combined with a synchronization recovering technique using a synchronization code, the problems of a pseudo synchronization and a step out due to error detect-ion are solved. There is provided a coding part 212 for coding an input multiplexed code string... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP 20070094578 - Coding system and decoding system: In a coding system wherein an error correction/detect-ion coding is combined with a synchronization recovering technique using a synchronization code, the problems of a pseudo synchronization and a step out due to error detect-ion are solved. There is provided a coding part 212 for coding an input multiplexed code string... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP 20070094579 - Method for handling audio packet loss in a windows® media decoder: A method for re-synchronizing audio data with video data in a Windows Media decoder when Advanced Systems Format (ASF) packets are lost, comprising calculating the number of frames that have been lost by generating an Estimated Presentation Time (EPT) for each data frame in the WMA packet and comparing it... Agent: Ericsson Inc. 20070094580 - Method for selcting low density parity check (ldpc) code used for encoding of variable length data: A method for selecting a low-density parity-check (LDPC) code for encoding variable sized data used in data communication systems. The method selects a LPCD code from a plurality of LDPC codes of different codeword lengths and code rates; by calculating a number of shortening Nshortened bits and a number of... Agent: Pearne & Gordon LLP 20070094581 - Signal measuring circuit and signal measuring method: To provide a signal measuring circuit that measures a signal, such as noise, with high precision. A maximum reference value and a minimum reference value are generated based on the voltage level of a signal, the voltage difference between the maximum reference value and the minimum reference value is divided,... Agent: Paul J. Esatto, Jr. Scully, Scott, Murphy & Presser 20070094582 - Encoding method to qc code: In an encoding method to a self-orthogonal QC code whose parity check matrix is expressed by at least one circulant matrix, a code sequence is generated which satisfies a check matrix. The check matrix is designed so that a column weight w of each circulant matrix is three or larger... Agent: Robert J. Depke Lewis T. Steadman 04/19/2007 > patent applications in patent subcategories.20070088970 - Recovery from failures within data processing systems: Provided are methods, data processing systems, recovery components and computer programs for recovering from storage failures affecting data repositories. At least a part of the recovery processing is performed while the data repositories are able to receive new data and to allow retrieval of such new data. Although new data... Agent: Robert A. Voigt, Jr. Winstead Sechrest & Minick PC 20070088972 - Automatic monitoring method for managed server health: A Node Manager monitors the status of multiple servers. The Node Manager detects server failures, periodically monitors server health status, and performs server maintenance. When the Node Manager detects a server failure, it determines whether or not the server should be restarted. While periodically monitoring servers, the Node Manager may... Agent: Fliesler Meyer LLP 20070088971 - Methods and apparatus for service acquisition: Methods and apparatus for service acquisition. In an aspect, a method is provided for service acquisition. The method includes generating one or more channel switch video (CSV) signals associated with one or more multimedia signals, encoding the CSV signals and the multimedia signals to produce error coded blocks, and encapsulating... Agent: Qualcomm Incorporated 20070088973 - Technique for timeline compression in a data store: A technique for timeline compression in a data store is disclosed. In one particular exemplary embodiment, the technique may be realized as a method for timeline compression in a storage system, wherein digital content of the storage system is backed up to enable restoration of the digital content to one... Agent: Hunton & Williams LLP Intellectual Property Department 20070088977 - Data restoring method and an apparatus using journal data and an identification information: A host and a storage system each keep a shared identifier indicating a state of a system. The storage system acquires, at update of data, a data pair including data for a change through processing of the host and data before the update. The storage system relates the data pair... Agent: Mattingly, Stanger, Malur & Brundidge, P.C. 20070088975 - Method and apparatus for mirroring customer data and metadata in paired controllers: A data storage system configured for efficient mirroring of data between paired redundant controllers is provided. More particularly, in response to the receipt of customer data from a host for storage, a first controller segments the received customer data into one or more frames of data. In addition, the first... Agent: Sheridan Ross PC 20070088974 - Method and apparatus to detect/manage faults in a system: A fault module supports detection, analysis, and/or logging of various faults in a processor system. In one embodiment, the system is provided on a multi-core, single die device.... Agent: Daly, Crowley, Mofford & Durkee, LLP C/o Portfolioip 20070088976 - Raid system and rebuild/copy back processing method thereof: A RAID system access a physical disk according to a host I/O request, and perform Rebuild/Copy back processing, for implementing high-speed Rebuild/Copy back processing without interrupting the processing of a normal I/O. When one disk device out of a plurality of disk devices constituting the RAID configuration fails, the processing... Agent: Greer, Burns & Crain 20070088978 - Internal failover path for sas disk drive enclosure: A serial SCSI (SAS) storage drive system includes a drive enclosure having a first interface card coupled to one storage controller over a single SAS path and a second interface card coupled to another storage controller over a different single SAS path. At least one disk drive within the enclosure... Agent: Law Office Of Dan Shifrin, PC - Ibm 20070088979 - Hardware configurable cpu with high availability mode: A microprocessor includes a plurality of execution units of a same type, and a first register operable to select between a first and a second mode of operation, wherein the microprocessor utilizes at least one of the execution units as a redundant execution unit during the first mode of operation... Agent: Hewlett Packard Company 20070088980 - Disaster recovery for processing resources using configurable deployment platform: A system and method for disaster recovery for processing resources using configurable deployment platform. A primary site has a configuration of processing resources. A specification of the configuration of processing resources of the primary site is generated. The specification is provided to a fail-over site that has a configurable processing... Agent: Wilmer Cutler Pickering Hale And Dorr LLP 20070088982 - System and method for combining diagnostic evidences for turbine engine fault detection: A system and method for combining conclusions from multiple fault detection techniques to isolate likely faults in a turbine engine is provided. The system and method provide the ability to effectively deal with multiple concurrent faults in the engine. Additionally, the embodiments of the invention provide the ability to correctly... Agent: Honeywell International Inc. 20070088981 - Wireless diagnostic systems management: This disclosure relates to the use of wireless communication systems to manage the remote monitoring of end point devices. In one example embodiment, a method for management of a wireless diagnostic system is disclosed. First, management software initiates a connection between the management software and a TAP. Next, the management... Agent: Workman Nydegger (f/k/a Workman Nydegger & Seeley) 20070088983 - Integrated circuit comprising a measurement unit for measuring utlization: The invention provides an integrated circuit comprising a data processing system which performs satisfactorily after integration of the individual building blocks, such as main processors and coprocessors, into the data processing system. This is achieved by measuring the utilization of the communication structure established between the individual building blocks. A... Agent: Philips Electronics North America Corporation Intellectual Property & Standards 20070088985 - Protection of a digital quantity contained in an integrated circuit comprising a jtag interface: A method and a circuit for protecting a digital quantity stored in a microcontroller including a JTAG interface, including the step of making the digital quantity dependent from a value stored in non-volatile fashion in the microcontroller and made inaccessible if signals are present at the input of the JTAG... Agent: Stmicroelectronics Inc. C/o Wolf, Greenfield & Sacks, PC 20070088984 - System and method for passive wire detection: A hardware system for passively detecting wires from a mobile transportation system is provided. The hardware system includes a main processor in the hardware system that uses plural commands to manage a preprocessor module and a linker module, wherein the pre-processing module pre-processes a digital image taken from a digital... Agent: Klein, O'neill & Singh, LLP 20070088986 - Systems and methods for testing software code: Systems and methods for testing software code are provided. In one embodiment, a method for evaluating a test code is provided. The method comprises associating one or more unique software component identifiers with one or more components within a software application; compiling a first table that comprises the one or... Agent: Honeywell International Inc. 20070088987 - System and method for handling information transfer errors between devices: Systems and methods are disclosed for handling errors occurring when a first device requests information from a second device. Optionally the information and any corresponding error information are sent from the second device to a buffer. After the first device optionally receives the information and the error information from the... Agent: Texas Instruments Incorporated 20070088989 - Method for dynamically choosing between varying processor error resolutions: A method of processor error resolution includes receiving a resource error alert at a processor, determining an application error resolution preference at the processor, and executing an algorithm corresponding to the error resolution preference at the processor. Another embodiment provides a method for providing an error resolution preference from an... Agent: Ibm Corp. (clg) C/o Cardinal Law Group 20070088988 - System and method for logging recoverable errors: In accordance with the present disclosure, a method and system for logging recoverable errors in an information handling system is disclosed. The system includes a central processing unit, a chipset coupled to the central processing unit, and at least one chipset memory unit coupled to and associated with the chipset.... Agent: Roger Fulghum Baker Botts L.L.P. 20070088991 - Method and apparatus for verifying multi-channel data: A multi-channel data verifying apparatus and method are provided. The apparatus includes a receiver receiving N data channels and a deskew channel generated by sequentially extracting a predetermined data bit from the each of N data channels, and a deskew channel error detector detecting whether the deskew channel received by... Agent: Ladas & Parry LLP 20070088990 - System and method for reduction of rebuild time in raid systems through implementation of striped hot spare drives: The present invention is a system for reducing rebuild time in a RAID (Redundant Array of Independent Disks) configuration. The system includes a plurality of RAID disk drives, a plurality of hot spare disk drives, and a controller communicatively coupled to the plurality of RAID disk drives and the plurality... Agent: Lsi Logic Corporation 20070088992 - Phase error determination method and digital phase-locked loop system: In a digital PLL system, instead of measuring a binarized playback RF signal with a high frequency clock, pulse-length data is generated by using N phase clocks (for example, 16 phase clocks). The pulse-length data is then counted with a virtual channel clock so as to extract run-length data. In... Agent: Robert J. Depke Lewis T. Steadman 20070088993 - Memory tester having master/slave configuration: A memory testing system includes a tester interface. The tester interface is configured to couple a tester control driver to a master memory component and a slave memory component, the tester control driver configured for controlling the master memory component and the slave memory component. The tester interface is configured... Agent: Dicke, Billig & Czaja, P.l.l.c. 20070088994 - Electronic device testing system, method, and control device utilized in same: An exemplary testing system (10) for testing an electronic device (300) under test includes a testing device (100) and a control device (200). The electronic device under test includes a transmitting element (320) and a keyboard (340). The testing device generates and sends instructions. The control device is connected to... Agent: PCe Industry, Inc. Att. Cheng-ju Chiang Jeffrey T. Knapp 20070088997 - Generation and self-synchronizing detection of sequences using addressable memories: Methods and apparatus to implement LFSRs and LFSR based sequence generators, detectors, scramblers and descramblers by addressable memory are disclosed. The methods and apparatus may be processing binary or n-valued symbols, with n>2. Methods to uniquely characterize n-valued Gold sequence are also disclosed. Self-synchronizing methods to detect sequences which can... Agent: Glen M. Diehl Diehl Servilla LLC 20070088998 - Serializer/deserializer circuit for jitter sensitivity characterization: Disclosed herein is an improved serializer/deserializer (SERDES) circuit (102) having built-in self-test capabilities that is configured to perform an in-situ jitter sensitivity characterization of the clock and data recovery (CDR) circuit (108). To that end, a delay perturbation is added to the serial data stream at the serializer (120) output,... Agent: Ibm Microelectronics Intellectual Property Law 20070088995 - System including a buffered memory module: According to embodiments, a system includes a master device and a first memory module having a plurality of integrated circuit memory devices and a plurality of integrated circuit buffer devices that operate in first and second modes of operation (bypass mode). In a first mode of operation, a first memory... Agent: Deniro/rambus 20070088996 - Test device and method for circuit device and manufacturing method for the same: A test device that makes a test of a circuit device including a plurality of modules being substitutable in terms of function for one another, and in which a function change can be made for assignment to each of the modules based on an incoming control signal. The test device... Agent: Rader Fishman & Grauer PLLC 20070089003 - Method and apparatus for test connectivity, communication, and control: Functional circuits and cores of circuits are tested on integrated circuits using scan paths. Using parallel scan distributor and collector circuits for these scan paths improves test access of circuits and cores embedded within ICs and reduces the IC's power consumption during scan testing. A controller for the distributor and... Agent: Texas Instruments Incorporated 20070089002 - Pc-connectivity for on-chip memory: An interface for converting a traditional scan-chain interface into one where locations in the scan-chain can be read or written to from an addressed interface is provided. The interface of the invention includes a scratch pad memory into which the values at the locations in the scan-chain are copied. Those... Agent: Texas Instruments Incorporated 20070089000 - Scan driving circuit and organic light emitting display using the same: A scan driving circuit including an input terminal to receive an input signal or a voltage output from a previous stage; first and second clock terminals to receive first and second clock signals having phases inverted to each other and partially overlap at a high level, respectively; and a plurality... Agent: Lee & Morse, P.C. 20070089001 - System and method for defect-based scan analysis: A method for defect-based scan analysis comprises, for each node in a first circuit, determining its neighborhood net, injecting defects and modeling the defects with stuck-at-0 and stuck-at-1 fault models, generating at least one test pattern and applying the at least one test pattern to the neighborhood net with the... Agent: Haynes And Boone, LLP 20070088999 - Test output compaction for responses with unknown values: A spatial compactor design and technique for the compaction of test response data is herein disclosed which advantageously provides a scan-out response with multiple opportunities to be observed on different output channels in one to several scan-shift cycles.... Agent: Nec Laboratories America, Inc. 20070089004 - Method and apparatus for accelerating through-the pins lbist simulation: The present invention provides a method, an apparatus, and a computer program product for applying external clock and data patterns for TTP-LBIST. A simulation model for the logic under test is set up in a simulator. Next, a user sets up an external LBIST block, which comprises pre-verified internal clock... Agent: Ibm Corp. (wip) C/o Walder Intellectual Property Law, P.C. 20070089005 - Semiconductor storage device and memory test circuit: Each of a plurality of nonmatching detection circuits is provided for each bit, compares bit output of memory with an expected value corresponding to the bit output, and outputs a nonmatching detection signal when the bit output does not match the value. A selection circuit selects and outputs the output... Agent: Staas & Halsey LLP 20070089006 - Io self test method and apparatus for memory: An embodiment may comprise a memory with a data generator to generate a data pattern, a transmitter in communication with the data generator, the transmitter to transmit the data pattern as a test data pattern, receiver to receive the test data pattern from the transmitter, and a comparator coupled with... Agent: Blakely Sokoloff Taylor & Zafman 20070089007 - Method and apparatus for measuring test coverage: A method, computer program product, and data processing system for determining test sequences' coverage of events in testing a semiconductor design are disclosed. Test patterns are randomly generated by one or more “frontend” computers. Results from applying these patterns to the design under test are transmitted to a “backend” computer... Agent: Vanleeuwen & Vanleeuwen 20070089008 - Method and apparatus for performing test pattern autograding: A method, computer program product, and data processing system for minimizing the number of test sequences needed to achieve a desired level of coverage of events in testing a semiconductor design is disclosed. Test patterns are randomly generated by one or more “frontend” computers. Results from applying these patterns to... Agent: Vanleeuwen & Vanleeuwen 20070089009 - Semiconductor device: Disclosed is a semiconductor device with which test is carried out as two chips A and B arranged facing each other. Each chip includes, for every channel, an input buffer, a serial-to-parallel converter for converting input serial data into parallel data, a frame synchronization circuit for detecting a frame for... Agent: Mcginn Intellectual Property Law Group, PLLC 20070089010 - Test apparatus for digitized test responses, method for testing semiconductor devices and diagnosis method for a semiconductor device: A test apparatus for testing digitized test responses has a generator (2) and a signal extractor (3). The generator (2) uses direct digital synthesis to generate a set of n digital reference signals (xk, yk) which are orthogonal to one another. In this case, n is a natural number greater... Agent: Baker Botts, L.L.P. 20070089011 - Method and apparatus to monitor stress conditions in a system: Faults are monitored with information from agents for a plurality of sensors located on a plurality of circuit boards. A policy containing a error event thresholds against which the stored sensor information can be compared. Actions can be initiated by a fault module when one or more of the error... Agent: Daly, Crowley & Mofford, LLP 20070089014 - Semiconductor integrated circuit and method of fabricating the same: To provide a semiconductor integrated circuit device in which an occupied area is suppressed from increasing and a high-performance test circuit is included, There is provided a semiconductor integrated circuit having a test circuit, by determining arrangement positions of cells forming a circuit to be tested and non-connected cells prepared... Agent: Mcdermott Will & Emery LLP 20070089012 - System and method for testing a light emitting diode panel: An exemplary system for testing light emitting diode (LED) panel is disclosed. The system includes: a symbol arranging module (12) for arranging a group of symbols; an input/output module (14) for outputting a symbol and corresponding number of lightening LEDs displayed on the LED panel, and receiving a symbol and... Agent: North America Intellectual Property Corporation 20070089013 - System and method for testing ports of a computer: The present invention provides a method for testing ports of a computer. The method includes steps of: connecting the testing ports and the non-testing ports of the computer according to a configuration document; creating virtual devices corresponding to the non-testing ports; analyzing corresponding relations between the virtual devices, the non-testing... Agent: North America Intellectual Property Corporation 20070089015 - Apparatus and method for generating an error signal: The invention relates to an apparatus for generating an error signal from an input signal, the error signal to be used for generating a transmit signal, the apparatus comprising: distorter for distorting the input signal to obtain a distorted signal, calculator for calculating a preliminary error signal representing a difference... Agent: Edwards & Angell, LLP 20070089020 - Block processing in a block decoding device: A device for storing blocks of bits intended to be decoded according to a block decoding algorithm. The blocks are likely to belong to a given category out of a first category and a second category. The first category corresponds to a first given block size, and the second category... Agent: Seed Intellectual Property Law Group PLLC 20070089016 - Block serial pipelined layered decoding architecture for structured low-density parity-check (ldpc) codes: An error correction decoder for block serial pipelined layered decoding of block codes includes primary and mirror memories that are each capable of storing log-likelihood ratios (LLRs) for one or more iterations of an iterative decoding technique. The decoder also includes a plurality of elements capable of processing, for one... Agent: Alston & Bird LLP 20070089017 - Error correction decoder, method and computer program product for block serial pipelined layered decoding of structured low-density parity-check (ldpc) codes with reduced memory requirements: An error correction decoder for block serial pipelined layered decoding of block codes includes a plurality of elements capable of processing, for at least one of a plurality of iterations of an iterative decoding technique, at least one layer of a parity check matrix. The elements include an iterative decoder... Agent: Alston & Bird LLP 20070089019 - Error correction decoder, method and computer program product for block serial pipelined layered decoding of structured low-density parity-check (ldpc) codes, including calculating check-to-variable messages: An error correction decoder for block serial pipelined layered decoding of block codes includes a plurality of elements capable of processing, for at least one of a plurality of iterations of an iterative decoding technique, at least one layer of a parity check matrix. The elements include an iterative decoder... Agent: Alston & Bird LLP 20070089018 - Error correction decoder, method and computer program product for block serial pipelined layered decoding of structured low-density parity-check (ldpc) codes, including reconfigurable permuting/de-permuting of data values: An error correction decoder for block serial pipelined layered decoding of block codes includes a plurality of elements capable of processing, for at least one of a plurality of iterations of an iterative decoding technique, at least one layer of a parity check matrix. The elements can include a permuter... Agent: Alston & Bird LLP 20070089021 - Transmit driver data communication: Aspects describe a transmit driver that processes data communication between a scheduler and a turbo encoder. Transmit driver receives a request for a super frame and ascertains whether it has enough information to start the super frame. If there is enough data, the super frame is written to an appropriate... Agent: Qualcomm Incorporated 20070089022 - Method and apparatus for transmitting and receiving convolutionally coded data for use with combined binary phase shift keying (bpsk) modulation and pulse position modulation (ppm): The invention describes a method and apparatus for transmitting data using a convolutional code used with a combination of Pulse Position Modulation and Binary Phase Shift Keying which has error rate performance that is as good as the best convolutional code when used with the more common binary phase shift... Agent: Michael Mclaughlin 20070089025 - Apparatus and method for encoding/decoding block low density parity check codes having variable coding rate: A method for encoding a rate-compatible block Low Density Parity Check (LDPC) code. The method includes designing specific LDPC codes for a predetermined number of coding rates, and generating a pruning pattern by comparing information node degrees of the predetermined number of LDPC codes; matching check node degrees of the... Agent: The Farrell Law Firm 20070089027 - Apparatus and method for transmitting/receiving signal in a communication system using low density parity check code: An apparatus is provided for transmitting a signal in a communication system using a Low Density Parity Check (LDPC) code. A controller determines a number of ‘0’s to be inserted in information data according to a first coding rate to be applied when generating the information data into an LDPC... Agent: Dilworth & Barrese, LLP 20070089026 - Coding circuit and coding apparatus: Disclosed is a coding circuit including: a holding unit to hold a first signal, and to output the held first signal as a fourth signal in synchronization with an input of a second signal and a third signal which respectively comprise one of two data produced by splitting a data... Agent: Sughrue Mion, PLLC 20070089028 - Cyclic redundancy check circuit and semiconductor device having the cyclic redundancy check circuit: An object of the present invention is to provide a CRC circuit with more simple structure and low power consumption. The CRC circuit includes a first shift register to a p-th shift register, a first EXOR to a (p−1)th EXOR, and a switching circuit. A data signal, a select signal,... Agent: Fish & Richardson P.C. 20070089024 - Method and apparatus for a low-density parity-check decoder: A low-density parity-check (LDPC) decoder (304) has a memory (308), and a processor (306). The processor is programmed to initialize (202) the LDPC decoder, calculate (204) a probability for each check node, calculate (206) a probability for each bit node, calculate soft decisions, update the bit nodes according to the... Agent: Motorola, Inc. 20070089023 - System and method for system resource access: The disclosure is directed to a controller including a memory interface to a memory device, a device driver configured to access the memory device via the memory interface, and a resource loader to provide a memory location of a resource to the device driver. The device driver is configured to... Agent: Toler Schaffer, LLP 20070089030 - Configurable bandwidth allocation for data channels accessing a memory interface: An apparatus and a method for flexibly configuring memory bandwidth allocations for different data channels is described. In one embodiment, the invention includes receiving data from a data communications channel, storing the data in a buffer, upon accumulating a predefined amount of data from the channel, determining a base address... Agent: Blakely Sokoloff Taylor & Zafman 20070089029 - System, method and apparatus of protecting a wireless transmission: Embodiments of the present invention provide a method, apparatus and system of protecting a wireless transmission. The method according to some demonstrative embodiments of the invention may include based on one or more burst-related sub-commands of a transmit command corresponding to a current packet to be transmitted during a burst... Agent: Pearl Cohen Zedek Latzer, LLP 20070089032 - Memory system anti-aliasing scheme: Embodiments of the invention are generally directed to systems, methods, and apparatuses for a memory device anti-aliasing scheme. In an embodiment, a memory controller includes an error check agent to receive a codeword from a rank of memory and to provide an error indication in response to detecting a correctable... Agent: Blakely Sokoloff Taylor & Zafman 20070089034 - Method of error correction in mbc flash memory: A plurality of logical pages is stored in a MBC flash memory along with corresponding ECC bits, with at least one of the MBC cells storing bits from more than one logical page, and with at least one of the ECC bits applying to two or more of the logical... Agent: Dr. Mark Friedman Ltd. C/o Bill Polkinghorn 20070089031 - Methods and arrangements to remap degraded storage blocks: Methods and arrangements to remap degraded storage blocks on, e.g., IDE/ATA drives are disclosed. Embodiments may comprise a host and/or a data storage device for, e.g., a handheld device. The host may comprise remapping logic. In many embodiments, the remapping logic may track degraded storage blocks as indicated by the... Agent: Schubert, Osterrieder & Nickelson, PLLC C/o Intellevate 20070089033 - System and method of accessing non-volatile computer memory: A system and method for organizing a non-volatile memory is disclosed. The system includes a non-volatile memory with a first data region and a first redundant memory area associated with the first data region. The first redundant memory area includes a first portion associated with a first data sector. The... Agent: Toler Schaffer, LLP 20070089035 - Silent data corruption mitigation using error correction code with embedded signaling fault detection: Embodiments of the invention are generally directed to systems, methods, and apparatuses for mitigating silent data corruption using an error correction code having embedded signaling fault detection. In an embodiment, a memory controller includes an extended error correction code (ECC) and link signaling fault detection logic. The extended ECC includes... Agent: Blakely Sokoloff Taylor & Zafman 20070089036 - Error correction in packet-based communication networks using validation sets: Bit errors in packets of data that are communicated in a network such as a wireless network can be corrected by processes that do not require any overhead in the data such as conventional error-detection codes or redundant information such as conventional error-correction codes. A validation-set process compares corrupted data... Agent: Gallagher & Lathrop, A Professional Corporation 20070089039 - Data transfer control unit and data transfer control method: According to one embodiment, a data transfer control unit includes: a first status storage portion which stores first communication status information; a second status storage portion which stores second communication status information; a data storage portion which stores transmission data corresponding to a stored transmission data length information; a propriety... Agent: Pillsbury Winthrop Shaw Pittman, LLP 20070089037 - Error correction in packet-based communication networks using data consistency checks: Bit errors in packets of data that are communicated in a network such as a wireless network can be corrected by processes that do not require any overhead in the data such as conventional error-detection codes or redundant information such as conventional error-correction codes. A validation-set process compares corrupted data... Agent: Gallagher & Lathrop, A Professional Corporation 20070089038 - Error detection and correction in data transmission packets: A system and method of using recursive cyclic redundancy check (CRC)+forward error correction (FEC) for enhancing the channel coding gain for a DVB-H receiver, and using a physical (PHY) Reed-Solomon (RS) decoder+FEC to achieve better coding gain. The system and method utilize a dual mode RS decoder (erasure mode and... Agent: Frederick W. Gibb, Iii Gibb Intellectual Property Law Firm, LLC 20070089040 - Method and apparatus for recovery of particular bits of a frame: A method and an apparatus for recovery of particular bits in a frame are disclosed. An origination station forms a frame structure with groups of information bits of different importance. All the information bits are then protected by an outer quality metric. Additionally, the groups of more important information bits... Agent: Qualcomm Incorporated 20070089041 - Duplicate detection circuit for receiver: A duplicate detection circuit for a receiver includes a CRC generator for generating a CRC value of frame header information, and a control circuit coupled to the CRC generator. The control circuit has a first output, a second output, and a control input. When the control input is not set,... Agent: North America Intellectual Property Corporation 20070089042 - Wireless access modem having downstream channel resynchronization method: A resynchronization method for use in a data communication system having a first device configured to transmit data at a symbol rate to a second device. The second device includes a Reed Solomon (RS) decoder having a RS lock indicator and a Moving Picture Experts Group (MPEG) Protocol Interface (MPI)... Agent: Texas Instruments Incorporated 20070089043 - Viterbi decoder and viterbi decoding method: The present invention relates to a Viterbi decoder and a Viterbi decoding method in a register exchange method. The Viterbi decoder receives an encoded bit sequence of a convolutional encoding method from a channel, generates an expanded encoded bit sequence by cyclically adding a part of the encoded bit sequence... Agent: Dilworth & Barrese, LLP 20070089044 - Method and apparatus for error management: To derive a Hamming code to manage data errors a set of at least four parity bit positions is selected for parity bits which will protect a set of data bits (where each data bit has a data bit position in the data bit set). A syndrome is determined for... Agent: Smart And Biggar 20070089045 - Triple parity technique for enabling efficient recovery from triple failures in a storage array: A triple parity (TP) technique reduces overhead of computing diagonal and anti-diagonal parity for a storage array adapted to enable efficient recovery from the concurrent failure of three storage devices in the array. The diagonal parity is computed along diagonal parity sets that collectively span all data disks and a... Agent: Cesari And Mckenna, LLP 04/12/2007 > 17 patent applications in 15 patent subcategories.20070083788 - Method and apparatus for testing for open ports of an endpoint device in a packet network: Method, apparatus, and computer readable medium for testing for an open port of an endpoint device in a communication network is described. A test request message is sent from the endpoint device to a server. The test request message is configured to request the server to send a test message... Agent: General Instrument Corporation Dba The Connected Home Solutions Business Of Motorola, Inc. 20070083789 - Mote servicing: One aspect can include determining that at least one mote device is operating outside normal operational parameters and should be serviced, and determining at least partially using the at least one mote device that is operationally located within a mote network is not meeting a goal of the at least... Agent: Searete LLC 20070083790 - Memory checking apparatus and method: Image or other data is stored in a memory. A first validation parameter (e.g., a checksum) is determined for the data stored in the memory at a first time, and stored. A second validation parameter is determined for the data stored in the memory at a second time, and also... Agent: Harrington & Smith, PC 20070083791 - Communications in a processor array: Data is transmitted from a sending processor over a network to one or more receiving processor in a forward direction during an allocated slot, and acknowledge signals are sent in a reverse direction during the same allocated slot, to indicate whether the receiving processor is able to receive data If... Agent: Morgan Lewis & Bockius LLP 20070083792 - System and method for error detection and reporting: Described is a system which includes an error handler to generate an error record in response to a software error in an embedded device and a non-volatile memory including a persistent memory region configured to store an error log, the error log configured to receive the error record, wherein the... Agent: Fay Kaplun & Marcin, LLP 20070083793 - System and method for optimizing explorer for performance test: The present invention enables a performance testing framework that enables multiple components working together to test a deployed application automatically in an unattended manner and to analyze the test results easily. At very high level, the performance framework can run performance tests on a tested system with one or more... Agent: Fliesler Meyer LLP 20070083795 - Securised microprocessor with jump verification: The aim of the present invention is to propose a method and a device in order to avoid damages that the desynchronisation of the program counter may cause. This aim is achieved by means of a secured microprocessor comprising a program counter and an interface with a program memory containing... Agent: Harness, Dickey & Pierce, P.L.C 20070083794 - System and method for minimizing software downtime associated with software rejuvenation in a single computer system: A system and method is provided that rejuvenates a software application to reduce the effects of software aging. An active replica corresponding to a software application is identified. If rejuvenation of the software application is appropriate, a new replica is created and state information is transferred from the active replica... Agent: Ibm Corporation- Austin (jvl) C/o Van Leeuwen & Van Leeuwen 20070083796 - Methods and systems for forecasting status of clustered computing systems: The invention provides methods of forecasting functionality for clustered computing configurations that may be deployed across computer network systems and environments that may function in conjunction with a wide range of hardware and software configurations. An exemplary method of forecasting a forecast status of a clustered computing system is presented... Agent: Hewlett Packard Company 20070083797 - Network system, printing device, and control program for printing device: A network system comprises a printing device, and a plurality of management devices that manages the printing device via a network. The printing device comprises a plurality of communication interfaces individually connected to the network, a trouble detecting system that detects troubles caused in the printing device, a trouble notification... Agent: Baker Botts LLP C/o Intellectual Property Department 20070083798 - System with executing nodes for executing schedules: In a system (1) with storing means (2) for storing schedules (200, 210, 220, 230) and comprising nodes (3-6) for executing the schedules (200, 210, 220, 230), first and second nodes (3, 4) each comprise checking means (302, 402) for checking the storing means (2) in dependence of a node's... Agent: Sughrue Mion, PLLC 20070083799 - Method for defect management of an optical storage medium with a sorting process: A method for recording a plurality of data sets onto an optical storage medium by utilizing a temporary storage device in an optical storage system includes storing a plurality of data sets corresponding to a plurality of defective data blocks in the memory into the temporary storage device; re-arranging a... Agent: North America Intellectual Property Corporation 20070083800 - System and method for varying test signal durations and assert times for testing memory devices: A testing system includes a phase interpolator receiving a clock signal. An output of the phase interpolator is coupled to both a first signal distribution tree that includes a first delay line in each of its branches and a second signal distribution tree that includes a second delay line in... Agent: Edward W. Bulchis, Esq. Dorsey & Whitney LLP 20070083801 - Test apparatus, program and recording medium: There is provided a test apparatus for testing a device-under-test, having a master channel provided in correspondence to one of output pins of the device-under-test to sample an output signal of the corresponding output pin and a slave channel provided in correspondence to a different output pin from that of... Agent: Osha Liang L.L.P. 20070083802 - Broadcast message passing decoding of low density parity check codes: Decoding by passing messages back and forth between a set of variable nodes and a set of check nodes, where at least one of the nodes broadcasts the same message to each of its associated nodes, is provided. For example, the variable nodes can broadcast and the check nodes can... Agent: Lumen Intellectual Property Services, Inc. 20070083803 - Turbo code interleaver for low frame error rate: At least one aspect of the invention provides a turbo encoder having parallel first and second constituent encoders and an interleaver coupled as an input to the second constituent encoder to provide a permutated version of the binary data input to the first constituent encoder to achieve a low frame... Agent: Qualcomm Incorporated 20070083804 - Method and apparatus for analyzing delay in circuit, and computer product: An extracting unit extracts unprocessed capturing destination in a circuit. A tracing unit traces an output branch point from a capturing destination and a determining unit determines an estimated failure site and a non-failure site in the circuit. A detecting unit narrows down an estimated failure site using a fail... Agent: Arent Fox PLLC 04/05/2007 > 59 patent applications in 33 patent subcategories.20070079168 - Exception handling in content based routing solutions: The subject invention provides a system and/or a method that facilitates error detection and correction associated with content-based routing. A routing system can include an analysis component that determines a received message is associated with an error. An error report generating component can append error-related metadata to the received message... Agent: Amin. Turocy & Calvin, LLP 20070079169 - Method for the automatic sequencing of the specifications of a computer, especially for aircraft: A method for the automatic sequencing of the specifications of a computer comprises an analysis of the specifications constituted by nodes with a simplification and distribution of these nodes into at least two types of nodes, and an assigning of these nodes in repetitive sub-cycles of processing tasks in order... Agent: Patterson, Thuente, Skaar & Christensen, P.A. 20070079170 - Data migration in response to predicted disk failure: Disk failures can be statistically predicted at the platform level using information about disks attached to the storage platform and other platform-specific information. In one embodiment, the present invention includes collecting information about a plurality of disks, and predicting that an errant disk has a high likelihood of failure based... Agent: Blakely Sokoloff Taylor & Zafman 20070079171 - No data loss it disaster recovery over extended distances: Systems and methods operating over extended distances provide for recovery of data and operational continuity of computer applications accessing data within an information technology system if an event occurs effecting access to the data. In one embodiment, an extended distance data recovery system (100) includes first, second and third data... Agent: Marsh, Fischmann & Breyfogle LLP 20070079172 - System and method for allocating spare disks in networked storage: A system and method for a file server to allocate spare disks in a network storage system. The method determines the available spare disks and first selects those disks that satisfy one or more required rules. The method sorts the spare disks by a set of ordered policies to determine... Agent: Cesari And Mckenna, LLP 20070079173 - Method and apparatus of recording data in the optical recording medium: The present invention relates to a recording medium and apparatus and method for managing a defective area of the recording medium. According to an embodiment, the method includes (a) determining whether there is an available replacement block in a spare area and a found defective block is controlled by a... Agent: Birch Stewart Kolasch & Birch 20070079174 - System, portable electronic apparatus and method for timely receiving and displaying electronic files: A portable electronic apparatus for receiving and displaying electronic files with identification code is provided. The identification code indicates whether the electronic file is an instant file or a common file. The portable electronic apparatus includes a main part, a data storage, and a receiving unit. The main part being... Agent: North America Intellectual Property Corporation 20070079175 - System, portable electronic apparatus and method for timely receiving and displaying electronic files: A portable electronic apparatus for timely receiving and displaying electronic files is provided. An identification code of the electronic file indicates that the electronic file is an instant file or a common file. A receiving unit (21) of the portable electronic apparatus is configured for receiving the electronic file, determining... Agent: North America Intellectual Property Corporation 20070079176 - Replacing a failing physical processor: Replacing a failing physical processor in a computer supporting multiple logical partitions, where the logical partitions include dedicated partitions and shared processor partitions, the dedicated partitions are supported by virtual processors having assigned physical processors, and the shared processor partitions are supported by pools of virtual processors. The pools of... Agent: Ibm (roc-blf) 20070079177 - Process monitoring and diagnosis apparatus, systems, and methods: Apparatus, systems, methods, and articles may operate to create a performance breakpoint upon detecting a performance event using a breakpoint intercept module. These activities may occur in an environment used to diagnose a watched process. A diagnostic function may be performed upon an occurrence of the performance breakpoint. Other embodiments... Agent: Schwegman, Lundberg, Woessner & Kluth, P.A. 20070079178 - Discovery of kernel rootkits by detecting hidden information: In accordance with a particular embodiment of the present invention, a method of detecting kernel level rootkits includes requesting first information from a kernel level process, the first information including first contents. The first information is received at a user level process. The method also includes compiling second information at... Agent: Baker Botts L.L.P. 20070079179 - Staggered execution stack for vector processing: In one embodiment, the present invention includes a method for executing an operation on low order portions of first and second source operands using a first execution stack of a processor and executing the operation on high order portions of the first and second source operands using a second execution... Agent: Trop Pruner & Hu, PC 20070079180 - Method and an apparatus for frequency measurement: The frequency of the signal under test is measured by measuring the time of a prescribed phase of the signal under test, and calculating the slope of the approximate line related to above-mentioned prescribed phase and the above-mentioned measured time or the reciprocal of the above-mentioned slope as the above-mentioned... Agent: Paul D. Greeley Ohlandt, Greeley, Ruggiero & Perle, L.L.P. 20070079181 - Modified linear congruence interleaver and its parameter selection method: A parameter selection method and a modified linear congruence interleaver are provided. The parameter selection method of the linear congruence interleaver includes the operations of: determining a placement zone corresponding to index values generated by an algorithm; determining position values (i1, i2) of groups of data including corresponding index values... Agent: Stein, Mcewen & Bui, LLP 20070079182 - Method for calculating an error detecting code: A method applied to an optical disc drive for calculating an error detection code corresponding to a data sector is disclosed. The data sector includes a plurality of bytes arranged in a matrix having N lines along a first direction and M lines along a second direction perpendicular to the... Agent: North America Intellectual Property Corporation 20070079183 - Recording medium having spare area defect management and information on defect management, and method of allocating spare area and method of managing defects: When a primary spare area is allocated for slipping replacement and linear replacement upon initialization, and a remaining portion of the primary spare area after slipping replacement and allocated for linear replacement after initialization are insufficient, a supplementary spare area is allocated. The sizes of the primary and supplementary spare... Agent: Stein, Mcewen & Bui, LLP 20070079186 - Memory device and method of operating memory device: A memory module includes a memory core configured to read and write data. A first input interface is configured to receive write or command data from a forward direction and to receive read data from the forward direction. A first output interface is configured to send read data in a... Agent: Dicke, Billig & Czaja, P.l.l.c. 20070079185 - Memory scrubbing of expanded memory: Embodiments of the invention include a memory device, such as a removable expanded memory card, having a host bus interface that allows a host to access a memory of the device. The memory device also includes memory scrubbing circuitry to read data stored at addresses in the memory and to... Agent: Network Appliance/blakely 20070079184 - System and method for avoiding attempts to access a defective portion of memory: According to one embodiment, a method comprises detecting a defect in a portion of memory. The method further comprises designating the portion of memory as defective, and avoiding attempts to access the portion of memory designated as defective.... Agent: Hewlett Packard Company 20070079187 - System for testing memory modules using a rotating-type module mounting portion: A system for testing memory modules having a rotating-type board mounting portion with a plurality of mounting surfaces positioned at different planes and connected around an axis to form a rotatable structure, at least one circuit board mounted on each mounting surface, an input/output portion, a rotational motor coupled to... Agent: Lee & Morse, P.C. 20070079189 - Method and system for generating a global test plan and identifying test requirements in a storage system environment: The present invention is directed to a system and method for a quality assurance tool generating test plans and identifying new test requirements for a new version of a product. Old versions of the product may be previously tested and test plan documents associated with previously tested versions of the... Agent: Lsi Logic Corporation 20070079190 - Product reliability analysis: In one embodiment, a first set of inputs which describe aspects of a device may be received. A second set of inputs may be automatically provided for a group of assessments, included in an analysis, based on the first set of inputs and information in at least one database. An... Agent: Irving, Prass & Stelacone, LLP 20070079188 - Signal integrity self-test architecture: A method suitable for testing an integrated circuit device is disclosed, the device comprising at least one module, wherein the at least one module incorporates at least one associated module monitor suitable for monitoring a device parameter such as temperature, supply noise, cross-talk etc. within the module.... Agent: Philips Intellectual Property & Standards 20070079192 - Scan driver and organic light emitting display device having the same: A scan driver having no shift register and an organic light emitting display device having the same are disclosed. The scan driver includes a latch unit and a NAND gate instead of a shift register, thereby reducing the area occupied by the driver in a display panel. The scan driver... Agent: Knobbe Martens Olson & Bear LLP 20070079191 - Scan driving circuit and organic light emitting display using the same: A scan driving circuit and an organic light emitting display using the same is disclosed. A first scan driver having a plurality of first stages sequentially outputs a selection signal, and a second scan driver having a plurality of second stages sequentially outputs an emission signal. Each of the first... Agent: Knobbe Martens Olson & Bear LLP 20070079193 - Scannable latch: A scannable latch is disclosed. The scannable latch includes a dynamic circuit, two cross-coupled NAND gates coupled to the dynamic circuit, and a pair of stacked transistors coupled to the dynamic circuit. One of the stacked transistors is for receiving data signals, and the other stacked transistors is for receiving... Agent: Dillon & Yudell LLP 20070079194 - Apparatus and method for controlling frequency of an i/o clock for an integrated circuit during test: A test system including a device under test (DUT) and a tester, where the DUT includes I/O interface logic and a clock circuit. The clock circuit includes a core clock circuit, a pad clock circuit, a test clock circuit, and a select circuit. The core clock circuit generates a core... Agent: Huffman Law Group, P.C. 20070079196 - Information terminal device: Detection as to the reproduction expiration time of contents is executed, using the measured time of a system clock managed based on system time data from a base station BS. If the reproduction expiration time of the contents is not exceeded, the contents can be reproduced, whereas if it is... Agent: Banner & Witcoff, Ltd., Attorneys For Reserve Attorneys For Client No. 000449, 001701 20070079195 - Time-series data analyzing apparatus: A time-series data analyzing apparatus which extracts a composite factor time-series pattern from time-series data. The apparatus includes a dividing device which divides the time-series data into pattern generation time-series data and pattern inspection time-series data which do not include pattern generation time-series data. A first generating device generates a... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP 20070079197 - Apparatus and method for automatically self-calibrating a duty cycle circuit for maximum chip performance: An apparatus and method for automatically calibrating a duty cycle circuit for maximum performance are provided. A chip level built-in circuit that automatically calibrates the duty cycle correction (DCC) circuit setting for each chip is provided. This chip level built-in circuit includes a clock generation macro unit, a simple duty... Agent: Ibm Corp. (wip) C/o Walder Intellectual Property Law, P.C. 20070079200 - Input-output device testing: Integrated circuit test circuits may include at least an instruction processor and input-output subsystems. Input-output subsystems are segmented together into input-output subsystem segments. Each input-output subsystem includes an analog wrapper circuit (IW-A) operable to connect an |