Error detection/correction and fault detection/recovery inventions 03/07

20070074063 - Operating environment configuration system and method: An operating environment configuration system comprises a first operating system of a computer device having at least one configuration setting associated therewith, and a second operating system of the computer device configured to automatically retrieve the at least one configuration setting and configure at least one component associated with the... Agent: Hewlett Packard Company

20070074065 - Computer, method of controlling memory dump, mechanism of controlling dump, and memory dump program: An apparatus of an exemplary embodiment of the present invention includes first and second memories and a storage unit. Further, an indication which indicates necessity of a memory dump is provided with the apparatus. A first unit boots the apparatus without using the second memory when the indication indicates the... Agent: Dickstein Shapiro LLP

20070074066 - High availability for event forwarding: High availability event forwarding can be obtained utilizing distributed queues in a server cluster. Each server can receive an event from a data system, such as a database or SAP™ system. Event queues exist oil servers in the cluster can store an event until, for example, the event is delivered... Agent: Fliesler Meyer LLP

20070074064 - Test circuit for multi-port memory device: A semiconductor memory device includes a read bus line for transferring read data; a write bus line for transferring write data; and a temporary data storage unit connected between the read bus line and the write bus line and controlled by a test mode signal enabled during a test mode.... Agent: Blakely Sokoloff Taylor & Zafman

20070074067 - Maintaining memory reliability: A hardware error monitor of a computer system is initialized. A memory module error in a memory module of the computer system is detected by the hardware error monitor. The memory module is logically removed from the computer system in response to the memory module error.... Agent: Blakely Sokoloff Taylor & Zafman

20070074068 - Method for protecting backup data of a computer system from damage: Methods for protecting backup data of a computer system from damage are disclosed. A first storage device is provided for storing the backup data of the computer system, wherein the first storage device is ordinarily disabled to prevent the operating system of the computer system from accessing the backup data.... Agent: Quintero Law Office, PC

20070074069 - Storage system and setting method for storage configuration information: Pairs are formed from a plurality of dispersed volumes and copying between the volumes is conducted by a series of remote operations from a management server. A management server 10 instructs the generation of configuration setting files 23, 30 to host computers 20, 30 selected so as to form copy... Agent: Townsend And Townsend And Crew, LLP

20070074070 - Repairable block redundancy scheme: A scheme for block substitution within a flash memory device is disclosed which uses a programmable look-up table to store new addresses for block selection when certain input block addresses are received. The new addresses are loaded into a programmable fuse latch each time an address transition is detected in... Agent: Dickstein Shapiro LLP

20070074071 - Processor thermal management: Apparatus and systems, as well as methods and articles, may operate to sense a thermal trip condition indicated by a first processor executing a process, and to transfer the process from the first processor to a second processor in response to sensing the thermal trip condition.... Agent: Schwegman, Lundberg, Woessner & Kluth, P.A.

20070074073 - Detection system and method: In a process for recording a data onto an optical storage medium which includes a fault correction mechanism, a detection system is preferably coupled to an optical data recorder comprising a data generating device and a data reading device. The data generating device generates the recorded data. The data reading... Agent: The Law Offices Of Andrew D. Fortney, Ph.d., P.C.

20070074074 - Application health checks: Techniques for determining a complete address of a test point of an application from a relative address of the test point and a configuration of a system are provided. An application component that defines the application includes a relative address of the test point. An abstract configuration of a system... Agent: Perkins Coie LLP/msft

20070074075 - Computer program testing method: The invention provides a computer program testing method for testing a computer program comprising a plurality of units that perform certain functions in which a data storage part may be provided to store unit information, test function and variables used to test the units.... Agent: Stanzione & Kim, LLP

20070074076 - Network fault diagnostic device, network fault diagnostic method, and computer product: A network fault diagnostic device is configured in the following manner. A causal relation table stores causal relations between faults and events, and a monitor event selector refers to the causal relation table to extract a minimum event required for identifying a fault, and sets the event as a monitor... Agent: Katten Muchin Rosenman LLP

20070074077 - Acoustic power spectra sensor for hard disk drive to provide early detection of drive failure and diagnostic capabilities: Hardware component performance in an information handling system is detected with an integrated acoustic power spectra sensor that can be used for diagnostics analysis. The acoustic power spectra data is compared to acoustic models for operative drives to determine an acoustic pass/fail criteria, or to provide more sophisticated analysis of... Agent: Hamilton & Terrile, LLP

20070074079 - System and method for providing trigger information in a video signal and playing out a triggered event: A system for providing trigger information in a video signal and outputting a triggered event comprises a distribution facility and at least one head-end facility. The distribution facility includes an automation system, a trigger unit, and a data inserter. The automation system controls video and audio sources to play out... Agent: Wiggin And Dana LLP Attention: Patent Docketing

20070074078 - Test replication through revision control linking: In one embodiment, a method for test replication through revision control linking, the method comprising: checking out a test case; viewing a corresponding V file that has the contents of the test case, wherein the corresponding V file is linked to the test case; modifying the contents in the V... Agent: Hewlett Packard Company

20070074081 - Method and apparatus for adjusting profiling rates on systems with variable processor frequencies: A computer implemented method, apparatus, and computer usable program code for adjusting rates at which events are generated or processed. In response to a frequency change in a processor, a frequency for the processor is identified. A rate at which samples of events generated by the processor are selected to... Agent: Ibm Corp (ya) C/o Yee & Associates PC

20070074080 - Modeling protocol transactions as formal languages with applications for workflow analysis: A service grammar can be defined in Backus Naur Form for a protocol. The service grammar can be compiled into a service analyzer, which can identify services from a trace of messages sent using the protocol. Similarly, a workflow grammar can be defined for services implemented using the protocol (a... Agent: Marger Johnson & Mccollom, P.C.

20070074082 - Systems and methods for gathering debug information: System and methods are disclosed for gathering debug information of a storage system of a computer system without requiring additional external hardware directly connected to the controller of the storage system.... Agent: Lsi Logic Corporation

20070074083 - Preventive recovery from adjacent track interference: A predictive failure control circuit and associated method are provided in a data storing and retrieving apparatus. The circuit is configured to schedule a data integrity operation on data associated with a subportion of a data storage space, in relation to a comparison of an accumulated plurality of executed host... Agent: Fellers, Snider, Blankenship, Bailey & Tippens Suite 1700

20070074084 - Method and apparatus for monitoring and compensating for skew on a high speed parallel bus: Methods and apparatus are provided for monitoring and compensating for skew on a high speed parallel bus. Delay skew for a plurality of signals on a parallel bus is monitored by obtaining a plurality of samples of the plurality of signals for each unit interval; and identifying a location of... Agent: Ryan, Mason & Lewis, LLP

20070074085 - Detection of noise within an operating frequency on a network: Noise is detected within an operating frequency of a communication medium. Messages are monitored on the communication medium for corrupted messages. A noise detected signal is generated when a number of corrupted messages detected reaches a corrupted message threshold.... Agent: Kinney & Lange, P.A.

20070074086 - Dynamic offset compensation based on false transitions: A method and apparatus provide a receiver with an architecture to regulate a bit error rate of the receiver using an offset based on detecting false transitions in received data. In an embodiment, such false transitions in data may be determined in a bang-bang detector.... Agent: Schwegman, Lundberg, Woessner & Kluth, P.A.

20070074088 - Disk reproducing apparatus and disk reproducing method: The invention provides a disk reproducing apparatus and a disk reproducing method capable of reducing constrained reproduction by reproducing another type of reproducible data for the portion in which the designated type of data cannot be reproduced. In step S250, it is determined whether there is an error in the... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20070074089 - Optical disk recorder: In an optical disk recorder which records data in a recordable form in compliance with UDF, when writing of a data block constituting a user data file and a control data file is failed (NO in #2), that data block is rewritten (#5). When the writing of all data constituting... Agent: Crowell & Moring LLP Intellectual Property Group

20070074087 - System and method for writing information to an optical medium with predicting of defect characteristics: An optical drive provides more rapid writes to an optical medium by analyzing defects detected on the optical medium to predict defect areas and avoid writes to the predicted defect areas until the defects are confirmed or refuted. For instance, a defect detector analyzes for a predicted defect if two... Agent: Hamilton & Terrile, LLP

20070074090 - System, method and device of controlling the activation of a processor: Embodiments of the present invention provide a method, apparatus and system of controlling the activation of a processor. The apparatus, according to some demonstrative embodiments of the invention, may include an activation controller to allow a processor to be in an inactive state of operation during at least a portion... Agent: Pearl Cohen Zedek Latzer, LLP

20070074091 - Checksum calculation: In one embodiment, a checksum generator comprises an N-bit accumulator and a plurality of N-bit 3:2 carry save adders. A first plurality of the plurality of N-bit 3:2 carry save adders are coupled to receive N-bit inputs extracted from an input to the checksum generator, and one of the first... Agent: Meyertons, Hood, Kivlin, Kowert & Goetzel, P.C.

20070074094 - Method for detecting code error: A method for detecting a code error is proposed. The method is mainly applied for detecting whether there is a code error existed in the accessed data, in other words, for detecting whether there is only an error bit existed in the accessed data. After the data are accessed, the... Agent: Rosenberg, Klein & Lee

20070074093 - Nand flash memory controller exporting and nand interface: A NAND controller for interfacing between a host device and a flash memory device (e.g. a NAND flash memory device) fabricated on a flash die is disclosed. In some embodiments, the presently disclosed NAND controller includes electronic circuitry fabricated on a controller die, the controller die being distinct from the... Agent: Dr. Mark Friedman Ltd. C/o Bill Polkinghorn

20070074092 - Techniques to determine integrity of information: Techniques are described herein that may utilize capabilities of a data mover in order to determine an integrity validation value or perform an integrity checking operation. The integrity validation value determination and integrity checking operations may be controlled by descriptors or instructions. In some implementations, integrity validation value determination and... Agent: Intel Corporation C/o Intellevate, LLC

20070074095 - Method and apparatus for n‘packet level mesh protection: Methods and apparatus are provided for N+1 packet level mesh protection. An error correction encoding method is provided that assembles M-T data packets; appends a sequence number and a payload integrity check to each of the M-T data packets; and creates T protection packets having the sequence number and payload... Agent: Ryan, Mason & Lewis, LLP

20070067662 - Storage managing computer and program recording medium therefor: A managing computer is connected to object computers, the managing computer being connected to the object computers and the storage which is connected to the object computers for managing the object computers and the storage. The managing computer includes an interface for receiving volume managing information relating to storage areas... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20070067663 - Scalable fault tolerant system: A fault tolerant system for a highly scalable distributed processing system in which fault tolerant groups (hereafter referred to as “FT groups”) are formed based on the functionalities of applications. A given FT group includes instances of the same applications and also different applications that perform the same function. The... Agent: Cesari And Mckenna, LLP

20070067664 - Failure transparency for update applications under single-master configuration: Embodiments herein present a method, computer program product, etc. for masking data failures. The method comprises storing a single master copy of data and a replica copy of the data. Next, the method performs writes to the master using a middleware component. Reads are then performed from either the master... Agent: Frederick W. Gibb, Iii Gibb Intellectual Property Law Firm, LLC

20070067665 - Apparatus and method for providing redundant arrays storage devices: A storage system and method are disclosed for providing redundant arrays of storage devices such as magnetic disks. Each array includes a data portion with available data space and a spare portion. A controller monitors the size of available space as data fills up the array, and reconfigures the array... Agent: Lester H. Birnbaum

20070067666 - Disk array system and control method thereof: A disk array system, upon detecting a failure in any data disk from among a plurality of data disks providing one or more RAID groups, conducting a correction copy to any spare disk, using one or more other data disks belonging to the same RAID group as the data disk... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20070067668 - Information processing apparatus and information processing recovery method: An information processing apparatus having a plurality of systems including software for starting and activating the systems, in which, when one system is active, other systems do not operate, includes a first storage unit that stores the plurality of systems, a second storage unit that stores a system different from... Agent: Staas & Halsey LLP

20070067669 - Method of identifying a failing storage device based on common factor object inconsistency: A technique for use in identifying a failing storage device from a plurality of such storage devices involves the use of an inconsistency map. This inconsistency map is maintained by selecting one or more protected objects and identifying the storage devices on which the protected objects are stored. Copies of... Agent: Intellectual Property Section Law Department

20070067667 - Write back method for raid apparatus: A RAID control apparatus comprises at least a cache memory; an update information management table for storing update information; an update information storage unit for storing, in the update information management table, update information by detecting a data update; a reference value generation unit for generating a reference value expressing... Agent: Staas & Halsey LLP

20070067670 - Method, apparatus and program storage device for providing drive load balancing and resynchronization of a mirrored storage system: A method, apparatus and program storage device for providing drive load balancing and resynchronization of a mirrored storage system. Data is pushed from a storage device at a source SAN device to a hot spare device of a destination SAN device, wherein the resynchronization rebuild process is incorporated with both... Agent: Crawford Maunu PLLC Chambliss, Bahner And Stophel

20070067671 - Method and apparatus of recording data in the optical recording medium: A recording medium and apparatus and method for managing defective areas are discussed. According to an embodiment, the method includes: (a) determining whether or not a real time recording is required; and (b) controlling a recording operation based on the determination such that (i) a defective block found during real... Agent: Birch Stewart Kolasch & Birch

20070067672 - Method and apparatus of recording data in the optical recording medium: The present invention relates to a recording medium and apparatus and method for managing defective areas in the recording medium. According to an embodiment, the method includes (a) reading a defect management information recorded on a defect management area, the defect management information including second information specifying a location of... Agent: Birch Stewart Kolasch & Birch

20070067673 - Hierarchical configurations in error-correcting computer systems: When errors arise in a computing system that has plural modules, this invention corrects those errors. In the first instance, the invention excludes the computing system itself, but receives error messages from the plural modules of that system—along plural receiving connections, respectively. Plural sending connections return corrective responses to plural... Agent: Peter I. Lippman

20070067674 - Method for verifying redundancy of secure systems: A secure system has two computers that are intrinsically safe and implements a method for verifying the redundancy for the outputs where a very high level of safety is required. The method makes it possible to handle inconsistencies in the outputs of the two computers when they are working in... Agent: Siemens Schweiz Ag I-47, Intellectual Property

20070067675 - Method and system for managing failure information: A method, system and apparatus for managing data pertaining to the failure of a network device are provided. The data is stored in a memory, and access to the stored data is provided. The memory is a non-volatile memory. Access is provided to a failure analysis team, which uses the... Agent: Trellis Intellectual Property Law Group, PC

20070067676 - Overheat protection system of cpu and method thereof: An overheated protection circuitry for a central processing unit (CPU) is provided, which is used when the working temperature of the CPU is higher than a first preset temperature or a second preset temperature. The CPU and a thermal module send out an abnormal signal respectively to inform a chipset... Agent: Birch Stewart Kolasch & Birch

20070067678 - Intelligent condition-monitoring and fault diagnostic system for predictive maintenance: A system for condition monitoring and fault diagnosis includes a data collection function that acquires time histories of selected variables for one or more of the components, a pre-processing function that calculates specified characteristics of the time histories, an analysis function for evaluating the characteristics to produce one or more... Agent: Perman & Green

20070067677 - Program-controlled unit and method: A program-controlled unit includes a single controller core that has a first and at least a second execution unit, which units are operable independently of one another in a first operating mode, and process the same instructions in parallel in a second operating mode.... Agent: Kenyon & Kenyon LLP

20070067679 - Boot performance optimization for hard drive for personal internet communicator: In a personal Internet communication device, an optimized operating system image (NK.bin) is constructed from the operating system component files required to provide a minimum threshold of operating system functionality. By reducing the size of the operating system image, the time required to load the operating system is reduced.... Agent: Hamilton & Terrile. LLP

20070067680 - Device and job history display control method: A device for performing a processing in response to a request received from a requester, comprises a receiving unit that receives the request or authentication information from the requestor; a processing unit that performs processing according to the request received by the receiving unit; a job history memory that stores... Agent: Sughrue Mion, PLLC

20070067681 - Maintenance system for image processing device, image processing device, maintenance information display method for image processing device, storage medium, and computer data signal: There is provided a maintenance system including a maintenance server that provides maintenance information and an image processing device that has at least one of copy, print, facsimile and scan functions and which, upon detection of a maintenance event upon which a maintenance process to be carried out with respect... Agent: Gauthier & Connors LLP

20070067683 - Image forming apparatus: To remove effects on the access of the hard disk drive apparatus (HDD), caused by the shock at a time where the user pulls out the paper tray, the image forming apparatus of the present invention includes an apparatus error detection unit for detecting the removal and occurrence of errors... Agent: Akin Gump Strauss Hauer & Feld L.L.P.

20070067682 - Systems and methods for detecting undesirable network traffic content: A method of detecting a content desired to be detected includes receiving electronic data at a first host, determining a checksum value using the received electronic data, sending the checksum value to a processing station, the processing station being a second host that is different from the first host, and... Agent: Bingham, Mccutchen LLP

20070067684 - Non-volatile memory system with self test capability: In a non-volatile memory system, test data may be retrieved by means of a circuit without the help of firmware. The circuit is triggered into action when it detects an abnormality in the processor or host interface. In such event, it formats the self test or status signals from the... Agent: Parsons Hsue & De Runtz, LLP - Sandisk Corporation

20070067685 - Testing apparatus and testing method: There is provided a testing apparatus including: a pattern generator that generates an address signal and a data signal to be supplied to a plurality of memories under test and an expectation signal; a plurality of logic comparators that generate fail data when an output signal output from the plurality... Agent: Osha Liang L.L.P.

20070067687 - Integrated circuit testing module configured for set-up and hold time testing: Systems and methods of testing integrated circuits are disclosed. The systems include a test module configured to operate between automated testing equipment and an integrated circuit to be tested. The testing interface is configured to test time sensitive parameters of the integrated circuit. The testing interface includes components for generating... Agent: Carr & Ferrell LLP

20070067686 - Method and apparatus for testing an integrated device's input/output (i/o): A plurality of timing diagrams and different versions of circuits to test an integrated device in a test mode of operation. The invention allows for pulling in a strobe and eliminating the need for delay cells in strobe pads and a clock generation that facilitates varying the duty cycle for... Agent: Blakely Sokoloff Taylor & Zafman

20070067689 - In-circuit testing system and method: An in-circuit testing system comprises an integrated circuit having a tri-state control pin used for inducing a tri-state mode in the integrated circuit during a scan test of the integrated circuit for controlling a time period for outputting a value associated with the scan test.... Agent: Hewlett Packard Company

20070067688 - Method and system for selectively masking test responses: An apparatus for testing an integrated circuit (10) that comprises a compactor (22) to compress test responses from a circuit-under-test (14) that is part of an integrated circuit (10), and masking circuitry (18) coupled between the circuit-under-rest and the compactor (22) for masking one or more of the test responses... Agent: Philips Intellectual Property & Standards

20070067690 - Dynamic miscompare: A dynamic miscompare module indicates instrumentation datum reliability by comparing a calculated difference between received instrumentation data and a total of a measured change in the received instrumentation data and a threshold value. The comparison varies dynamically with the measured change in the received instrumentation data. In an event the... Agent: Hamilton, Brook, Smith & Reynolds, P.C.

20070067691 - Lsi design system, logic correction support equipment, logic correction support method used therefor, and program therefor: Logic correction support equipment supports logic correction of a logic circuit in LSI design for synthesizing a logic circuit from a register transfer level by logic synthesis. The logic correction support equipment finds a logic that was redundant before logic correction and becomes non-redundant after the logic correction by comparing... Agent: Foley And Lardner LLP Suite 500

20070067692 - Random number generation including skewness control: Random numbers can be generated in a statistically independent manner and with identical probability if the bits generated by a controlled bit generator are stored by a storage in a plurality of memory regions, wherein the bits are each stored in such memory regions associated with a difference of the... Agent: Dickstein Shapiro LLP

20070067693 - Method of testing driving circuit and driving circuit for display device: A test signal is supplied to a test switch provided between a D/A converter for selecting and outputting a gray scale voltage of the driving circuit and an amplifier for amplifying and supplying an output voltage at the D/A converter to set a test mode, and an output voltage of... Agent: Sughrue Mion, PLLC

20070067694 - Set of irregular ldpc codes with random structure and low encoding complexity: A set of irregular LDPC codes having a pseudo-random structure and low encoding complexity. A block-cyclic LDPC code has an irregular row or an irregular column weight and includes a parity check matrix and an encoding matrix each of which has a pseudo-random structure. This allows the code to have... Agent: Polster, Lieder, Woodruff & Lucchesi

20070067695 - Forward error correction coding: A forward error correcton coding method comprises a generalized concatenated code comprising a plurality of outer component codes and a plurality of inner component codes. The outer components codes comprise Reed-Solomon codes and a plurality of binary codes of equal length but varying rates. The inner component codes have a... Agent: Kirschstein, Ottinger, Israel & Schiffmiller, P.C.

20070067697 - Method and controller for processing data multiplication in raid system: The invention discloses a method and controller for processing data multiplication in a RAID system. Map tables are generated for all values in a field, respectively. The length of an XOR operation unit is chosen to be appropriate w bits (e.g., 32 bits or 64 bits). One or several XOR... Agent: Rosenberg, Klein & Lee

20070067696 - System, transmitter, receiver, method, and computer program product for structured interleaved zigzag coding: A system, transmitter, receiver, method, and computer program product are provided in which a plurality of structured interleavers permute data bits arranged in a data bit matrix for Zigzag encoding. For each interleaver, the data bits in each column of the data bit matrix are cyclically shifted, with the amount... Agent: Alston & Bird LLP

20070067699 - Semiconductor integrated circuit device: A semiconductor integrated circuit device is disclosed. The device includes a memory cell array, an I/O buffer, a read/write buffer, an error checking and correcting circuit, and an initialization checking circuit. N-bit data is input to the I/O buffer and the I/O buffer outputs N-bit data. The I/O buffer inputs... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070067698 - Techniques to perform prefetching of content in connection with integrity validation value determination: Techniques are described herein that are capable to perform a retrieval of content from a destination buffer prior to completion of determining an integrity validation value on content of a source buffer. In some cases, if an integrity checking operation on content of the source buffer is successful, the content... Agent: Intel Corporation C/o Intellevate, LLC

20070067700 - Error correction apparatus and method thereof: An error correction device includes: a decoding unit, coupled to a main memory, for reading data from the main memory and performing an error detection on the data to generate a plurality of error values and a plurality of error addresses corresponding to the error values; an error buffer, coupled... Agent: North America Intellectual Property Corporation

20070067701 - Recording control device, recording control method and program: A recording control device that controls data recording in a recording medium including a plurality of recording blocks each composed of a plurality of recording units as a unit of the data recording, the recording control device comprising a recording controller configured to temporarily record after-error data in one recording... Agent: Frommer Lawrence & Haug

20070067702 - Method and apparatus for syndrome generation: A method of syndrome generation for an error correction code (ECC) block having M columns by N rows with both M and N are greater than 1 includes storing a sub-block of the ECC block into a data memory, reading a plurality of symbols of a column of the sub-block... Agent: North America Intellectual Property Corporation

20070067703 - Method and apparatus for termination of iterative turbo decoding: In the method for termination of turbo decoding, a plurality of first LLR values (Lai(k)) of a-priori information and a plurality of second LLR values (Lei(k)) of extrinsic information are called up. A value is determined for a decision variable which is characteristic of the number of mathematical sign discrepancies... Agent: Baker Botts, L.L.P.

20070067704 - Deinterleaver and dual-viterbi decoder architecture: Pairs of parallel Viterbi decoders use windowed block data for decoding data at rates above 320 Mbps. Memory banks of the deinterleavers feeding the decoders operate such that some are receiving data while others are sending data to the decoders. Parallel input streams to every pair of decoders overlap for... Agent: Christie, Parker & Hale, LLP

20070067705 - Nand flash memory device performing error detecting and data reloading operation during copy back program operation: A NAND flash memory device performing an error detecting and data reloading operation during a copy back program operation is provided. The device includes a cell array having a plurality of planes and a parity cell array having a plurality of parity planes. Each of the parity planes stores a... Agent: Volentine Francos, & Whitt PLLC

20070067706 - Testing ram address decoder for resistive open defects: Hard-open defects between logic gates of, for example, an address decoder and the voltage supply which result in logical and sequential delay behavior render a memory conditionally inoperative. A method and apparatus for testing integrated circuits for these types of faults is proposed, in which two cells of two logically... Agent: Philips Intellectual Property & Standards

20070061608 - Method and apparatus for a time domain probabilistic risk assessment model, analysis of interaction of disparate networks, and a repair simulation tool: A risk assessment system includes a plurality of elements each having an attribute for determining if an event causes the respective element to fail. The risk assessment system also includes a repair component configured to repair each of the plurality of elements that has failed. The risk assessment system further... Agent: Foley And Lardner LLP Suite 500

20070061609 - Holding system, exposure apparatus, and device manufacturing method: Disclosed is a holding system for holding an object from the above, against gravity, and it includes at least one holding portion adapted to be in contact with the object, to hold the object from the above, and at least one attracting portion for attracting a limited portion of the... Agent: Fitzpatrick Cella Harper & Scinto

20070061610 - Abnormality detection system, abnormality management apparatus, abnormality management method, probe and program: An abnormality management apparatus, connected via a network to a plurality of probes disposed at arbitrary positions in the network, comprises an abnormality level reception unit that receives information indicating an abnormality level calculated at each of the plurality of probes, an abnormality analysis unit that judges the scale of... Agent: Venable LLP

20070061611 - Computer systems and methods for automatically viewing multidimensional databases: A method for automatically forming the clearest and most useful visual plot for a given dataset of tuples. A best view type is selected for a view that includes a subsequently added new field. The visual plot is populated with the data in the view and then automatically rendered for... Agent: Morgan, Lewis & Bockius, LLP.

20070061612 - Deallocation of memory in a logically-partitioned computer: A method, apparatus, system, and signal-bearing medium that, in an embodiment, set uncorrectable error indicators in logical memory blocks in response to detecting an uncorrectable error in memory pages associated with the logical memory blocks. If the logical memory block is allocated to a hypervisor, the memory page may be... Agent: Ibm Corporation RochesterIPLaw Dept. 917

20070061616 - Data synchronization of multiple remote storage after remote copy suspension: A method and apparatus are provided for enhancing the performance of storage systems to allow recovery after all types of suspensions in remote copy operations. Data is synchronized after an interruption in transfer between a first storage volume of a primary storage system and a first storage volume of a... Agent: Townsend And Townsend And Crew, LLP

20070061614 - Memory system and method having point-to-point link: A memory system includes a controller for generating a control signal and a primary memory for receiving the control signal from the controller. A secondary memory is coupled to the primary memory, the secondary memory being adapted to receive the control signal from the primary memory. The control signal defines... Agent: Mills & Onello LLP

20070061617 - Method and apparatus for volume replication management at planned and unplanned link down: A technique for restoring data after suspension of a communications link between two storage systems is disclosed. Upon suspension of the link, an image of the data at the first and second locations is created in a secure location. While the link is down, updates to the data at each... Agent: Townsend And Townsend And Crew, LLP

20070061615 - Proactive rebooting in a set-top terminal and corresponding methods: A set-top terminal and related methods is provided that, in one embodiment, comprises a memory with proactive reboot logic and a processor configured with the proactive reboot logic to detect an indication of a critical condition associated with the set-top terminal, determine based on a current status of resources in... Agent: Scientific-atlanta, Inc. Intellectual Property Dept.

20070061613 - Restart method for operating system: A restart method for restarting an operating system in a computer in which a failure has occurred, the restart method includes the steps of, upon occurrence of a failure in an active computer in which an operating system (OS) is in operation, ordering disconnection of an OS storing storage device... Agent: Antonelli, Terry, Stout & Kraus, LLP

20070061618 - Method and system to execute recovery in non-homogeneous multi processor environments: Disclosed are a method and system for parallel execution of recovery in a non-homogeneous multi-processor environment. The method defines criteria how to decide which recovery actions are to be performed, and on which processor. If multiple recovery actions are pending, the goal is to execute them in parallel on multiple... Agent: Scully Scott Murphy & Presser, PC

20070061620 - Embedded system and program and key interruption control method: When key interruption is notified to an application in a embedded system like a portable information terminal, sometimes notification of a key event to CPU is not carried out appropriately. A key controller includes a key table containing key information which specifies key type and operation style valid to execution... Agent: Mcginn Intellectual Property Law Group, PLLC

20070061619 - Interrupt and exception handling for multi-streaming digital processors: A multi-streaming processor has a plurality of streams for streaming one or more instruction threads, a set of functional resources for processing instructions from streams, and interrupt handler logic. The logic detects and maps interrupts and exceptions to one or more specific streams. In some embodiments one interrupt or exception... Agent: Huffman Law Group, P.C.

20070061621 - Fault diagnosis apparatus and method for system-on-chip (soc) and soc in which fault is capable of being diagnosed: A fault diagnosis apparatus and method which can immediately or remotely diagnose faults in a system-on-chip (SoC) mounted on a product, and a system-on-chip in which faults are capable of being diagnosed. The fault diagnosis apparatus for an SoC includes an instruction input unit which inputs fault diagnosis request instruction... Agent: Stein, Mcewen & Bui, LLP

20070061622 - Tag writing and reading method for semiconductor product: A tag writing and reading method suitable for a semiconductor product are provided. In the tag writing method, a code representing a tag is provided, and then the code is converted into a tag pattern that is then combined with a portion of the pattern of the pattern. Next, the... Agent: J.c. Patents

20070061623 - Event-based automated diagnosis of known problems: System events preceding occurrence of a problem are likely to be similar to events preceding occurrence of the same problem at other times or on other systems. Thus, the cause of a problem may be identified by comparing a trace of events preceding occurrence of the problem with previously diagnosed... Agent: Lee & Hayes PLLC

20070061624 - Automated atomic system testing: Atomic testing of a multiplicity of scenarios includes generating a listing of interacting scenarios which are likely to cause a failure, and testing ones of the scenarios not included in the listing according to a binary search strategy to identify a subset of the scenarios as a source of failure... Agent: Ibm Corporation

20070061625 - Automation structure for software verification testing: Functional testing of application software through exercising graphical user interface functions of the application software is automated and enhanced by providing one or more test data sets, one or more classes of panels in which each panel is described according to a set of graphical user interface objects and a... Agent: Ibm Corporation (rhf)

20070061627 - Debugging system and method: In a multitask execution environment, a debugging device performs debugging setting for rewriting part of original recording content in a memory area shared by at least two tasks, and debugging cancellation for restoring rewritten recording content back to original recording content. The debugging device stores a memory area used by... Agent: Mcdermott Will & Emery LLP

20070061626 - Statistical analysis of sampled profile data in the identification of significant software test performance regressions: Sampled profile data provides information about processor activity during a test. Processor activity can be analyzed to determine an amount of processor resources used to execute the various functions, modules, and processes associated with a tested software activity. Statistical methods can be applied to the resource data from multiple test... Agent: Woodcock Washburn LLP (microsoft Corporation)

20070061629 - Drop and drag logic analyzer trigger: A method of setting up a trigger function within the context of a data display on a logic analyzer provides a trigger setup window adjacent to the data display with a plurality of trigger setup icons. One of the trigger setup icons is selected as the trigger function, and a... Agent: Thomas F. Lenihan Tektronix, Inc.

20070061628 - System and method for examining remote systems and gathering debug data in real time: A system, method and computer program product for dynamically debugging a multi-node network comprising an infrastructure including a plurality of devices, each device adapted for communicating messages between nodes which may include information for synchronizing a timing clock provided in each node. The apparatus comprises a plurality of probe links... Agent: Scully Scott Murphy & Presser, PC

20070061631 - Fault diagnosis in relaying data among a plurality of networks: A network relay apparatus is provided, wherein data accompanied by additional information is relayed among plural networks through input ports and output ports. In the apparatus, a deciding unit decides, from the output ports, an objective output port to which the data inputted via any one of the input ports... Agent: Nixon & Vanderhye, PC

20070061630 - System and method for recovering from a hang condition in a data processing system: A data processing system, method, and computer-usable medium for recovering from a hang condition in a data processing system. The data processing system includes a collection of coupled processing units. The processing units include a collection of processing unit components such as, two or more processing cores, and a cache... Agent: Dillon & Yudell LLP

20070061632 - Methods and structure for verifying domain functionality: Methods and structures within a SAS expander for testing SAS devices and other SAS expanders in the SAS domain. Testing devices and expanders in the domain by operations performed within a SAS expander in the domain relieves the burden of such processing in attached host systems and adds flexibility for... Agent: Lsi Logic Corporation

20070061633 - Computer processor capable of responding with comparable efficiency to both software-state-independent and state-dependent events: A technique for enabling a computer processor to be capable of responding with comparable efficiency to both: (i) events whose handling is independent on the state of the software machine that responds to the events, and (ii) events whose handling is dependent on the state of the software machine that... Agent: Demont & Breyer, LLC

20070061634 - Os and firmware coordinated error handling using transparent firmware intercept and firmware services: Methods and architectures for performing hardware error handling using coordinated operating system (OS) and firmware services. In one aspect, a firmware interface is provided to enable an OS to access firmware error-handling services. Such services enable the OS to access error data concerning platform hardware errors that may not be... Agent: Blakely Sokoloff Taylor & Zafman

20070061635 - Handling unwritten areas on a storage medium: A recording device has medium interface means (14) for interfacing with a storage medium (11) for recording data on the medium and retrieving data from the medium, and a host interface (15) for communicating with a host (13) via messages according to a protocol (ATA/ATAPI). The messages include a write... Agent: Philips Intellectual Property & Standards

20070061636 - Optical disc recording/reproducing apparatus: Provided is an optical disc recording/reproducing apparatus that performs recording and reproducing. The optical disc recording/reproducing apparatus has a recording control portion for storing, when recording data on the optical disc, an error address and an error code in a nonvolatile memory when a recording error occurs and, after recording... Agent: Morgan Lewis & Bockius LLP

20070061638 - Multi drive test system for data storage device: Embodiments of the invention provide a data storage device test method and data storage device manufacture method which allow a tester to perform an operation test of plural data storage devices connected thereto in a shorter period of time. In one embodiment, an operation test of each of plural HDDs... Agent: Townsend And Townsend And Crew LLP

20070061637 - Process for conducting high-speed bitmapping of memory cells during production: The present invention is directed to a method of fast bitmapping defective memory arrays in semiconductor integrated circuit dice formed on a wafer. The method involves loading a wafer onto automated test equipment. Initial production testing is then performed on each die of the wafer to determine whether the memory... Agent: Lsi Logic Corporation

20070061639 - Semiconductor device test system with test interface means: One aspect of the invention relates to a semiconductor device test system, interface means for use with a semiconductor device test method, and a semiconductor device test method, wherein, in a fist mode of an interface means, in reaction to test signals corresponding to a test standard, for example, a... Agent: Dicke, Billig & Czaja, P.l.l.c.

20070061641 - Apparatus and method for generating test driver: Provided are an apparatus and method for generating a test driver, capable of reducing errors caused in component development early on by enabling immediate checking as to whether architecture design requirements are satisfied during component development. Specific snapshot information is input to the interface for the individual component of the... Agent: Ladas & Parry LLP

20070061640 - Integrated circuit tester with software-scaleable channels: An integrated circuit (IC) tester for testing an IC device under test (DUT) includes a set of scaleable channels and a pattern generator for supplying control data to each scaleable channel prior to each test cycle. Under software control, each scaleable channel can implement one or more tester channels by... Agent: Smith-hill And Bedell, P.C.

20070061643 - Substrate and testing method thereof: The present invention relates to a substrate and testing method thereof. The method of the invention comprises: (a) providing a substrate, the substrate having a first surface and a second surface, the first surface having a plurality of first testing pads and the second surface having a plurality of second... Agent: Volentine Francos, & Whitt PLLC

20070061642 - System and method of uncorrelated code hopping in a communications system: A system and method are used to provide uncorrelated code hopping in a communications system. A multi-bit linear shift register receives data and clocks the data fifteen times. A word assembler receives the shifted data and outputs a fifteen bit word. A mixer mixes the fifteen bit word with an... Agent: Sterne, Kessler, Goldstein & Fox PLLC

20070061645 - Register file initialization to prevent unknown outputs during test: A system and method for initializing a register file during a test period for an integrated circuit, wherein the register file has one or more input ports. A counter, when enabled, is initialized and counts at each write cycle of the register file and outputs a current count value to... Agent: Texas Instruments Incorporated

20070061647 - Scan chain disable function for power saving: An apparatus, a method and a computer program product are provided for conserving energy during functional mode of a processor by disabling the scan chain. By inserting logic gating into the scan chain it is possible to disable the scan chain during the processor's functional mode. During functional mode the... Agent: Ibm Corp. (wip) C/o Walder Intellectual Property Law, P.C.

20070061644 - Scan verification for a device under test: Methods, apparatus, and products are disclosed for scan verification for a simulated device under test (‘DUT’), the DUT having scan chains, scan inputs, and scan outputs that include verifying correct data entry from the scan inputs of the DUT into the beginning of the scan chain, verifying correct propagation of... Agent: Ibm (roc-blf)

20070061646 - Selectable jtag or trace access with data store and output: An addressable interface selectively enables JTAG TAP domain operations or Trace domain operations within an IC. After being enabled, the TAP receives TMS and TDI input from a single data pin. After being enabled, the Trace domain acquires data from a functioning circuit within the IC in response to a... Agent: Texas Instruments Incorporated

20070061650 - Semiconductor device with test interface: A semiconductor device with test interface, as well as to a method for operating a semiconductor device is disclosed. In one embodiment, in a test operating mode, the semiconductor device is, via a first pin, supplied with a work cycle signal synchronized with a test environment and, via at least... Agent: Dicke, Billig & Czaja, P.l.l.c.

20070061649 - Semiconductor devices including test circuits and related methods of testing: A semiconductor device may include a control signal generator configured to generate a test control signal in response to an externally applied test command signal. First and second transmission gates may be configured to open and close together in response to a test clock signal pulse and the test control... Agent: Myers Bigel Sibley & Sajovec

20070061651 - Shift register circuit: A shift register circuit which having a plurality of stages, a signal of the timing controller is conveyed to the shift register circuit for generating and transferring a sample signal to data latch circuit. The first stage of the shift register, comprising a disable circuit and a sample circuit, receives... Agent: Birch Stewart Kolasch & Birch

20070061648 - Shift register, scanning line driving circuit, matrix type device, electro-optic device, and electronic device: The invention provides a shifter register comprising: a plurality of shift circuit blocks connected in series, each of which includes a predetermined even-number of shift unit circuits; a plurality of clock decision circuit, each of which is provided for each of a plurality of the shift circuit blocks and receives... Agent: Harness, Dickey & Pierce, P.L.C

20070061652 - Built-in self test for a thermal processing system: A method of creating and/or modifying a built-in self test (BIST) table for monitoring a thermal processing system in real-time that includes positioning a plurality of wafers in a processing chamber in the thermal processing system; executing a real-time dynamic model to generate a predicted dynamic process response; creating a... Agent: Wood, Herron & Evans, LLP (tokyo Electron)

20070061653 - Built-in self-repairable memory: The present invention provides a built-in self-repairable memory. The invention repairs a faulty IC through hard fuses, as well as through available redundancy in memories on chip. As the faults are not present in all the memories, the invention uses a lesser number of fuses to actually make a repair... Agent: Docket Clerk

20070061654 - Semiconductor integrated circuit and test method: A semiconductor integrated circuit includes a memory that operates in synchronization with a first clock and a built-in self-test (BIST) circuit for testing the memory. The BIST circuit includes a test data output circuit for outputting test data as input test data to the memory in synchronization with a second... Agent: Foley And Lardner LLP Suite 500

20070061655 - Path data transmission unit: A path data transmission unit in which, if one of a normal path for handling normal data and a test path for handling test data is selected, the other path is disabled to reduce power consumption ;includes an edge detector, a first path data transmission block, and a second path... Agent: F. Chau & Associates, LLC

20070061656 - Test data generator, test system and method thereof: A test data generator, test system and method thereof are provided. In the example method, parallel test data may be received at a first data rate. The received parallel test data may be converted into serial test data at a second data rate. Noise (e.g., jitter noise, level noise, etc.)... Agent: Harness, Dickey & Pierce, P.L.C

20070061657 - Delay fault testing apparatus: A delay fault testing apparatus includes a scan device having a first input for receiving a data to the core under test, an update device including an input electrically connected to a first output of the scan device, a first multiplexer including a first input electrically connected to the output... Agent: John S. Egbert Egbert Law Offices

20070061659 - Methods for testing a plurality of semiconductor devices in parallel and related apparatus: A method for testing a semiconductor device includes generating chip identification data for each of a plurality of devices under test to collect a plurality of chip identification data respectively corresponding to the plurality of devices under test. The plurality of chip identification data for the plurality of devices under... Agent: Myers Bigel Sibley & Sajovec

20070061658 - Testing circuit and related method of injecting a time jitter: A testing method includes selecting a low-pass filter by simulation, generating testing signals with the low-pass filter receiving output signals of an under-test circuit, and outputting the testing signals to an input of the under-test circuit for predetermined measurements. A testing circuit and testing method achieve the same jitter injection... Agent: North America Intellectual Property Corporation

20070061661 - Bit rate adaptation in a data processing flow: A dedicated processing module includes an input for data to be processed and an output for processed data. A block input and a block output are also included. A processing component for the module performs a digital processing operation on the data present at the data input and applies the... Agent: Jenkens & Gilchrist, PC

20070061662 - Method and system for detecting wired network error in mobile communication terminal: Disclosed is a method and system for detecting wired network errors in a mobile communication terminal, which performs a selective checksum operation for received data in a UDP (User Datagram Protocol) layer to improve the processing speed of the mobile communication terminal. In the system, it is determined whether to... Agent: Blakely Sokoloff Taylor & Zafman

20070061663 - Method and system for identifying root cause of network protocol layer failures: A method and system are disclosed for analyzing an event in a network. For example, the method for analyzing an event in a network includes identifying a network protocol error in the network, identifying a network hardware failure in the network, correlating the network protocol error and the network hardware... Agent: Hewlett Packard Company

20070061660 - Parallel precoder circuit: A parallel precoder circuit executes an EXOR operation on an n-row parallel input, and outputs an n-row parallel output, where 2≦n. Outputs of EXOR circuits each of which having a largest column number from among EXOR circuits disposed in first to (n−1)th rows become first-row to (n−1)th-row parallel outputs, respectively.... Agent: Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20070061664 - Wireless communication method and apparatus for detecting and decoding enhanced dedicated channel hybrid automatic repeat request indicator channel transmissions: A wireless communication method and apparatus for detecting and decoding enhanced dedicated channel (E-DCH) hybrid automatic repeat request (H-ARQ) indicator channel (E-HICH) transmissions are disclosed. A wireless transmit/receive unit (WTRU) receives E-HICH transmissions and detects an H-ARQ indicator transmitted via the E-HICH by performing a binary hypothesis test. The WTRU... Agent: Volpe And Koenig, P.C. Dept. Icc

20070061665 - Clock and data recovery system and method for clock and data recovery based on a forward error correction: The forward error correction based clock and data recovery system according to the invention comprises a data latch (16) for intermediately storing received data, which is triggered by a sampling clock (sclk). The system further comprises an error determination unit (20, 21) for determining whether and which of the sampled... Agent: Stephen C. Kaufman IBM Corporation

20070061667 - Convolutional interleaving and de-interleaving circuit and method thereof: A convolutional interleaving and de-interleaving circuit and the method thereof are disclosed. The convolutional interleaving and de-interleaving circuit comprises an initial address generator, a first address generator, a second address generator, an address mixer, an adder, a controller and a memory. Wherein, the controller enables those address generators to provide... Agent: J.c. Patents, Inc.

20070061666 - Method and system for interleaving in a parallel turbo decoder: A method and system for interleaving in a parallel turbo decoder enables the use of economical dual-port memory. According to the method, an incoming coding block is divided into a plurality of sub-blocks (step 1005). Each sub-block is divided into a plurality of windows (step 1010). An inter-window shuffle is... Agent: Motorola, Inc.

20070061676 - Coding system and decoding system: In a coding system wherein an error correction/detection coding is combined with a synchronization recovering technique using a synchronization code, the problems of a pseudo synchronization and a step out due to error detection are solved. There is provided a coding part 212 for coding an input multiplexed-code string 201... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070061677 - Coding system and decoding system: In a coding system wherein an error correction/detect-ion coding is combined with a synchronization recovering technique using a synchronization code, the problems of a pseudo synchronization and a step out due to error detect-ion are solved. There is provided a coding part 212 for coding an input multiplexed code string... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070061678 - Coding system and decoding system: In a coding system where in an error correction/detection coding is combined with a synchronization recovering technique using a synchronization code, the problems of a pseudo synchronization and a step out due to error detection are solved. There is provided a coding part 212 for coding an input multiplexed code... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070061679 - Coding system and decoding system: In a coding system wherein an error correction/detection coding is combined with a synchronization recovering technique using a synchronization code, the problems of a pseudo synchronization and a step out due to error detection are solved. There is provided a coding part 212 for coding an input multiplexed code string... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070061680 - Coding system and decoding system: In a coding system wherein an error correction/detect-ion coding is combined with a synchronization recovering technique using a synchronization code, the problems of a pseudo synchronization and a step out due to error detect-ion are solved. There is provided a coding part 212 for coding an input multiplexed code string... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20070061668 - Data corruption scrubbing for content addressable memory and ternary content addressable memory: A method for remedying data corruption in a first circuit, which may be a CAM or a TCAM. The method includes providing a RAM circuit external to the first circuit, the RAM circuit being configured for storing error detection information for data stored in the first circuit. The method also... Agent: Hewlett Packard Company

20070061671 - Data memory system and method for transferring data into a data memory: A method for transferring data into a data memory using a data protocol is presented. The data memory is an error correction code (ECC) memory or a non-error correction code memory. The data protocol has different frames. When data are written into an ECC memory, the protocol includes a data... Agent: Brinks Hofer Gilson & Lione Infineon

20070061670 - Digital data transmission error checking method and system: A digital data transmission error checking method and system is proposed, which is designed for use with a data source unit and a data reception unit for providing a error checking function, and which is characterized by the use of an improved checksum algorithm that initially sets a checksum variable... Agent: Edwards & Angell, LLP

20070061669 - Method, device and system for detecting error correction defects: A method, device and system for detecting error correction defects calculates a written error checking and correction (ECC) code for a written data and writes the written data and the written ECC code into a plurality of memory cells. When data is read from the memory cells including data representing... Agent: Trask Britt, P.C./ Micron Technology

20070061675 - Method, system, and apparatus for adjacent-symbol error correction and detection code: A circuit and method for generating an Error Correcting Code (ECC) based on an adjacent symbol codeword that is formed in two clock phases.... Agent: Intel/blakely

20070061672 - Non-volatile memory with error detection: Data move operations in a memory device are described that enable identification of data errors. Error detection circuitry in the memory device can be operated using parity data or ECC data stored in the memory. Results of the error detection can be accessed by a memory controller for data repair... Agent: Schwegman, Lundberg, Woessner & Kluth, P.A.

20070061674 - Transmission data packet construction for better header authentication: The invention relates to a packet format for data being transmitted in a packet switched network. The packet as constructed in accordance with the invention enables the detection of data tampering and alteration of the data payload part as well as header part. The invention uses check code and encryption... Agent: Novo Nordisk, Inc. Patent Department

20070061673 - Wireless communication method and apparatus for decoding enhanced dedicated channel absolute grant channel transmissions: A wireless communication method and apparatus for decoding enhanced dedicated channel (E-DCH) absolute grant channel (E-AGCH) transmissions are disclosed. A wireless transmit/receive unit (WTRU) receives E-AGCH data which includes a cyclic redundancy check (CRC) part and a data part. The CRC part is masked with a WTRU identity (ID) at... Agent: Volpe And Koenig, P.C. Dept. Icc

20070061681 - Mechanism for error handling of corrupted repeating primitives during frame reception: A method for error handling of corrupted repeating primitives during frame reception is disclosed. The method comprises identifying a portion of a received frame including a repeating primitive sequence, determining whether data in the repeating primitive sequence has one or more errors, and indicating a successful reception of the received... Agent: Blakely Sokoloff Taylor & Zafman

20070061682 - Non-causal channel equalization system: A system and method are provided for non-causal channel equalization in a communications system. The method comprises: establishing three thresholds; receiving a binary serial data stream; comparing the first bit estimate in the data stream to a second bit value received prior to the first bit; comparing the first bit... Agent: Law Office Of Gerald Maliszewski

20070061683 - Error correction apparatus and method for data stored in memory: An error correction device includes: a main memory for storing data; a memory bus, coupled to the main memory; and a correction module, directly connected to the memory bus, for reading an error data from the main memory, generating a correct data according to the error data, and writing the... Agent: North America Intellectual Property Corporation

20070061685 - Method, system, and apparatus for adjacent-symbol error correction and detection code: A circuit and method for generating an Error Correcting Code (ECC) based on an adjacent symbol codeword that is formed in two clock phases.... Agent: Intel/blakely

20070061684 - Systems, methods, and apparatuses for using the same memory type for both error check and non-error check memory systems: Embodiments of the invention are generally directed to systems, methods, and apparatuses for using the same memory type for both error check and non-error check systems. In an embodiment, a memory device is capable of operating in an error check mode and in a non-error check mode. The memory device... Agent: Blakely Sokoloff Taylor & Zafman

20070061686 - Check testing of an address decoder: For checking an address decoder of a data memory, from a record of addresses of the data memory, designated as base addresses, one after another each base address is selected, and the following steps are executed for the respectively selected base address: a) determining the content of the base address;... Agent: Kenyon & Kenyon LLP

20070061687 - Soft decoding method and apparatus, error correction method and apparatus, and soft output method and apparatus: Provided are a decoding method and apparatus, an error correction method and apparatus, and a soft output method and apparatus to improve the performance of soft error correction. A method of decoding a codeword encoded into a code that can be soft iterative decoded includes: receiving a soft value of... Agent: Stein, Mcewen & Bui, LLP

20070061688 - Decoding error correction codes using a modular single recursion implementation: Systems and methods are provided for performing error correction decoding. The coefficients of the error locator polynomial are iteratively determined for each codeword using a modular implementation of a single recursion key-equation solver algorithm. According to this implementation, a plurality of modules are used to calculate the current and previous... Agent: Steven J. Cahill

20070061689 - Method of detecting and correcting a prescribed set of error events based on error detecting code: A method of constructing an effective generator polynomial for error correction by which a unique set of syndromes for each error event is produced is provided. The method includes preparing a set of dominant error events from the intersymbol interference characteristics of media; and generating a codeword from the data... Agent: Sughrue Mion, PLLC

20070061690 - Block puncturing for turbo code based incremental redundancy: A method of block puncturing for turbo code based incremental redundancy includes a first step (1200) of coding an input data stream into systematic bits and parity bits. A next step (1202) includes loading the systematic bits and parity bits into respective systematic and parity block interleavers in a column-wise... Agent: Motorola Inc

20070061691 - System for encoding digital data and method of the same: The present invention is a method and system for encoding digital data. The encoding system proceeds the step of calculating error detection code and the step of scrambling the main data at the same time to decrease times for the access to the first memory. The present invention comprises a... Agent: The Law Offices Of Andrew D. Fortney, Ph.d., P.C.

20070061692 - Parallel parity checking for content addressable memory and ternary content addressable memory: Methods and arrangements for parallel parity checking for content addressable memory and ternary content addressable memory during compare cycles are disclosed. Further, methods and arrangements for remedying storage bit corruption are also disclosed.... Agent: Hewlett Packard Company

20070061693 - Parity error checking and compare using shared logic circuitry in a ternary content addressable memory: Methods and apparatus for performing, using smaller, more efficient shared logic circuitry, the parity checking function and the compare function in a mutually exclusive manner in different cycles of a ternary content addressable memory are disclosed.... Agent: Hewlett Packard Company

20070055905 - Parity engine for use in storage virtualization controller and method of generating data by parity engine: A parity engine for use in a storage virtualization controller includes a control unit being a control kernel of the parity engine; a control unit buffer serving as a data buffer of the control unit and storing map tables required for operations; at least one XOR engine being started by... Agent: Rosenberg, Klein & Lee

20070055906 - Self-reparable semiconductor and method thereof: A self-reparable semiconductor comprises first, second and spare functional units including first and second sub-functional units that cooperate to perform first and second functions. The first and second sub-functional units of the first, second and first spare functional units are functionally interchangeable, respectively. At least one of the first and... Agent: Harness, Dickey & Pierce P.L.C

20070055907 - Self-reparable semiconductor and method thereof: A self-reparable semiconductor comprises M functional units each including N sub-functional units. Corresponding ones of the N sub-functional units in each of the M functional units perform the same function. At least two of the N sub-functional units in one of the M functional units perform different functions. A first... Agent: Harness, Dickey & Pierce P.L.C

20070055908 - Redundant power supply circuit and motor driving circuit: A redundant power supply circuit in a vehicle electronic control system has a main circuit and a backup circuit which each use a battery source as its primary source, and the main circuit outputs a control signal for activating the backup circuit. A motor driving circuit includes a main monitoring... Agent: Squire, Sanders & Dempsey L.l.p.

20070055909 - Write journaling using battery backed cache: A system, apparatus and method for maintaining information related to a write operation is described. In one embodiment of the invention, a write journal is provided that contains a list of entries that store information related to active write operations so that a particular write may be restarted in order... Agent: Lsi Logic Corporation

20070055910 - Information processing apparatus, self-diagnosis method, and program: A screen on which a transition to a self-diagnosis test mode is reported is displayed by simultaneously pressing a plurality of specific keys (AC, Shift, and Menu), and moreover, a transition is made to a self-diagnosis test mode by inputting one of predetermined key signals (“1”, “2”, “3”, and “•”),... Agent: Frishauf, Holtz, Goodman & Chick, Pc

20070055911 - A method and system for automatically generating a test-case: The present invention relates to an automated method and system for transforming a hardware test-case within a system level into at least one unit test-case for a functional unit within a unit level, wherein the functional unit is a component of said hardware. The method comprises the steps of emulating... Agent: International Business Machines Corporation

20070055912 - Circuit arrangement for protected data transmission, particularly in ring-shaped bus systems: A circuit arrangement allows data, which are necessary for building up fault-tolerant structures, to be transmitted on standard ring-shaped bus systems. Its implementation requires a monitoring unit and input and output units which transmit or receive data for control. The circuit arrangement handles the task of detecting any faults which... Agent: M. Robert Kestenbaum

20070055913 - Facilitating detection of hardware service actions: A series of state transitions is indicative of performance of hardware service actions. A transition from, for instance, a disconnected state to a connected state for a hardware component is indicative of performance of a service action for the hardware component. Detection of this transition is automatic.... Agent: Heslin Rothenberg Farley & Mesiti P.c.

20070055915 - Failure recognition, notification, and prevention for learning and self-healing capabilities in a monitored system: The present invention provides failure recognition, notification, and prevention for learning and self-healing capabilities in a monitored system. A system to collect monitoring data is monitored. A failure of the system is detected; A failure point for the detected failure in a data space defined by the monitoring data is... Agent: Ibm Corporation

20070055914 - Method and apparatus for managing software errors in a computer system: A method for managing a system includes monitoring a plurality of applications running in the system for errors. A prediction is made as to whether errors detected would result in a failure. Fault recovery is initiated in response to a failure prediction. According to one aspect of the present invention,... Agent: Lawrence Cho C/o Portfolioip

20070055916 - System and method for monitoring the performance of a server: A monitoring tool requests traceable information from a server. Such traceable information preferably includes traceable events and associated columns. The monitoring tool preferably generates a display of the traceable information, from which a user may select information to be traced. The monitoring tool requests a trace of the selected information.... Agent: Woodcock Washburn LLP (microsoft Corporation)

20070055917 - Integrated device: An integrated device able to simplify interconnects up to memories, able to prevent a reduction of performance due to an increase of area and longer interconnects, and able to speed up memory access. An input/output port of a processing module, memory interfaces, and memory banks are connected by connection interconnects... Agent: Rader Fishman & Grauer Pllc

20070055918 - Common software activity status representation: Described herein are technologies directed towards providing a common mechanism for tracking the activity status of one or more software actions of a computer system. Furthermore, the described technologies facilitate managing the presentation of the tracked activity status of individual actions and/or of a collection of such actions.... Agent: Lee & Hayes Pllc

20070055919 - Embedded state metric storage for map decoder of turbo codes: A method, an embedded state metric storage, is used for MAP (Maximum A Posterior)-based decoder of turbo codes to reduce the memory requirement of state metric storage. For MAP decoder, this method comprises selecting any state metric from the updated state metrics for each recursion direction, forward and reverse, and... Agent: Cooper & Dunham, LLP

20070055920 - Digital signal processing method, data recording and reproducing apparatus, and data recording medium that are resistant to burst errors: With two consecutive product-coded ECC blocks, EB1 and EB2, as a set, the rth row of first ECB block EB1 is followed by the rth row of second ECC block EB2 in such a way that the first row of first ECC block EB1 is followed by the first row... Agent: Nath & Associates

20070050661 - Adjusting a processor operating parameter based on a performance criterion: Embodiments include a controller apparatus, a computerized apparatus, a device, an apparatus, and a method. A controller-apparatus includes a monitoring circuit for detecting a computational error corresponding to an execution of an instruction of a sequence of instructions by a processor subsystem having an adjustable operating parameter. The controller apparatus... Agent: Searete LLC Clarence T. Tegreene

20070050660 - Handling processor computational errors: Embodiments include a computer processor-error controller, a computerized device, a device, an apparatus, and a method. A computer processor-error controller includes a monitoring circuit operable to detect a computational error corresponding to an execution of a second instruction by a processor operable to execute a sequence of program instructions that... Agent: Searete LLC Clarence T. Tegreene

20070050659 - Hardware-error tolerant computing: Embodiments include a computing system, a device, and a method. A computing system includes a processor subsystem having an adjustable operating parameter. The computing system also includes an information store operable to save a sequence of instructions. The computing system further includes a controller module. The controller module includes a... Agent: Searete LLC Clarence T. Tegreene

20070050663 - Error correction apparatus for performing consecutive reading of multiple code words: An error correction apparatus for performing an error correction process on digital data that is stored in a buffer memory and includes multiple code words. The device includes a memory access circuit for controlling reading and writing of the code words to the buffer memory. Operational circuits perform a syndrome... Agent: Fish & Richardson PC

20070050662 - Network object cache engine: The invention provides a method and system for caching information objects transmitted using a computer network. A cache engine determines directly when and where to store those objects in a memory (such as RAM) and mass storage (such as one or more disk drives), so as to optimally write those... Agent: Sonnenschein Nath & Rosenthal LLP

20070050664 - Method and apparatus for diagnosing mass storage device anomalies: A type of flaw present in a mass storage device can be inferred by examining the results of I/O operations performed on only a portion of the device, without testing or examining the entire device.... Agent: Network Appliance/blakely

20070050665 - Write strategy setting apparatus utilizing shared storage unit and method thereof: A write strategy setting apparatus applied in an optical disc drive is disclosed. The write strategy setting apparatus includes a storage unit, an error calculator, and a write strategy controller. The storage unit stores an initial write strategy including a plurality of write strategy parameter sets corresponding to a plurality... Agent: North America Intellectual Property Corporation

20070050666 - Computer network system and related method for monitoring a server: A computer network system. The computer network system includes a server with an operating system and a management system for controlling the server, and a computer connected to the operating system of the server and the management system of the server. The computer is utilized to transmit a signal to... Agent: North America Intellectual Property Corporation

20070050669 - Management of background copy task for point-in-time copies: A scheduling method and apparatus for use by a processor that controls storage devices of a data storage system is presented. The method allocates processing time between I/O operations and background operations for predetermined time slots based on an indicator of processor workload.... Agent: Emc Corporation C/o Daly, Crowley, Mofford & Durkee, LLP

20070050667 - Method and apparatus for ensuring data integrity in redundant mass storage systems: A method for maintaining integrity of data in a redundant mass storage system is provided that includes selecting a plurality of scrubbing selections for a memory system in which each of the scrubbing selections selects a data section on the memory system. The method also includes selecting a respective scrubbing... Agent: Katten Muchin Rosenman LLP

20070050668 - Test mode to force generation of all possible correction codes in an ecc memory: The present disclosure enables individual bits of a data signal to be flipped (their state changed from logic one to logic zero or vice versa) to mimic an error. By flipping various bits or combinations of bits, various predetermined errors can be forced. By measuring the time delay between when... Agent: Jones Day

20070050670 - Disk array apparatus, method for controlling the same, and program: The present invention proposes a disk array apparatus that can be inexpensively constructed while maintaining its high reliability, and also proposes a method for controlling the disk array apparatus, and a program. In the disk array apparatus, a storage area in a storage device for storing system information is managed... Agent: Stanley P. Fisher Reed Smith LLP

20070050672 - Power consumption management: Embodiments include a system, an apparatus, a device, and a method. A system includes a power module operable to determine respective indicia of power consumed in executing at least one instruction by a first subcircuit and by a second subcircuit of a synchronous circuit. The system also includes a scheduler... Agent: Searete LLC Clarence T. Tegreene

20070050671 - Selective error recovery of processing complex using privilege-level error discrimination: An apparatus has at least one processing unit to generate a request having a request privilege level. At least one resource exists in the apparatus to receive the request and determine if the request is allowable. The apparatus includes an error handler that determines the nature of an error and... Agent: Marger Johnson & Mccollom, P.C.

20070050673 - Dynamic system diagnosis: In one embodiment, the invention is a computer-implemented method that (i) launches a diagnostic tool designed for use with a primary software application, (ii) determines whether a diagnostic definitions file (DDF) needs to be updated, (iii) updates the DDF, if needed, (iv) performs one or more of the diagnostic tests... Agent: Mendelsohn And Associates, P.C.

20070050674 - Rds data security apparatus and method: A remote diagnostic system (RDS) data security device and method are provided, in which an interface unit receives an RDS command from a host, a storage unit stores a security setting for RDS data, and a control unit performs an operation for the RDS data according to the RDS command... Agent: Roylance, Abrams, Berdo & Goodman, L.L.P.

20070050675 - [method for restoring a booted system]: A method for restoring a booted system divides a flash memory in a device using an embedded Linux system into four blocks and saves a boot loader, a Linux kernel, a mini root file system and a user root file system of the embedded Linux system separately into each block... Agent: Moxa Technologies Co., Ltd

20070050679 - Analysis of errors within computer code: Where code execution results in an error attributable to multiple data elements, the code is revised so the error results from one element. Where execution improperly functions without error, and the elements contain required but missing properties, the code is improperly functioning in its required-property handling. Errors are organized into... Agent: Ibm Corporation

20070050678 - Apparatus for self-diagnosis and treatment of critical software flaws: A method (200) and a system (100) for repairing a flaw in software (120). A failure during execution of the software can be automatically identified, and a state of the software execution at a point of the software failure can be frozen. A failure handling application (130) can be automatically... Agent: Cuenot & Forsythe, L.L.C.

20070050677 - Noise accommodation in hardware and software testing: In testing hardware and/or software, processor events can be logged during a test. Using the events, we can determine an amount of processor activity not used to execute software considered to be involved in the test. Such noise may then be accounted for in determining and prioritizing regressions, as well... Agent: Woodcock Washburn LLP (microsoft Corporation)

20070050676 - Software testing device and method, and computer readable recording medium for recording program executing software testing: A software testing device and method is provided. The software testing device includes: a test script unit for outputting its holding test script when a test execution signal is inputted; a test data creating unit for selecting at least one test data from at least one predetermined test data set... Agent: Foley And Lardner LLP Suite 500

20070050680 - Data read/write device and data read/write method: A data read/write device writes to or reads from an optical disc medium having thereon a plurality of areas in which management information is redundantly stored. Conditions for setting a read/write operation are indicated in third management information stored in the inner circumferential area. The pickup of the device performs... Agent: Antonelli, Terry, Stout & Kraus, LLP

20070050681 - Global user services management for system cluster: A system cluster, a method and a recording medium are provided in which an administering host system of a cluster maintains global information for globally managing the availability of services to users on a basis of the system cluster. Individual host systems also maintain local information, the local information being... Agent: International Business Machines Corporation

20070050682 - Processor and debugging device: A processor according to the present invention is capable of executing instructions in parallel, the processor further executing a string of instructions consisting of a plurality of instructions allocated at continuous addresses as an execution unit, comprising an instruction analyzer, an instruction executor and an instruction canceling unit. The instruction... Agent: Mcdermott Will & Emery LLP

20070050684 - Computer system management program, system and method: A method for monitoring according to a hint when allocating a storage volume. When a threshold value violation has occurred, judgement is performed from which use purpose the threshold value derives. The management computer for managing a computer system includes a unit for creating a storage volume according to a... Agent: Townsend And Townsend And Crew, LLP

20070050683 - Virtual flight recorder hosted by system tracing facility: An apparatus, program product and method utilize a virtual flight recorder to harvest a subset of events being collected by an active system tracing facility during operation of a computer system. The virtual flight recorder is “virtual” from the sense that it is not specifically instrumented into a component with... Agent: Wood, Herron & Evans, L.L.P. (ibm)

20070050685 - Method of resetting an unresponsive system and system capable of recovering from an unresponsive condition: A method of resetting an unresponsive system includes monitoring the system to detect when the system is in an unresponsive condition; receiving a predetermined code from a user interface; and resetting the system from the unresponsive condition after receiving the predetermined code from the user interface. In this way, a... Agent: North America Intellectual Property Corporation

20070050686 - System and method for interposition-based selective simulation of faults for access requests to a data storage system: According to one embodiment, a method comprises intercepting, at an interposition agent, requests for accessing a data storage device. The method further comprises determining, by the interposition agent, at least one of the requests to impact, and selectively simulating, by the interposition agent, a fault for the selected at least... Agent: Hewlett Packard Company

20070050687 - Watchdog monitoring circuit and method for controlling energization of the load using the watchdog monitoring circuit: A watchdog monitoring circuit and a method related thereto are provided. The watchdog monitoring circuit includes a first signal detection circuit configured to determine a first error condition associated with a first device when the first signal detection circuit does not receive a first plurality of signal pulses having a... Agent: Delphi Technologies, Inc.

20070050688 - Memory correction system and method: An error correction system and method operable to identify and correct a memory module disposed within a computer memory system. In one embodiment, the memory system comprises a plurality of memory modules organized as a number of error correction code (ECC) domains, wherein each ECC domain includes a set of... Agent: Hewlett Packard Company

20070050689 - Storage system comprising logical circuit configured in accordance with information in memory on pld: The storage system comprises a PLD which controls data transfer between another device and a media drive; and a processor. The PLD comprises a memory for storing information input from an information source located externally to the PLD; a circuit element group comprising a plurality of circuit elements; and a... Agent: Mattingly, Stanger, Malur & Brundidge, P.C.

20070050690 - Circuit and method for component communication: A circuit has a supply voltage terminal for receiving a supply voltage of the circuit, wherein a trigger impulse is superimposed on the supply voltage. Further, the circuit has a signal terminal for outputting an output signal voltage of the circuit, wherein a bit of a data signal is superimposed... Agent: Baker Botts, L.L.P.

20070050691 - Single event functional interrupt detection system: A method for detecting a single event functional interrupt for an electronic circuit is provided. The method involves periodically generating a refresh signal for the electronic circuit, and generating a single event functional interrupt indicator signal in the electronic circuit that is responsive to the refresh signal. The method also... Agent: Honeywell International Inc.

20070050692 - Test mode control circuit: Provided is a test mode control circuit capable of preventing an MRS (mode register set) from changing in a test mode exit after a test mode entry. In the test mode control circuit, an MRS controller logically combines an MRS signal, a bank address, an MRS address, and a test... Agent: Blakely Sokoloff Taylor & Zafman

20070050693 - Systems and methods for diagnosing rate dependent errors using lbist: Systems and methods for performing logic built-in self-tests (LBISTs) to detect “at-speed” errors in a digital circuit. In one embodiment, an input bit pattern is propagated through target logic of the digital circuit and captured in scan chains at a normal operating speed to produce a first output bit pattern.... Agent: Law Offices Of Mark L. Berrier

20070050695 - Error correction code transformation technique: In one embodiment, a system comprises a source configured to provide data and a source error correction code (ECC) generated according to a source ECC scheme; a circuit comprising an ECC transform unit configured to generate a target ECC from the data, detect an error in the data responsive to... Agent: Meyertons, Hood, Kivlin, Kowert & Goetzel, P.C.

20070050694 - Modified branch metric calculator to reduce interleaver memory and improve performance in a fixed-point turbo decoder: A turbo decoder that calculates alpha, beta and gamma (branch metric) values does not normalize the branch metric but instead applies the normalization factor to the newly calculated extrinsic values before writing them to interleaving memory, resulting in use of less memory than in prior turbo decoders. A compensating factor... Agent: Gardner Groff Santos & Greenwald, P.C.