Error detection/correction and fault detection/recovery inventions 12/06

20060294413 - Fault tolerant rolling software upgrade in a cluster: A method and system are provided for conducting a cluster software version upgrade in a fault tolerant and highly available manner. There are two phases to the upgrade. The first phase is an upgrade of the software binaries of each individual member of the cluster, while remaining cluster members remain... Agent: Lieberman & Brandsdorfer, LLC

20060294412 - System and method for prioritizing disk access for shared-disk applications: A system and method for prioritizing disk access for a shared-disk storage system are disclosed. The system includes a cluster of computing systems coupled via a network, wherein the cluster of computing systems includes at least two nodes. A storage system is coupled to the network. The at least two... Agent: Roger Fulghum Baker Botts L.L.P.

20060294414 - System for memory hot swap: A system may include a motherboard, a chipset coupled to the motherboard, a memory module mount coupled to the chipset, a power transistor electrically coupled to the memory module mount, a voltage regulator to provide power to the power transistor, and an I/O expander coupled to the motherboard. The I/O... Agent: Buckley, Maschoff, Talwalkar LLC

20060294415 - Image forming apparatus: An image forming apparatus in which the consumption article can be attached to and detached from a main body has a controller, which reads first new/old information that is stored in a repetitively rewritable area of a memory provided on the consumption article and represents whether or not the consumption... Agent: Morrison & Foerster LLP

20060294416 - Xor circuit, raid device capable of recovering a plurality of failures and method thereof: An XOR circuit, a RAID device which can recover several failures and method thereof are provided. A Galois field data recovery circuit having two or more sets of Galois Field engine circuits which are used in the XOR circuit, is one which can generate high efficient parity engine and high... Agent: Volpe And Koenig, P.C.

20060294417 - In-memory replication of timing logic for use in failover within application server node clusters: A system to execute an application comprises a cluster of a plurality of application server nodes. A particular one or more of the application server nodes has residing thereon at least one container that contains business logic for the application. The particular one or more of the application server nodes... Agent: Dorsey & Whitney, LLP Intellectual Property Department

20060294418 - System and method for automatically executing corresponding operations on multiple maps, windows, documents, and/or databases: A system and method for causing a master operation that is executed on a master map, window, document, or database to also be automatically executed in its corresponding form on one or more slave maps, windows, documents, and/or databases. Embodiments of the invention can operate with masters and slaves that... Agent: Fliesler Meyer, LLP

20060294419 - Isolating and storing configuration data for disaster recovery: Methods for performing a backup and/or restore operation of data from a computer. To perform a backup operation, a backup storage device and a configuration storage device are communicatively coupled to a computer. One or more data files is saved to backup storage device and one or more configuration data... Agent: Workman Nydegger (f/k/a Workman Nydegger & Seeley)

20060294420 - Isolating and storing configuration data for disaster recovery: Methods for performing a backup and/or restore operation of data from a computer. To perform a restore operation, a backup storage device and a configuration storage device are communicatively coupled to a computer. One or more configuration data components are read from the configuration storage device to the computer to... Agent: Workman Nydegger (f/k/a Workman Nydegger & Seeley)

20060294421 - Isolating and storing configuration data for disaster recovery: Systems and methods for performing a backup and/or restore operation of data from a computer. The systems and methods provide for a computer containing a configuration dataset and other data to be saved. The configuration dataset includes one or more configuration data components examples of which include, but are not... Agent: Workman Nydegger (f/k/a Workman Nydegger & Seeley)

20060294422 - Processor and method of controlling execution of processes: A processor includes a plurality of processing sections, each of which executes a predetermined process. A plurality of fault detecting circuits are respectively provided for the plurality of processing sections, to detect a fault in one of the plurality of processing sections as a fault processing section to generate a... Agent: Sughrue Mion, PLLC

20060294423 - System and method for debugging an application: A method and apparatus is provided for debugging an application in case of an exception. A cyclic buffer is allocated to the application. Log messages are stored in the cyclic buffer and can be later used to debug the application in case of an exception.... Agent: Trellis Intellectual Property Law Group, PC

20060294425 - Circuit arrangement including a self-diagnosis system for triggering and monitoring a load in a bridge circuit and associated operating method: A circuit arrangement for triggering and monitoring a load which is connected in the shunt arm of a bridge circuit, including a control circuit for triggering switch elements S1 to S4 of the bridge circuit and a self-diagnosis system for testing the load connections, wherein the self-diagnosis system consists of... Agent: Baker Botts L.L.P. Patent Department

20060294424 - Debug port system for control and observation: Some embodiments provide a device under test comprising a processing core to support execution debug signals, a debug ring to receive and to transmit the execution debug signals from and to the device under test, a first debug port to receive and transmit the execution debug signals from and to... Agent: Buckley, Maschoff, Talwalkar LLC

20060294426 - Read fifo scheduling for multiple streams while maintaining coherency: A method of scheduling trace packets in an integrated circuit generating trace packets of plural types stores trace data in respective first-in-first-out buffers. If a timing trace data first-in-first-out buffer is empty, timing trace data packet is transmitted. If a program counter overall data first-in-first-out buffer is not empty and... Agent: Texas Instruments Incorporated

20060294429 - Local operation remote cancel authorizing method and system under remote operation: When a local operation is carried out on a vehicle, a local operation record is stored in a storage section of a remote operation control master unit and a storage section of a smart entry key. When a remote operation of canceling the local operation is carried out, the local... Agent: Nixon & Vanderhye, PC

20060294427 - Method, apparatus and system for facilitating debug for link interconnects: A scheme for exposing internal debug values in an in-band means via debug packets that are injected sequentially with normal link traffic on a link and do not interrupt or otherwise interfere with normal operation of the link or related devices. Therefore, this proposal does not require additional pins since... Agent: Blakely Sokoloff Taylor & Zafman

20060294428 - Test system and method: A test system includes a terminal host and a to-be-tested circuit board. The terminal host generates a trigger signal. The to-be-tested circuit board includes a system chip, a memory and a processor. The system chip receives the trigger signal from the terminal host and generates an interrupt. The memory stores... Agent: Birch Stewart Kolasch & Birch

20060294432 - Debugging using virtual watchpoints: A method is provided for use in a computer system for: (A) receiving notification of a virtual memory trap; (B) determining whether the virtual memory trap was triggered by an access to a region of memory identified as protected against access; (C) if it is determined that the virtual memory... Agent: Hewlett Packard Company

20060294433 - Debugging using watchpoints: Techniques are disclosed for disabling watchpoint protection of a region of memory in a computer system, executing first program code that accesses a first memory location in the region of memory, and then enabling watchpoint protection of the region of memory.... Agent: Hewlett Packard Company

20060294431 - Dynamical dual permissions-based data capturing and logging: Embodiments of the present invention address deficiencies of the art in respect to application data logging and provide a novel and non-obvious method, system and computer program product for capturing and logging application data. In an embodiment of the invention, a method for capturing and logging application data can include... Agent: Carey, Rodriguez, Greenberg & Paul, LLP Steven M. Greenberg

20060294435 - Method for automatic checkpoint of system and application software: A method for checkpointing a system that includes receiving a stop command by an executing thread from a master, wherein the executing thread executes an operating system, continuing execution of the executing thread until a checkpoint is reached after receiving the stop command, halting execution of the executing thread at... Agent: Osha Liang L.L.P./sun

20060294430 - Systems and methods for dynamic application patching: A system and method to update a patch index such that one or more properties in the patch index are associated with the patch, wherein the patch includes one or more components for the target software system; updating a class path at run-time for the target software system such that... Agent: Fliesler Meyer, LLP

20060294434 - Test recording method and device, and computer-readable recording medium storing test recording program: A test recording method capable of preventing omission of tests for software to be delivered. When test input data is entered from a testing client, a data transmitter transmits the data to a testing server. Upon reception of test output data and a hash value from the testing server, an... Agent: Staas & Halsey LLP

20060294436 - Appararus for predicting reliability in electronic device package, program for predicting reliability in electronic device package, and method for predicting reliability in electronic device package: An apparatus for predicting reliability in an electronic device package includes a database that stores data concerning the shape of the electronic device package and the specifications for modeling, and data concerning the properties of a material. The apparatus also includes a parameter designating unit that receives parameters inputted to... Agent: Staas & Halsey LLP

20060294438 - Method for data protection in disk array systems: A method and a system for implementing the method are disclosed relating to archival storage of information in large numbers of disk units. The reliability of the stored information is checked periodically using data verification operations whose results are saved. These results establish the veracity of the data and enable... Agent: Townsend And Townsend And Crew, LLP

20060294437 - Point-of-load power conditioning for memory modules: The invention is a point-of-load power conditioning system for computer memory modules that provides regulation and fast transient response for memory integrated circuit bias voltages. The invention uses low voltage drop regulation circuitry that is physically located on individual memory modules. Power consumption and memory module regulator power dissipation are... Agent: Brown Raysman Millstein Felder & Steiner, LLP

20060294439 - Model-driven monitoring architecture: According to one embodiment of the present invention, a method comprises providing a machine-readable monitoring model that maintains configuration of a monitoring environment. An element of the monitoring environment reads the machine-readable monitoring model and adapts its operation to the configuration defined thereby.... Agent: Hewlett Packard Company

20060294440 - Apparatus and method for using a single bank of efuses to successively store testing data from multiple stages of testing: An apparatus and method for using a single bank of electric fuses (eFuses) to successively store test data derived from multiple stages of testing are provided. To encode and store array redundancy data from each subsequent test in the same bank of eFuses, a latch on a scan chain is... Agent: Ibm Corp. (wip) C/o Walder Intellectual Property Law, P.C.

20060294441 - Logic analyzer data retrieving circuit and its retrieving method: A logic analyzer data retrieving method used in a logic analyzer formed of a control unit (11), a memory unit (12), and a data retrieving circuit (13), is disclosed to include the step of driving the data retrieving circuit of the logic analyzer to receive a time delay default value... Agent: Bacon & Thomas, PLLC

20060294442 - Bist to provide phase interpolator data and associated methods of operation: In an embodiment, a phase interpolator (PI) circuit is in an integrated circuit with a test latch, and the test latch is enabled by a test clock signal to under-sample the PI output clock signal from the signal source. In a method of operation, a PI output clock signal is... Agent: Schwegman, Lundberg, Woessner & Kluth, P.A.

20060294443 - On-chip address generation: Methods and apparatus for internally generating addresses for use in accessing elements of an integrated circuit (IC) device are provided. In response to detecting a current command, an internal address for use in executing a subsequent command may be generated. By generating the address ahead of time, before the next... Agent: Patterson & Sheridan, LLP Gero Mcclellan / Infineon Technologies

20060294444 - Apparatus and method for testing ps/2 interface: An apparatus for automatic testing of a PS/2 interface includes a micro controller unit, a PS/2 port, and a plurality of LEDs. The micro controller unit is coupled with both a data pin and a clock pin of the PS/2 interface. The LEDs coupled to the micro controller unit simulate... Agent: Morris Manning Martin LLP

20060294447 - Apparatus and method for parity generation in a data-packing device: A data-packing device, such as a direct memory access controller (DMA), aligns data at a granularity smaller than an error protected unit (EPU) encoded by an error correction code (ECC) in the memory. For example, the data alignment is at a double-word level or a byte level. The data-packing device... Agent: Blakely Sokoloff Taylor & Zafman

20060294445 - Ara type protograph codes: An apparatus and method for encoding low-density parity check codes. Together with a repeater, an interleaver and an accumulator, the apparatus comprises a precoder, thus forming accumulate-repeat-accumulate (ARA codes). Protographs representing various types of ARA codes, including AR3A, AR4A and ARJA codes, are described. High performance is obtained when compared... Agent: Alessandro Steinfl, Esq. C/o Ladas & Parry

20060294446 - Techniques for reconfigurable decoder for a wireless system: A system, apparatus, method, and article including a decoder having multiple connections defined between multiple check nodes and multiple symbol nodes. The connections between the multiple check nodes and the multiple symbol nodes are reconfigurable to enable the decoder to decode multiple codes. Other embodiments are described and claimed. The... Agent: Kacvinsky LLC C/o Intellevates

20060294448 - Apparatus and method for using an error correcting code to achieve data compression in a data communication network: Data compression in a communication system is achieved by performing an error correction encoding operation on input data, and then providing, for transmission across a communication channel, compressed data that is representative of the input data and includes error correction information produced by the error correction encoding operation.... Agent: Docket Clerk

20060294449 - Storage device that transfers block data containing actual data and check code from storage device to host computer: A method of transferring data from a storage device transfers block data to a host computer, has a first data transfer processing of temporarily holding only actual data by excluding a check code from the block data, and transferring the actual data to the host computer; and a second data... Agent: Staas & Halsey LLP

20060288251 - System and method for providing dynamic roll-back reservations in time: A systems, method and computer-readable media are disclosed for providing a dynamic roll-back reservation mask in a compute environment. The method of managing compute resources within a compute environment comprises, based on an agreement between a compute resource provider and a customer, creating a roll-back reservation mask for compute resources... Agent: Isaacson, Irving, Stelacone & Prass, LLC

20060288252 - Apparatuses, methods, and data structures for hard reset: Broadcast receivers, methods, and data structures for performing a hard rest are disclosed. For instance, a communication device includes a status register that stores data that defines a hard reset indication field for indicating whether a hard reset is to be performed by a host.... Agent: Mckenna Long & Aldridge LLP

20060288253 - Biological information utilization system, biological information utilization method, program and recording medium: In a vital data utilization system, measurement systems include a measurement unit for measuring the vital data of subjects, a clock unit for detecting each measurement time at which vital data is measured and a communication unit for sending the vital data including measurement time to a server, a server... Agent: Wenderoth, Lind & Ponack, L.L.P.

20060288254 - Multi-port trace data handling: A method of trace data compression receives trace data on a first port and a second port stores a prior data value. If trace data is received on only one port, then that trace data is transmitted as an indication of matching and non-matching sections between the current trace data... Agent: Texas Instruments Incorporated

20060288255 - Process of estimating relationship between element distortion and analysis error: A process is disclosed for estimating by a computer a relationship between geometric distortion of an element used for approximately representing the shape of an object to be analyzed by a finite element method, and an analysis error which occurs, due to the geometric distortion of the element, in analysis... Agent: C. Irvin Mcclelland Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20060288256 - Stress testing a website having a backend application: Execution of a test scenario is managed where the test scenario is for testing a website deployment having a server in communication with a backend application. A testing interface is established at a client in communication with the server to concurrently incite requests from the client to the server. The... Agent: Ibm Corporation

20060288257 - Defect information managing method, information recording and/or reproducing apparatus, and information reproducing apparatus: In order to select the latest defect management information, the latest selection information first is selected by searching a plurality of selection information areas for a currently active selection information area in which the latest selection information is recorded and subsequently the latest defect management information is obtained by searching... Agent: Sughrue Mion, PLLC

20060288258 - Portable computer: A portable computer is disclosed. A triple-hinged supporting assembly, which is employed to connect a display unit with a mainframe unit in the portable computer, can easily change various operation positions of the display unit and even rotate 180° to horizontal, so as to fill different requirements of a user.... Agent: Birch Stewart Kolasch & Birch

20060288259 - Context-specific electronic performance support: Providing context-specific electronic performance support for a device through just-in-time knowledge transfer. Performance support content comprising information regarding device procedures, device alerts, and display screens for displaying information related to the device can be stored in multiple content files. Each content file can be associated with a device alert, a... Agent: Dade Behring Inc.

20060288261 - Event-based automated diagnosis of known problems: System events preceding occurrence of a problem are likely to be similar to events preceding occurrence of the same problem at other times or on other systems. Thus, the cause of a problem may be identified by comparing a trace of events preceding occurrence of the problem with previously diagnosed... Agent: Lee & Hayes PLLC

20060288260 - System and method for production system performance prediction: Disclosed herein are a system, method and apparatus for reporting, making alerts and predicting fault codes generated by machines in a line. Historical fault code data is received and filtered according to particular criteria to generate filtered fault code data. Classification of the filtered fault code data into physical groups... Agent: General Motors Corporation Legal Staff

20060288262 - Optical disc reproducing apparatus: When an error arises during the reproduction of a file from an optical disc, the error is detected by error detecting means, and the cause of the error is discriminated by error discriminating means. If the cause discriminated by the error discriminating means suggests that the error has arisen during... Agent: Morgan Lewis & Bockius LLP

20060288263 - Drive device: A drive apparatus of the present invention includes: a recording/reproduction section and a drive control section. The drive control section performs a process including: receiving a recording instruction including a location at which data is to be recorded; determining a track among at least one tracks corresponding to the location... Agent: Snell & Wilmer L.L.P.

20060288264 - Technique for defining concealment order to minimize error propagation: Concealment of macroblocks in a rectangular array advantageously occurs by concealing successive rows of macroblocks by progressing in the direction of the larger side of the array. By performing concealment in this manner, information from the concealment of a preceding row or column propagates in a way that facilitates the... Agent: Thomson Licensing Inc.

20060282697 - Method and system for automated, no downtime, real-time, continuous data protection: A data management system or “DMS” provides an automated, continuous, real-time, substantially no downtime data protection service to one or more data sources associated with a set of application host servers. To facilitate the data protection service, a host driver embedded in an application server captures real-time data transactions, preferably... Agent: Law Office Of David H. Judson

20060282698 - Method and device for operating a secondary operating system auxiliary to a primary operating system: For operating two operating systems of a computer without performance loss, the invention proposes a method in which a secondary operating system driver (SOS driver) of the primary operating system is loaded for loading and controlling the secondary operating system and which subsequently loads the secondary operating system. The invention... Agent: Mcglew & Tuttle, PC

20060282699 - Handling real-time write errors: A recording device has medium interface means for interfacing with a storage medium for recording data on the medium and retrieving data from the medium, and host interface means for communicating with a host via messages according to a protocol (ATA/ATAPI). The messages include a write command for writing a... Agent: Philips Intellectual Property & Standards

20060282701 - Method for adopting an orphan i/o port in a redundant storage controller: A method for adopting an orphaned I/O port of a storage controller is disclosed. The storage controller has first and second redundant field-replaceable units (FRU) for processing I/O requests and a third FRU having at least one I/O port for receiving the I/O requests from host computers coupled to it.... Agent: Huffman Law Group, P.C.

20060282700 - Raid write completion apparatus, systems, and methods: Apparatus and systems, as well as methods and articles, may operate to respond to a write request from a disk I/O process with write completion status from a RAID sub-system after writing update data associated with the write request to a data strip in a stripe associated with the RAID... Agent: Schwegman, Lundberg, Woessner & Kluth, P.A.

20060282702 - Task management apparatus for control apparatus, input/output control apparatus, information control apparatus, task management method, input/output controlling method, and information controlling method: Processed results are received when processors make compatible computations on data of a common object. A computation command signal is generated and fed to the processors in response to a start signal from any one of the processors so that the processors can make computations with different operation timings. Then,... Agent: Antonelli, Terry, Stout & Kraus, LLP

20060282703 - Electronic apparatus and control method thereof: An electronic apparatus to receive AC power from an external source includes a switch to control the AC power, and a controller to control the switch to cut off the AC power if a voltage level of the AC power exceeds a level of a predetermined upper limit voltage. Accordingly,... Agent: Stanzione & Kim, LLP

20060282704 - Consumer network diagnostic agent: A software tool and method are provided which allow an unsophisticated user to easily determine or identify problems in a networked computer system. The software tool comprises a diagnostic component adapted to determine at least one attribute associated with the computer system, and a user interface component adapted to launch... Agent: Amin. Turocy & Calvin, LLP

20060282705 - Method and apparatus for proactive fault monitoring in interconnects: A system that detects the onset of degradation for interconnections in a component within a computer system. During operation, the system monitors inferential variables associated with the interconnections during operation of the computer system. Next, the system determines a present state of the component from the monitored inferential variables. The... Agent: Sun Microsystems Inc. C/o Park, Vaughan & Fleming LLP

20060282706 - Program counter range comparator with equality, greater than, less than and non-equal detection modes: An program counter address comparator includes two comparators comparing an input program counter address with respective reference addresses. The comparators produce a match indication on selectable criteria, such as greater than, less than, equal to, not equal to, less than or equal to, and greater than or equal to, and... Agent: Texas Instruments Incorporated

20060282707 - Multiprocessor breakpoint: Techniques that may be utilized in a multiprocessor system are described. In one embodiment, one or more signals are generated to indicate that a breakpoint instruction is executed by one of the plurality of processors in the multiprocessor system.... Agent: Caven & Aghevli C/o Portfolioip

20060282708 - System and method for detecting faults in a system: To determine the cause of a problem, evaluating and tracing how an individual request traverses through various components in the system makes possible new detection techniques. The present invention relates to detecting faults in a computer system. In accordance with an embodiment of the invention, a method and apparatus detects... Agent: Nec Laboratories America, Inc.

20060282709 - Hard disk drive condition reporting and error correction: A system that facilitates maintaining hard disk drive performance comprises a memory component that includes extensions to at least one protocol associated with a hard disk drive, the extensions enable communications to occur in real-time between an operating system and the hard disk drive. An interface component utilizes the extensions... Agent: Amin. Turocy & Calvin, LLP

20060282710 - Event-generating instructions: An information carrier medium containing debugging software that, when executed by a processor, causes the processor to generate an event signal and an event code and provide the event signal and the event code to an event detection logic coupled to the processor. The event detection logic is adapted to... Agent: Texas Instruments Incorporated

20060282711 - Recovering a hardware module from a malfunction: The invention relates to a recovery of a hardware module of an electronic device from a malfunction state. The hardware module is connected via a signal line to a recovery component of the device, a state of the signal line being controlled by the hardware module. The recovery component monitors... Agent: Ware Fressola Van Der Sluys & Adolphson, LLP

20060282714 - Controllable delay device: Two delay chains having in each case n series-connected unidirectional delay elements are provided for controllably delaying electrical signals between a circuit input and at least one circuit output. Each delay element is an active circuit with a fixed transit time. The input of the first delay element of the... Agent: Patterson & Sheridan, LLP Gero Mcclellan / Infineon Technologies

20060282713 - Efficient interleaver/de-interleaver desigh for the turbo decoder in a 3g wcdma system: A device, such as an interleaver, a de-interleaver, or other devices, for interleaving or de-interleaving a signal within a wireless communication system. The device may interleave or de-interleave the signal spontaneously using a pseudo-random logic. Interleaving or de-interleaving the signal spontaneously may enable one or more features of the device... Agent: William J. Kolegraff

20060282712 - Low complexity pseudo-random interleaver: An interleaver has an input multiplexer that receives a data sequence at an interleaver input and that separates the data sequence into multiple data sub-blocks. The interleaver has a linear feedback shift register that generates an input address sequence. The interleaver has adder circuits that generate output address sequences associated... Agent: Seagate Technology LLC C/o Westman Champlin & Kelly, P.A.

20060282715 - Signal generation: The invention relates to a signal generator for generating a sequence of digital values according to a reference clock signal, comprising at least one input terminal for receiving a an increment signal and an offset signal, a start value circuit adapted for determining a counter start value on the base... Agent: Perman & Green

20060282716 - Redundant storage of computer data: Redundant storage of computer data including encoding N data values through M linear expressions into M encoded data values and storing each encoded data value separately on one of M redundant storage devices where M is greater than N and none of the linear expressions is linearly dependent upon any... Agent: International Corp (blf)

20060282717 - Memory device: A memory device used attach to a host system includes a nonvolatile memory including a plurality of blocks, each of the blocks being a unit for data erasure and including a plurality of pages, each of the pages including a data section which stores first data supplied from the host... Agent: C. Irvin Mcclelland Oblon, Spivak, Mcclelland, Maier & Neustadt, P.C.

20060282720 - Method for the automatic provision of repair position data of fuse elements in integrated memory circuit: Methods and systems for the determination of the function and of the position information of fuses from a schematic and/or a network list and a layout. A repair process is aided with this position information.... Agent: Patterson & Sheridan, LLP Gero Mcclellan / Infineon Technologies

20060282718 - Test mode for programming rate and precharge time for dram activate-precharge cycle: A programmable activate-precharge cycle are provided for a DRAM device. Activate and precharge signals associated with the activate-precharge cycle are generated on the basis of the programmed rate and precharge time with respect to an internal clock of the DRAM device. The activate and precharge signals are coupled to wordlines... Agent: Edell, Shapiro & Finnan, LLC

20060282719 - Unique addressable memory data path: Instead of using point to point connections between the memory and the memory test controller, a unique address is assigned to each memory element. The memory elements and the single memory test controller are interconnected by a hierarchal datapath both for the memory addresses and for the resultant data being... Agent: Texas Instruments Incorporated

20060282725 - Electronic switching circuit, switching circuit test arrangement and method for determining the operativiness of an electronic switching circuit: The invention relates to an electronic switching circuit in which a plurality of test circuit blocks is provided, whereby every test circuit block comprises a first sub-circuit block and at least one second sub-circuit block. A field effect transistor in the first sub-circuit block has a gate insulation layer that... Agent: Brinks Hofer Gilson & Lione

20060282722 - Loop-back memory-module extender card for self-testing fully-buffered memory modules: A loop-back extender card is plugged into a memory module socket on a personal computer (PC) motherboard. The extender card has a test socket that receives a memory module under test. An Advanced Memory Buffer (AMB) on the memory module fully buffers DRAM chips on the memory module. The AMB... Agent: Stuart T Auvinen

20060282724 - Programmatically switched hot-plug pci slots: Electrically decoupling circuit boards, such as PCI cards, from a backplane bus without physically removing the circuit boards from backplane connectors is disclosed. A microprocessor controls the state of electrically controlled switches that control the application of power to the power terminals of backplane connectors. Optionally, manually operated switches also... Agent: Christensen, O'connor, Johnson, Kindness, PLLC

20060282726 - Semiconductor device, and apparatus and method for supporting design of semiconductor device: A semiconductor device includes a logic circuit section having a plurality of logic circuits and configured to achieve a predetermined logical function; and a probing circuit connected with the logic circuit section. The probing circuit is not related to the predetermined logical function and comprises a diffusion layer used in... Agent: Sughrue Mion, PLLC

20060282721 - Semiconductor integrated circuit, and semiconductor system including that semiconductor integrated circuit: For detecting a failure of a logic circuit 11 provided in a semiconductor integrated circuit due to deterioration with age, or the like, there is provided a reference-producing circuit 12 using a logic different from the logic of the logic circuit 11. The reference-producing circuit 12 produces an abnormal/normal determination... Agent: Panasonic Patent Center C/o Mcdermott Will & Emery LLP

20060282723 - Topology-independent calibration system: A topology-independent calibration system (“TICS”) within a test system is disclosed. The TICS may include a netlist, a path correction module, and a processor in signal communication with the path correction module.... Agent: Agilent Technologies, Inc. Legal Department, Dl 429

20060282728 - Methods for using checksums in x-tolerant test response compaction in scan-based testing of integrated circuits: Methods for designing and using checksums in X-tolerant test response compaction in scan-based testing of integrated circuits. Flip-flops of a chip are treated as points of a discrete geometrical structure described in terms of points and lines (e.g., a two-dimensional structure, or the like). Each point represents a MUXed flip-flop... Agent: Lsi Logic Corporation

20060282729 - Pipelined scan structures for testing embedded cores: A scan testing technique in which test data is pipelined to scan logic within an integrated circuit. In system on a programmable chip (SOPC) designs, pipelines are easily built in the programmable logic device (PLD) logic by configuring programmable interconnects to connect registers in a pipelined manner so that test... Agent: Beyer Weaver & Thomas, LLP

20060282727 - Scan test design method, scan test circuit, scan test circuit insertion cad program, large-scale integrated circuit and mobile digital equipment: In scan test circuit design, a plurality of flipflop circuits (102a, 102b or 102c) driven with each of final-stage elements 101f of a clock tree T are connected in series, to form a sub-scan chain. Also, sub-scan chains smallest in the relative difference in the number of stages of delay... Agent: Panasonic Patent Center C/o Mcdermott Will & Emery LLP

20060282730 - Semiconductor integrated circuit incorporating test configuration and test method for the same: An object of the invention is to drastically reduce the area overhead in a semiconductor integrated circuit incorporating a test configuration that uses a partially rotational scan circuit. To achieve this, in the semiconductor integrated circuit incorporating the test configuration that comprises a combinational circuit (3) and a scan chain... Agent: Staas & Halsey LLP

20060282731 - Semiconductor integrated circuit and method of testing same: A semiconductor integrated circuit includes an MISR (Multiple-Input Signature Register) for generating and storing compressed code based upon code from a ROM, and for reading out and outputting the compressed data that has been stored. The MISR has a clock change-over unit for changing over a clock in such a... Agent: Mcginn Intellectual Property Law Group, PLLC

20060282732 - Multi-test method for using compare misr: Systems and methods for performing logic built-in-self-tests (LBISTs) where data comparisons are performed in the MISR. In one embodiment, a STUMPS-type LBIST architecture includes scan chains interposed between portions of the functional logic of the logic circuit. Test bit patterns are scanned into the scan chains, propagated through the functional... Agent: Law Offices Of Mark L. Berrier

20060282733 - Method and apparatus for processor emulation: An emulator for emulating operations of data processing circuitry normally connected to and cooperable with a peripheral circuit includes serial scanning circuitry connectable to the peripheral circuit. The serial scanning circuitry provides to and receives from the peripheral circuit signals which would normally be provided and received by the data... Agent: Texas Instruments Incorporated

20060282735 - Fasttest module: In a method and system for testing a device, a tester provides a first plurality of test signals to the device. A test module includes a plurality of logic circuits operable to concurrently execute a plurality of test programs. The concurrent execution of the plurality of test programs generates a... Agent: Texas Instruments Incorporated

20060282734 - Test access control for secure integrated circuits: Test access to an integrated circuit 2 is controlled by the use of test access enabling keys. A plurality of different test access enabling levels may be supported corresponding to different keys. The test access control may be performed by dedicated hardware or software executing a secure privilege mode.... Agent: Nixon & Vanderhye, PC

20060282736 - Test device with test parameter adaptation: A test device for testing a device under test, wherein the test device is adapted for providing a connection to a central controller, the test device comprising a first interface for receiving a test procedure activation signal from the central controller, and a processor for performing a test procedure on... Agent: Paul D. Greeley Ohlandt, Greeley, Ruggiero & Perle, L.L.P.

20060282737 - Decoder architecture for optimized error management in streaming multimedia: A method and apparatus for multi-layer integration for use in error recovery is disclosed. An error is detected in a multimedia data based on a first layer protocol and the detected error in the multimedia data is concealed based on a second layer protocol. In one aspect, the error in... Agent: Qualcomm Incorporated

20060282739 - Automatic repeat request (arq) protocol having multiple complementary feedback mechanisms: Methods for efficiently controlling the retransmission of data units in a wireless telecommunication system, wherein multiple complementary feedback mechanisms are used to control retransmission. A receiver attempts to decode each received data unit. If a data unit is successfully decoded, the receiver transmits positive feedback to the transmitter; if a... Agent: Ericsson Inc.

20060282738 - Method of providing multimedia messaging service using unique message identifier: The present invention relates to a method of providing a multimedia messaging service, which guarantees the uniqueness of a transmitted multimedia message. In the multimedia messaging method using a mobile communication network of the present invention, a multimedia message transmitted from an originating mobile station is stored. A receiving mobile... Agent: Ratnerprestia

20060282740 - Method, apparatus and computer program providing multi-carrier acknowledgment channel: A method includes generating a plurality of ACK channels, spreading each of the plurality of ACK channels with a separate one of a plurality of Walsh cover codes, combining each of the plurality of ACK channels, and applying a Walsh cover code to the combined plurality of ACK channels.... Agent: Harrington & Smith, LLP

20060282742 - 2d-normalized min-sum decoding for ecc codes: A method for decoding error-correcting codes normalizes messages generated by a bit node processor, and normalizes messages generated by the check node processor.... Agent: Mitsubishi Electric Research Laboratories, Inc. Patent Department

20060282743 - Instructions for performing modulo-2 multiplication and bit reflection: A technique to perform carry-less multiplication and bit reflection operations. More specifically, embodiments of the invention include an instruction to perform carry-less multiplication and an instruction to perform a bit reflection operation.... Agent: Blakely Sokoloff Taylor & Zafman

20060282746 - Method and apparatus for accessing data stored on an optical disc: The present invention provides an apparatus for accessing data stored on an optical disc. The apparatus includes a PI decoding module, a storage unit, and a PO decoding module. The PI decoding module is utilized for PI decoding and correcting the digital data read from the optical disc to generate... Agent: North America Intellectual Property Corporation

20060282741 - Method to secure an electronic assembly executing any algorithm against attacks by error introduction: The invention concerns an automatic method to secure an electronic calculation assembly against attacks by error introduction or by radiation. The following are used: 1) Static information generated by the automatic process; 2) A dynamic part of the memory of the electronic system allocated by the automatic process; 3) Beacons... Agent: Anderson & Jansson L.L.P.

20060282745 - Soft error protection in individual memory devices: Techniques are disclosed for minimizing the effects of soft errors associated with memory devices that are individually accessible. By way of example, a method of organizing a column in a memory array of a memory device protected by an error correction code comprises the step of maximizing a distance of... Agent: Ryan, Mason & Lewis, LLP

20060282744 - Technique for performing cyclic redundancy code error detection: A technique to perform carry-less multiplication and bit reflection operations. More specifically, embodiments of the invention include a technique to perform cyclic redundancy code (CRC) generation.... Agent: Blakely Sokoloff Taylor & Zafman

20060282747 - Ecc flag for testing on-chip error correction circuit: The present invention includes an error correction circuit with a data memory, a control circuit, a parity memory, and a recorder. The data memory is configured to receive and store a set of data. The control circuit is configured to receive the set of data and to generate parity bits... Agent: Dicke, Billig & Czaja, P.l.l.c.

20060282749 - Erasure generation in a forward-error-correcting communication system: A first data packet is received within an integrated circuit device and stored within a first memory thereof starting at a first address that is determined by the size of one or more previously received data packets. An error descriptor value is updated within a second memory of the integrated... Agent: Shemwell Mahamedi LLP

20060282750 - Interfacing device and communication control method: Disclosed is a system including a plurality of node devices connected to a network, in which in the node device, each transmit a packet for transferring noise information so that any of the node devices on the network is able to grasp the noise information. The signal level of a... Agent: Young & Thompson

20060282748 - System and method for transmitting audio or video data using multiple levels of protection: A data transmission and distribution system includes a series of payloads, where each of the payloads is formed from bits of audio or video information, and where different levels of protection are applied to different sets of bits in each payload. The system divides the bits associated with each payload... Agent: Pepper Hamilton LLP 50th Floor

20060282751 - Fault tolerant memory system: A method and apparatus for managing X4 or larger types of memory first receives a data word to be stored in the memory, and then generates a check datum, which is a function of the data word and a set of encode data. After storing the data word in memory,... Agent: Bromberg & Sunstein LLP

20060282752 - Memory address generating apparatus, processor having the same, and memory address generating method: A memory address generating apparatus comprising an address converting circuit, after setting a first setting region storing substitution source data and a second setting region storing substitution destination data that are a substitution target of the substitution source data in an address space provided by the memory, if a specified... Agent: Fish & Richardson P.C.

20060282753 - Second stage sova detector: A second stage SOVA detector comprises a dynamic state reordering block with inputs that receive absolute state domain data from a first stage SOVA detector. The second stage SOVA detector provides relative state domain data outputs and selection bit outputs. The second stage SOVA detector comprises pipeline registers. The pipeline... Agent: Seagate Technology LLC C/o Westman Champlin & Kelly, P.A.

20060282754 - Device, data sector, method of processing data, and signal-bearing medium embodying program of device: A device for processing data read from a memory, the data including a word and a parity element with respect to the word, the device including a data recovery circuit that corrects error data in the word using a correction code generated from the parity element.... Agent: Mcginn Intellectual Property Law Group, PLLC

20060282756 - Device and method for determining a position of a bit error in a bit sequence: In a device for determining a position of a bit error in a bit sequence, a check matrix is used which has a predefined number of rows and a predefined number of columns. The check matrix includes a plurality of square submatrices having a submatrix row number and a submatrix... Agent: Dickstein Shapiro LLP

20060282757 - On-the fly error checking and correction codec system and method for supporting non-volatile memory: An on-the-fly error checking and correcting system and method of supporting a non-volatile memory processes data using an on-the-fly error correction method to be performed between a temporary memory and a flash memory. The flash memory stores actual data read from the temporary memory and parity generated on-the-fly in a... Agent: Lee & Morse, P.C.

20060282755 - Random access memory having ecc: A memory includes a memory array for storing data, a parity generation and error check circuit configured to receive data from the memory array and detect errors in the data, and error registers configured for storing addresses of failing memory array locations detected by the parity generation and error check... Agent: Dicke, Billig & Czaja, P.l.l.c.

20060277429 - Handling restart attempts for high availability managed resources: Techniques are provided for managing a resource in a High Availability (HA) system. The techniques involve incrementing a count when a particular type of remedial action is performed on a resource, so that the count that reflects how often the particular type of remedial action has been performed for the...

20060277430 - System and method for compiling a memory assembly with redundancy implementation: In one embodiment, a computer-implemented system for compiling a fuse assembly for a memory is disclosed. The claimed embodiment comprises: means for defining a memory group including at least one memory instance, each memory instance being characterized by its memory configuration data; means for determining number of fuses required for...

20060277431 - Real time auto-backup memory system: A real time auto-backup memory system comprises a CPU; a system transmission interface connected to the CPU; a bridge control unit connected to the system transmission interface; a system memory disk connecting port connected to the bridge control unit; a backup memory disk connecting port connected to the bridge control...

20060277432 - Systems and methods for providing a distributed file system incorporating a virtual hot spare: The intelligent distributed file system enables the storing of file data among a plurality of smart storage units which are accessed as a single file system. The intelligent distributed file system utilizes a metadata data structure to track and manage detailed information about each file, including, for example, the device...

20060277433 - Computer having special purpose subsystems and cyber-terror and virus immunity and protection features: A method or system for supporting a computer systems self repair, including the computer executed steps for booting from a first boot device, and booting from a second boot device in response to a signal indicating a need for repair. While booted from the second boot device the computer system...

20060277434 - Memory system with error detection and retry modes of operation: A memory system includes a link having at least one signal line and a controller. The controller includes at least one transmitter coupled to the link to transmit first data, and a first error protection generator coupled to the transmitter. The first error protection generator dynamically adds an error detection...

20060277436 - Apparatus and method for coupling a plurality of test access ports to external test and debug facility: An interface unit is provided in a JTAG test and debug procedure involving a plurality of processor cores. The interface unit includes a TAP unit. A switch unit is coupled to the interface unit and switch units are coupled to each of the plurality of processor/cores. The switch units are...

20060277435 - Mechanism for storing and extracting trace information using internal memory in microcontrollers: It is the object of the present invention to provide a mechanism to store and retrieve trace information in on-chip system memory of microcontrollers. A microcontroller comprises a microprocessor and a memory device accessible through a data bus and an address bus coupled to the microprocessor. The microcontroller includes on-chip...

20060277437 - Command execution controlling apparatus, command execution instructing apparatus and command execution controlling method: The issuance timing of commands received from and transmitted to among a plurality of processing units is controlled efficiently. An execution command storage unit 222 stores execution commands, received from an external command transmitting entity, where a predetermined upper-limit number of execution commands to be stored is set. An execution...

20060277438 - Mechanism for providing program breakpoints in a microcontroller with flash program memory: A microcontroller is disclosed. The microcontroller includes a central processor unit (CPU) and a Flash program memory in communication with the CPU via an instruction bus. The microcontroller includes an on-chip debug (OCD) logic coupled to the CPU. The OCD logic containing logic that detects a zero opcode on an...

20060277439 - Code coverage test selection: A system and method for testing modified code paths without testing unmodified code paths is described. During testing of the baseline build of a program, code coverage data is generated. The code coverage data identifies which test implicates which code path of the baseline build. When a modification of the...

20060277443 - Method and system for acquiring definitions of debug code of a basic input/output system: A method for displaying debug codes of a BIOS includes the steps of: initializing a host electronic system and sending out a debug code corresponding to the initialization of the host electronic system to a debug card; displaying the debug code on an LED-display screen of the debug card; transmitting...

20060277440 - Method, system, and computer program product for light weight memory leak detection: The present invention provides a method, system, and computer program product for light weight memory leak detection. A method in accordance with an embodiment of the present invention comprises: obtaining raw free memory statistics; approximating free memory after garbage collection from the raw free memory statistics; and analyzing the approximated...

20060277442 - Patching a mobile computing device software error: A software error in a mobile computing device is patched in the field when an application executing on the device crashes. The usage pattern of the device determines the type of crash data that is submitted to a crash server. The crash data is compared to registration information to identify...

20060277441 - Unified debug system with multiple user-configurable trace volumes and trace buffers: A unified debug system with multiple user-configurable trace volumes is disclosed, including embodiments as a system, a method, and a computer-readable medium. Embodiments of the present invention provide more robust and flexible solutions for introducing configurable trace volumes to firmware, allowing a user to specify firmware system configurations for trace...

20060277444 - Recordation of error information: Systems and methods are disclosed for recordation of error information. In one embodiment, a system may comprise a data bus and a data bus register that is associated with the data bus and with at least one device. An error record component causes error information to be recorded in the...

20060277445 - Disk array apparatus and method for controlling the same: A disk array apparatus capable of reducing a disk drive fault rate where a time-out failure has occurred is provided. The disk array apparatus includes: a plurality of disk drives; and a control unit for performing data input/output processing of the disk drives in response to a data input/output request...

20060277446 - Centralized monitoring system and method for controlling the same: A centralized monitoring system for managing maintenance information of an image forming apparatus has a database for registering a device identifier to identify a device including an image forming apparatus or a local monitoring apparatus that goes between said image forming apparatus and a server system as master information. The...

20060277448 - Malfunction monitoring method and system: In a method, an interrupt is generated to the processing unit every predetermined period. The predetermined period is shorter than a predetermined timeout period. A watchdog signal is changed in response to each of the generated interrupts. The interrupt generation is disabled, upon the last interrupt being generated over an...

20060277447 - Method of monitoring timeout conditions and device therefor: A maximum timeout time for a communication between devices is determined. A time period is determined for a plurality of time zones based upon the maximum timeout time. A current time zone is updated every time period. A timeout zone for an outstanding transaction is associated with a first time...

20060277449 - Decoding apparatus, decoding method, program-recording medium, program and recording/reproduction apparatus: Disclosed herein is a decoding apparatus for decoding an encoded signal on the basis of a plurality of state-transition trellises having state counts different from each other. The decoding apparatus including: a decoding section for decoding the encoded signal on the basis of a first state-transition trellis; and a mode...

20060277450 - Adaptive radio resource management for wireless local area networks: A method for determining whether a data transmission rate in a wireless communication system is appropriate for current system conditions begins by calculating a frame error rate (FER) for a given period of time and obtaining a current data rate. If the current data rate is greater than a minimum...

20060277451 - Magnetic disk apparatus, preventive maintenance detection method and program therefor: The present invention has been made to obtain a magnetic disk apparatus and the like capable of using a patrol region in the magnetic disk to detect a location in need of maintenance in hardware equipment around the magnetic disk in a separate manner from the disk itself and thereby...