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Error detection/correction and fault detection/recovery inventions 04/06

Recently published patent applications awaiting approval from the USPTO. Recent week's RSS XML file available below.
Listing format for abstract view: USPTO application #, Title, Abstract excerpt,Patent Agent. Listing format for list view: USPTO National Class full category number, title of the patent application.    04/27/2006 > 29 patent applications in 19 patent subcategories.

20060090096 - Concept of zero network element mirroring and disaster restoration process: There is provided a system and method of disaster restoration of service of damaged or destroyed telecommunication network elements. A controller component is configured to select a damaged or destroyed network element after a disaster event. An engine component is configured to establish connectivity to an alternative network element and...

20060090095 - Consistent cluster operational data in a server cluster using a quorum of replicas: A method and system for increasing server cluster availability by requiring at a minimum only one node and a quorum replica set of replica members to form and operate a cluster. Replica members maintain cluster operational data. A cluster operates when one node possesses a majority of replica members, which...

20060090094 - Real-time fail-over recovery for a media area network: A media area network includes a storage system having at least one storage device for storing digitized information. A host bus adapter provides a link between the storage system and a host system that provides overall control of the media area network. Within the host bus adapter, a lower-level port...

20060090093 - Trouble shooting and updating electronic apparatus: An electronic apparatus includes an Ethernet interface for connecting the apparatus to a network; means for assigning an IP address to the apparatus for use by the apparatus to initiate communication with a TCP/IP server in the network having means for diagnosing and/or aligning the electronic appliance; and means for...

20060090097 - Method and system for providing high availability to computer applications: A set of system-level high availability services for computer systems, including a service that functions in general terms like an extension of the operating system. By providing High Availability (HA) at the system-level, modifications to the applications or the operating system kernel are not required....

20060090098 - Proactive data reliability in a power-managed storage system: Methods and systems for maintaining data reliability in a particular disk drive that is powered off in a storage system are disclosed. The methods include checking a power budget to determine that sufficient power is available, powering on the particular disk drive, and checking the particular disk drive to detect...

20060090099 - Seu-tolerant qdi circuits: The invention provides circuits that are tolerant to soft errors, such as a single event upset (SEU). The circuits may have a chain of permitted state changes. Redundant elements, including redundant literals and assignments, are designed and implemented in the circuit. The design is such that a disruption or change...

20060090100 - Functional unit for carrying out logical test cases on a test system interconnected to a unit to be tested and corresponding method: A functional unit for carrying out logical test cases on a test system interconnected to a unit that is to be tested, the functional unit being suitable for being interconnected between the logical test cases and the test system in such a way that the logical test cases are decoupled...

20060090101 - Supervised guard tour tracking systems and methods: The present invention comprises systems and methods for addressing exceptions (i.e., alarms) associated with a guard tour according to a predefined hierarchy. The exception is generated automatically based on data associated with the guard tour, as typically collected by an ETTS. The present invention receives tour data, and based upon...

20060090102 - Circuit module with thermal casing systems and methods: Flexible circuitry is populated with integrated circuitry (ICs) disposed along one or both of major sides. Contacts are distributed along the flexible circuitry to provide connection between the module and an application environment. The populated flexible circuitry is disposed about an edge of a rigid substrate thus placing the integrated...

20060090103 - Critical path profiling of threaded programs: A method and apparatus for critical path profiling of threaded programs that use messaging. An embodiment of a method includes creating a package slip for a message from a first program thread, the package slip containing information regarding the message, placing the package slip on a queue, the package slip...

20060090104 - Adapting rcu for real-time operating system usage: A system and method is provided to support immediate freeing of a designated element from memory. Following a process of designating an element for removal from a data-structure, conditional limitations are used to determine if immediate freeing of the element from memory is available. The conditional limitations include determining that...

20060090105 - Built-in self test for read-only memory including a diagnostic mode: A semiconductor circuit comprises a read-only memory (ROM), and a built-in self test (BIST) circuit coupled to the ROM. The BIST circuit is configured to output an entire contents of the ROM....

20060090106 - Generalized bist for multiport memories: A generalized hardware architecture that supports built-in self testing (BIST) for a range of different computer memory configurations and a generalized BIST algorithm can be compiled, based on specified configuration characteristics (e.g., the number of write ports, the number of read ports, the number of entries, and the number of...

20060090108 - Method and apparatus for testing a memory device with compressed data using a single output: A method and apparatus for testing a memory device with compressed data using multiple clock edges is disclosed. In one embodiment of the present invention data is written to cells in a memory device, the cells are read to generate read data, the read data is compressed to generate test...

20060090107 - Semiconductor device: A semiconductor device includes a first memory block having a first address space, a second memory block having a second address space which is smaller than the first address space, and a test circuit which supplies a test address and a test control signal to the first memory block and...

20060090110 - Connecting multiple test access port controllers on a single test access port: Multiple test access port (TAP) controllers on a single chip are accessed, while maintaining the appearance to an outside observer of having only a single test access port controller. By adding a single bit to a data register (212) of each of a plurality of TAP controllers (102, 106), along...

20060090109 - On the fly configuration of electronic device with attachable sub-modules: Electronic device (10) comprising a control unit (11), a plurality of slots (15) for attaching/connecting sub-modules (12, 13), and means (15, 16, 17) for interconnecting the control unit (11) with those sub-modules (12, 13) that are attached/connected to the slots (15). The control unit (11) is capable of issuing commands...

20060090111 - Circuit for recursively calculating data: The invention relates to a circuit for calculating a second data set based on a first data set calculated by at least a calculation device (31) that is capable of calculating a data in a predefined number of clock cycles. The calculation device has an input (311) and an output...

20060090112 - Memory device verification of multiple write operations: Verification operations are utilized to effectively verify multiple associated write operations. A verification operation may be initiated after the issuance of a plurality of write operations that initiate the storage of data to a memory storage device, and may be configured to verify only a subset of the data written...

20060090113 - Design for test of analog module systems: An apparatus for testing an integrated circuit that includes analog nodes is disclosed. In one aspect, an integrated circuit comprises testing circuitry and core logic circuitry. A memory in the testing circuitry stores data identifying analog nodes in the core logic circuitry and tolerance values associated with the analog nodes....

20060090114 - Data processing apparatus and method: There is described a process for generating a number representative of an analogue data source in which during enrolment a distinctive characteristic of the analogue data source is measured to obtain physical data. Part of the physical data is used to generate a physical value which is representative of the...

20060090115 - Data reproducing controller: A data reproducing controller for operating a device for reproducing data at a high speed, which is recorded on a disc and includes an error correction code. A PI correction circuit performs an error correction process on a PI and causes a completion signal to go high whenever processing of...

20060090116 - End-to-end data integrity protection for pci-express based input/output adapter: Method, system and computer program product for protecting the integrity of data transferred between an input/output bus of a data processing system and an external network. A method for protecting the integrity of data transferred between an input/output bus and a network includes generating a Cyclic Redundancy Check (CRC) value...

20060090117 - Method and related apparatus for data error checking: A method for data error checking includes accessing a plurality of sets of data, each of the sets of data having a plurality of bits; integrating the plurality of sets of data into integral data; generating error checking data according to the integral data, the error checking data being changed...

20060090118 - Coding a data stream with unequal error protection: A method adapted to detect the activity of individual partitions within a packetised frame is disclosed. The method provides for the encoding of those portions of the data stream having higher activity more than those portions having less activity. This enables error protection differentiation depending on the importance of the...

20060090119 - System and method for implementing a reed solomon multiplication section from exclusive-or logic: Various methods and systems for implementing Reed Solomon multiplication sections from exclusive-OR (XOR) logic are disclosed. For example, a system includes a Reed Solomon multiplication section, which includes XOR-based logic. The XOR-based logic includes an input, an output, and one or more XOR gates. A symbol X is received at...

20060090120 - Puncturing/depuncturing using compressed differential puncturing pattern: Differential puncture patterns are used for puncturing and de-puncturing codewords transmitted over a communication channel. The puncture pattern comprises a series of successive differential indices or offsets corresponding to differences between successive bit indices in an absolute bit index sequence. The differential puncture patterns are used at the transmitter to...

20060090121 - Trellis-based receiver: Receivers (1) for receiving encoded block signals and comprising processor systems (2) decode block signals by using Viterbi algorithms for finding a first candidate/path in a trellis (18) and by generating cost signals for finding further candidates/paths in said trellis (18). To reduce storage capacity, cost signals are combined for...

  
04/20/2006 > 68 patent applications in 41 patent subcategories.

20060085664 - Component-based application constructing method: Reliability is evaluated in constructing a component based-on application and an application for realizing reliability required can be constructed efficiently. A run-time history such as an occurrence frequency of errors, a recovery time required at error occurrence, and a processing capacity at preventive maintenance is added per software component to...

20060085663 - Method for keeping snapshot image in a storage system: A technique for realizing a snapshot function is provided, which can reduce data transfer between a server system and a storage subsystem which is necessary in data copy in storages and reduce the degradation of data access performance of the storage in operation. In a storage system, a command processed...

20060085665 - Error recovery for input/output operations: Method, system, and apparatus for executing input/output operations. The method including selecting a level of error recovery for input/output operations, receiving a request to execute the input/ output operation, attempting the input/output operation, and when the input/output operation fails, performing the level of error recovery specified. The selection of the...

20060085666 - Method, system and article of manufacture for system recovery: Provided are a method, system, and article of manufacture for system recovery. An operating system and a backup copy of the operating system are both maintained in a partition of a computational device. A boot loader receives an indication to load the backup copy of the operating system. The boot...

20060085667 - Access log analyzer and access log analyzing method: An access log analyzer extracts significant information from an enormous amount of data of access logs of a Web server so as to appropriately display the result of analysis. The access log analyzer includes an FTP module for acquiring a log from a server to be analyzed, a pre-formatting module...

20060085668 - Method and apparatus for configuring, monitoring and/or managing resource groups: In one embodiment, methods and apparatus for configuring and/or monitoring a virtual machine in a resource group. In another embodiment, a method and apparatus for configuring and/or monitoring a resource group in accordance with a relocation policy that authorizes relocation of a resource from one cluster to another. In a...

20060085669 - System and method for supporting automatic protection switching between multiple node pairs using common agent architecture: An apparatus and method for a computer system is used for implementing an extended distributed recovery block fault tolerance scheme. The computer system includes a supervisory node, an active node and a standby node. Each of the nodes has a primary routine, an alternate routine and an acceptance test for...

20060085671 - Error indication in a raid memory system: A computer system includes a plurality of memory modules that contain semiconductor memory, such as DIMMs. The system includes a host/data controller that utilizes an XOR engine to store data and parity information in a striped fashion on the plurality of memory modules to create a redundant array of industry...

20060085670 - Method and system for reducing memory faults while running an operating system: Method and system for reducing memory faults for computer systems. In one aspect, a notification is received that indicates that a single bit error has been detected in a portion of memory of the computer system. A service program is used to isolate the portion of the memory that includes...

20060085673 - Computer system, storage apparatus and storage management method: In accordance with a request from a data conversion batch execution portion 140, a storage management portion 130 creates the secondary volume based on information of an extended volume management table 132 by using a secondary VOL creation portion 110 of a storage apparatus 100 and notifies to a data...

20060085672 - Method and program for creating determinate backup data in a database backup system: The invention provides an application technique of a backup data in which a backup data can be utilized by creating a backup data including no indeterminate data in a backup system. In a backup system including a primary system and a backup system, the method of creating the backup data...

20060085674 - Method and system for storing data: The present invention relates to methods for storing data and relates to a method for storing a plurality of stripes across a plurality of disks; wherein each stripe is comprised of a plurality of segments, wherein each segment is comprised of a first data chunk, a second data chunk, and...

20060085675 - One-touch backup system: Techniques are disclosed for backing up or restoring the state of a mobile computing device in response to a single action performed by a user. A user may, for example, insert the mobile computing device into a cradle and press a “backup” button on the cradle or device, in response...

20060085676 - Image processor and method for controlling same: An image forming device includes a table for storing link service function information that indicates a function necessary for providing the link service among functions installed in a computer for each link service, a computer status check portion for checking a function of the computer that is available at present,...

20060085677 - Method and apparatus for seeding differences in lock-stepped processors: An apparatus, and a corresponding method, are used for seeding differences in lock stepped processors, the apparatus implemented on two or more processors operating in a lock step mode. Each of the two or more processors comprise a processor-specific resource operable to seed the differences, a processor logic to execute...

20060085678 - Distributed computing: According to one embodiment of the present invention, there is provided a method of establishing a communication path between a plurality of software elements in a distributed computing system, the elements being operable for communicating using a first communication mode, and wherein at least some of the software elements are...

20060085679 - Method and system for providing transparent incremental and multiprocess checkpointing to computer applications: Incremental single and multiprocess checkpointing and restoration is described, which is transparent in that the application program need not be modified, re-compiled, or re-linked to gain the benefits of the invention. The processes subject to checkpointing can be either single or multi-threaded. The method includes incremental page-boundary checkpointing, as well...

20060085680 - Network monitoring method and apparatus: A network monitoring method and system reduces a load to a monitoring network without deteriorating accuracy of detecting a malfunction. A plurality of network constituent elements that constitute a communication network are connected to an operation system through a monitoring network. A health check for detecting a malfunction is periodically...

20060085681 - Automatic model-based testing: Automatic model-based testing is disclosed, including receiving a set of objects associated with a computer program application under test; automatically classifying the objects as state objects representing states of the application, or transition objects representing transitions in the application from one state to another state, or static information objects; linking...

20060085683 - System and method for managing computer networks: The present invention provides a system for managing a complex, the system comprising a discovery and monitoring subsystem for determining an operational model of the complex; a reference model store subsystem for storing and retrieving one or more reference models; a reference model transcription subsystem for providing a reference model...

20060085682 - Test simulator, test simulation program and recording medium: There is provided a test simulator simulating a test of a semiconductor device, which includes: a test pattern holding means for holding an existing test pattern to be supplied to the semiconductor device; a device output holding means for previously holding an output to be obtained from the semiconductor device...

20060085684 - System and method for providing mutual breakpoint capabilities in a computing device: A system having at least one breakpoint generating module and a core processor and method for providing mutual breakpoint capabilities to at least one breakpoint generating module and a core processor in a computing device. Each breakpoint generating module is capable of generating a first breakpoint message for allowing operation...

20060085685 - System and method for computer system rejuvenation: A system and method that rejuvenates a computer system is provided. The user uses the computer system that includes an operating system and applications for a first period of time creating data files and applying patches to the operating system and applications. An image is created of the primary drive...

20060085686 - System and method for institutional computer restoration: A system and method that restores a computer system is provided. An image is created of a primary drive that includes an operating system and one or more applications. A copy of the image is stored on a second nonvolatile storage area. In one embodiment, the second nonvolatile storage area...

20060085687 - System and method to locate and correct software errors within a protocol stack for wireless devices: The present invention provides a method to test a protocol stack operable to be loaded to a wireless terminal. This involves the creation of simulation scripts from prior test case logs associated with a prior test case executed on a physical wireless terminal. When the prior test case is failed...

20060085688 - Trace controller, microprocessor, and trace control method: A trace controller receives data access information during load instruction execution and ID (AID) of a load/store buffer to store the data access information during load instruction execution. Then, it generates trace control information TC based on the received data access information and selects a buffer to store the generated...

20060085691 - Method and apparatus for logging the execution history of an operating system kernel: Disclosed herein are a method and apparatus for logging the execution history of an operating system kernel by including an event description in a production image of the kernel. A command is received in order to enable an event description. The event description is enabled according to the command while...

20060085690 - Method to chain events in a system event log: A method and system for recording hardware and software events of a computer system. An event logger, typically part of system management software, records both primary event records and secondary event records. Secondary event records are used when the data space in a primary event record is insufficient to adequately...

20060085689 - Model based diagnosis and repair for event logs: A system and appertaining method isolates a hardware or user error in a software controlled apparatus e.g., an NMR-apparatus. A diagnostic function is added to an event log that uses a causality model to analyze the event log. A series of events in the event log is evaluated by comparing...

20060085692 - Bus fault detection and isolation: A bus fault detection and isolation system and method is disclosed that can operate non-intrusively to detect and isolate faults in a bus, such as a dual redundant MIL STD 1553 bus. The system and method of the present invention can be configured to operate within a bus controller using...

20060085693 - System and method for generating a chronic circuit report for use in proactive maintenance of a communication network: A method for generating a chronic circuit report for use in maintaining a communication network is provided. The method comprises the steps of searching a database for information regarding circuit exceptions reported in a communication system, compiling a listing of circuits and circuit exception information, prioritizing the listing of the...

20060085694 - Communication apparatus: In a communication apparatus performing communication using IP packets, a diagnostic frame terminator terminates a series of latest status information of diagnosed devices recorded in a diagnostic frame every time the diagnostic frame sequentially passes through a series of diagnosed devices connected in cascade; a content addressable memory preliminarily stores...

20060085696 - Monitoring unit for monitoring and automatic clearance of faults in medical applications: Monitoring unit for monitoring and automatic clearance of faults in medical applications The invention in particular relates to a method, a device and a system for monitoring a plurality of applications, in particular of medical technology applications, in a network, with a monitoring unit and the central task of this...

20060085695 - Use of incarnation number for resource state cycling: In a server cluster, a system and method is provided for mitigating redundant resource failure notifications and other problems resulting from late handling of messages. Traditional resource management can result in the generation of redundant resource failure notifications that trigger unnecessary recovery actions, or cause other cluster problems such as...

20060085697 - Image forming apparatus transferring log information: An image forming apparatus for performing a process relating to forming of an image includes a log management unit to manage generated log information, and a log transfer unit to transfer log information of a type specified in log transfer information among the log information managed by the log management...

20060085698 - Synchronization mechanism for tools that drive ui-based applications: Various new and non-obvious apparatus and methods for synchronizing a request to perform a target action on a user interface element within a user emulation test program are disclosed. The disclosed exemplary apparatus and methods should not be construed as limiting in any way. One of the disclosed embodiments is...

20060085699 - Apparatus, system, and method for facilitating port testing of a multi-port host adapter: An apparatus, system, and method are provided for facilitating port testing of a multi-port host adapter. The present invention includes a scheduler that schedules execution of a plurality of threads to test a first port and a plurality of threads to test a second port of a multi-port adapter. The...

20060085700 - Decoder based set associative repair cache systems and methods: The present invention facilitates memory devices and operation thereof by employing a repair cache system 600 to correct or repair identified faulty memory locations. The repair cache system 600 includes a decoder that selects local repair location addresses from repair sets 610 according to a repair region address 604. Comparators...

20060085702 - Integrated circuit fuses having corresponding storage circuitry: Storage circuitry (66) may be used to store the values of fuses (77) so that storage circuitry (66) can be read instead of fuses (77). By accessing the fuse values from storage circuitry (66) rather than from fuses (77), there will be no sense current to fuses (77) that may...

20060085703 - Memory cell test circuit for use in semiconductor memory device and its method: A memory cell test circuit for use in a semiconductor memory device having a plurality of banks connected to a plurality of global input/output lines, including: a plurality of bank switching units for transferring data outputted from the plurality of banks to the plurality of global input/output lines based on...

20060085705 - Memory circuit comprising an initialization unit, and method for optimizing data reception parameters in a memory controller: The invention relates to a memory circuit comprising a read only memory unit for providing a number of fixed programmed test data; comprising an initialization unit in order, in an initialization mode, to output the fixed programmed test data in a specific sequence to an output terminal....

20060085701 - Method and apparatus for separating native, functional and test configurations of memory: A method for allowing native, functional, and test configurations of a memory to be independent of one another includes steps as follows. A memory is first provided. The memory has a native configuration including k words and n data output pins, k and n being positive integers. Each of the...

20060085704 - Semi-conductor component, as well as a process for the reading of test data: m

20060085706 - High speed on chip testing: A selectively enabled clock doubler. An XOR gate receives a first signal on a first input and a second signal on a second input, and provides a third signal on an output. The first signal is a clock signal having a first frequency. A delay circuit receives the clock signal...

20060085709 - Flip flop circuit & same with scan function: A pulse-based flip flop, which outputs a scan input signal and a data signal, may include: a pulse generator to generate a pulse signal for coordinating operation of the flip flop; a multiplexer to receive the data signal, the scan input signal, and a scan enable signal, and to selectively...

20060085707 - High speed energy conserving scan architecture: A system comprising a tester and an integrated circuit, where the integrated circuit comprises a flip-flop, the flip-flop coupled to the tester and a circuit logic. The flip-flop comprises a scan input signal and a scan output signal, the signals coupled to the tester. The flip-flop also comprises multiple clock...

20060085708 - Transition fault detection register with extended shift mode: An apparatus includes a register of an integrated circuit for shifting a scan test pattern in response to a scan enable signal. The register includes: a shift input for receiving the scan test pattern; a system logic input for receiving a system logic signal; a clock input for receiving a...

20060085710 - Testing memories: Methods and apparatus to test memories, such as, for example, caches of processors, are disclosed. In one aspect, an apparatus may include a pseudo random address generation unit, such as, for example, including a linear feedback shift register, to generate pseudo random memory addresses, and a deterministic data generation unit,...

20060085711 - Memory test circuit and method: To test memories operating with different operational clocks and deal with a delay involved in testing a memory at a physically remote location. A memory test circuit of the present invention tests a processor core memory and a function-specific core memory with a processor core, and includes a clock selector...

20060085712 - Program, test apparatus and testing method: A recording medium, on which a program is recorded to operate a testing apparatus for testing an electronic device, is provided, wherein the program makes the testing apparatus perform functions as a comparing unit for comparing the output signal from the electronic device with an expected value signal to be...

20060085713 - Apparatus, method, and signal-bearing medium embodying a program for verifying logic circuit design: A method and a signal-bearing medium embodying a program for a logic circuit design verification apparatus which includes a dynamic verification device that verifies a logic circuit executing a logic simulation, a static verification device that verifies the logic circuit executing a property verification, and a determination device that determines...

20060085714 - Method and circuit for measuring capacitance and capacitance mismatch: A circuit and method for measuring capacitance and capacitance mismatch of at least one capacitor pair are provided. The circuit comprises a first switch, a second switch, a third switch and a P-type transistor. A terminal of the first switch is connected to a terminal of a first capacitor, and...

20060085715 - Test board of semiconductor tester having modified input/output printed circuit pattern and testing method using the same: A test board for a semiconductor device tester having a modified input/output printed circuit pattern and a testing method using the same are provided. In an embodiment, a modified input/output printed circuit pattern is formed and controlled by a test program, wherein the modified input/output printed circuit pattern is divided...

20060085716 - Cooperating test triggers: In an embodiment of the invention, a method for providing cooperating triggers, includes: determining if a match criteria for a slave trigger and a match criteria for a primary trigger are met; executing the slave trigger and the primary trigger if the match criteria are met; and waiting for a...

20060085717 - Communications method, communications apparatus and communications system using same communications apparatus: A communications method carries out error-correction encoding of data, generation of a suitable packet in accordance with a retransmission request from a receiving side, and transmission of the packet to the receiving side, from a transmission side. In the receiving side, the communications method performs error-correction decoding of the received...

20060085718 - Interleaved recording of separated error correction encoded information: An error correction code system, e.g. of a magnetic tape drive, applies error correction redundancy to data, separates it, or interleaves it, and records it into separate groups. An error correction encoder applies an outer error correction code to one of the separate groups of information, forming one set of...

20060085719 - Decoding method and device: A decoding device according to the one embodiment of the invention includes: a first decoder performing a first decoding based on first encoded data obtained by encoding unencoded data, and second soft-output data to generate first soft-output data; a second decoder performing a second decoding based on second encoded data...

20060085722 - Data processor: A data processor that reduces the chip area of a semiconductor substrate. The data processor includes a detection circuit for generating an error detection code with digital data. A correction circuit generates an error correction code with the digital data that includes the error detection code. A control circuit controls...

20060085720 - Message passing memory and barrel shifter arrangement in ldpc (low density parity check) decoder supporting multiple ldpc codes: Message passing memory and barrel shifter arrangement in LDPC (Low Density Parity Check) decoder supporting multiple LDPC codes. A novel approach is presented by which a barrel shifter may be implemented in conjunction with a single message passing memory within an LDPC decoder. This arrangement also allows for a single...

20060085721 - Method of detecting error event in codeword reproduced by perpendicular magnetic recording medium and apparatus using the same: Apparatuses and methods for detecting error events in a codeword reproduced by perpendicular magnetic recording medium (PMR. The method includes: generating cyclic redundancy check (CRC) parity bits based on a generator polynomial for a source information sequence to be recorded on PMR medium and recording a codeword in which the...

20060085725 - Data transmission apparatus and method: A data transmission apparatus comprises an estimation device to estimate a transmission condition of the transmission channel in the transmitter based on at least Jitter information or a packet loss rate obtained from the receiver, and a controller to change at least one of a bit rate of transmission data...

20060085724 - Error correction apparatus and method: A system, method and data structure for error correction for use in the transmission of content data distribution networks uses a compressed memory, for example a bitmap, to identify portions of transmitted content data files where transmission errors have occurred. The error memory, is used to generate an error status...

20060085723 - Error tolerant modular testing of services: Methods of error-tolerant modular testing of services are described, wherein an ordered list of test module identifiers is built in an error stack for the purposes of structured state teardown following the occurrence of an error during testing of services (i.e., network or other.) The error that triggers the teardown...

20060085726 - Apparatus and method for decoding reed-solomon code: An apparatus for receiving and decoding a double-coded symbol in a communication system using a double coding scheme for encoding a Reed-Solomon (RS)-coded symbol with a predetermined scheme for communication. In the apparatus, an inner decoder receives a frame formed with the double-coded symbols, and primary-decodes the received frame. An...

20060085727 - Downstream transmitter and cable modem receiver for 1024 qam: A headend transmitter that transmits 1024 QAM including a 256 QAM modulator which has been modified to have more aggressive forward error correction processing. The 256 QAM modulator outputs 256 QAM points to a summer. Another data modulator receives additional data to be transmitted in a separate, substantially less complex...

20060085729 - Decoding apparatus and decoding method: To provide a decoder and decoding method capable of reducing the number of times received data is decoded. A decoder according to the present invention includes: a Viterbi decoder decoding received data; a decode data length storage area storing a decode data length; a decoded data temporary storage area storing...

20060085728 - Map decoding: A method of approximating the generation of a logarithm of a sum of exponents, for use in a log-MAP decoding operation, by performing a first operation on the data, calculating a correction term in a second operation, and adding the correction term to the results of the first operation, in...

20060085730 - Distributed ring control circuits for viterbi traceback: Shift resister rings are used to provide column access in a traceback memory during Viterbi decoding....

  
04/13/2006 > 23 patent applications in 19 patent subcategories.

20060080569 - Fail-over cluster with load-balancing capability: A solution for distributing the workload across the servers (105) in a fail-over cluster (for example, based on the MSCS) is proposed. A fail-over cluster is aimed at providing high availability; for this purpose, a resource service (205) automatically moves each resource (220) that exhibits some sort of failure to...

20060080568 - Failover scopes for nodes of a computer cluster: A failover scope comprises a node collection in a computer cluster. A resource group (e.g., application program) is associated with one or more failover scopes. If a node fails, its hosted resource groups only failover to nodes identified in each resource group's associated failover scope(s), beginning with a first associated...

20060080567 - Grid computing power mode systems and methods: A grid power mode is defined such that, when the PC is in a grid power mode, pressing the power switch of the PC retains power to the system, but restores operation of the PC to the ‘on/off/standby’ mode the user expects. Other aspects include: an indicator telling the user...

20060080570 - Method of recovering reallocation sectors in data storage system and disc drive using the same: A reallocation sector recovering system and method reducing a number of reallocation sectors by selectively recovering reallocation sectors, and a disc drive implementing the same. The reallocation sector recovering method in a data storage system may include determining whether a predetermined processing condition of a reallocation recovering process has been...

20060080571 - Image processor, abnormality reporting method and abnormality reporting program: An image processor, having a control panel with a display function and performing device operation and external access using the control panel, includes a control panel operating status judgment unit which judges whether the operating status of the control panel is a device operation status or an external access status,...

20060080572 - Set associative repair cache systems and methods: The present invention facilitates scaling of memory devices and operation thereof by employing a set associative repair cache system to correct or repair identified faulty memory cells. A repair cache region router 602 compares a repair region portion of a memory address to repair cache regions to identify a matching...

20060080574 - Redundant data storage reconfiguration: In one embodiment, a method of reconfiguring a redundant data storage system is provided. A plurality of data segments are redundantly stored by a first group of storage devices, at least a quorum of storage devices of the first group each storing at least a portion of each data segment...

20060080573 - Redundant power and data over a wired data telecommunications network: A method and apparatus for redundant power and data over a wired data telecommunications network permits power to be received at a local powered device (PD) from remote power sourcing equipment (PSE) via at least one conductor at a first time and power and/or data to be obtained by the...

20060080575 - Hardware-based network packet timestamps: improved network clock synchronization: A method and apparatus for synchronizing a real time clock of a slave computer with a real time clock of a master computer. The method includes the steps of: calculating a first time drift value between the real time clock of the slave computer and the real time clock of...

20060080576 - Test point insertion method: A method for inserting a test point to enable fault detection comprises the steps of: (a) determining whether or not a value-fixed node needs value fixation; (b) determining that an observation test point is to be inserted to a node which is disabled by the node determined to need value...

20060080577 - Jtag interface device of mobile terminal and method thereof: A JTAG interface device capable of effectively debugging a mobile terminal by interfacing the mobile terminal with a JTAG emulator without an additional interface unit by allocating test pins of the JTAG emulator to some pins of a receptacle and then electrically connecting the test pins to the pins, and...

20060080578 - Defect detection for integers: Various techniques can be used to detect programming defects relating to the use of integers. A data structure can be created to represent ordering relationships in software instructions. Such ordering relationships can represent common unsound programmer assumptions. After annotating the data structure, unvalidated ordering relationships can be identified. Validation can...

20060080579 - Bus communication emulation: Provided are a method, system, and program for initializing a processor of a computer system, to enumerate a remote bus and remote devices coupled to the remote bus, as operating components of the computer system. In another embodiment, a controller stores a message containing a directive in a memory shared...

20060080580 - Method and system for detecting a security violation using an error correction code: A system and method for detecting a security violation using an error correction code. Some illustrative embodiments may be a method used in a computing system comprising reading a codeword comprising data and an error correction code (ECC) (the ECC associated with the data), deriving an error location polynomial (ELP)...

20060080581 - Regenerative relay system and regenerative relay apparatus: A regenerative relay method includes the steps of: i) calculating an error rate of a transmission path between the first half apparatus and a main apparatus; ii) calculating an error rate of a transmission path between the main apparatus and the latter apparatus; iii) adding the error rates; iv) selecting...

20060080582 - Semiconductor test management system and method: A system and method thereof for semiconductor test management. A first computer generates a new gating rule and transmits the new gating rule. A second computer receives the new gating rule via a network, acquires a test result, carries the test result into the new gating rule to generate an...

20060080583 - Store scan data in trace arrays for on-board software access: In the present invention, register values are obtained by scanning, and are then written to one or more trace arrays on the chip. The scan data in the trace arrays is then read out by software. The register scan data can be recirculated among the registers, and addition scans can...

20060080584 - Built-in self-test system and method for an integrated circuit: An integrated circuit comprises random logic communicatively coupled to a non-scannable memory array. The integrated circuit also comprises a built-in self-test (BIST) controller adapted to apply test data to the random logic and propagate the test data through the random logic to test the memory array....

20060080585 - Systems and methods for circuit testing using lbist: Systems and methods for performing logic built-in-self-tests (LBISTS) in digital circuits. In one embodiment, the operation of LBIST circuitry is suspended at the end of each test cycle so that the bit patterns generated by the functional logic of the device under test can be examined to determine if any...

20060080586 - Method and system for adaptive interleaving: A method a system for automatically controlling an adaptive interleaver involves monitoring performance parameters of a transmission system and controlling the adaptive interleaver in response to the performance parameters. The SNR and the data rate of the transmission system are preferably determined. The data rate is analyzed and the adaptive...

20060080587 - Error detection using codes targeted to prescribed error types: Techniques are described for detecting error events in codewords detected from data signals transmitted via a communication system. The error events are detected with an error detection code that corresponds to one or more dominant error events for the communication system. The invention develops a class of error detection codes...

20060080588 - Method and system for adaptive interleaving: A method a system for automatically controlling an adaptive interleaver involves monitoring performance parameters of a transmission system and controlling the adaptive interleaver in response to the performance parameters. The SNR and the data rate of the transmission system are preferably determined. The data rate is analyzed and the adaptive...

20060080589 - Memory interface with write buffer and encoder: A method and apparatus are provided for interfacing between a data source and a tightly-coupled memory. In the method and apparatus, a write data word and a write address are received from the data source and latched in a first clock cycle within a write buffer along a write data...

  
04/06/2006 > 49 patent applications in 21 patent subcategories.

20060075273 - Efficient backward recursion for computing posterior probabilities: A method and apparatus are provided that reduce the amount of memory needed to perform forward-backward recursion to identify posterior probabilities. Under the invention, a forward recursion is performed to identify forward recursion scores. The forward recursion scores are then used directly in a backward recursion to determine posterior probabilities...

20060075274 - Method and apparatus for enabling run-time recovery of a failed platform: A method for managing a run-time recovery includes loading a recovery kernel into a processor cache. The recovery kernel is executed in the processor cache. Other embodiments are described and claimed....

20060075275 - Approach for characterizing the dynamic availability behavior of network elements: An approach is provided for characterizing the dynamic availability behavior of network elements using metrics that indicate patterns of availability of a network element over time. The metrics provide an indication of stability and instability of a network element and include one stability metric and three instability metrics. The stability...

20060075277 - Maintaining correct transaction results when transaction management configurations change: The present invention extends to methods, systems, data structures, and computer program products for maintaining correct transaction results when transaction management configurations change. An intermediate transaction manager is transparently interposed between one or more resource managers and a plurality of transaction managers. The intermediate transaction manager multiplexes and intercepts calls...

20060075278 - Method of forming virtual computer cluster within shared computing environment: An embodiment of a method of forming a virtual computer cluster within a shared computing environment begins with a step of placing gatekeeper software on each of a plurality of particular host computers of the shared computing environment. The method continues with a step of assigning computing platforms located on...

20060075276 - Self-monitoring and updating of firmware over a network: Embodiments include monitoring a computing system to determine whether firmware of the computing system is corrupted, hung up, or requires automatic update. The computing system may then request firmware update data over a network. Moreover, the computing system may include a controller with capability to determine whether the firmware is...

20060075279 - Techniques for upstream failure detection and failure recovery: The content provider provides content to the first data center, which then provides the content to the client. The client determines that a failure between content provider and the first data center may have occurred. When the client determines that a failure may have occurred, the client may connect to...

20060075280 - Data integrity verification: In one embodiment, a method is provided. The method of this embodiment may include verifying, at least in part, integrity of first check data and a plurality of data blocks. The first check data may be generated based at least in part upon the plurality of data blocks. The verifying...

20060075287 - Detecting data integrity: Provided are a method, system, and article of manufacture for detecting data integrity. An indicator is written to invalidate a data block that is capable of being stored in a plurality of sectors of a storage device, wherein the indicator is written to the storage device in at least one...

20060075282 - Diagnostic interface architecture for memory device: A diagnostic interface architecture for a memory device supports in one aspect one or more dynamically reconfigurable functional interconnects normally utilized in connection with reading data from the memory device and/or writing data to the memory device. The dynamically reconfigurable functional interconnects are capable of being configured to operate in...

20060075285 - Fault processing for direct memory access address translation: An embodiment of the present invention is a technique to process faults in a direct memory access address translation. A register set stores global control or status information for fault processing of a fault generated by an input/output (I/O) transaction requested by an I/O device. An address translation structure translates...

20060075283 - Method and apparatus for just in time raid spare drive pool management: Spare disk drive management in a storage system. The storage system comprises disk drives and spare disk drives. Spare disk drives are initially kept in power-off state. The storage system detects the failure of a disk drive and selects a spare disk drive to replace the failed disk drive. The...

20060075284 - Method for over-the-air firmware update of nand flash memory based mobile devices: The present invention is a method for receiving, storing, and applying an update package to modify an original image stored within non-volatile flash memory devices. More specifically, the present design provides a download agent responsible for communicating with a server to transfer and store the update package; and an update...

20060075286 - System and method for logging hardware usage data, and uses for such logged hardware usage data: According to at least one embodiment, a system comprises at least one computer system having a Basic Input/Output System (“BIOS”). The system further comprises means for collecting, via the BIOS, data about usage of at least one hardware component of the at least one computer system. According to at least...

20060075281 - Use of application-level context information to detect corrupted data in a storage system: A storage system, such as a file server, receives a request to perform a write operation that affects a data block. In response, the storage system writes to a storage device the data block together with context information which uniquely identifies the write operation with respect to the data block....

20060075289 - Hard disk drive background scrub methodology: A system, method, and computer program product for recovering from data errors. In a SCSI hard drive system, when a unrecoverable data error condition is encountered, the logical block address is reassigned using information provided by the data scrubbing functionality of the SCSI hard drive....

20060075288 - Hard disk drive data scrub methodology: Method, system and computer program product for reporting and recovering from uncorrectable data errors in a data processing system using the Advanced Technology Attachment (ATA) or the Serial ATA (SATA) protocol. The invention utilizes the data scrubbing functionality of SCSI hard drives to provide a higher level of data integrity...

20060075291 - Method and apparatus for controlling recording medium, and computer product: A recording-medium controlling apparatus that performs a read-access and a write-access of a recording medium in response to access request from a higher-level apparatus, detects a read error that occurs at a time of the read access, and performs a replacement processing, includes an error detecting unit that tries a...

20060075290 - System and method for improving the performance of operations requiring parity reads in a storage array system: A system for improving a performance of a write process in an exemplary RAID system reduces a number of IOs required for a short write in a RAID algorithm by using a replicated-parity drive. Parity is stored on the parity portion of the disk drives. A replicated-parity drive comprises all...

20060075292 - Storage system: In addition to setting tasks and maintenance tasks for each portion of a storage apparatus, for which ease of operation is demanded, a storage system enables notification of a monitoring and maintenance terminal, for which high reliability is demanded, of fault information, without detracting from reliability. The functions of a...

20060075295 - Method of debugging \"active\" unit using \"non-intrusive source-level debugger\" on \"standby\" unit of high availability system: A method of debugging an active unit in a computer system having an active unit for routing computer connections and a standby unit configured to route computer connections in the event the active unit fails. The method comprises the standby unit receiving synchronization data from the active unit in the...

20060075293 - Pre-configured backup dvd-rws: Automated computer backup to a DVD. A DVD backup disc contains a backup program that executes upon insertion of the DVD in a computer. The DVD is preconfigured with a computer program having computer executable instructions for determining data to be stored. The DVD also contains instructions for transferring the...

20060075294 - Pre-configured backup dvd-rws: According to the present invention, there is provided a method for reliably storing data in a computer system. The method includes receiving a piece of data to be stored at a storage system. In addition, the method includes writing a first copy of the data to the storage system according...

20060075296 - Method, apparatus and system for data integrity of state retentive elements under low power modes: In some embodiments, a method, apparatus and system for data integrity of state retentive elements under low power modes are generally presented. In this regard, an integrity agent is introduced to generate one or more error checking bits for content within a logic block in response to an indication associated...

20060075298 - System and method for providing mutual breakpoint capabilities in computing device: A system having at least one breakpoint generating module and a core processor and method for providing mutual breakpoint capabilities to at least one breakpoint generating module and a core processor in a computing device. Each breakpoint generating module is capable of generating a first breakpoint message for allowing operation...

20060075297 - Systems and methods for controlling clock signals during scan testing integrated circuits: The present invention is directed to systems and method of controlling clock signals during scan testing integrated circuits. The methods and systems provide efficient at-speed scan testing while minimizing the external pins on an integrated circuit dedicated to scan testing clock sources. A clock control circuit is disclosed that includes...

20060075303 - Automated test case verification that is loosely coupled with respect to automated test case execution: A system and method for verifying the systemic results of an action applied to an application and for providing the expected state of the application at any time or on demand, in which a verification manager determines an expected application state and a current application state of the application, a...

20060075301 - Converting merge buffer system-kill errors to process-kill errors: An apparatus includes a buffer that collects store instruction information associated with one or more processes. The collected store instruction information includes data and addresses where the data are to be stored. The apparatus also includes a buffer control that drains the buffer of store instructions associated with a first...

20060075307 - Information processing apparatus, software renewal method for the same, program carrier signal and storage media: An information processing apparatus operating on a finite energy source comprises a remaining power detection unit detecting a remaining electric power of the finite energy source; a determination unit determining a value of electric power of the finite energy source required for completing a renewal replacing a first software with...

20060075305 - Method and system for source-code model-based testing: Disclosed is a method for using source code to create the models used in model-based testing. After exploring the intended behavior of a software package, a test engineer writes source code to model that intended behavior. The source code is compiled into a model, and the model is automatically analyzed...

20060075304 - Method, system, and apparatus for identifying unresponsive portions of a computer program: A method, system, and apparatus are provided for identifying unresponsive portions of a computer program. According to the method, program code that can potentially result in unresponsive behavior is wrapped in timers. A timer is started on a background thread at the beginning of the execution of a section of...

20060075299 - Moving kernel configurations: Systems, methods, and devices are provided for kernel configurations. One embodiment includes a kernel configuration tool, a system file accessible by the kernel configuration tool, and means for automatically detecting and moving a kernel configuration in association with boot and shutdown routines....

20060075302 - System and method for selecting test case execution behaviors for reproducible test automation: A system and method for separating execution behaviors from test cases and consolidating execution behaviors in an execution behavior manager comprising or in communication with an execution behavior library. The method includes selecting an execution behavior for executing a step or action in a test case and sending the execution...

20060075306 - Techniques for automatic software error diagnostics and correction: Techniques are provided for automatically tracking errors encountered by a software system. A database server is entrusted with the tasks of automatically recording errors and managing error trace information in a separate database storage space. Techniques are also provided for automatically determining, by a software system, whether any diagnostic features...

20060075300 - Vectoring process-kill errors to an application program: A processor includes a process identifier unit to assign process identifiers to one or more processes executed by the processor. The processor also includes an error detector to detect errors in the processor and an error posting unit to post process identifiers and error information associated with the detected errors....

20060075308 - Log management system and method: A system and method for managing log entries associated with execution events in an application. The system and method may include a log provider wrapper for receiving log entries associated with the event and log providers for receiving all or part of the information associated with a log entry. The...

20060075309 - Variable writing through a fixed programming interface: Embodiments include writing a first data value to a validation variable through a fixed programming interface, where the validation variable includes multiple fields that correspond to multiple fields within a persistent variable. Contents of the validation variable are subsequently read through the fixed programming interface. When the validation variable contents...

20060075310 - Microcomputer and trace control method capable of tracing desired task: A microcomputer includes a bus, a CPU coupled to the bus, a trace data generating circuit coupled to the bus to output trace data of a process executed by the CPU at an output node, a memory coupled to the output node of the trace data generating circuit to store...

20060075312 - System and method for limiting exposure of hardware failure information for a secured execution environment: A method and apparatus for limiting the exposure of hardware failure information is described. In one embodiment, an error reporting system of a processor may log various status and error address data into registers that retain their contents through a warm reset event. But the error reporting system of the...

20060075311 - Techniques to perform error detection: Method and apparatus to perform cyclic redundancy check computations for error detection are described....

20060075313 - Read control systems and methods: Embodiments of a read control system and method are disclosed. One embodiment of a system, among others, includes dump logic coupled to a data source, said dump logic configured to receive a first group of a defined slice of data and a second group of the defined slice of data;...

20060075314 - Fault detection and classification (fdc) specification management apparatus and method thereof: An apparatus for fault detection and classification (FDC) specification management including a storage device and a process module. The storage device stores a specification management record and a chart profile record. The specification management record stores statistical algorithm settings of a parameter and the chart profile record stores chart frame...

20060075315 - Method and process for manufacturing test generation: An improved method and process of verifying a digital logic design complies with certain manufacturing test rules or guidelines to ensure adequate manufacturing test data can be generated. A replacement is created for any portion of a design to make it usable by the manufacturing test tool set, without requiring...

20060075317 - Methods and apparatus for programming and operating automated test equipment: In one embodiment, an electronic device is tested using automated test equipment (ATE) by 1) storing different vectors of scan load data in memory of the ATE; 2) storing a scan unload subroutine in the memory of the ATE; 3) stimulating the electronic device by retrieving the different vectors of...

20060075316 - Methods and apparatus for providing scan patterns to an electronic device: In one embodiment, a method provides scan patterns to an electronic device having BIST hardware. The BIST hardware has production and diagnostic test modes, and the device outputs one or more response signatures in the production test mode and outputs raw response data in the diagnostic test mode. In production...

20060075318 - Self verifying communications testing: A system and method for testing a device with multiple interfaces by generating a predetermined data pattern within the device, transmitting the pattern to a test analyzer, generating a second predetermined data pattern within the test analyzer, and simultaneously transmitting the second test pattern to the device where the second...

20060075319 - Packet transmission redundancy selection apparatus and method: A high speed downlink packet access communication system method that supports a plurality of redundancy variations that are characterized by at least a first parameter that comprises an indicator regarding self-decodability of a corresponding packet and a second parameter that comprises a selection of a particular redundancy version from amongst...

20060075320 - Method of detecting and correcting errors for a memory and corresponding integrated circuit: A method is for detecting and correcting errors for a memory storing at least one code block including information data and control data. The method includes reading and decoding each element of the at least one code block to deliver an information item representative of a number of errors in...

20060075321 - Forming of error correction data: The invention relates to the generation of error correction data for available data packets 53 and to the reconstruction of missing data packets based on available data packets and available error correction data. In order to enable an efficient error correction, the data packets 53 are distributed at an encoding...

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