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Electronic digital logic circuitry

20130113514 - Speed binning for dynamic and adaptive power control: A plurality of digital circuits are manufactured from an identical circuit design. A power controller is operatively connect to the digital circuits, and a non-volatile storage medium is operatively connected to the power controller. The digital circuits are classified into different voltage bins, and each of the voltage bins has... Agent: International Business Machines Corporation

20130113515 - Impedance control circuit and semiconductor device including the same: An impedance control circuit includes a first impedance unit configured to terminate an impedance node using an impedance value that is determined by an impedance control code, a second impedance unit configured to terminate the impedance node using an impedance value that is determined by an impedance control voltage, a... Agent:

20130113517 - Impedance control circuit and semiconductor device including the same: An impedance control circuit includes a pull-up code generator configured to generate pull-up impedance control codes using a voltage of a first node, a pull-up impedance unit configured to pull-up-drive the first node in response to the pull-up impedance control codes, a plurality of dummy impedance units enabled in response... Agent:

20130113516 - Termination circuit and dc balance method thereof: A termination circuit for a plurality of memories controlled by a controller is provided. The termination circuit includes a plurality of drivers, a plurality of resistors and a plurality of capacitors. Each of the drivers is coupled to the memories via a transmission line. Each of the resistors is coupled... Agent: Mediatek Inc.

20130113518 - Majority decision circuit: A majority decision circuit includes: a majority decision unit configured to compare first data with second data to decide whether one of the first data and the second data has more bits with a first logical value; and an offset application unit configured to control the majority decision unit so... Agent:

20130113519 - Asynchronous digital circuits including arbitration and routing primatives for asynchronous and mixed-timing networks: Asynchronous digital circuits are described, including arbitration and routing primitives for asynchronous and mixed-timing networks. An asynchronous arbitration primitive has two data inputs and one data output. A mutual exclusion element is used to select the first-arriving data request from one of the two inputs to the output. A asynchronous... Agent: The Trustees Of Columbia University In The City Of New York

20130113520 - Method and apparatus for improved multiplexing using tri-state inverter: A multiplexing circuit includes first and second tri-state inverters coupled to first and second data input nodes, respectively. The first and second tri-state inverters include first and second stacks of transistors, respectively, coupled between power supply and ground nodes. Each stack includes first and second PMOS transistors and first and... Agent: Taiwan Semiconductor Manufacturing Co., Ltd.

20130113522 - Asynchronous-logic circuit for full dynamic voltage control: Pre-Charge Static Logic (PCSL), is an asynchronous-logic Quasi-Delay-Insensitive architecture based on Static-Logic, featuring fully-range Dynamic Voltage Scaling including robust operation in the sub-threshold voltage regime, with simultaneous low hardware overheads, high-speed and yet low power dissipation. The invented PCSL logic circuit achieves this by integration of the Request sub-circuit into... Agent: Nanyang Technological University

20130113521 - Semiconductor device: A semiconductor device includes: a main driving unit configured to receive an output data and to drive the received data to a data output pad; a pre-emphasis data generation unit configured to compare a delayed data obtained by delaying the output data by one data period with the output data,... Agent:

20130113523 - Semiconductor device: A semiconductor device includes a main driving unit configured to serialize first and second data applied in parallel and output the serialized data to a data output pad, and an auxiliary driving unit configured to drive the data output pad in a period when the first and second data have... Agent:

20130106461 - Implementing screening for single fet compare of physically unclonable function (puf): A screening method and circuit for implementing a Physically Unclonable Function (PUF), and a design structure on which the subject circuit resides are provided. A plurality of field effect transistors (FETs) is coupled to a low-offset dynamic comparator and is respectively selected to provide a plurality of FET pairs. For... Agent: International Business Machines Corporation

20130106462 - Field-programmable analog array with memristors: A field-programmable analog array (FPAA) includes a digital signal routing network, an analog signal routing network, switch elements to interconnect the digital signal routing network with the analog signal routing network, and a configurable analog block (CAB) connected to the analog signal routing network and having a programmable resistor array.... Agent:

20130106463 - Three dimensional integrated circuit connection structure and method: The embodiments described provide connection structures for dies in an integrated circuit die stack. Each die in the die stack includes a functional circuitry, a programmable array and a programmable array control unit. By triggering the programmable array control unit to program corresponding programmable array in each die of the... Agent: Taiwan Semiconductor Manufacturing Company, Ltd.

20130106464 - Integrated circuit including pulse control logic having shared gating control: An integrated circuit with a pulse clock unit having shared gating control includes one or more logic blocks, each including a clock distribution network configured to distribute a clock signal. The integrated circuit also includes a clock unit coupled to the one or more logic blocks and configured to generate... Agent: Apple Inc.

20130099817 - Sytems and methods for propagating digital data across an isolation barrier: Systems and methods pertaining to propagation of digital data from a transmit side domain to a receive side domain through an intermediate isolation barrier are described. Specifically, a carrier waveform is superimposed upon a first logic level of a digital signal that is referenced to a first local ground. The... Agent: Samsung Electro-mechanics Company, Ltd.

20130099818 - Methods and apparatuses including an adjustable termination impedance ratio: Methods of adjusting a centerline voltage of a data signal are described, along with apparatuses to adjust the centerline voltage. In one such method, portions of a termination circuit coupled to a node are selectively programmed to adjust an impedance of the termination circuit to adjust the centerline voltage of... Agent:

20130099819 - Non-sequentially configurable ic: Some embodiments of the invention provide a configurable integrated circuit (IC). The IC includes at least fifty configurable circuits arranged in an array having a plurality of rows and a plurality of columns. Each configurable circuit for configurably performing a set of operations. At least a first configurable circuit reconfigures... Agent:

20130099820 - Safety component in a programmable components chain: An electronic circuit includes a plurality of programmable components connected in an electronic chain. An interface is adapted to connect the programmable components to an external controller wherein the controller is adapted to program the programmable components. A component isolation element is connected to the interface at an input end... Agent:

20130099821 - System and method for reducing reconfiguration power usage: A system and method for reducing power consumption in a reconfigurable integrated circuit. Some embodiments provide placement and routing programs that reduce the number of bits to be reconfigured. Some embodiments provide placement and routing programs that increase the number of groups of circuits that do not need reconfiguration at... Agent: Tabula, Inc.

20130099822 - Cml to cmos conversion circuit: The present invention provides a CML to CMOS conversion circuit comprising a first differential unit, a second differential unit, and an output unit. The output unit comprises a series connection of a first inverter and a second inverter, wherein, a resistor is connected with the first inverter in parallel. The... Agent:

20130099823 - Output driver, devices having the same, and ground termination: An integrated circuit comprising an output driver including an output terminal, and a receiving circuit including a termination resistor connected between the output terminal and a ground. The output driver comprising a first NMOS transistor configured to pull up a voltage of the output terminal to a pull-up voltage in... Agent:

20130093458 - Binary half-adder using oscillators: A binary half-adder comprising first and second oscillators, each oscillator being connected to a first input and to a second input, the second oscillator being connected to the first oscillator, wherein the first oscillator is configured to oscillate if the first input is high or the second input is high,... Agent: Manchester Metropolitan University

20130093459 - Termination device system: A termination device system is provided that includes a device required to be terminated with a resistor and a termination circuit. The termination circuit includes a termination resistor circuit and a judgment circuit connected to the termination resistor circuit. The termination resistor circuit includes at least one controlled termination unit.... Agent: Montage Technology (shanghai) Co. Ltd.

20130093460 - Configurable storage elements: An integrated circuit (“IC”) having configurable logic circuits for configurably performing multiple different logic operations based on configuration data is provided. The IC includes a row of the configurable logic circuits and multiple configuration retrieval circuits for providing configuration bits to the row of configurable logic circuits. The IC also... Agent:

20130093461 - Configurable storage elements: An integrated circuit (“IC”) having configurable logic circuits for configurably performing multiple different logic operations based on configuration data is provided. The IC includes a configurable routing fabric for configurably routing signals among configurable logic circuits. The configurable routing fabric includes a particular wiring path that connects an output of... Agent:

20130093462 - Configurable storage elements: A low power sub-cycle reconfigurable conduit is provided. The low power reconfigurable conduit is a clocked storage element that consumes less power when performing low-throughput operations that do not require sub-cycle rate. The low power conduit includes a first configurable routing multiplexer that is reconfigurable to select one of several... Agent:

20130093463 - High frequency cmos programmable divider with large divide ratio: A dynamic latch has a pair of parallel pass gates (a first parallel pass gate that receives a seed signal, and a second parallel pass gate that receives a data signal). A first latch logic circuit performs logic operations using signals output by the parallel pass gates to produce an... Agent: International Business Machines Corporation

20130093464 - Signal transfer circuit: A signal transfer circuit includes a signal transfer unit configured to transfer an input signal applied to an input node to an output node in response to a control signal and a driving unit configured to drive an output signal of the output node to a level of the input... Agent:

20130093465 - Asymmetrical bus keeper: Various embodiments are described herein for an asymmetrical bus keeper circuit that provides asymmetrical drive towards one logic level. The asymmetrical bus keeper circuit comprises a first inverter stage having an input node and an output node, an asymmetrical inverter stage having an input node and an output node and... Agent: Research In Motion Limited