Electronic digital logic circuitry patents - Monitor Patents
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Electronic digital logic circuitry

Below are recently published patent applications awaiting approval from the USPTO. Recent week's RSS XML file available below.
Listing for abstract view: USPTO application #, Title, Abstract excerpt,Patent Agent. Listing format for list view: USPTO National Class full category number, title of the patent application.
02/05/2015 > 5 patent applications in 5 patent subcategories.

20150035559 - Compensated impedance calibration circuit: Aspects of the invention provide for compensating impedance calibration circuits. In one embodiment, a compensated impedance calibration circuit, includes: a variable resistor network including a tunable resistor and a fixed resistor; and an external resistance network including a target external precision resistor and a parasitic distribution resistance; wherein a resistance... Agent:

20150035560 - Non-volatile electronic logic module: A logic module includes a device for implementing a logic function the device including at least one input and at least one output, the output at least partially representing the result of the logic function; at least one first element including at least one resistance state, at least one second... Agent:

20150035561 - Apparatus and method for correcting output signal of fpga-based memory test device: An apparatus and method for correcting an output signal of an FPGA-based memory test device includes a clock generator for outputting clock signals having different phases; and a pattern generator for outputting an address signal, a data signal and a clock signal in response to the clock signals input from... Agent: Unitest Inc.

20150035562 - Look-up table architecture: The present invention relates to a look-up table architecture and to an FPGA comprising the same. The look-up table architecture comprises a registers group comprising a plurality of registers configured to issue register signals, and a programmable logic comprising a plurality of pass gates configured to be controlled at least... Agent:

20150035563 - High speed level shifter with amplitude servo loop: A high speed level shifter interfaces a high speed DAC to the digital information that the DAC processes. The level shifter may convert CMOS level digital representations to, for example, CML level digital representations for processing by the DAC. The level shifter conserves the voltage swing in the CMOS level... Agent: Broadcom Corporation

01/29/2015 > 4 patent applications in 3 patent subcategories.

20150028917 - Semiconductor component and an operating method for a protective circuit against light attacks: A semiconductor component includes a semiconductor substrate, and a doped well having a well terminal and a transistor structure having at least one potential terminal formed in the semiconductor substrate. The transistor structure has a parasitic thyristor, and is at least partly arranged in the doped well. The potential terminal... Agent:

20150028918 - Error resilient packaged components: A packaged component may include an interposer and integrated circuit dies mounted on the interposer. At least one of the dies may be a radiation-hardened integrated circuit die, whereas the remaining dies may be non-radiation-hardened dies. If desired, the interposer may be a radiation-hardened interposer whereas the integrated circuit dies... Agent: Altera Corporation

20150028919 - Wafer-level stacked chip assembly and chip layer utilized for the assembly: Disclosed is a wafer-level stacked chip assembly, comprising a plurality of chip layers vertically stacked together with vertically electrical interconnections between the adjacent chip layers realized by TSVs (Through Silicon Via). Each chip layer includes a switching mechanism for selectively bypassing chip coding sequence to deactivate failed IC area and... Agent:

20150028920 - Multiplexer, look-up table and fpga: The present invention relates to a multiplexer comprising at least a first input and a second input and one output connected to the first input via a first pass gate and to the second input via a second pass gate, wherein the first pass gate comprises at least a first... Agent:

01/22/2015 > 7 patent applications in 7 patent subcategories.

20150022233 - Stable supply-side reference over extended voltage range with hot-plugging compatibility: In one embodiment, the operating range of an over-current detection circuit is extended to higher input voltage levels by providing a reference-voltage generation circuit for the detection circuit with voltage protection circuitry that applies an additional voltage drop to shield other vulnerable transistor devices from the higher input voltages. In... Agent: Lattice Semiconductor Corporation

20150022234 - Variable series resistance termination for wireline serial link transistor: A variable series resistance termination circuit for wireline serial link transceivers is provided. Some embodiments include a pad for coupling to a wireline serial link and a termination circuit. The termination circuit includes a plurality of resistive components coupled in series with the pad and a plurality of switches. Each... Agent:

20150022235 - Semiconductor device: The disclosed invention provides a semiconductor device capable of suitably controlling the level of an enable signal to resolve NBTI in a PMOS transistor. An input node receives an input signal alternating between high and low levels during normal operation and fixed to a high level during standby. A detection... Agent:

20150022236 - Apparatus and methods for time-multiplex field-programmable gate arrays: A time-multiplexed field programmable gate array (TM-FPGA) includes programmable logic circuitry, programmable interconnect circuitry, and a plurality of context registers. A user's circuit can be mapped to the programmable logic circuitry, the programmable interconnect circuitry, and the plurality of context registers without the user's intervention in mapping the design.... Agent:

20150022237 - Look-up table: The present invention relates to a look-up table comprising a plurality of register signals (r0-r3); a plurality of inputs signals (A, A′, B, B′); and at least one output signal (Y); and a plurality of pass gates, wherein at least a first pass gate of the plurality of pass gates... Agent:

20150022238 - Apparatuses and methods for line charge sharing: Apparatuses and methods for charge sharing, between signal lines are disclosed. An example apparatus may include first and second lines and a charge sharing circuit The charge sharing circuit may be coupled to the first line and the second line and configured to receive a first data signal and a... Agent:

20150022239 - Multiplexing for systems with multiple supply sources: A system includes an inverter element to gate forward current flow from a first signal source, and a reverse current inhibition element to block reverse current flow towards the first signal source from a second signal source.... Agent: Broadcom Corporation

01/15/2015 > 3 patent applications in 3 patent subcategories.

20150015304 - Protecting data from decryption from power signature analysis in secure applications: Disclosed is a novel circuit able to generate any logic combination possible as a function of the input logic signals. The circuit is described as a 2 input logistic map circuit but may be expanded to 3 or more inputs as required. Further disclosed is a universal logic array with... Agent:

20150015305 - Dynamic circuitry using pulse amplification to reduce metastability: Synchronisation circuitry 2 comprises a first dynamic circuit stage 4 generating a first stage state signal which is pulse amplified by pulse amplifying circuitry 8 to generate a pulse amplified signal. The pulse amplified signal is supplied to a second dynamic circuit stage 6 where it is used to control... Agent:

20150015306 - Systems and methods for reducing power consumption in semiconductor devices: A method of making a first timing path includes developing a first design of the first timing path with a first logic circuit and a first functional cell, wherein the first functional cell comprises a first transistor that is spaced from a first well boundary. The timing path is analyzed... Agent:

Previous industry: Electricity: measuring and testing
Next industry: Miscellaneous active electrical nonlinear devices, circuits, and systems


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