Electronic digital logic circuitry patents - Monitor Patents
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Electronic digital logic circuitry

Below are recently published patent applications awaiting approval from the USPTO. Recent week's RSS XML file available below.
Listing for abstract view: USPTO application #, Title, Abstract excerpt,Patent Agent. Listing format for list view: USPTO National Class full category number, title of the patent application.
12/04/2014 > 6 patent applications in 5 patent subcategories.

20140354326 - Quantum computers having partial interferometric quantum gates: A quantum computer may include topologically protected quantum gates and non-protected quantum gates, which may be applied to topological qubits. The non-protected quantum gates may be implemented with a partial interferometric device. The partial interferometric device may include a Fabry-Pérot double point contact interferometer configured to apply “partial” interferometry to... Agent: Microsoft Corporation

20140354327 - Apparatus and method for generating random bits: An apparatus for generating random bits includes a plurality of mapping devices. A respective mapping device is configured to map a predefined number of input signals, with the aid of a combinatorial mapping, into a predefined number of output signals. The plurality of mapping devices are concatenated with one another,... Agent:

20140354329 - Electronic device for function resetting of pins and method thereof: An electronic device includes a chip and a pin configuration apparatus. The chip includes a plurality of pins with different functions. The pin configuration apparatus is used for resetting the pins from being configured to execute a first function to being configured to execute a second function.... Agent: Hon Hai Precision Industry Co., Ltd.

20140354328 - Programmable mixed-signal input/output (io): Techniques are described for providing highly integrated and configurable IO ports for integrated circuits that can be individually configured for a variety of general purpose digital or analog functions, such as multiple channel analog-to-digital converters (ADC), multiple channel digital-to-analog converters (DAC), multiplexers, GPIOs, analog switches, switch and multiplexers, digital logic... Agent: Maxim Integrated Products, Inc.

20140354330 - Three state latch: In accordance with a first embodiment, an electronic circuit includes a single latch having three stable states. The electronic circuit may be configured so that all three outputs reflect a change at any one input in not more than three gate delays. The electronic circuit may further be configured so... Agent:

20140354331 - Semiconductor integrated circuit device: A semiconductor integrated circuit device comprises I/O cells arranged around a core region. Each of the I/O cells comprises a level shifter circuit, an I/O logic circuit, and an I/O buffer circuit. An I/O logic region in which the I/O logic circuit is arranged and an I/O buffer region in... Agent:

11/27/2014 > 8 patent applications in 7 patent subcategories.

20140347092 - Modulated on-die termination: Alternating on-die termination impedances are applied within an integrated circuit device to up-convert signal reflections to higher frequencies that are attenuated by the signaling channel as the reflections propagate toward an intended signal receiver. Through this approach, the disruptive effect of reflected signals may be significantly reduced with relatively little... Agent:

20140347093 - Semiconductor apparatus: An internal voltage generation circuit of a semiconductor apparatus includes: an active driver configured to output an internal voltage to an output node; a standby driver configured to output the internal voltage to the output node; and a voltage stabilizer connected to the output node. The voltage stabilizer starts a... Agent: Sk Hynix Inc.

20140347094 - Reconfigurable circuit block supporting different interconnection configurations for rate-conversion circuit and processing circuit and related method thereof: A reconfigurable circuit block includes a rate-conversion circuit, a processing circuit, a first asynchronous interface circuit, and a second asynchronous interface circuit. The rate-conversion circuit converts a first input signal into a first output signal. The processing circuit processes a second input signal to generate a second output signal. The... Agent: Mediatek Inc.

20140347095 - Bidirectional buffer and control method thereof: Bidirectional buffer 20D includes: multiplexer 30 that is equipped with rewriteable variable-resistance nonvolatile switch elements for each input terminal; tristate buffer 51 that is equipped with rewriteable variable-resistance nonvolatile switch elements for each output terminal and that receives the output of multiplexer 30 as input; demultiplexer 31 that receives the... Agent: Nec Corporation

20140347096 - Non-lut field-programmable gate arrays: New logic blocks capable of replacing the use of Look-Up Tables (LUTs) in integrated circuits, such as Field-Programmable Gate Arrays (FPGAs), are disclosed herein. In one embodiment, the new logic block is a tree structure comprised of a number of levels of cells with each cell consisting of a logic... Agent:

20140347097 - Single component sleep-convention logic (scl) modules: A multi-rail module having mutually exclusive outputs. The module includes first and second-rail logic circuits, first and second-rail driver circuits, and a PMOS transistor sourcing VDD to both the first and second driver circuits. The first-rail logic circuit is coupled to VDD and ground and has a first logic input... Agent:

20140347098 - Systems and methods for data receipt from devices of disparate types: Systems and methods are provided for a receiver device for receiving data signals from devices of disparate types. An amplifier is configured to receive a voltage reference signal and a data signal, the data signal being received from a device, the amplifier being configured to output an output signal based... Agent: Marvell Israel (m.l.s .l) Ltd.

20140347099 - Apparatuses, circuits, and methods for reducing metastability in data synchronization: Apparatuses, circuits, and methods are disclosed for reducing or eliminating unintended operation resin ling from metastability in data synchronization. In one such example apparatus, a sampling circuit is configured to provide four samples of a data input signal. A first and a second of the four samples are associated with... Agent:

11/20/2014 > 8 patent applications in 7 patent subcategories.

20140340112 - Methods and systems for hardware piracy prevention: Provided are methods, systems, and devices for preventing hardware piracy.... Agent:

20140340113 - Through silicon via repair circuit of semiconductor device: TSV repair circuit of a semiconductor device includes a first chip, a second chip, at least two TSV, at least two data path circuits and an output logic circuit. Each data path circuit comprises an input driving circuit, a TSV detection circuit, a memory device, a protection circuit and a... Agent:

20140340114 - Fault detection for a distributed signal line: An integrated circuit device includes a first signal line for distributing a first signal. The first signal line includes a plurality of branch lines, and a leaf node is defined at an end of each branch line. First logic is coupled to the leaf nodes and operable to generate a... Agent: Advanced Micro Devices, Inc.

20140340116 - Programmable logic device and semiconductor device: A programmable logic device having low power consumption with operation speed maintained is provided. The programmable logic device includes a first circuit; a second circuit; a first transistor making electrical connection between the first circuit and the second circuit depending on a potential of a gate of the first transistor;... Agent: Semiconductor Energy Laboratory Co., Ltd.

20140340115 - Signal processing device: p

20140340117 - Signal processing device: A signal processing device is produced. The signal processing device including a first transistor with high off-state resistance, a second transistor which controls conduction between two different nodes, a capacitor which holds electric charge, and a current control element such as a transistor or a resistor. The first node to... Agent: Semiconductor Energy Laboratory Co., Ltd.

20140340118 - Tristate gate: The present invention relates to a tristate gate (1000, 2000) comprising an output port (1400) and at least two transistors (1200, 1300; 2200, 2300), each having at least a first and a second gate, configured such that a high-impedance value (Z) on the output port is set by controlling the... Agent:

20140340119 - Voltage level shifter and systems implementing the same: According to the inventive concepts disclosed herein, a level shifter can include an input node in a first voltage domain and an output node in a second voltage domain, higher than the first voltage domain. The input node receives an input signal in the first, lower-voltage domain, and the output... Agent: Samsung Electronics Co., Ltd.

11/13/2014 > 2 patent applications in 2 patent subcategories.

20140333344 - Adaptive interface for coupling fpga modules: A method for implementing an adaptive interface between at least one FPGA with at least one FPGA application and at least one I/O module, which are designed as the corresponding sender side or receiver side, for connection to the FPGA, whereby a serial interface is formed between the at least... Agent: Dspace Digital Signal Processing And Control Engineering Gmbh

20140333345 - Configurable storage elements: Some embodiments provide a configurable integrated circuit (IC) having a routing fabric that includes configurable storage element in its routing fabric. In some embodiments, the configurable storage element includes a parallel distributed path for configurably providing a pair of transparent storage elements. The pair of configurable storage elements can configurably... Agent: Tabula, Inc.

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