Electronic digital logic circuitry patents - Monitor Patents
FreshPatents.com Logo    FreshPatents.com icons
Monitor Keywords Patent Organizer File a Provisional Patent Browse Inventors Browse Industry Browse Agents



USPTO Class 326  |  Browse by Industry: Previous - Next | All     monitor keywords
Recent  |  14:  |  |  | Sep | Aug | Jul | Jun | May | Apr | Mar | Feb | Jan | 13: Dec | Nov | Oct | Sep | Aug | Jul | Jun | May | Apr | Mar | Feb | Jan | 12: Dec | Nov | Oct | Sep | Aug | July | June | May | April | Mar | Feb | Jan | 11: Dec | Nov | Oct | Sep | Aug | Jul | Jun | May | Apr | Mar | Feb | Jan | 10: Dec | Nov | Oct | Sep | Aug | Jul | Jun | May | Apr | Mar | Feb | Jan |  | 09: Dec | Nov | Oct | Sep | Aug | Jl | Jn | May | Apr | Mar | Fb | Jn |  | 2008 | 2007 |

Electronic digital logic circuitry

Below are recently published patent applications awaiting approval from the USPTO. Recent week's RSS XML file available below.
Listing for abstract view: USPTO application #, Title, Abstract excerpt,Patent Agent. Listing format for list view: USPTO National Class full category number, title of the patent application.
  
01/22/2015 > 7 patent applications in 7 patent subcategories.

20150022233 - Stable supply-side reference over extended voltage range with hot-plugging compatibility: In one embodiment, the operating range of an over-current detection circuit is extended to higher input voltage levels by providing a reference-voltage generation circuit for the detection circuit with voltage protection circuitry that applies an additional voltage drop to shield other vulnerable transistor devices from the higher input voltages. In... Agent: Lattice Semiconductor Corporation

20150022234 - Variable series resistance termination for wireline serial link transistor: A variable series resistance termination circuit for wireline serial link transceivers is provided. Some embodiments include a pad for coupling to a wireline serial link and a termination circuit. The termination circuit includes a plurality of resistive components coupled in series with the pad and a plurality of switches. Each... Agent:

20150022235 - Semiconductor device: The disclosed invention provides a semiconductor device capable of suitably controlling the level of an enable signal to resolve NBTI in a PMOS transistor. An input node receives an input signal alternating between high and low levels during normal operation and fixed to a high level during standby. A detection... Agent:

20150022236 - Apparatus and methods for time-multiplex field-programmable gate arrays: A time-multiplexed field programmable gate array (TM-FPGA) includes programmable logic circuitry, programmable interconnect circuitry, and a plurality of context registers. A user's circuit can be mapped to the programmable logic circuitry, the programmable interconnect circuitry, and the plurality of context registers without the user's intervention in mapping the design.... Agent:

20150022237 - Look-up table: The present invention relates to a look-up table comprising a plurality of register signals (r0-r3); a plurality of inputs signals (A, A′, B, B′); and at least one output signal (Y); and a plurality of pass gates, wherein at least a first pass gate of the plurality of pass gates... Agent:

20150022238 - Apparatuses and methods for line charge sharing: Apparatuses and methods for charge sharing, between signal lines are disclosed. An example apparatus may include first and second lines and a charge sharing circuit The charge sharing circuit may be coupled to the first line and the second line and configured to receive a first data signal and a... Agent:

20150022239 - Multiplexing for systems with multiple supply sources: A system includes an inverter element to gate forward current flow from a first signal source, and a reverse current inhibition element to block reverse current flow towards the first signal source from a second signal source.... Agent: Broadcom Corporation

  
01/15/2015 > 3 patent applications in 3 patent subcategories.

20150015304 - Protecting data from decryption from power signature analysis in secure applications: Disclosed is a novel circuit able to generate any logic combination possible as a function of the input logic signals. The circuit is described as a 2 input logistic map circuit but may be expanded to 3 or more inputs as required. Further disclosed is a universal logic array with... Agent:

20150015305 - Dynamic circuitry using pulse amplification to reduce metastability: Synchronisation circuitry 2 comprises a first dynamic circuit stage 4 generating a first stage state signal which is pulse amplified by pulse amplifying circuitry 8 to generate a pulse amplified signal. The pulse amplified signal is supplied to a second dynamic circuit stage 6 where it is used to control... Agent:

20150015306 - Systems and methods for reducing power consumption in semiconductor devices: A method of making a first timing path includes developing a first design of the first timing path with a first logic circuit and a first functional cell, wherein the first functional cell comprises a first transistor that is spaced from a first well boundary. The timing path is analyzed... Agent:

  
01/08/2015 > 5 patent applications in 5 patent subcategories.

20150008955 - Method and apparatus for supporting self-destruction function in baseband modem: A method and an apparatus for supporting a self-destruction function in a baseband modem are provided. A self-destruction method of a baseband modem includes sending a request for supplying power to a self-destruction unit to a power management unit when a command for performing the self-destruction is received from a... Agent:

20150008956 - Dynamic impedance control for input/output buffers: A system and method of performing off chip drive (OCD) and on-die termination (ODT) are provided. A common pull-up network composed of transistors and a common pull-down network composed of transistors are employed to implement both of these functions. In drive mode, the pull-up network is configured to produce a... Agent:

20150008957 - Non-intrusive monitoring and control of integrated circuits: A method of monitoring operations of a set of ICs. The method loads a first set of configuration data into a first IC for configuring a group of configurable circuits of the first IC to perform operations of a user design. The method receives a definition of an event based... Agent: Tabula, Inc.

20150008958 - Semiconductor device: Path transistor malfunction is reduced. A path gate circuit includes transistors MP, MW, and MC. The transistor MP functions as a path transistor that connects a signal line INL to a signal line OUTL. The transistor MW connects a signal line BL for inputting a signal for setting the on... Agent:

20150008959 - Semiconductor integrated circuit: A semiconductor integrated circuit may include a plurality of fuse boxes, each suitable for selectively outputting a first input signal and a reverse input signal obtained by inverting the first input signal; and a first output signal generator suitable for selectively receiving the first input signal and the reverse input... Agent: Sk Hynix Inc.

  
01/01/2015 > 4 patent applications in 3 patent subcategories.

20150002189 - Central input bus termination topology: An input bus termination (IBT) system for an integrated circuit that includes a termination switch coupled to a plurality of input lines of an integrated circuit, each of the plurality of input lines coupled to a common node of the termination switch through a resistor, wherein the termination switch is... Agent:

20150002191 - Configurable decoder with applications in fpgas: The invention relates to hardware decoders that efficiently expand a small number of input bits to a large number of output bits, while providing considerable flexibility in selecting the output instances. One main area of application of the invention is in pin-limited environments, such as field programmable gates array (FPGA)... Agent: National Science Foundation

20150002190 - System and method for reducing reconfiguration power usage: A system and method for reducing power consumption in a reconfigurable integrated circuit. Some embodiments provide placement and routing programs that reduce the number of bits to be reconfigured. Some embodiments provide placement and routing programs that increase the number of groups of circuits that do not need reconfiguration at... Agent:

20150002192 - Preventing reverse conduction: In one embodiment, a circuit includes a resistance including first and second terminals. The first terminal of the resistance is coupled to ground. The circuit also includes a first switching element including first, second, and third terminals. The first terminal of the first switching element is coupled to an output... Agent:

Previous industry: Electricity: measuring and testing
Next industry: Miscellaneous active electrical nonlinear devices, circuits, and systems


######

RSS FEED for 20150122: xml
Integrate FreshPatents.com into your RSS reader/aggregator or website to track weekly updates.
For more info, read this article.

######

Thank you for viewing Electronic digital logic circuitry patents on the FreshPatents.com website. These are patent applications which have been filed in the United States. There are a variety ways to browse Electronic digital logic circuitry patent applications on our website including browsing by date, agent, inventor, and industry. If you are interested in receiving occasional emails regarding Electronic digital logic circuitry patents we recommend signing up for free keyword monitoring by email.



Results in 0.08682 seconds

PATENT INFO