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Electronic digital logic circuitry March listing by industry category 03/12

20120074982 - Device for monitoring the operation of a digital circuit: A digital electronic circuit includes: a plurality of sequential elements; at least one data-conducting path connecting an input sequential element to a destination sequential element; a clock outputting a clock signal on a clock tree for setting the speed of the sequential elements; a monitoring device receiving, as an input,... Agent: Commissariat &#xe0 L'&#xe9 Nergie Atomique Et Aux Energies

20120074983 - Integrated circuit with configurable on-die termination: Described are integrated-circuit die with differential receivers, the inputs of which are coupled to external signal pads. Termination legs coupled to the signal pads support multiple termination topologies. These termination legs can support adjustable impedances, capacitances, or both, which may be controlled using an integrated memory.... Agent: Rambus Inc.

20120074984 - Look-up table circuits and field programmable gate array: A look-up table circuit according to an embodiment includes: a variable resistance circuit including variable resistance devices and selecting a variable resistance device from the variable resistance devices based on an input signal; a reference circuit having a resistance value between the largest resistance value and the smallest resistance value... Agent: Kabushiki Kaisha Toshiba

20120074985 - Semiconductor device: In the case where data is rewritten in a delay period of a signal in a flip flop and a shift register which use an inverted clock signal, current inhibiting charging may flow, whereby data cannot written quickly, so that charging is not completed, which makes operation unstable. In view... Agent: Semiconductor Energy Laboratory Co., Ltd.

20120068731 - Circuit for restraining shoot through current: A circuit for restraining a shoot through current comprises a master selecting unit and a logic unit. The master selecting unit receives an input signal, and outputs first and second master selecting signals. The logic unit comprises first and second logic elements which generate first and second control signals for... Agent: Green Solution Technology Co., Ltd.

20120068732 - nonvolatile logic circuit and a method for operating the same: A nonvolatile logic circuit includes logic configuration electrodes and input electrodes. The nonvolatile logic circuit is programmable to any one of the logics between the input signals selected from logical conjunction (AND), logical disjunction (OR), logical non-conjunction (NAND), logical non-disjunction (NOR), and logical exclusive disjunction (XOR) by changing applied voltages... Agent: Panasonic Corporation

20120068733 - Universal functionality module: Methods and apparatus are provided for a Universal functionality Module (UFM). The apparatus comprises a programmable logic device (PLD) configured to be reprogrammed in real time and a means for universally interfacing the PLD with any effectuator device. The UFM loads a startup personality bit stream from a boot memory,... Agent: Honeywell International Inc.

20120068734 - Integrated circuit leakage power reduction using enhanced gated-q scan techniques: Specific logic gates for q-gating are selected by determining the minimum leakage state for a circuit design and then selecting logic gates that hold the circuit design in its lowest leakage state. Depending on the input desired to implement the minimum leakage state, the gate may be selected as a... Agent: Qualcomm Incorporated

20120068735 - Incorporating an independent logic block in a system-on-a-chip: In one embodiment, the present invention includes a logic having a first link interface to enable communication with an intellectual property (IP) logic adapted on a single semiconductor die with the logic, where the IP logic includes a second link interface coupled to the first link interface via an on-die... Agent:

20120068736 - Design apparatus, design method and semiconductor integrated circuit: A design apparatus according to the present embodiment includes a scheduling section, a group ID assigning section, a transition violation detecting section and a state inserting section. The scheduling section generates a plurality of states that transition based on a clock according to a control data flow graph generated from... Agent: Kabushiki Kaisha Toshiba

20120062274 - Schmitt circuit: The Schmitt circuit includes a first logic circuit that receives an output signal of the input logic circuit and has a first threshold voltage. The Schmitt circuit includes a second logic circuit that receives the output signal of the input logic circuit and has a second threshold voltage lower than... Agent: Kabushiki Kaisha Toshiba

20120062275 - Interface circuit: In performing calibration, a control circuit in a calibration circuit of an interface circuit controls a selector so that voltages V1, VREF or voltages V1, V2 are applied to a comparator. The two voltages input to the comparator is switched between positive and negative inputs of the comparator. In both... Agent: Panasonic Corporation

20120062276 - Capacitively coupled logic gate: An electronic logic circuit uses areal capacitive coupling devices coupled together to process a set of data inputs. Each areal capacitive coupling device can be configured such that a floating gate potential of such device can be altered to at least a first state or a second state in response... Agent:

20120062277 - Reconfigurable logic automata: A family of reconfigurable asynchronous logic elements that interact with their nearest neighbors permits reconfigurable implementation of circuits that are asynchronous at the bit level. A reconfigurable asynchronous logic cell comprises a set of one-bit buffers for communication with at least one neighboring cell, each buffer capable of having several... Agent: Massachusetts Institute Of Technology

20120062278 - Configurable integrated circuit with built-in turns: Some embodiments of the invention provide configurable integrated circuits (“IC's”) with configurable node arrays. In some embodiments, the configurable node array includes numerous (e.g., 50, 100, etc.) configurable nodes arranged in several rows and columns. This array also includes several direct offset connections, where each particular direct offset connection connects... Agent:

20120056642 - Data output circuit: A data output circuit includes a main driver including a pull-up driver, coupled between a power supply terminal and a node coupled to the pad and a pull-down driver coupled between the node and a ground terminal, an impedance controller configured to control an output impedance at the node by... Agent:

20120056641 - Semiconductor device and method of adjusting characteristic thereof: To suppress the number of clocks needed to adjust the impedance of an output buffer. A pull-up replica buffer is connected between a calibration terminal and power supply wiring, and is controlled in impedance by a DRZQP signal supplied from a counter. A pull-down replica buffer is connected between ground... Agent: Elpida Memory, Inc.

20120056643 - System for transmission line terminatino by signal cancellation: A communication system having first and second states for use with a shared transmission line composed of at least two conductors and composed of first and second transmission line segments connected to each other at a single connection point. In the first state, a termination is coupled to the single... Agent: Mosaid Technologies Incorporated

20120049887 - Digital signal voltage level shifter: A digital signal voltage level shifter includes an edge detector that detects assertion of a digital input signal from a first logic circuit in a source voltage domain, and an output module triggered by the edge detector for asserting a digital output signal corresponding to the digital input signal for... Agent: Freescale Semiconductor, Inc

20120049888 - Buffering circuit, semiconductor device having the same, and methods thereof: A multipoint low-voltage differential signaling (mLVDS) receiver of a semiconductor device and a buffering circuit of a semiconductor device, includes: an even-number data buffering unit configured to: sample even-number data from input data, amplify and output the even-number data in a section in which a positive clock is activated, and... Agent: Magnachip Semiconductor, Ltd.

20120049889 - Semiconductor device including latch circuit: The latch circuit includes a transistor whose channel region is formed with an oxide semiconductor (OS). Data is held in a node that is electrically connected to an output terminal and one of a source and a drain of the transistor and brought into a floating state when the transistor... Agent: Semiconductor Energy Laboratory Co., Ltd.

20120049890 - Logic circuits using carbon nanotube transistors: In accordance with some embodiments, logical circuits comprising carbon nanotube field effect transistors are disclosed herein.... Agent: