SEARCH:      Monitor Keywords |  Custom RSS

Electronic digital logic circuitry July category listing 07/09

20090189633 - Superconductive crossbar switch: A superconductor crossbar switch for connecting a plurality of inputs with a plurality of outputs, including a switching cell having an input, an output and a circuit for connecting the input with the output for bidirectionally transmitting data therebetween. The connection of the retaining and releasing circuitry of a plurality... Agent: Dla Piper LLP Us

20090189634 - Single event transient mitigation and measurement in integrated circuits: A method for single event transient filtering in an integrated circuit device is described. The device comprises three sequential elements, each having a data input and a data output with each of the three data outputs coupled to one of three inputs of a voting gate. The method comprises generating... Agent: Lewis And Roca LLP

20090189635 - Method and apparatus for implementing reduced coupling effects on single ended clocks: A method and apparatus implement reduced noise coupling effects on single ended clocks, and a design structure on which the subject circuit resides is provided. A clock receiver includes a clock voltage reference that is generated from received clock peaks and valleys of a received input clock signal. The received... Agent: Ibm Corporation RochesterIPLaw Dept 917

20090189636 - Circuit having logic state retention during power-down and method therefor: A storage circuit has an input for receiving and storing data, a first power terminal coupled to a first conductor for receiving a first power supply voltage, and a second power terminal coupled to a second conductor. A power gate device has a first terminal coupled to the second conductor,... Agent: Freescale Semiconductor, Inc. Law Department

20090189637 - Machine for programming on-board chipsets: The present invention discloses a machine for programming on-board chipsets, wherein the on-board chipsets means that some chipsets are mounted on a circuit board, and the circuit board has a plurality of input pads electrically connected to each chipset individually. The machine comprises a platform, a number of programming modules... Agent: Ckc & Partners Co. Ltd 12th Fl., Ruttonjee House

20090189638 - Level shifter circuit: A level shifter comprises a first-stage voltage converting circuit, a second-stage voltage converting circuit, and a voltage pull-up circuit. The first-stage voltage converting circuit is configured to receive an input signal of a first voltage level and to output a midway signal of an intermediate voltage level. The second-stage voltage... Agent: Hogan & Hartson L.L.P.

20090189639 - Circuits and methods for communicating data between domains during voltage and frequency shifting: When communicating data between different voltage and frequency domains, for example chiplets, in an integrated circuit, the data signals can be formatted to compensate for propagation delays and different operating frequencies between the domains, and the signaling voltage level of the formatted data signals can then be changed from the... Agent: Seed Intellectual Property Law Group PLLC

20090189640 - Semiconductor device: According to an aspect of the present invention, there is provided a semiconductor device including: a first circuit portion including: a first circuit that is connected between a first high-side power line and a low-side power line and that outputs a second signal based on a first signal input thereto;... Agent: SprinkleIPLaw Group

20090189641 - Integrated circuit device and layout design method therefor: An integrated circuit device has multiple first circuit elements arranged in a first area. A signal distribution circuit that has multiple drive circuits is connected in the form of a tree structure and that distributes a common signal that is input to the starting point of said tree structure to... Agent: Texas Instruments Incorporated

20090189642 - Nanowire crossbar implementations of logic gates using configurable, tunneling resistor junctions: Various embodiments of the present invention are directed to nanowire crossbars that use configurable, tunneling resistor junctions to electronically implement logic gates. In one embodiment of the present invention, a method for implementing a logic gate comprises: providing a first layer of approximately parallel nanowires; interconnecting the first layer of... Agent: Hewlett Packard Company

20090189643 - Constant voltage generating device: A constant voltage generator device provides a first and a second transistor having their main current path coupled serially via a common terminal for providing a constant output voltage at the common terminal of said transistors. The device provides one or more potential dividers having a plurality of serially connected... Agent: Seed Intellectual Property Law Group PLLC

20090184731 - Apparatus and method of adjusting driving voltage for selective pre-charge: An output of a driving circuit is controlled by selectively outputting a first voltage or a second voltage as an N-th output voltage level in response to a first control signal and an N-th input voltage level, where N is a natural number, and pre-charging the selected N-th output voltage... Agent: Harness, Dickey & Pierce, P.L.C

20090184732 - Differential driving circuit capable of operating at low supply voltage without requiring common mode reference voltage: A driving circuit includes a pair of input ports, a pair of differential output ports, a first differential pair, a second differential pair, a load unit, and a current source. The first differential pair is directly connected to a first voltage level, and is coupled to the pair of input... Agent: North America Intellectual Property Corporation

20090184733 - Layout method for soft-error hard electronics, and radiation hardened logic cell: This invention comprises a layout method to effectively protect logic circuits against soft errors (non-destructive errors) and circuit cells, with layout, which are protected against soft errors. In particular, the method protects against cases where multiple nodes in circuit are affected by a single event. These events lead to multiple... Agent: John Nielsen Randick O'dea & Tooliatos, LLP

20090184734 - Method of producing and operating a low power junction field effect transistor: A method for using an inverter with a pair of complementary junction field effect transistors (CJFET) with a small linewidth is provided. The method includes having an input capacitance for said CJFET inverter to be less than the corresponding input capacitance of a CMOS inverter of similar linewidth. The CJFET... Agent: Baker Botts L.L.P.

20090179664 - Method and apparatus for controlling leakage in a circuit: A system includes an apparatus for reducing leakage in a circuit. The apparatus includes one or more active devices connected to form a main circuit portion and at least one other active device coupled between the main circuit portion and one from the group including ground and Vdd, the other... Agent: Sterne, Kessler, Goldstein & Fox P.l.l.c.

20090179665 - Output driver robust to data dependent noise: Techniques for controlling a driver to reduce data dependent noise, such as simultaneous switching effects and cross-talk effects. A plurality of drivers may each receive a data segment to transmit and a plurality of data segments that other drivers will transmit. A driver controller may adjust the time at which... Agent: Fletcher Yoder (micron Technology, Inc.)

20090179666 - Output buffer circuit, differential output buffer circuit, output buffer circuit having regulation circuit and regulation function, and transmission method: An output buffer circuit, a differential output buffer circuit, an output buffer circuit having a regulation circuit and a regulation function, and a transmission method, capable of improving resolution of a pre-emphasis amount without increasing power consumption or a circuit area, in which the output buffer circuit 10 has a... Agent: Antonelli, Terry, Stout & Kraus, LLP

20090179667 - Reconfigurable logic circuit: It is made possible to provide a reconfigurable logic circuit with which high integration can be achieved. A reconfigurable logic circuit includes: a multiplexer which includes a plurality of spin MOSFETs each having a source and drain containing a magnetic material, and a selecting portion including a plurality of MOSFETs... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, P.C.

20090179668 - Bridge design for sd and mmc multiplexing: A method for determining direction of signal transmission in a bi-directional signal line, including sampling data signals at two terminals, A and B, enabling data flow from A to B when data flow from B to A is not enabled, and a logical 0 bit is sampled at A, enabling... Agent: Soquel Group, LLC

20090179669 - Techniques for providing switchable decoupling capacitors for an integrated circuit: A circuit assembly includes a functional chip and a first capacitor. The functional chip includes a first logic island and a second logic island. The first capacitor is configured to be selectively coupled (e.g., at different times) to a first power supply terminal of the first logic island and a... Agent: Ibm Corporation

20090174428 - Programmable element, and memory device or logic circuit: A multi-terminal programmable element. The programmable element includes a source electrode and a drain electrode on a base. The programmable element includes reference voltage contact that is not in contact with the source or drain electrode. The base includes a transition-metal oxide with oxygen vacancies for drifting under an applied... Agent: Ibm Corporation, T.j. Watson Research Center

20090174429 - Programmable logic device structure using third dimensional memory: A Programmable Logic Device (PLD) structure using third dimensional memory is disclosed. The PLD structure includes a switch configured to couple a polarity of a signal (e.g., an input signal applied to an input) to a routing line and a non-volatile register configured to control the switch. The non-volatile register... Agent: Unity Semiconductor Corporation

20090174430 - Logic element, and integrated circuit or field programmable gate array: A complementary logic element including first and second transistor elements. The first and second gate electrodes of the two transistor elements are electrically parallel to form a common gate. Both the coupling layers of the first and the second transistor element include a resistance switching material, a conductivity of which... Agent: Ibm Corporation, T.j. Watson Research Center

20090174431 - Method and apparatus for universal program controlled bus architecture: An integrated circuit including a programmable logic array with a plurality of logic cells and programmable interconnections to receive input signals and to perform logical functions to transmit output signals. The integrated circuit may also include megacells comprising a plurality of functional blocks receiving inputs and transmitting outputs. The integrated... Agent: Blakely Sokoloff Taylor & Zafman LLP

20090174432 - System for providing a complementary metal-oxide semiconductor (cmos) emitter coupled logic (ecl) equivalent input/output (i/o) circuit: A system for providing a CMOS I/O circuit design that may replace existing bipolar I/O circuitry, and thus behave in substantially the same manner as bipolar I/O circuitry. Thus, an I/O circuit using a standard CMOS process is made that mimics operation of an ECL I/O circuit created using bipolar... Agent: Honeywell International Inc.

20090174433 - Pecl/lvpecl input buffer that employs positive feedback to provide input hysteresis, symmetric headroom, and high noise immunity: A CMOS based input buffer suitable for use with PECL or LVPECL voltage levels is described. The input buffer utilizes a differential voltage comparator that employs positive feedback to provide input hysteresis, symmetric headroom and increased noise immunity. In addition, the input buffer can utilize a reference voltage that is... Agent: Law Office Of Mark C. Pickering

20090174434 - Design method and architecture for power gate switch placement: A design method places power gates or switch cells using unoccupied locations of logic cell rows. Two types of such switch cells, filler switches and sealer switches, may be provided using the unoccupied locations. In one embodiment, virtual ground voltage references to the logic cells are routed to their associated... Agent: Haynes And Boone, LLPIPSection

20090174435 - Monolithically-integrated graphene-nano-ribbon (gnr) devices, interconnects and circuits: The invention discloses new and advantageous uses for carbon/graphene nanoribbons (GNRs), which includes, but is not limited to, electronic components for integrated circuits such as NOT gates, OR gates, AND gates, nano-capacitors, and other transistors. More specifically, the manipulation of the shapes, sizes, patterns, and edges, including doping profiles, of... Agent: Oppedahl Patent Law Firm LLC - Src

20090167342 - Analog processor comprising quantum devices: Analog processors for solving various computational problems are provided. Such analog processors comprise a plurality of quantum devices, arranged in a lattice, together with a plurality of coupling devices. The analog processors further comprise bias control systems each configured to apply a local effective bias on a corresponding quantum device.... Agent: Seed Intellectual Property Law Group PLLC

20090167343 - Minimizing leakage in logic designs: Devices and methods are disclosed for logic gate devices to provide reduced leakage while improving performance. The device is configured for low leakage logic application where high threshold voltage devices are used to reduce leakage at the expense of reduced logic speed. Better performance is achieved than a high threshold... Agent: Texas Instruments Incorporated

20090167344 - Data output driving circuit of semiconductor apparatus: A data output driving circuit for a semiconductor apparatus can include a code multiplier configured to multiply a received first code by a multiplication factor determined in response to a control signal and generating a second code; a signal line configured to transmit the second code; and a plurality of... Agent: Baker & Mckenzie LLP Patent Department

20090167345 - Reading configuration data from internal storage node of configuration storage circuit: Some embodiments provide an IC with configuration context switchers. The IC includes several configurable circuits, each of which configurably performs one of several operations at any given time, based on the configuration data set that it receives at that time. The IC includes several storage circuits for storing several configuration... Agent: Adeli & Tollen, LLP

20090167346 - Reconfigurable circuit, configuration method and program: The present invention is intended to provide a reconfigurable circuit, a configuration method and a program capable of significantly shortening the configuration time without increasing the area of the chip of the circuit. The reconfigurable circuit equipped with a configuration chain having multiple serial connection registers, comprises first connecting means... Agent: Hamre, Schumann, Mueller & Larson P.C.

20090167348 - Programmable latch based multiplier: A programmable logic circuit is disclosed that includes a latch for enhancing the circuit logic capacity. In a multiplier configuration, the circuit comprises a logic block; and a latch having a latch output coupled to a logic block input, wherein the latch output computes an AND function of a first... Agent: Tran & Associates

20090167349 - Programmable logic based latches and shift registers: A latch is described, comprising: a first programmable logic element (LE); and a second programmable logic element (LE); and an output of the first LE adapted to directly couple to a first input of the second LE; and an output of the second LE coupled to a first input of... Agent: Tran & Associates

20090167350 - Programmable logic based latches and shift registers: Disclosed is a programmable logic device adapted to implement a shift register, the device comprising: a logic block comprised of: a latch having an input; and a logic element having an output capable of coupling to an adjacent logic block and the latch input, wherein the output is coupled to... Agent: Tran & Associates

20090167347 - Using programmable latch to implement logic: A logic circuit is disclosed that includes a latch for enhancing the circuit logic capacity. The circuit includes a logic block comprising a plurality of logic inputs and at least one logic output, the logic output generating a logic function of the plurality of logic inputs; a first latch input... Agent: Tran & Associates

20090167351 - Co-processor having configurable logic blocks: A co-processor system is provided that includes an array of configurable logic blocks (CLBs). Each CLB including a plurality of look-up tables and a plurality of adders. Each CLB may be dynamically reconfigurable to perform a plurality of logical functions.... Agent: Ked & Associates, LLP Intel Corporation

20090167352 - Field programmable gate arrays using resistivity sensitive memories: Field programmable gate arrays using resistivity-sensitive memories are described, including a programmable cell comprising a configurable logic, a memory connected to the configurable logic to provide functions for the configurable logic, the memory comprises a non-volatile rewriteable memory element including a resistivity-sensitive memory element, an input/output logic connected to the... Agent: Unity Semiconductor Corporation

20090167353 - State machines using resistivity-sensitive memories: State machines using resistivity-sensitive memory elements are disclosed. The state machine includes a next state logic comprising a non-volatile memory including a resistivity-sensitive memory element and receiving an input, a state storage device connected to the next state logic including a connection to provide a state of the state machine... Agent: Unity Semiconductor Corporation

20090167354 - Non-sequentially configurable ic: Some embodiments of the invention provide a configurable integrated circuit (IC). The IC includes at least fifty configurable circuits arranged in an array having a plurality of rows and a plurality of columns. Each configurable circuit for configurably performing a set of operations. At least a first configurable circuit reconfigures... Agent: Adeli & Tollen, LLP

20090167355 - High performance pulsed buffer: An integrated circuit (200) includes a pulsed buffer (226) having dynamic logic. The dynamic logic includes a first input device (215) coupled to receive a data input signal, a first dynamic node (222), and a first pull up device (224) which when conducting couples the first dynamic node (222) to... Agent: Texas Instruments Incorporated

20090167356 - Monolithically integrated multiplexer-translator-demultiplexer circuit and method: A monolithically integrated multiplexer-translator-demultiplexer and a method for multiplexing and translating an electrical signal or demultiplexing and translating an electrical signal. A multiplexer and a demultiplexer are monolithically integrated with a translator. Circuits that operate at different voltage supply levels from each other may be coupled to the multiplexer and... Agent: Semiconductor Components Industries, LLC Intellectual Property Dept. - A700

20090167357 - Extending drive capability in integrated circuits utilizing programmable-voltage output circuits: An integrated circuit (IC) includes an output driver circuit portion that is electrically configurable, via a configuration input, to operate in either a first mode or a second mode corresponding to an indication of a condition of the IC, such as a supply voltage indication, the first mode and the... Agent: Patterson, Thuente, Skaar & Christensen, P.A.

20090167358 - Fully interruptible domino latch: A domino latch is provided that comprises a forward path circuit and a feedback path circuit. The feedback path includes a plurality of keeper transistors, an inverter, and at least one interrupt transistor to cut off the feedback path circuit and prevent signal contention on the output node between the... Agent: Ked & Associates, LLP Intel Corporation

20090167359 - Current mode logic circuit and control apparatus therefor: Embodiments relate to a current mode logic circuit, which may include a first NMOS transistor whose drain may be coupled to a first load and whose gate may be coupled to an input terminal through which data may be inputted, a second NMOS transistor whose drain may be coupled to... Agent: Sherr & Vaughn, PLLC