Electronic digital logic circuitry inventions 03/09

20090079465 - Semiconductor integrated circuit: Cell areas each comprising a plurality of core cells arranged therein, and power switches disposed corresponding to the respective cell areas are provided. A plurality of power shutdown areas are respectively formed in units of the core cells. In each power shutdown area, power shutdown is enabled by the power... Agent: Miles & Stockbridge PC

20090079466 - Soft-reconfigurable massively parallel architecture and programming system: The present disclosure provides an architecture that enables massive parallel processing on an IC while alleviating control congestion, memory access congestion and wiring congestion, together with high flexibility where the processing units are soft-arranged to perform different tasks. In an embodiment, the present architecture includes a functional block with a... Agent: Tue Nguyen

20090079468 - Debug network for a configurable ic: Some embodiments of the invention provide a configurable integrated circuit (IC) that includes several configurable circuits grouped in several tiles. The configurable IC also includes a configuration network for loading configuration data into the IC, where the configuration data is for configuring several of the configurable circuit. In some embodiments,... Agent: Adeli & Tollen, LLP

20090079467 - Method and apparatus for upgrading fpga/cpld flash devices: A method for programming a non-volatile memory associated with a programmable logic device (PLD). The method for programming a non-volatile memory includes a reading a data file, wherein the data file includes information to be programmed into the non-volatile memory. The data file is then translated into a plurality of... Agent: Mhkkg/sun

20090079469 - Semiconductor integrated circuit: A semiconductor integrated circuit able to reduce a load of layout design when arranging switches in a power lines for preventing leakage current and able to reduce the influence of a voltage drop occurring in the switches on a signal delay, wherein a plurality of groups of power lines are... Agent: Rader Fishman & Grauer PLLC

20090072855 - Dynamically adjusting operation of a circuit within a semiconductor device: Systems and methods for dynamically adjusting operation of a circuit within a semiconductor device are described herein. At least some illustrative embodiments include a system that includes a matching circuit including a first plurality of switching devices coupled to each other in parallel and not coupled in parallel to a... Agent: Leffert Jay & Polglaze, P.A.

20090072857 - Integrated circuits with adjustable body bias and power supply circuitry: An integrated circuit is provided with adjustable transistor body bias circuitry and adjustable power supply circuitry. The adjustable circuitry may be used to selectively apply body bias voltages and power supply voltages to blocks of programmable logic, memory blocks, and other circuit blocks on the integrated circuit. The body bias... Agent: G. Victor Treyz

20090072856 - Memory controller for heterogeneous configurable integrated circuits: A system including a configurable memory controller, a memory interface, and a configurable high speed communications fabric comprising a plurality of interconnect stations arranged in an array and operable to implement a plurality of pipelined buses, where the configurable memory controller is operably coupled to the configurable high speed communications... Agent: Osha Liang L.L.P.

20090072858 - Heterogeneous configurable integrated circuit: A system including a plurality of programmable logic blocks, a plurality of special-purpose blocks, and a configurable high-speed mesh interconnect fabric operatively connecting the plurality of programmable logic blocks and the plurality of special-purpose blocks, where the configurable high-speed mesh interconnect fabric is configured to implement a plurality of interconnect... Agent: Osha Liang L.L.P.

20090072859 - High speed io buffer: A bi-directional buffer is provided. The buffer includes a driver, a receiver, and a circuitry configured to select a driving mode in response to detecting a first condition and to select a receiving mode in response to detecting a second condition. The driving mode has a first impedance and the... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20090072860 - Off-chip driver apparatus, systems, and methods: Apparatus, methods, and systems include an off-chip driver having an output drive coupled in parallel with the off-chip driver to provide initial drive emphasis for a period of time. The output drive may include a first transistor and a second transistor coupled to an output of the off-chip driver to... Agent: Schwegman, Lundberg & Woessner/micron

20090072861 - Wireline transmission circuit: A wireline transmission circuit includes a first circuit that produces a first variable current, a second circuit that produces a first static current, a trans-impedance amplifier that outputs a first analog signal at a first output node in response to the first variable current and the first static current received... Agent: Xin Wen

20090072862 - Semiconductor device and display device: The invention provides a low cost and high performance functional circuit by reducing time required for the repetition of logic synthesis and routing of layout in a functional circuit design. A standard cell used for the logic synthesis and the routing of layout is configured by a logic circuit on... Agent: Fish & Richardson P.C.

20090072863 - Transmission gate multiplexer: A technique for operating a multiplexer includes selecting, from multiple transmission gate groups, a transmission gate group. A transmission gate is selected from the selected transmission gate group. Finally, a data signal associated with the selected transmission gate is provided at an output of the multiplexer.... Agent: Dillon & Yudell LLP

20090072864 - Output circuit: An output circuit including an input terminal; an output terminal; a PMOS transistor connected with a positive side of a power voltage and the output terminal; a NMOS transistor connected with a negative side of the power supply voltage and the output terminal; a first inverter, to which a gate... Agent: Cooper & Dunham, LLP

20090066361 - Semiconductor integrated circuit device and storage apparatus having the same: A semiconductor integrated circuit device includes: a first large scale integrated circuit including a plurality of first logical blocks; a programmable second large scale integrated circuit connected the first large scale integrated circuit and including a second logical block; a memory storing data for achieving the purposes of the first... Agent: Stanley P. Fisher Reed Smith LLP

20090066362 - Semiconductor integrated circuit: A semiconductor integrated circuit having a test circuit for inspecting states of connections between a plurality of pads and respective external terminals by bonding wires. The test circuit comprises, for each of a plurality of pads, a control terminal provided to receive a control signal of a logic level equal... Agent: Volentine & Whitt PLLC

20090066363 - Semiconductor memory device: A semiconductor memory device includes a code channel for outputting a plurality of code signals based on a code control signal inputted from an external source; a termination resistor decoder for decoding a chip selection signal, an on die termination (ODT) control signal and the plurality of code signals and... Agent: Blakely Sokoloff Taylor & Zafman LLP

20090066364 - Nonvolatile programmable logic circuit: A nonvolatile programmable logic circuit using a ferroelectric memory performs a nonvolatile memory function and an operation function without additional memory devices, thereby reducing power consumption. Also, a nonvolatile ferroelectric memory is applied to a FPGA (Field Programmable Gate Array), thereby preventing leakage of internal data and reducing the area... Agent: Townsend And Townsend And Crew, LLP

20090066365 - Reprogrammable three dimensional field programmable gate arrays: 3D FPGAs are elucidated with (a) interlayer information sharing, (b) intermittent and variable timing of layer configuration and (c) multilayer multi-functionality. 3D FPGAs are applied to reprogrammable SoCs.... Agent: Neal Solomon

20090066366 - Reprogrammable three dimensional intelligent system on a chip: A high performance 3D semiconductor is described with cubic dimensional multi-node reprogrammable components for multi-functionality and intelligent behaviors. The system is modeled with dynamic EDA techniques. Applications of the intelligent SoC are specified, particularly embedded, multifunctional, DSP and high-performance computing applications.... Agent: Neal Solomon

20090066367 - Input output device for mixed-voltage tolerant: An input output device coupled between a core circuit and a pad and including an output cell, an input cell, and a pre-driver. The output cell includes an output stage and a voltage level converter. The output stage includes a first transistor and a second transistor connected to the first... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20090066368 - Digital calibration circuits, devices and systems including same, and methods of operation: A calibration circuit for matching the output impedance of a driver by calibrating adjustments to the driver is described. The calibration circuit includes a driver circuit with a plurality of calibration transistors configured to receive a plurality of adjustment signals. The calibration circuit also includes a comparator circuit, and a... Agent: Dorsey & Whitney LLP Intellectual Property Department

20090066369 - Clock guided logic with reduced switching: Methods and apparatuses for optimizing switching delay in integrated circuits are described. Combinational logic gates are modified with precharge circuitry and instantiated in order to reduce switching transitions of circuit elements in a signal path.... Agent: Perkins Coie LLP

20090058457 - Redundant critical path circuits to meet performance requirement: Method, system, IC and design structure for meeting a performance requirement using redundant critical path circuits, are disclosed. In one embodiment, the IC includes a plurality of redundant critical path circuits, wherein at least one of the plurality of redundant critical path circuits meeting a performance requirement is operational and... Agent: Hoffman Warnick LLC

20090058458 - Digital-to-analog converting circuit and apparatus for on-die termination using the same: A digital-to-analogue converting circuit includes a driver leg having a plurality of resistance elements between a power supply voltage terminal and a ground voltage terminal, wherein at least one of the plurality of resistance elements is a variable resistor, and a code level changing unit for outputting a level-changed code... Agent: Baker & Mckenzie LLP Patent Department

20090058459 - Auto-trim circuit: An auto-trim circuit that sets trim bits for an integrated circuit includes a coarse bit calibration circuit for determining a first portion of the trim bits as a set of coarse bits, and a fine bit calibration circuit for determining a second portion of the trim bits as a set... Agent: Schwegman, Lundberg & Woessner / Atmel

20090058461 - Configurable circuits, ic's, and systems: Some embodiments of the invention provide a configurable integrated circuit (IC). The IC includes a logic circuit for receiving input data sets and configuration data sets and performing several functions on the input data sets. Each configuration data set specifies a particular function that the logic circuit has to perform... Agent: Adeli & Tollen, LLP

20090058462 - Field programmable gate array including a nonvolatile user memory and method for programming: An integrated circuit includes a programmable logic unit and an on-chip non-volatile memory. A JTAG port, TAP controller circuit, and program/erase control circuitry provide user access to the non-volatile memory for storage of user data. The non-volatile memory may also be used to store device data such as a serial... Agent: Lewis And Roca LLP

20090058460 - Nonvolatile programmable logic circuit: A nonvolatile programmable logic circuit using a ferroelectric memory performs a nonvolatile memory function and an operation function without additional memory devices, thereby reducing power consumption. Also, a nonvolatile ferroelectric memory is applied to a FPGA (Field Programmable Gate Array), thereby preventing leakage of internal data and reducing the area... Agent: Townsend And Townsend And Crew, LLP

20090058463 - Sequential circuit element including a single clocked transistor: A method is disclosed that includes propagating data via a first data path of a sequential circuit element in response to a clock signal received at a single clocked transistor of the sequential circuit element. The method also includes retaining information related to the data propagated via the first path... Agent: Qualcomm Incorporated

20090058464 - Current mode logic-complementary metal oxide semiconductor converter: A current mode logic (CML)-complementary metal oxide semiconductor (CMOS) converter prevents change of a duty ratio to stably operate during an operation for converting a CML level signal into a CMOS level signal. The CML-CMOS converter includes a reference level shifting unit configured to receive a CML signal swinging about... Agent: Blakely Sokoloff Taylor & Zafman LLP

20090058465 - Circuit combining level shift function with gated reset: A circuit (01) combining level shift function with gated reset is described, performing a simple logic function with inputs supplied from a lower voltage (VD) and a drive out at its output (05) with a higher voltage (VC). Said circuit (01) comprises a gated reset scheme plus devices (10, 30,... Agent: International Business Machines Corporation