Electronic digital logic circuitry inventions 07/08

20080180129 - Fpga architecture with threshold voltage compensation and reduced leakage: A method for providing transistor threshold voltage compensation in an FPGA integrated circuit with a plurality of programmable circuit blocks includes measuring the effective transistor threshold voltage values of each programmable circuit block and adjusting the effective transistor threshold voltage values of each programmable circuit block to compensate for the... Agent: Lewis And Roca, LLP

20080180130 - Interface circuit and semiconductor integrated circuit: An interface circuit includes a driver circuit (12) made up of a combination of a plurality of transistors, a calibration circuit (14) for performing selection of on and off of one or more of the plurality of transistors for adjusting on-resistance thereof, and a terminating resistor (13) that is connected... Agent: Greer, Burns & Crain

20080180131 - Configurable ic with interconnect circuits that also perform storage operations: Some embodiments provide a configurable IC that includes several configurable logic circuits for configurably performing computations. The configurable IC also includes several configurable routing circuits for configurably routing signals to and from the logic circuits. In some embodiments, at least a set of the routing circuits are routing/storage circuits. Each... Agent: Adeli & Tollen, LLP

20080180132 - Semiconductor device and method of fabricating the same: This invention efficiently suppresses the power noise of an LSI. A semiconductor device includes first and second interconnection layers. The first interconnection layer has a source voltage supply line of a first potential positioned to extend along logic cells in a first direction. The second interconnection layer lies on an... Agent: Mcginn Intellectual Property Law Group, PLLC

20080180133 - Expandable decoding circuit and decoding method: An expandable decoding circuit includes a latch unit, a latch result selecting unit, and at least one decoding circuit. The latch unit latches raw data and outputs the latch values and the latch inverse-values of the raw data. The latch result selecting unit composes the latch values and the latch... Agent: Rosenberg, Klein & Lee

20080174337 - Systems and methods for a drive preparation device: A physically small, inexpensive to manufacture stand-alone dedicated function drive preparation device connects to a long term storage device such as a hard drive. The drive preparation device performs operations on the storage device such as formatting, copying, verifying, configuring, testing, and cleaning. Additionally the device may be configured set... Agent: Steve Bress

20080174338 - Filter circuit for removing noise pulses from digital input signal: A filter circuit includes an input-signal processing section and a signal-level determining section. The input-signal processing section samples and holds a digital input signal input according to a clock signal, outputs the holding signal as a sampling input signal when a level of the digital input signal is constant between... Agent: Posz Law Group, Plc

20080174339 - Method and system for communication employing dual slew rates: A bus for implementation with a computer system, as well as a computer processing device capable of interacting with such a bus, and a method of communicating signals over a bus, are disclosed. In at least one embodiment, the bus is a processor bus that includes a first processor bus... Agent: Hewlett Packard Company

20080174340 - Optimized charge sharing for data bus skew applications: A circuit and method provide a charge sharing function during skewed data bus conditions in an integrated circuit memory. The charge sharing circuit includes two additional circuit blocks, one coupled to each of the capacitive lines in the charge-sharing line set, to provide the charge recycling feature. An extra clock... Agent: Hogan & Hartson LLP

20080169833 - Integrated circuit with anti-counterfeiting measures: An anti-counterfeiting circuit that is incorporated into an authentic integrated circuit (IC) design, which induces a random failure in a counterfeited IC when the counterfeit IC is manufactured from a reverse-engineered authentic IC. The anti-counterfeiting circuit uses two signals of differing frequencies, which activate a disrupt signal when the two... Agent: W. Riyon Harding International Business Machines Corporation

20080169834 - Signal isolators using micro-transformers: A logic signal isolator comprising a transformer having a primary winding and a secondary winding; a transmitter circuit which drives said primary winding in response to a received logic signal, such that in response to a first type of edge in the logic signal, a signal of a first predetermined... Agent: Iandiorio & Teska

20080169835 - Semiconductor integrated circuit apparatus: A semiconductor integrated circuit apparatus relates to a structured ASIC that wires functional cells in a common wiring layer, which is not dependent on a user circuit and common to several sorts, and a customized layer provided over the common wiring layer to form the user circuit. In the semiconductor... Agent: Young & Thompson

20080169836 - Configuration random access memory: Integrated circuits such as programmable logic device integrated circuits are provided that have configuration random-access memory elements. The configuration random-access memory elements are loaded with configuration data to customize programmable logic on the integrated circuits. Each memory element has a capacitor that stores data for that memory element. A pair... Agent: G. Victor Treyz

20080169837 - Current control mechanism for dynamic logic keeper circuits in an integrated circuit and method of regulating same: An integrated circuit that includes a gate control voltage generator that supplies a current control gate voltage to a plurality of current control devices of a corresponding plurality of dynamic logic circuits each having a keeper circuit. The gate control voltage generator provides, via current control gate voltage, global control... Agent: Downs Rachlin Martin PLLC

20080169838 - Current mode circuitry to modulate a common mode voltage: In some embodiments, a chip includes transmitters to transmit differential signals on conductors; and current mode circuitry to selectively modulate a common mode voltage of the differential signals to communicate data. In other embodiments, a system includes a first chip to transmit first and second differential signals on conductors, and... Agent: Silicon / Blakely Blakely Sokoloff Taylor & Zafman

20080169839 - Structure for a current control mechanism for dynamic logic keeper circuits: A design structure for an integrated circuit that includes a gate control voltage generator that supplies a current control gate voltage to a plurality of current control devices of a corresponding plurality of dynamic logic circuits each having a keeper circuit. The gate control voltage generator provides, via current control... Agent: Greenblum & Bernstein, P.L.C

20080169840 - Semiconductor device having a pseudo power supply wiring: A semiconductor device including an AND-NOR composite gate of which AND unit is supplied with input signals IN and VDD and NOR unit is supplied with an inverted signal EB of an enable signal E, and an AND-NOR composite gate of which AND unit is supplied with an input signal... Agent: Young & Thompson

20080169842 - Design structure to reduce power consumption within a clock gated synchronous circuit and clock gated synchronous circuit: A design structure to reduce power consumption within a clock gated synchronous circuit, said synchronous circuit comprising at least two successive stages, wherein each stage if activated propagates a data signal cycle by cycle to a succeeding stage the two successive stages comprising at least a control register, a data... Agent: Richard M. Kotulak International Business Machines Corporation

20080169841 - Method to reduce power consumption within a clock gated synchronous circuit and clock gated synchronous circuit: propagating the data signal and the local clock activation signal synchronously cycle by cycle from a particular stage to a succeeding stage whenever a local clock activation signal at the particular stage by derivation from the clock activation signal or by propagation through the synchronous circuit changes its value between... Agent: W. Riyon Harding Interational Business Machines Corporation

20080164903 - System architectures for and methods of scheduling on-chip and across-chip noise events in an integrated circuit: Integrated circuit (IC) system architectures that allow for the reduction of on-chip or across-chip transient noise budgets by providing a means to avoid simultaneous high current demand events from at least two functional logic blocks, i.e., noise contributors, are disclosed. Embodiments of the IC systems architectures include at least one... Agent: Downs Rachlin Martin PLLC

20080164905 - I/o interface circuit of intergrated circuit: A plurality of transistor pairs of Pch and Nch transistors are connected in series between VDD and GND. An I/O terminal is connected to each connection point of the transistor pairs. Two transistor pairs constitute one transistor set, in which each of two Pch transistors and two Nch transistors have... Agent: Mcginn Intellectual Property Law Group, PLLC

20080164904 - Semiconductor memory device with ability to effectively adjust operation time for on-die termination: A semiconductor memory device is effectively able to adjust operation time for on-die termination (ODT). The semiconductor memory device includes a latency control unit, a control signal generating unit, a trimming control unit, and a termination circuit. The latency control unit produces an ODT driving enable signal by delaying an... Agent: Mcdermott Will & Emery LLP

20080164906 - Storage elements for a configurable ic and method and apparatus for accessing data stored in the storage elements: Some embodiments provide a circuit for accessing stored data in a configurable IC that includes several configurable circuits. The IC also includes several storage circuits. Each storage circuit has (1) several storage elements for storing data for the configurable circuits, and (2) output circuitry for outputting data stored in the... Agent: Adeli & Tollen, LLP

20080164907 - Customized silicon chips produced using dynamically configurable polymorphic network: A fabrication technique called “component and polymorphic network,” in which semiconductor chips are made from small prefabricated bare electronic component dies, e.g., application specific integrated circuits (ASICs), that are assembled according to designer specifications, and bonded to a semiconductor substrate comprising the polymorphic network. The component and polymorphic network assembly... Agent: Law Offices Of Ronald M Anderson

20080164908 - Data-driven finite state machine engine for flow control: Finite state machines are provided to run instances of user-defined routines within a computing system. The finite state machines and updates to the finite state machines are user-defined and are checked for compliance with one or more prescribed schemas by a finite state machine engine. Compliant finite state machine specifications... Agent: George A. Willingham Attoryney-at-law

20080164909 - De-glitch circuit: A digital logic circuit and method for de-glitching an input signal. The circuit removes distortion that occurs during a “de-glitching” time period that follows each transition of the input signal from 0 to 1 or from 1 to 0. The circuit can remove such distortion from the input signal without... Agent: Robert J. Stern

20080164910 - High speed flip-flop: A flip-flop circuit includes a precharging circuit which precharges a first circuit node in response to a first pulse signal and an estimation circuit that receives an input signal and a second pulse signal. The estimation circuit discharges the voltage from the first node in response to the input signal... Agent: Volentine & Whitt PLLC

20080164911 - High voltage tolerant port driver: A plurality of output drive devices are capable of tolerating an overvoltage produced by an electrical connection with an external device operating in a high-voltage supply realm. The drive devices are capable of sustaining a continuous electrical connection to the elevated voltage levels and produce communications at an output voltage... Agent: Schwegman, Lundberg & Woessner / Atmel

20080164912 - Method and system for low-power level-sensitive scan design latch with power-gated logic: A method of preventing current leakage in logic circuits within level sensitive scan design (LSSD) latch circuits in an application specific integrated circuit (ASIC). When the ASIC is in a manufacturing test mode, a gating signal at an input terminal of a power gating circuit is set to exceed a... Agent: Dillon & Yudell LLP

20080157811 - Data output driver: A data output driver that reduces signal skew includes a data multiplexer which reduces a load of a path through which a pull-up/pull-down control signal is generated by a logic-combination of a data signal. It also decreases the number of bits of a pull-up/pull-down resistance-adjusting code signal, and outputs a... Agent: Ladas & Parry LLP

20080157812 - Chip with in-circuit programability: A circuit for enabling an IC having a normal mode for performing normal functions and a program mode for programming settings of the IC to use same pins in both modes. The circuit includes an input circuit for receiving the input data; internal circuits for processing the input data in... Agent: Ostrolenk Faber Gerb & Soffen

20080157813 - Apparatus and methods for communicating with programmable logic devices: A circuit arrangement includes a programmable logic device. The programmable logic device includes configuration logic circuitry. The programmable logic device also includes configurable interconnects. The circuit arrangement further includes a storage device configured to provide data to the programmable logic device. The storage device communicates with the programmable logic device... Agent: Townsend And Townsend And Crew LLP/ 015114

20080157814 - Latch circuit, flip-flop circuit including the same, and logic circuit: Disclosed herein is a latch circuit including a switching circuit for switching output/non-output of an externally inputted external signal based on a predetermined control signal, a state retaining circuit for inputting a signal outputted from the switching circuit as an input signal, and retaining the state of the logical level... Agent: Arent Fox LLP

20080157815 - High speed voltage level shifter cicruits: A level shifter circuit for shifting a voltage level of a logic signal from a first voltage to a second voltage, and a design structure on which the subject circuit reside are provided. An input stage operating in a domain of a first voltage supply includes a first inverter receiving... Agent: Ibm Corporation Rochester Ip Law Dept 917

20080157816 - Level conversion circuit: A level conversion circuit capable of realizing low-power/high-speed operation and suppression of variations in input/output characteristics due to variations in source voltage and temperature and device variation. The level conversion circuit comprises: a source follower circuit including a first transistor to input an AC signal of CML level thereto and... Agent: Stanley P. Fisher Reed Smith LLP

20080157817 - Method and apparatus for generating a reference signal and generating a scaled output signal based on an input signal: An input signal is routed to a first logic one reference signal generator or alternatively routed to a second logic one reference signal generator based at least one a voltage level of the input signal. When the voltage level of the input signal is less than a threshold value, the... Agent: Advanced Micro Devices, Inc. C/o Vedder Price P.c.

20080157818 - Mixed-voltage input/output buffer: A mixed-voltage I/O buffer comprises an input circuit, an output circuit, an I/O pad, a pre-driver circuit coupled to the output circuit, two added coupled N-type transistors, and a dynamical gate-controlled circuit coupled to each gate of the two N-type transistors and the pre-driver circuit; one of the N-type transistors... Agent: Sinorica, Llc