Electronic digital logic circuitry inventions 10/06

20060238215 - Multi-port memory device: A multi-port memory device improves efficiency of a global data drive by controlling the global data bus to transmit data in a predetermined range. The multi-port memory device includes a global data bus; transmitters and receivers; a termination unit for controlling the global data bus to transmit the data in...

20060238216 - Semiconductor integrated circuit: A semiconductor integrated circuit includes a memory circuit, an oscillator circuit which generates an internal clock signal, based on control information held in the memory circuit, and a logic circuit which generates control information that causes the frequency of the internal clock signal to coincide with the frequency of an...

20060238217 - Active interconnects and control points in integrated circuits: In various embodiments of the present invention, tunable resistors are introduced at the interconnect layer of integrated circuits in order to provide a means for adjusting internal voltage and/or current levels within the integrated circuit to repair defective components or to configure the integrated circuit following manufacture. For example, when...

20060238218 - Integrated circuit and method of improving signal integrity: An Integrated Circuits (ICs) comprising a first output stage circuit and a second output stage circuit that share common input terminals and an output terminal of the first and second output stage circuits being selectably coupled between the input terminals and the output terminal in preference to the other....

20060238219 - Signal level shifting bus switch: A signal level shifting bus switch is connected between a first semiconductor device driven by a first supply voltage VccA having a first difference from a reference voltage and a second semiconductor device driven by a second supply voltage VccB having a second difference, less than the first difference, from...

20060238220 - Method of using mixed multi-vt devices in a cell-based design: A method is disclosed for utilizing mixed low threshold voltage (low-Vt) and high threshold voltage (high-Vt) devices in a cell-based design such that a tradeoff of both the circuit speed and power performance may be achieved. Using cells having non-uniform threshold devices for designing circuit, the speed or/and power optimization...

20060238221 - Circuit having source follower and semiconductor device having the circuit: When a potential of a power supply line varies according to a flowing current, the gate-source voltage Vgs of a transistor also varies, leading to variations in the constant current between each source follower. In order to solve this problem, a potential Vb of the gate terminal of a transistor...

20060238222 - Semiconductor device and boost circuit: A semiconductor device, includes: a field-effect transistor that configures a charge-pump circuit; and a supporting substrate that supports the field-effect transistor so that the field-effect transistor provided on the supporting substrate becomes warpable in a channel direction....

20060238223 - Multiplexer interface to a nanoscale-crossbar: Various embodiments of the present invention are directed to electronic means for reading the content of a nanowire-crossbar memory. In one embodiment of the present invention, a microscale or sub-microscale signal line is interconnected with one set of parallel nanowires emanating from a nanowire-crossbar memory by configurable, nanowire-junction switches. The...

20060232294 - Input termination circuits and methods for terminating inputs: An input signal provided to an input terminal is terminated by coupling the input terminal to a ground voltage through a pull down transistor if the input signal at the input terminal is at a “high” level and coupling the input terminal to a power voltage through a pull up...

20060232295 - Upgradeable and reconfigurable programmable logic device: Programmable logic devices and techniques for programming and/or reconfiguring these devices are disclosed. For example, in accordance with an embodiment of the present invention, a programmable logic device is disclosed that incorporates flash memory and SRAM and includes multiple data ports for programming the flash memory and/or the SRAM....

20060232296 - Fast processing path using field programmable gate array logic unit: The described embodiments relate to the general area of Field Programmable Gate Arrays (FPGAs), and, in particular, to the architecture and the structure of the building blocks of the FPGAs. Proposed logic units, as separate units or a chain of units, which are mainly comprised of look-up tables, multiplexers, and...

20060232297 - Driver circuit: A driver circuit is improved in drive capability corresponding to a resolution increase for a CCD sensor while suppressing chip size of a driver circuit. A preceding-stage circuit, operating on VDD2 (>VDD) and VLOW2 (<VLOW), is provided in a stage preceding an output-stage circuit operating on VDD and VLOW. The...

20060232298 - Signal issuing unit: A signal issuing unit for issuance of at least one electrical output signal. The signal issuing unit includes: At least one contact unit, which is embodied in such a manner that a digital electrical signal or an analog electrical signal can be issued by way of it; at least one...

20060232299 - Semiconductor integrated circuit device: A semiconductor integrated circuit device (1) includes: a transistor switch (SWA) for electrically connecting and disconnecting output of a flip-flop (FF64) of a shift register (SR1) and input of a flip-flop (FF65) of a shift register (SR2); and a transistor switch (SWB) for electrically connecting and disconnecting an input driver...

20060232300 - Semiconductor integrated circuit device manufacturing method: To reduce variation in channel lengths of MOS transistors within a circuit functional module. When exposure of a wafer substrate having a semiconductor integrated circuit device 1 including a plurality of CMOS circuit module regions CCM11 to CCM22 to be subject to substrate bias control formed in a core region...

20060232301 - Matched-impedance surface-mount technology footprints: Disclosed are methodologies for defining matched-impedance surface-mount technology footprints on a substrate such as a printed circuit board, for example, that is adapted to receive an electrical component having an arrangement of terminal leads. Such a footprint may include an arrangement of electrically-conductive pads and an arrangement of electrically-conductive vias....

20060226867 - Impedance matching: There is provided apparatus for connecting between a data source or a data receiver and a data line The apparatus comprises an impedance and an impedance controller arranged to continually adjust the value of the active impedance so as to control the relative impedances of the total source, the total...

20060226868 - Semiconductor device capable of controlling ocd and odt circuits and control method used by the semiconductor device: Provided is a semiconductor device capable of controlling an on-die-termination (ODT) circuit and an off-chip-driver (OCD) circuit and a control method used by the semiconductor device. The semiconductor device includes a control code generation unit generating a control code in response to a control signal, an addition unit adding an...

20060226870 - Control circuit for providing command signals to a clock generator: A control circuit for providing command signals to a clock generator includes: a voltage input terminal, a voltage output terminal, a voltage control terminal, a transistor, a first resistor, and a second resistor. The first and second resistors are connected in series between the voltage input terminal and ground. The...

20060226869 - Method and apparatus for controlling a voltage level: A voltage level control device operable to control a voltage level supplied from a first voltage level source to circuitry; said circuitry being arranged between said first voltage level source and a second voltage level source, said first and second voltage level sources being operable to output different voltage levels;...

20060226871 - Data input/output circuit included in semiconductor memory device: A control circuit receives an external control signal in synchronism with an internal clock and generates an address signal and internal control signals. A data multiplexer has a plurality of input parallel lines and a plurality of output parallel lines and is switched to one of a first output state...

20060226874 - Interface circuit including voltage level shifter: An interface circuit includes a level shifter which shifts a voltage level of a first signal and a second signal from a first voltage level to a second voltage level. A first PMOS transistor is gated to an output of the level shifter and connected between a first node and...

20060226876 - Level shift circuit, and actuator apparatus and optical switch system using same: A level shift circuit that shifts both the high potential level and the low potential level of an input voltage, a micro actuator and an optical switch using such a level shift circuit are disclosed. A CMOS inverter 11 connected to a +5 V power source and a 0 V...

20060226875 - Level shifter circuit: A level shifter circuit has first to fourth transistors and a resistive element. The first transistor is activated in response to a logic signal whose high level voltage is a first voltage. The second transistor is activated in response to the inverse logic signal. Each of the first and second...

20060226873 - Level shifter translator: Level shifter translator of the type comprising at least one first transistor and one second MOS transistor belonging to respective circuit branches connected with a first common conduction terminal and connected towards a first potential reference and receiving, on the respective conduction terminals, input differential voltages, the first and the...

20060226872 - Substrate for electro-optical device, testing method thereof, electro-optical device and electronic apparatus: A substrate for an electro-optical device includes a plurality of scanning lines; a plurality of signal lines that are provided so as to cross the plurality of corresponding scanning lines; a plurality of pixel electrodes that are disposed in a matrix so as to correspond to intersections of the plurality...

20060220672 - Boundary scan controller, semiconductor device, method for identifying semiconductor circuit chip of semiconductor device, and method for controlling semiconductor circuit chip of semiconductor device: An object of the invention is to provide a boundary scan controller that allows a boundary scan to be executed and also allows a semiconductor apparatus to be manufactured in such a manner that the same type of semiconductor circuit chips are stacked. When identification data stored in memory means...

20060220673 - Semiconductor device and an image sensing device: SI in a semiconductor device in which a plurality of semiconductor chips differing in withstand voltage or in noise immunity, such as a multi-chip module, is to be improved. The semiconductor device comprises a first semiconductor chip and a second semiconductor chip mounted over a package substrate which has a...

20060220674 - Pre-drivers for current-mode i/o drivers: A pre-driver circuit includes a first stage to generate a first pre-driver signal and a second stage to generate a second pre-driver signal. The first and second stages are to generate the first and second pre-driver signals to cross at a point which reduces rise-and-fall mismatch in differential signal outputs...

20060220675 - Transmission line driver: A transmission line driver with slew rate control includes high and low side ramp generators for generating charge and discharge ramp signals, respectively, which are input to respective comparators and a pair of source follower transistors. A pair of additional transistors is connected to the pair of source follower transistors...

20060220676 - Semiconductor device: A semiconductor device includes an internal circuit having a data holding circuit, and at least one leakage current cut-off circuit provided between the internal circuit and a power supply or a ground, and is capable of preventing data in the data holding circuit from being destroyed. A ground-side cut-off circuit...

20060220680 - Hardware and software programmable fuses for memory repair: The present invention relates to a system and method for increasing the manufacturing yield of a plurality of memory cells used in cell arrays. A programmable fuse, having both hardware and software elements, is used with the plurality of memory cells to indicate that at least one memory cell is...

20060220679 - Low power scan design and delay fault testing technique using first level supply gating: A circuit includes an input block and a combinational logic block. The input block has reconfigurable latches that are connected serially during testing times such that an output of one of the latches is connected to an input of a successive latch. The latches are directly connected to first level...

20060220678 - Method and system for elastic signal pipelining: A method for configuring a signal path within a digital integrated circuit. The method includes transmitting an output from a first logic module, receiving the output at a second logic module, and conveying the output from the first logic module to the second logic module by using a configurable signal...

20060220677 - Signal measurement systems and methods: Systems and methods are disclosed for measuring signals on an integrated circuit die. In one embodiment, a reference signal is distributed to die locations proximal to the signals to be measured. The reference signal is transmitted over transport paths coupling each of the signals to be measured to the die...

20060220681 - Methods and apparatus to dc couple lvds driver to cml levels: Circuitry and methods are provided for an LVDS-like transmitter that may be able to DC couple to a receiver having a CML termination scheme. Replacing the common mode voltage source of an LVDS transmitter with a resistive pulldown to ground may allow the transmitter to interface in a DC coupled...

20060220682 - Voltage level converter circuit and semiconductor integrated circuit device: Differential signals are supplied to gates of first and second transistors. One end and a gate of a third transistor are connected to a signal output node. One end and a gate of a fourth transistor are connected to the other end of the second transistor. A fifth transistor is...

20060220683 - Semiconductor memory device for internally controlling strength of output driver: Provided is a semiconductor memory device that is capable of internally controlling a strength of an output driver. The semiconductor memory device includes: an OCD (off chip driver) control signal generator for decoding EMRS and addresses to generate a plurality of external strength control signals or an internal driving signal;...

20060220684 - Buffer circuit with current limiting: A buffer circuit is configured to generate an output signal which is a function of an input signal received by the buffer circuit, the buffer circuit being selectively operative in one of at least two modes in response to a control signal. In a first mode, the buffer circuit is...

20060220685 - High speed driver for serial communications: A differential output driver capable for selectively switching from an emphasis mode, a non-emphasis mode, and an idle state uses one pull-up device and two pull-down devices per output lead. The pull-up device is preferably always activated, and one or the other or both or neither of the pull-down devices...

20060220686 - Tolerant input circuit: A tolerant input circuit that functions stably regardless of fabrication differences without having to adjust the threshold value of an input circuit. The tolerant input circuit includes a step-down device configured by an N-channel MOS transistor connected between an input pad and the input circuit. Voltage from a power supply...

20060220687 - Chip with adjustable pinout function and method thereof: A chip with an adjustable pinout function is disclosed. The chip includes a first pinout, a second pinout, a logic circuit, and a selecting circuit. The logic circuit includes a first port and a second port. The selecting circuit, which is coupled to the logic circuit, the first pinout, and...