Electronic digital logic circuitry inventions 02/06

20060038582 - Electronic circuit with asynchronously operating components: An electronic circuit that comprises components that operate asynchronously of one another. An interface element has inputs coupled to a respective one of the components. The interface element supplies a logic output signal that is a logic function of signals at the inputs and dependent on the relative timing of...

20060038583 - Dynamic on-die termination management: A dynamic on-die termination circuit for a read-only node is disclosed herein....

20060038584 - Semiconductor device: The semiconductor device according to the present invention comprises an output MOS transistor M0, an MOS transistor M3 connected between a gate G1 of the output MOS transistor M0 and a ground voltage GND, a parasitic transistor Tr1 which is formed in parallel with the MOS transistor M3 with the...

20060038585 - Apparatus and methods for configuration of programmable logic devices: A programmable logic device (PLD) includes configuration circuitry. The configuration circuitry is adapted to receive serial configuration data from a configuration device. The configuration circuitry is further adapted to program a function of the PLD without using an input buffer to store the configuration data....

20060038586 - Apparatus and methods for communicating with programmable logic devices: A circuit arrangement includes a programmable logic device. The programmable logic device includes configuration logic circuitry. The programmable logic device also includes configurable interconnects. The circuit arrangement further includes a storage device configured to provide data to the programmable logic device. The storage device communicates with the programmable logic device...

20060038587 - Avoiding oscillation in self-synchronous bi-directional communication system: In a bi-directional, self-synchronous bus for communication between semiconductor devices, a logic delay is provided as a flag to a state machine control for indicating that the bus is making a transition from a low to a high state. The logic delay causes the bus to adaptively idle until the...

20060038588 - Dynamic-static logical control element for signaling an interval between the end of a control signal and a logical evaluation: A dynamic-static logical control element for signaling an interval between the end of a control signal and a logical evaluation provides a compact circuit for blocking the indication of a non-evaluated state of a dynamic logic gate until a control signal has ended. The control signal is connected to a...

20060038590 - P-domino output latch: A P-domino latch includes a domino stage, a write stage, an inverter, a low keeper path, a high keeper path, and an output stage. The domino stage is coupled to an approximately symmetric clock signal, and evaluates a logic function according to the states of at least one data signal...

20060038589 - P-domino register: A P-domino register includes a domino stage, a write stage, an inverter, a low keeper path, a high keeper path, and an output stage. The domino stage is coupled to a pulsed clock signal, and evaluates a logic function according to the states of at least one data signal and...

20060033523 - Error recovery in asynchronous combinational logic circuits: A system and method for providing error recovery to an asynchronous logic circuit is presented. The asynchronous logic circuit with error recovery may use temporal redundancy to compare the results of an asynchronous computation and initiate error recovery if necessary. Outputs of the asynchronous logic circuit are compared using a...

20060033524 - Basic cells configurable into different types of semiconductor integrated circuits: The basic cell constituted by a semiconductor integrated circuit comprises two PMOS transistors and two NMOS transistors. By setting the gate widths of the gates of these transistors to prescribed lengths, the efficiency of use of elements within the basic cell is improved, and fine adjustment of the threshold voltage...

20060033525 - Integrated header switch with low-leakage pmos and high-leakage nmos transistors: System and method for providing power with a large on-current and small off-current to circuitry in an integrated circuit. A preferred embodiment comprises a switch for providing power to circuits in an integrated circuit made from a PMOS transistor and an NMOS transistor coupled in parallel. Each transistor's gate terminal...

20060033526 - Semiconductor device and manufacturing method of the same: A semiconductor device has a plurality of universal logic cells, a power supply line, a ground line, a first interconnection and a second interconnection. Each universal logic cell includes first to seventh nodes formed in a top layer of common interconnection layers which are allocated to the universal logic cells....

20060033528 - Field programmable gate array: A field programmable gate array (FPGA) having hierarchical interconnect structure is disclosed. The FPGA includes logic heads that have signals routed therebetween by the interconnect structure. Each logic head includes a plurality of cascadable logic blocks that can perform combinatorial logic. The logic head can further be fractured into two...

20060033527 - Pld architecture for flexible placement of ip functions blocks: In accordance with one aspect of the invention, a hole is formed within an LE array of a PLD by interrupting the LE array base signal routing architecture such that a hole is left for IP function block to be incorporated. An interface region is provided for interfacing the remaining...

20060033530 - Digital circuits having current mirrors and reduced leakage current: A digital circuit such as a level shifter circuit includes a current mirror having first and second current supply transistors configured to provide an output signal to an output node based on an input signal. A leakage current control circuit is configured to maintain the first and second current supply...

20060033529 - Reducing coupling effect on reference voltages when output buffers implemented with low voltage transistors generate high voltage output signals: Reducing the effect of coupling on a reference voltage received at a node of an output buffer, wherein the effect of coupling is due to the transitions in the output signals. An inverted signal of the output signal is connected to the node through an impedance (e.g., capacitor) that stores...

20060033531 - Circuit for controlling leakage: Leakage current in logic circuitry is managed by coupling and decoupling the voltage potentials of the power supply from circuitry with large high leakage devices. Driver circuits comprise a low leakage logic path for holding logic states of the output. A high leakage logic path in parallel with the low...

20060033532 - Techniques for trimming drive current in output drivers: Techniques are provided for trimming drive current in output drivers to compensate for process variations, model inaccuracies, and/or an off-target process. The actual output drive current is measured on the integrated circuit (IC) at wafer sort or during a final test. Based on the measured output drive current, the total...

20060033533 - Semiconductor device: A main circuit includes a first logic circuit behaving as a critical path and a second logic circuit operating comparatively fast. The second logic circuit is fed with a first supply voltage. The first logic circuit is usually fed with a second supply voltage to ensure normal operation of the...

20060033534 - N-domino output latch: An N-domino latch includes a domino stage, a write stage, an inverter, a high keeper path, a low keeper path, and an output stage. The domino stage is coupled to an approximately symmetric clock signal. The domino stage evaluates a logic function according to the states of at least one...

20060028236 - Programmable controller having reduced control key set: In some embodiments, a wall-mountable, programmable controller having control keys (e.g., less than eight keys or another small number of keys), a subassembly including circuitry, and a control key insert removably mountable to the subassembly and including at least one of the control keys. The controller can have first and...

20060028237 - Data output circuit with reduced output noise: A data output drive transistor is rendered conductive when the potential of an internal node attains an H level, whereby an output node is discharged to the level of ground potential. When the drive transistor is turned on, the output node is discharged to the level of ground potential at...

20060028238 - Partial termination voltage current shunting: An apparatus includes termination circuitry to terminate one or more lines. The termination circuitry draws a first current from a termination voltage supply through a termination voltage delivery network for each terminated line carrying a first signal. Partial current shunt circuitry draws a second current from the termination voltage supply...

20060028239 - Integrated circuit devices with power supply detection circuitry: Integrated circuit devices are provided that include power detection circuits that indicate whether power supplies have reached functional voltage levels. The power detection circuits include latches coupled to power supplies that can detect whether all the power supplies have reached functional voltage levels, logic circuits to provide appropriate output signals,...

20060028240 - Enhanced passgate structures for reducing leakage current: Enhanced passgate structures for use in low-voltage systems are presented in which the operational speed of the passgate structures is maximized, while minimizing leakage current when the structure is turned “OFF.” In one arrangement, the VT of the pass-gate structures is increased relative to the VT of other transistors fabricated...

20060028242 - Customizable and programmable cell array: A semiconductor device may include a logic array having a multiplicity of inputs and a multiplicity of outputs and customized interconnections providing permanent direct interconnections among at least some of the multiplicity of inputs and at least some of the multiplicity of outputs....

20060028241 - Structured integrated circuit device: A configurable logic array may include: a multiplicity of logic cells, containing look-up tables; customizable metal and via connection layers overlying the multiplicity of logic cells; a multiplicity of device customizable I/O cells; a multiplicity of configuration customizable RAM blocks; a ROM block with customizable contents; and a microprocessor with...

20060028245 - Level shifter with low leakage current: A voltage level shift circuit includes a first stage which receives an input signal having voltage levels Vcc and Vss, where Vcc>Vss, and which outputs complementary first and second intermediate signals, wherein the complementary first and second intermediate signals have voltage levels VIhigh and VIlow where VIhigh>VIlow; and a second...

20060028243 - Programmable level shifter for wide range operation purpose: A programmable level shifter. The programmable level shifter comprises a first P-type FET, a first N-type FET, a second P-type FET, a second N-type FET, an inverter, and a programmable device. The first P-type FET is coupled between a fist power line and an output node. The first N-type FET...

20060028244 - Programmable level shifter for wide range operation purpose: A programmable level shifter. The programmable level shifter comprises a first P-type FET, a first N-type FET, a second P-type FET, a second N-type FET, and a programmable device. The first P-type FET is coupled between a fist power line and a non-inverted output node, and a gate pole thereof...

20060028246 - Dynamic circuit: In a dynamic circuit, when only between a precharge node and an intermediate node through a plurality of logical-operating MOS transistors is conducted, the potential of the precharge node approximately drops to High*{C1/(C1+C2)} from High, where C1 represents the capacitance of the precharge node and C2 represents the capacitance of...

20060028247 - Arithmetic circuit: An arithmetic circuit having a high versatility, with which such a circuit as a compact and high-speed logic-in-memory is obtained and various operations is performed, is provided. The arithmetic circuit includes a memory element having a variable resistance element R in which the state of resistance changes reversibly between the...

20060022700 - Fpga-based digital circuit for reducing readback time: An improved digital circuit for reducing readback time in field programmable gate arrays (FPGAs) includes a shift register having a plurality of latches and a clock and a reset signal provided to the latches. An interconnect circuit is provided between each pair of latches of the shift register for providing...

20060022702 - Interface circuit and constituting method thereof: An interface circuit which is connected to a function unit such as a memory reduces the number of structural elements by using structural elements in common, and also realizes a plurality of different function circuits. The interface circuit connected with the function unit uses the structural elements for a plurality...

20060022703 - Semiconductor device with bus terminating function: The distance between a drain contact and gate electrode in a terminating transistor, which couples a termination resistor connected to an output terminal to a power source node, is set shorter than in an output transistor, which drives an output-node in accordance with an internal signal. The area of the...

20060022701 - Termination circuit: A termination circuit for terminating a transmission line comprises a resistance unit which is formed by connecting a P-channel type MOS transistor and an N-channel type MOS transistor in parallel, and Thevenin termination is formed by providing this resistance unit between the transmission line and a power supply line and...

20060022704 - Reconfigurable electronic device having interconnected data storage devices: A reconfigurable electronic device (100), e.g., a field programmable gate array (FPGA) or another type of complex programmable logic device (CPLD), has a first data storage device (120) and a second storage device (220) that are interconnected in a dual port memory mode of the reconfigurable electronic device (100). In...

20060022705 - Structured integrated circuit device: A configurable logic array may include: a multiplicity of logic cells, containing look-up tables; customizable metal and via connection layers overlying the multiplicity of logic cells; a multiplicity of device customizable I/O cells; a multiplicity of configuration customizable RAM blocks; a ROM block with customizable contents; and a microprocessor with...

20060022706 - Apparatus for delivering inputted signal or data: An apparatus for receiving an inputted signal in order to transmit the inputted signal from an external circuit to an internal circuit includes a comparing block, enabled by an enable signal, for outputting a logic value to the internal circuit in response to a voltage difference between the inputted signal...

20060022707 - Write protection using a two signal control protocol for an integrated circuit device having parameter change capability, chip select and selectable write to non-volatile memory: An integrated circuit having a device with an adjustable parameter utilizes a two signal control protocol to select the device, change the parameter value with or without saving the parameter value in a non-volatile memory, and to write protect the parameter value in the non-volatile memory....

20060022708 - Semiconductor device and camera using same: The present invention provides a semiconductor device that can adjust signal frequency bandwidths and consumption currents to be appropriately increased or reduced in source-follower amplifiers in all stages. The semiconductor device is comprised of a source-follower amplifier including a driver transistor D1, and a load transistor L1 that is connected...

20060022709 - Level shifter for wide range operation: A programmable level shifter. The programmable level shifter comprises a first P-type FET, a second P-type FET, a third P-type FET, a fourth P-type FET, a fifth P-type FET, a sixth P-type FET, a first N-type FET, a second N-type FET, a third N-type FET, and a programmable device. The...

20060022710 - Integrated circuit having an input/output terminal configurable within a given voltage range: A circuit disposes of a power supply terminal dedicated to the power supply VIO of the input/output terminals in order that these terminals may be used by a customer in a voltage range of their choice. The input/output terminals produced according to the invention include transposition means that allow the...

20060022711 - Semiconductor device: A semiconductor device according to the present invention comprises a first semiconductor integrated circuit 11 having a predetermined function, the first semiconductor integrated circuit outputting a required output signal, a second semiconductor integrated circuit 12 in which a plurality of MOS elements (PMOS transistor or NMOS transistor) for independently switching...

20060022712 - Logic activation circuit: Logic activation circuit for switching a logic circuit having at least one supply voltage line on or off, said logic activation circuit having: (a) at least one voltage supply switching device for connecting a supply voltage to a supply voltage line of the logic circuit in a manner dependent on...

20060022713 - Driver circuit: A driver circuit for driving a device or circuit disposed after it comprises a plurality of driving transistors connected in parallel, a selection unit for selecting one or more groups from a plurality of groups to each of which driving transistors having a power base of two with the same...

20060022714 - Dynamic latch having integral logic function and method therefor: A circuit (50) that receives dynamic signals performs both logic and latching to achieve high speed operation. The circuit has a clock that defines both an evaluation phase and a precharge phase in which the dynamic signals are evaluated during the evaluation phase. The circuit (50) functions by precharging a...

20060022715 - Variable timing circuit: Systems and methods for delaying a signal by a selectable amount of time, wherein the selectable amount of time is adjustable in relatively small increments and wherein the variability of the selectable amounts of time is minimized. One embodiment comprises a circuit formed by a plurality of silicon-on-insulator (SOI) logic...

20060022716 - Semiconductor integrated circuit: In a dynamic flip-flop circuit with a data selection function, for example, when data having an H value is selected using a selection signal, a first node N1 is L, a second node N2 of a second dynamic circuit is H, so that an output signal has an H level....