Electronic digital logic circuitry inventions 01/06

20060017456 - Semiconductor device with bus terminating function: The distance between a drain contact and gate electrode in a terminating transistor, which couples a termination resistor connected to an output terminal to a power source node, is set shorter than in an output transistor, which drives an output node in accordance with an internal signal. The area of...

20060017457 - Temperature-compensated output buffer method and circuit: A temperature-compensated output buffer circuit is disclosed, which includes a pull-up circuit including a first pull-up transistor for providing a first pull-up output signal responsive to a pull-up input signal, and a supplemental pull-up circuit in parallel with the first pull-up transistor. The supplemental pull-up circuit is configured to generate...

20060017458 - Mask-programmable logic device with programmable portions: A mask-programmable logic device includes some circuitry that is electrically programmable as in conventional programmable logic devices. This allows a user to adjust certain characteristics of programmed devices whose logic functions have been proven and need not change, but which operate in an environment that changes, necessitating different characteristics, without...

20060017460 - Fracturable lookup table and logic element: A logic element includes memory elements, multiplexers, and controls. The multiplexers are arranged in levels including a highest level of multiplexers with inputs connected to the memory elements and outputs connected to inputs of a next-to-highest level of multiplexers and a first level of multiplexers with inputs connected to outputs...

20060017459 - Programmable logic circuit apparatus and programmable logic circuit reconfiguration method: A programmable logic circuit apparatus includes a programmable logic circuit that dynamically switches and operates a plurality of circuit blocks. The circuit blocks include a branch circuit block that performs branch processing and a plurality of child circuit blocks that selectively perform a plurality of kinds of processing on data...

20060017461 - Methods and systems for providing hardware assisted programming of a programmable logic device in an embedded system: A programmable logic device (PLD) in a microprocessor system is programmed with minimal load on system resources. A microprocessor reads programming data from a first memory using a parallel bussed interface and writes the programming data to a programming hardware assist engine using the parallel bussed interface. The programming hardware...

20060017462 - High speed integrated circuit: A novel driver circuit that uses a differential driver as a design backbone is described. Unlike a conventional differential interface, which typically has two or more outputs for providing an output signal and its complement, one of the differential driver's outputs is coupled to drive an output signal onto a...

20060017463 - Differential receiver: A differential receiver includes a feedback circuit connected between an output node and one common node of the differential receiver to reduce the bandwidth and reject noise for a specific interval of time. In operation, a differential receiver bias current is controlled responsive to an output signal at the output...

20060017464 - Current driver circuits for reducing substrate noise and methods of operating the same: A current driver circuit includes a pull-down switch unit that is coupled between a node and a first reference potential and is operative to switch between an on-state and an off-state responsive to an input signal. A pull-up switch unit is coupled between the node and a second reference potential...

20060017465 - Buffer: A switched capacitor buffer operating by the push-pull method is taught. The buffer may include a pull-up device and a pull-down device. A switched capacitor circuit may be used to control the pull-up device and the pull-down device to achieve accurate push-pull operation. According to some embodiments, the switched capacitor...

20060017466 - High voltage integrated circuit driver with a high voltage pmos bootstrap diode emulator: A high voltage circuit driver includes high and low side driver cells to drive a high and a low side power MOSFET, a bootstrap circuit to energize the high side driver cell, a high voltage PMOS transistor (HVPMOS) between a voltage source and the bootstrap circuit, wherein the HVPMOS is...

20060017467 - Circuit for power management of standard cell application: A power management circuit for logic cells. A logic cell is operated in normal or standby modes according to a power control signal. The logic cell includes an output terminal and a power input terminal. A switch is coupled between a power voltage, the power control signal and the power...

20060017468 - Common-mode shifting circuit for cml buffers: A common-mode shifting circuit for shifting the common-mode output voltage of a CML device to an arbitrary voltage is disclosed. A constant current source is provided at each output of the CML device. The constant current may be a positive or negative current, tending to raise or lower the common-mode...

20060017470 - Low power high performance inverter circuit: A low-power, high-performance inverter circuit comprises first and second inverter circuit portions. The first portion comprises a first inverter, including a first pull-up element and a first pull-down element, for inverting an input signal, a first switching element connected between the first pull-down element and ground for switching the first...

20060017469 - Power management circuit: A power management circuit. A logic cell switched between normal and standby modes according to a power control signal includes a plurality of first NMOS transistors coupled between at least one complementary pair of data signal inputs and a complementary pair of data signal outputs, a first PMOS transistor and...

20060012392 - System and method for front-end bypass testing in an electronic circuit: A system and method for front-end bypass testing in an electronic circuit. According to one embodiment, the integrated circuit that includes a memory block having at least one input and at least one output that wherein a critical path in the integrated circuit exists through the memory block. At least...

20060012393 - Method and apparatus for data model prediction: Data Model Prediction tries to emulate the existing non-programmable interfaces by accurately predicting the data structures and operations required to provide the programmable interfaces....

20060012394 - Programmable logic devices with multi-standard byte synchronization and channel alignment for communication: A programmable logic device (“PLD”) includes communication interface circuitry that can support any of a wide range of communication protocols, including Packet Over Sonet (“POS-5”) and 8-bit/10-bit (“8B10B”) protocols. The interface circuitry includes various functional blocks that are at least partly hard-wired to perform particular types of functions, but that...

20060012395 - Reconfigurable processor element utilizing both course and fine grained reconfigurable elements: A reconfigurable processor element incorporating both course and fine grained reconfigurable elements. In alternative implementations, the present invention may comprise a reconfigurable processor comprising both reconfigurable devices with fine grained logic elements and reconfigurable devices with course grained logic elements or a reconfigurable processor comprising both reconfigurable devices with fine...

20060012396 - Level shifter and method thereof: A level shifter and method thereof. The level shifter may include a protective circuit configured to receive an input signal having an input voltage level, the input signal received on an input line, the protective circuit reducing the input voltage level to generate a stabilized input signal and a first...

20060012397 - Gtl output structure having a slew rate control restore circuit: A GTL output structure having an active charging and discharging stage that actively restores internal nodes for slew rate control without the need to wait for a slow rise and fall RC time constant is disclosed herein. The novel GTL output structure includes an input stage connected to an RC...

20060012398 - Low leakage monotonic cmos logic: A low leakage monotonic CMOS logic circuit and a method, a method of design and a system for designing such circuits. The circuit, including: one or more logic stages, at least one of the logic stages having a predominantly high input state or having a predominantly low input state; wherein...

20060012399 - Protecting one-hot logic against short-curcuits during power-on: A method, a computer program, and an apparatus are provided to protect transmission gates in a multiplexer (mux). Because transmission gates are much faster than the more convention AND-OR arrays, transmission gate usage in muxes are being used more often in high speed circuitry. However, transmission gate have a significant...

20060012400 - Electric potential switching circuit, flash memory with electric potential switching circuit, and method of switching electric potential: An electric potential switching circuit has an electric potential control circuit, an output circuit, and a precharge circuit connected to the output circuit. The electric potential control circuit generates a reference electric potential associated with an operation mode of a flash memory. The output circuit generates at an output terminal...

20060012401 - Diode circuit: A diode circuit includes a differential circuit having a first MOS transistor whose source is connected to a first input terminal, a second MOS transistor whose source is connected to a second input terminal and gate and drain are connected to a gate of the first MOS transistor, and a...

20060006900 - Circuit and method for storing data in operational, diagnostic and sleep modes: A clocked scan flip-flop 2 is provided in which a latch 14 within the diagnostic data path is reused to store an operational signal value during a sleep mode. The operational signal value is supplied to the latch 14 via a sleep mode path 20 through a transmission gate 22...

20060006901 - Dac based driver with selectable pre-emphasis signal levels: A Transmit line driver with selectable pre-emphasis and driver signal magnitudes comprises a primary current driver for setting a primary current level and a pre-emphasis current driver that provides an additional amount of current that is superimposed with or added to the primary current level produced by the primary current...

20060006902 - Methods and apparatus for improving impedance tolerance of on-die termination elements: An impedance calibration circuit in an integrated circuit includes a master current source to force a master current to flow through a first load that is external to the integrated circuit. The master current source includes a stabilized current source to provide a first part of the master current and...

20060006903 - Programmable impedance controller and method for operating: A programmable impedance controller and a method of operating prevent or substantially reduce internal noise and an influence from external noise lasting for a long time. The programmable impedance controller for comparing a pad voltage of a pad connected to an external determination impedance with a reference voltage, and for...

20060006904 - Programable logic device, configuration apparatus, and configuration method: Among logic elements (LE0 to LE15), each logic element, of which configuration information should be rewritten, replaces configuration information stored in a configuration storing unit 11 with input configuration information, and output the configuration information stored in the configuration storing unit 11. Each of the other logic elements, of which...

20060006905 - Method and system for configuring an interconnect device: In one embodiment, a system for configuring an interconnect device includes a non-volatile storage device to store configuration data associated with the interconnect device and a configuration interface to request the configuration data from the non-volatile storage device. Further, the system includes an initialization module to query the configuration interface...

20060006906 - Scalable non-blocking switching network for programmable logic: A scalable non-blocking switching network (SN) having switches and intermediate (stages of) conductors that are used to connect substantially a first plurality of conductors, through a first set of switches, to a second plurality sets of conductors. The conductors in each set of the second plurality of conductors substantially connect,...

20060006907 - Circuit for translating voltage signal levels: A circuit (3) for translating voltage signal levels includes: a diode (D1); a first resistor (R1) with one end connected to the cathode of the diode; a metal-oxide-semiconductor field effect transistor (Q1), with the gate thereof connected to the other end of the first resistor, and the drain thereof being...

20060006908 - Level shifter and flat panel display comprising the same: A level shifter and a flat panel display comprising the same, with reduced power consumption. The level shifter includes: a first transistor to apply a first voltage to an output terminal in correspondence with a first input signal; a second transistor to apply a second voltage to an output terminal...

20060001442 - Single event upset immune keeper circuit and method for dual redundant dynamic logic: A method includes precharging a first dynamic node, precharging a second dynamic node, and maintaining a first logic state of a signal on the first dynamic node responsive to a second logic state of a signal on the second dynamic node. The method further includes maintaining the second logic state...

20060001443 - High speed memory modules utilizing on-pin capacitors: Apparatus and method for producing memory modules having a plurality of branches connected to a memory bus, each branch containing at least one dynamic random access memory (DRAM) device or SDRAM device connected to the memory bus via at least one transmission signal (TS) line and/or at least one sub-transmission...

20060001444 - Application-specific integrated circuit equivalents of programmable logic and associated methods: Providing ASIC equivalents of FPGAs is facilitated and made more efficient and economical by using an ASIC architecture including a plurality of so-called hybrid logic elements (“HLEs”), each of which can provide a portion of the full functionality of an FPGA logic element (“LE”). The functionality of each FPGA LE...

20060001445 - Programmable logic block for designing an asynchronous circuit: A programmable logic block for an asynchronous circuit design is disclosed. After a programmable setup, the logic block not only has the processing function of the common devices but also communicates using the asynchronous protocol so as to design an asynchronous device....

20060001446 - Duty cycle controlled cml-cmos converter: There is provided a CML to CMOS converter comprising two current sources both connected between a first power supply, having a first potential, and a driving node, first and second push-pull drive stages each having a current path connected between a second power supply, having a second potential, and the...

20060001448 - Input buffer with wide input voltage range: The input buffer is driven by a data input/output supply voltage. The input buffer generates an output signal from an input signal that swings between the data input/output supply voltage and a data input/output ground voltage....

20060001447 - Level shifting circuit between isolated systems: A level shifting circuit (20, 30) couples an input current (Iin) from one system to another, isolated, system, by driving a single load (L) via one or more current mirrors of a common type. In a first embodiment (20), two similar type (either N-type or P-type) current mirrors (M1,M2;M3,M4) provide...

20060001449 - Voltage level translator circuit: A voltage level translator circuit for translating an input signal referenced to a first voltage level to an output signal referenced to a second voltage level includes an input stage for receiving the input signal. The input stage includes at least one transistor device having a first threshold voltage associated...

20060001450 - Method, apparatus and system of domino multiplexing: Embodiments of the present invention provide a method, apparatus and system for domino multiplexing including sustaining a first domino block output in a preconditioning state using a second domino block output....

20060001451 - Dynamic-to-static logic converter: This disclosure is directed to techniques for reducing erroneous static logic signals when logic signals change relative to a clock signal within a dynamic to static logic converter circuit. Domino logic circuits, for example, utilize dynamic logic signals evaluated relative to a clocking signal. When dynamic logic signals are evaluated,...

20060001452 - Ratioed logic circuits with contention interrupt: A ratioed logic gate includes a contention interrupt circuit. The ratioed logic gate includes a pull up network coupled to a pull down network. Multiple inputs are coupled to turn the pull down and pull up networks on and off. An output is coupled to apply a logical function on...