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06/26/08 - USPTO Class 438 |  70 views | #20080153210 | Prev - Next | About this Page  438 rss/xml feed  monitor keywords

Electronic assembly having an indium wetting layer on a thermally conductive body

USPTO Application #: 20080153210
Title: Electronic assembly having an indium wetting layer on a thermally conductive body
Abstract: Embodiments include electronic packages and methods for forming electronic packages. One method includes providing a die and a thermal interface material on the die. A metal body is adapted to fit over the die. A wetting layer of a material comprising indium is formed on the metal body. The thermal interface material on the die is brought into contact with the wetting layer of material comprising indium. The thermal interface material is heated to form a bond between the thermal interface material and the wetting layer so that the thermal interface material is coupled to the metal body, and to form a bond between the thermal interface material and the die so that the thermal interface material is coupled to the die. (end of abstract)



Agent: Konrad Raynes & Victor, LLP. Attn: Int77 - Beverly Hills, CA, US
Inventors: Fay HUA, Thomas J. FITZGERALD, Carl L. DEPPISCH, Gregory M. CHRYSLER
USPTO Applicaton #: 20080153210 - Class: 438122 (USPTO)

Electronic assembly having an indium wetting layer on a thermally conductive body description/claims


The Patent Description & Claims data below is from USPTO Patent Application 20080153210, Electronic assembly having an indium wetting layer on a thermally conductive body.

Brief Patent Description - Full Patent Description - Patent Application Claims
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This application is a divisional of prior U.S. application Ser. No. 10/871,978, filed on Jun. 18, 2004, which is hereby incorporated by reference in its entirety.

TECHNICAL FIELD

Embodiments of the present invention relate generally to electronics packaging. More particularly, certain embodiments of the present invention relate to an electronic assembly including a semiconductor die which is thermally coupled through an interface material to a thermally conductive body to dissipate heat, and to manufacturing methods thereof.

RELATED ART

Integrated circuits are generally formed on semiconductor wafers formed from materials such as silicon. The semiconductor wafers are processed to form various electronic devices thereon. The wafers are diced into semiconductor chips, which may then be attached to a package substrate. Such a chip or die may have solder bump contacts on the integrated circuit. The solder bump contacts extend downward onto contact pads of a package substrate, and are typically attached in a thermal reflow process. Electronic signals may be provided through the solder bump contacts to and from the integrated circuit. Operation of the integrated circuit generates heat in the device. Heat is conducted to an upper surface of the die, and should be conducted or convected away to maintain the temperature of the integrated circuit below a predetermined level for purposes of maintaining functional integrity of the integrated circuit.

One way to conduct heat from an integrated circuit die is through the use of a heat spreader, which may be positioned above the die and thermally coupled to the die through a thermal interface material.

BRIEF DESCRIPTION OF THE DRAWINGS

Embodiments are described by way of example, with reference to the accompanying drawings, which are not drawn to scale, wherein:

FIG. 1 is a cross-sectional side view of components of an electronic assembly in accordance with an embodiment of the present invention, before being finally assembled;

FIG. 2 is a view of the electronic assembly of FIG. 1, after heating of the assembly, in accordance with an embodiment of the present invention; and

FIG. 3 is a cross-sectional view illustrating certain aspects of the electronic assembly of the embodiment shown in FIG. 2 in greater detail.

FIG. 4 is a cross-sectional view of an embodiment including a heat sink, in accordance with an embodiment of the present invention, before being finally assembled.

DETAILED DESCRIPTION

U.S. Pat. No. 6,504,242 describes an electronic assembly including a die and a heat spreader. The heat spreader has a nickel layer formed thereon, and a gold wetting layer on the nickel layer. The nickel layer acts as a diffusion barrier. The purpose of the gold layer is to serve as a wetting layer for an indium preform positioned between the heat spreader and the die. The stack is heated and cooled to “solder” the indium to the gold. During this operation an intermetallic layer including indium and gold (AuIn2) is typically also formed.

Applicants have observed that thermal degradation of such an electronic assembly as described in U.S. Pat. No. 6,504,242 may occur. The thermal degradation may result in failures due to crack propagation between the indium-gold intermetallic layer and the indium layer.



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