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Electronic apparatus and restarting method thereofElectronic apparatus and restarting method thereof description/claimsThe Patent Description & Claims data below is from USPTO Patent Application 20070276939, Electronic apparatus and restarting method thereof. Brief Patent Description - Full Patent Description - Patent Application Claims
CROSS-REFERENCE TO RELATED APPLICATIONS [0001]This application is based upon and claims the benefit of priority from Japanese Patent Application No. 2006-144449, filed May 24, 2006, the entire contents of which are incorporated herein by reference. BACKGROUND [0002]1. Field [0003]One embodiment of the present invention relates to, for example, electronic apparatus which has a plurality of circuit blocks, for example such as digital signal processors (DSPs) and sub-processors like multi-point control units (MCUs), monitors operation states of each circuit block, and resets the circuit block with an abnormal operation occurred therein, and when the abnormal operation is still not restored, tries to make the circuit block operate normally by system reset, and relates to a restarting method thereof. [0004]2. Description of the Related Art [0005]In an office, or a business establishment, for example, a telephone exchange to standard telephone sets has been used. Recently, a system which connects a server with a data terminal, such as a video communication end-point and a personal computer connected thereto to the telephone exchange via a transmission path, and makes a voice communication system using the telephone exchange link with a data communication system using the server has been proposed. [0006]By the way, in the given parallel-type system of the telephone exchange and the server, to construct a video conference, etc., a MCU has been used. To carry out high-level signal processing, such as image compression and de-compression, image synthesis, and communication control, the MCU uses a large-scale integrated circuit for each of these functions. Further, not a few of these devices are constituted by software or hardware logic, the devices are brought into a state in which they result in occurrences of an inner logical contradiction and do not operate normally sometimes because of being constituted logically. For instance, DSPs or image CODECs, etc., are brought into operation stoppages due to inner logic failures but not into component failures sometimes. Therefore, the device needs to confirm whether the components and the circuit blocks operate normally in order to improve the reliability of electronic equipment. If the system has been brought into the aforementioned inner logical contradiction, the device may restore by system or component and circuit block level restarting. [0007]To respond such a phenomenon, the device conducts response acknowledgement to the components or the circuit blocks periodically or not periodically, and if the components or the circuit blocks are in abnormal state, such that their responses are abnormal, or they make no response, the device issues partial reset to the components or circuit blocks concerned to initialize it. [0008]Furthermore, if the device is not restored by the partial reset to the components or the circuit blocks, the whole of the system should be reset. However, in the case of physical damage and failure, issuing the system reset cannot normally restore the device and it results in repetition of the permanent system reset through the foregoing repetition until its power source is turned off. [0009]Conventionally, an on-vehicle electronic control device to count the number of repeated reset times by one processor by means of other processor and to stop a function of an electronic control device, when the count value exceeds the predetermined number of times, has been presented (for example, Jpn. Pat. Appln. KOKAI Publication No. 2-250124). [0010]However, the aforementioned on-vehicle electronic control device monitors the processor, and does not monitor the components and circuit blocks. A plurality of processors being provided for the device, the device itself becomes complex and increases in costs. The device being controlled through software, even if there is no failure on a main body side, the possibility of a false operation of a CPU circuit on a count side is generally high in comparison to hardware control, and it results in insecure reliability. BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS [0011]A general architecture that implements the various feature of the invention will now be described with reference to the drawings. The drawings and the associated descriptions are provided to illustrate embodiments of the invention and not to limit the scope of the invention. [0012]FIG. 1 is an exemplary block diagram illustrating a configuration of an embodiment of an MCU as electronic equipment regarding the invention; and [0013]FIG. 2 is an exemplary flowchart illustrating an abnormality determination and corresponding control procedure, and control content in the embodiment. DETAILED DESCRIPTION [0014]Various embodiments according to the invention will be described hereinafter with reference to the accompanying drawings, In general, according to one embodiment of the invention, an electronic apparatus, comprising: a single or a plurality of signal processing units; a processor which individually detects a part of or a whole of operation states of the plurality of signal processing units, and carries out system reset to reset allover the apparatus including the single or the plurality of signal processing units, when result in detection indicates an existence of any abnormal signal processing unit; a programmable logic device which loads forming circuit information to form a counter circuit to count a value of the number of times of the system reset and to set an initial value of the counter circuit from a memory device on turning on a power source, counts the value of the number of times of the system reset by the counter circuit for each occurrence of the system reset in a current-carrying state, and is independent from the system reset with respect to a register to record the count value; wherein the processor reads in the value of the number of times of the system reset to be stored in the programmable logic device to determine whether or not the value reaches the predetermined reference number of times, and stops starting processing when the value has reached the reference number of times. [0015]FIG. 1 is a block diagram depicting a configuration of an embodiment of an MCU as electronic equipment regarding the invention, and the symbol 1 indicates the MCU. [0016]An MCU 1 includes a local area network (LAN) interface unit 11, a CPU 12, a DRAM 13, a flash memory 14, a field programmable gate array (FPGA), and a voice and video CODEC 16. Among of them, the CPU 12, the DRAM 13, the flash memory 14, the FPGA 15 and the voice and video CODEC 16 are connected by a CPU bus 17 to one another. [0017]A peripheral component interconnect (PCI) bus 18 connects the CPU 12 and the voice video CODEC 16 to each other, and a local bus 19 connects the voice and video CODEC 16 and the FPGA 15 to each other. [0018]The LAN interface unit 11 carries out interface processing to and from a LAN under the control from the CPU 12. [0019]The DRAM 13 is a work memory to be used for operations of the CPU 12. The flash memory 14 stores control program data and system setting data to be used by the CPU 12. [0020]The CPU 12 achieves operations as the MCU 1 by generally controlling each part of the MCU 1 based on the program stored in the DRAM 13 and the flash memory 14. Continue reading about Electronic apparatus and restarting method thereof... Full patent description for Electronic apparatus and restarting method thereof Brief Patent Description - Full Patent Description - Patent Application Claims Click on the above for other options relating to this Electronic apparatus and restarting method thereof patent application. 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