|Electrical pulse counters, pulse dividers, or shift registers: circuits and systems patents - Monitor Patents|
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Electrical pulse counters, pulse dividers, or shift registers: circuits and systems December patent applications/inventions, industry category 12/11Below are recently published patent applications awaiting approval from the USPTO. Recent week's RSS XML file available below.
Listing for abstract view: USPTO application #, Title, Abstract excerpt,Patent Agent. Listing format for list view: USPTO National Class full category number, title of the patent application. 12/29/2011 > 4 patent applications in 4 patent subcategories. patent applications/inventions, industry category
20110317801 - Counting device for counting nested articles and method for counting nested articles: A counting device for counting rimmed articles arranged in a nested configuration to define a series of stacked rims defining a stacked direction is disclosed. The counting device has a gear with a plurality of teeth adapted to engage the article rims such that advancement of the articles along the... Agent:
20110317802 - Clock glitch detection circuit: In a first circuit for detecting clock glitches in a clock signal, a master counter is clocked by the clock signal and memorizes a master count. An incrementer advances the master count by one increment. A slave counter is clocked by the clock signal and memorizes a slave count. The... Agent: Freescale Semiconductor, Inc.
20110317803 - Shift register circuit and shift register: An exemplary shift register circuit includes a plurality of shift registers for sequentially outputting a plurality of driving pulse signals. Among each M number of the shift registers for sequentially outputting M number of the driving pulse signals, the shift register for lastly outputting one of the M number of... Agent: Au Optronics Corp.
20110317804 - Program verify method for otp memories: A method for executing a program verify operation in a non-volatile memory. A data register having master and slave latching circuits is used for concurrently storing two different words of data. In a program operation, the master latch stores program data which is used for programming selected memory cells. In... Agent: Sidense Corp.12/22/2011 > 2 patent applications in 2 patent subcategories. patent applications/inventions, industry category
20110311017 - Clock glitch detection: A circuit comprises a clock tree for distributing a clock signal. A first counter is arranged at a first point in the clock tree. Upon detecting a triggering edge in the clock signal, the first counter sets a first current count equal to a first delayed count. After a first... Agent: Freescale Semiconductor ,inc.
20110311018 - Pulse type layer-id detector for 3d-ic and method of the same: A 3D-IC detector for each layer of a stacked device comprises a pulse generator to receive an initial signal and generate a pulse-in signal to a next stage detector. A latch is coupled to the pulse generator to receive an output signal from the pulse generator and generate a layer... Agent:12/15/2011 > 2 patent applications in 2 patent subcategories. patent applications/inventions, industry category
12/08/2011 > 1 patent applications in 1 patent subcategories. patent applications/inventions, industry category
20110299651 - Shift frequency demultiplier with automatic reset function: A shift frequency demultiplier with automatic reset function is N-frequency demultiplication (N>2) and includes N-1 registers connected with each other and defined from a first register to an (N-1)th register. Each of the registers has an input end, an output end, a reset end and a clock end. For the... Agent: Ipgoal Microelectronics (sichuan) Co., Ltd.12/01/2011 > 2 patent applications in 2 patent subcategories. patent applications/inventions, industry category
20110293062 - Method and apparatus for rapid synchronization of shift register related symbol sequences: A sequence generator implemented on a receiver is synchronized with a sequence generator at a transmitter. The receiver receives k n-state symbols, with k>1 and n>1 wherein each of the k n-state symbols is associated with a generating state of the sequence generator at the transmitter. A processor in the... Agent: Ternarylogic LLC
20110293063 - Shift register circuit and gate signal generation method thereof: A shift register circuit includes a plurality of shift register stages for providing plural gate signals to plural gate lines. Each shift register stage includes an input unit, a first pull-up unit, a second pull-up unit, a pull-down unit and an auxiliary pull-down unit. The input unit inputs a first... Agent:Previous industry: Induced nuclear reactions: processes, systems, and elements
Next industry: X-ray or gamma ray systems or devices
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