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Electrical pulse counters, pulse dividers, or shift registers: circuits and systems inventions 12/07

Recently published patent applications awaiting approval from the USPTO. Recent week's RSS XML file available below.
Listing format for abstract view: USPTO application #, Title, Abstract excerpt,Patent Agent. Listing format for list view: USPTO National Class full category number, title of the patent application.   12/27/2007 > patent applications in patent subcategories.

20070297558 - Event duration and signal value minimum and maximum circuit for performance counter: A circuit for tracking the minimum and maximum duration of an event of interest, and for tracking the minimum and maximum value of a signal of interest, is described. The circuit is connected to a counter for counting a number of clock cycles that the event of interest is active... Agent: Hewlett Packard Company

20070297559 - Shift register: A shift register is disclosed, which can prevent a multi-output caused by a coupling phenomenon, the shift register comprising at least two clock transmission lines which transmit at least two clock pulses provided with the phase difference; and a plurality of stages which are supplied with the clock pulses from... Agent: Morgan Lewis & Bockius LLP

  
12/20/2007 > patent applications in patent subcategories.
  
12/13/2007 > patent applications in patent subcategories.

20070286327 - Implementation-efficient multiple-counter value hardware performance counter: An implementation-efficient, multiple-counter value hardware performance counter is disclosed. A hardware counter of one embodiment includes a memory array and a hardware incrementer. The array stores counter values that are indexable by an index constructed based at least on the number of events to which the counter values correspond. The... Agent: Law Offices Of Michael Dryja

20070286328 - Frequency dividing systems and methods: Systems and methods for producing a frequency divider output signal having a period substantially equal to three times a period of a reference input signal, comprising configuring each of three storage elements to receive a first input, a second input, and a reference input signal, and to provide a storage... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

  
12/06/2007 > patent applications in patent subcategories.

20070280402 - Solid-state image sensor: A mixing of color that follows mixing of horizontally adjoining information charges corresponding to different colors is minimized during an operation for adding information charges of a plurality of pixels in a horizontal direction and during a high-speed horizontal transfer operation in a horizontal CCD shift register of a CCD... Agent: Oliff & Berridge, PLC

20070280403 - Counter outputting count signal having random count value: A counter that outputs a counting signal having a random counting value. The counter includes a clock generator and a counting circuit. The clock generator generates first and second clock signals with different phases based on an input clock signal. The counting circuit executes a counting operation and outputs a... Agent: Lowe Hauptman Ham & Berner, LLP

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