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Electrical pulse counters, pulse dividers, or shift registers: circuits and systems inventions 12/06

Recently published patent applications awaiting approval from the USPTO. Recent week's RSS XML file available below.
Listing format for abstract view: USPTO application #, Title, Abstract excerpt,Patent Agent. Listing format for list view: USPTO National Class full category number, title of the patent application.

   12/28/2006 > 1 patent applications in 1 patent subcategories.

20060291610 - High-stability shift circuit using amorphous silicon thin film transistors: A high-stability shift circuit using amorphous silicon thin film transistors, which utilizes two out-of-phase pulses to control the operating mechanism and the bias-relations among transistors in the shift circuit. This makes the transistors under the driving conditions of positive/negative-alternating biases so as to restrain the voltage shift of the transistors... Agent: Birch Stewart Kolasch & Birch

  
12/21/2006 > 1 patent applications in 1 patent subcategories.
  
12/14/2006 > 3 patent applications in 3 patent subcategories.

20060280278 - Frequency divider circuit with a feedback shift register: A frequency divider circuit is disclosed, which has a chain of flip-flops that are connected by a feedback path to a feedback shift register, and has a start circuit that produces a defined initial state of the shift register when the frequency divider circuit is switched on. The start circuit... Agent: Mcgrath, Geissler, Olds & Richardson, PLLC

20060280279 - Pulse output circuit, shift register and electronic equipment: A driver circuit of a display device, which includes TFTs of a single conductivity type and outputs an output signal with normal amplitude. A pulse is inputted to TFTs 101 and 104 to turn ON the TFTs and a potential of a node α is raised. When the potential of... Agent: Fish & Richardson P.C.

20060280280 - Prescaler for a fractional-n synthesizer: An (N−1)/N prescaler is provided, where N is an S power of 2. The prescaler uses only S flip-flops. The (N−1)/N prescaler receives a clock input from a high frequency oscillator, and provides an output line to a counter. The (N−1)/N prescaler receives a divide-by-(N−1) signal from the counter, and... Agent: William J. Kolegraff

  
12/07/2006 > 3 patent applications in 3 patent subcategories.
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