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06/28/07 - USPTO Class 438 |  78 views | #20070148818 | Prev - Next | About this Page  438 rss/xml feed  monitor keywords

Electrical connection methods employing corresponding, insulator-coated members of interconnection elements

USPTO Application #: 20070148818
Title: Electrical connection methods employing corresponding, insulator-coated members of interconnection elements
Abstract: A method of electrically connecting corresponding contact pads of semiconductor device components to each other includes interconnecting first and second members of an interconnection element. The first and second members respectively protrude from first and second semiconductor device components, with a conductive element of each member in communication with a contact pad of its corresponding semiconductor device component. Each member of the interconnection element also includes an insulative coating, or shell. When the first and second member of an interconnection element are interconnected, the insulative coating, or shell, may substantially cover or encase the conductive elements of the interconnection element. (end of abstract)



Agent: Trask Britt, P.C./ Micron Technology - Salt Lake City, UT, US
Inventors: Vernon M. Williams, Ford B. Grigg, Bret K. Street
USPTO Applicaton #: 20070148818 - Class: 438106000 (USPTO)

Related Patent Categories: Semiconductor Device Manufacturing: Process, Packaging (e.g., With Mounting, Encapsulating, Etc.) Or Treatment Of Packaged Semiconductor

Electrical connection methods employing corresponding, insulator-coated members of interconnection elements description/claims


The Patent Description & Claims data below is from USPTO Patent Application 20070148818, Electrical connection methods employing corresponding, insulator-coated members of interconnection elements.

Brief Patent Description - Full Patent Description - Patent Application Claims
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CROSS-REFERENCE TO RELATED APPLICATION

[0001] This application is a divisional of application Ser. No. 09/590,646, filed Jun. 8, 2000, pending. The disclosure of the previously referenced U.S. patent application referenced is hereby incorporated by reference in its entirety.

BACKGROUND OF THE INVENTION

[0002] 1. Field of the Invention

[0003] The present invention relates generally to conductive structures for use with semiconductor device components, such as flip-chip type semiconductor devices, including chip-scale packages. Particularly, the present invention pertains to complementarily configured and located conductive structures on a semiconductor device and another substrate to which the semiconductor device is to be connected. The invention also relates to methods of fabricating the conductive structures and, more particularly, to the use of stereolithography to fabricate at least a portion of the conductive structures.

[0004] 2. State of the Art

Conductive Structures Used to Connect a Semiconductor Device Face Down to a Higher Level Substrate

[0005] Some types of semiconductor devices, such as flip-chip type semiconductor devices, including flip-chip type dice and ball grid array (BGA) packages (including chip-scale packages, or CSPs), can be connected to higher level substrates by orienting these semiconductor devices face down over the higher level substrate. The contact pads of such semiconductor devices are typically connected directly to corresponding contact pads of the higher level substrate by solder balls.

[0006] Examples of solders that are known in the art to be useful in connecting semiconductor devices face down to higher level substrates include, but are not limited to, lead-tin (Pb/Sn) solder, silver-nickel (Ag/Ni) solder, copper, gold, and conductive or conductor-filled polymers. For example, 95/5 type Pb/Sn solder bumps (i.e., solder having about 95% by weight lead and about 5% by weight tin) have been used in flip-chip and ball grid array type attachments, including chip-scale packages (CSPs).

[0007] When 95/5 type Pb/Sn solder bumps are employed as conductive structures to form a direct connection between a contact pad of a semiconductor device and a contact pad of a higher level substrate, a quantity of solder paste having a higher melting temperature, such as 63/37 type Pb/Sn solder, can be applied to the contact pad of the higher level substrate to facilitate bonding of the solder bump thereto. As the 95/5 type Pb/Sn solder and the 63/37 type Pb/Sn solder are heated to bond the solder bump to a contact pad of the substrate, the 95/5 type Pb/Sn solder, which has a lower melting temperature, softens first. Thus, the gravitational or compressive forces holding the semiconductor device in position over the higher level substrate can cause the softened 95/5 type Pb/Sn solder bump to flatten, pushing the solder laterally outward onto portions of the surface of the semiconductor device that surround the contact pad to which the solder bump is secured.

[0008] Further, when solder balls are reflowed to connect a semiconductor device to a substrate, a phenomenon referred to as "outgassing" occurs, which can damage a semiconductor device proximate to the solder balls. Moreover, relatively high temperatures are required to reflow even low temperature solders, such as 95/5 type Pb/Sn solders. The reflow temperatures can damage package components, such as packaging or encapsulant materials, and even features of the semiconductor die being connected to the substrate.

[0009] Assemblies that include semiconductor devices connected face down to higher level substrates are subjected to thermal cycling during further processing, testing thereof, and in normal use. As these assemblies undergo thermal cycling, the solder balls thereof are also exposed to wide ranges of temperatures, causing the solder balls to expand when heated and contract when cooled. Solder balls have a very different coefficient of thermal expansion than the primary materials of the semiconductor device and the substrate between which the solder balls are disposed. Thus, the amount that the solder balls expand and contract differs significantly from the amount of expansion and contraction of the semiconductor device and the substrate. As a result, repeated variations in temperatures can cause solder fatigue, which can reduce the strength of the solder balls, cause the solder balls to fail, and diminish the reliability of the solder balls. Thermal cycling can also alter the conformations of the conductive structures.

[0010] The likelihood that a solder ball will be damaged by thermal cycling is particularly high when the solder ball spreads over and contacts the surface of the semiconductor device or the higher level substrate surrounding the contact pad. The solder ball loses some of its ability to dissipate heat and, therefore, can be exposed to the full range of temperatures that can occur during thermal cycling. Thus, flattened solder balls and solder balls that contact regions of the surface of a semiconductor device that surround the contact pads thereof are particularly susceptible to the types of damage that can be caused by thermal cycling of the semiconductor device.

[0011] Furthermore, when solder balls contact regions of the semiconductor device that surround the contact pads to which the solder balls are secured, undesirable parasitic capacitance can occur.

[0012] In an attempt to increase the reliability with which solder balls connect semiconductor devices face down to higher level substrates, resins have been applied to semiconductor devices to form collars around the bases of the solder balls protruding from the semiconductor devices. These resinous supports laterally contact the bases of the solder balls to enhance the reliability thereof. The resinous supports are applied to a semiconductor device after solder balls have been secured to the contact pads of the semiconductor device and before the semiconductor device is connected face down to a higher level substrate. As those of skill in the art are aware, however, the shapes of solder balls can change when bonded to the contact pads of a substrate. If the shapes of the solder balls change, the solder balls can fail to maintain contact with the resinous supports, which could thereby fail to protect or enhance the reliability of the solder balls.

[0013] The use of solder balls in connecting a semiconductor device face down to higher level substrates is also somewhat undesirable from the standpoint that, due to their generally spherical shapes, solder balls consume a great deal of area, or "real estate", on a semiconductor device. Thus, solder balls can unduly limit the minimum spacing between the adjacent contact pads of a semiconductor device and, thus, the minimum pitch of the contact pads on the semiconductor device.

[0014] Other types of conductive structures have been used to connect semiconductor devices, including those with relatively tight contact pad pitches, to substrates. Examples of these alternative conductive structures include pillars of conductive elastomer or conductor filled epoxy. When such conductive pillars are secured to the contact pads of a semiconductor device, however, the conductive materials from which these conductive structures are fabricated can bleed. This may cause the material to flow onto regions of the semiconductor device surrounding the contact pad, which may cause parasitic capacitance or even electrical shorts when adjacent conductive structures bleed into contact with each other or a conductive structure bleeds onto an adjacent contact pad.

[0015] The use of other conductive structures which have more desirable shapes, such as pillars, or columns, and mushroom-type shapes, and consume less conductive material than solder balls, to connect semiconductor devices face down to higher level substrates, has been limited since these taller and thinner conductive structures are typically made from materials that do not retain their shapes upon being bonded to the contact pads of a higher level substrate or in thermal cycling of the semiconductor device.

[0016] The inventors are not aware of any art that discloses reinforced, self-aligning conductive structures that facilitate the connection of a semiconductor device to a substrate while preventing conductive material from bleeding or flowing over the edges of contact pads to which the conductive structures are secured. Moreover, the inventors are not aware of methods that can be used to fabricate such reinforced conductive structures.

Stereolithography

[0017] In the past decade, a manufacturing technique termed "stereolithography", also known as "layered manufacturing", has evolved to a degree where it is employed in many industries.

[0018] Essentially, stereolithography, as conventionally practiced, involves utilizing a computer to generate a three-dimensional (3-D) mathematical simulation or model of an object to be fabricated, such generation usually effected with 3-D computer-aided design (CAD) software. The model or simulation is mathematically separated or "sliced" into a large number of relatively thin, parallel, usually vertically superimposed layers, each layer having defined boundaries and other features associated with the model (and thus the actual object to be fabricated) at the level of that layer within the exterior boundaries of the object. A complete assembly or stack of all of the layers defines the entire object, and surface resolution of the object is, in part, dependent upon the thickness of the layers.

[0019] The mathematical simulation or model is then employed to generate an actual object by building the object, layer by superimposed layer. A wide variety of approaches to stereolithography by different companies has resulted in techniques for fabrication of objects from both metallic and nonmetallic materials. Regardless of the material employed to fabricate an object, stereolithographic techniques usually involve disposition of a layer of unconsolidated or unfixed material corresponding to each layer within the object boundaries. This is followed by selective consolidation or fixation of the material to at least a partially consolidated, or semisolid, state in those areas of a given layer corresponding to portions of the object, the consolidated or fixed material also at that time being substantially concurrently bonded to a lower layer of the object to be fabricated. The unconsolidated material employed to build an object may be supplied in particulate or liquid form, and the material itself may be consolidated or fixed or a separate binder material may be employed to bond material particles to one another and to those of a previously formed layer. In some instances, thin sheets of material may be superimposed to build an object, each sheet being fixed to a next lower sheet and unwanted portions of each sheet removed, a stack of such sheets defining the completed object. When particulate materials are employed, resolution of object surfaces is highly dependent upon particle size, whereas when a liquid is employed, surface resolution is highly dependent upon the minimum surface area of the liquid which can be fixed and the minimum thickness of a layer that can be generated. Of course, in either case, resolution and accuracy of object reproduction from the CAD file is also dependent upon the ability of the apparatus used to fix the material to precisely track the mathematical instructions indicating solid areas and boundaries for each layer of material. Toward that end, and depending upon the layer being fixed, various fixation approaches have been employed, including particle bombardment (electron beams), disposing a binder or other fixative (such as by ink-jet printing techniques), or irradiation using heat or specific wavelength ranges.

[0020] An early application of stereolithography was to enable rapid fabrication of molds and prototypes of objects from CAD files. Thus, either male or female forms on which mold material might be disposed might be rapidly generated. Prototypes of objects might be built to verify the accuracy of the CAD file defining the object and to detect any design deficiencies and possible fabrication problems before a design was committed to large-scale production.

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