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Electrical computers and digital processing systems: processing architectures and instruction processing (e.g., processors) September class, title,number 09/11

Below are recently published patent applications awaiting approval from the USPTO. Recent week's RSS XML file available below.
Listing for abstract view: USPTO application #, Title, Abstract excerpt,Patent Agent. Listing format for list view: USPTO National Class full category number, title of the patent application.
  
09/29/2011 > 19 patent applications in 12 patent subcategories. class, title,number

20110238948 - Method and device for coupling a data processing unit and a data processing array: The present invention relates to a method of coupling at least one (conventional) unit processing data in a sequential manner, e.g. a CPU, von-Neumann-Processor and/or microcontroller, the (conventional) unit for data processing comprising an instruction pipeline, and an array for processing data comprising a plurality of data processing cells, e.g.... Agent:

20110238949 - Distributed administration of a lock for an operational group of compute nodes in a hierarchical tree structured network: Distributed administration of a lock for an operational group of compute nodes in a hierarchical tree structured network including assigning the root node of the operational group to send acknowledgments for lock requests, the root lock administration module comprising a module of automated computing machinery; receiving a lock request assigned... Agent: International Business Machines Corporation

20110238951 - Image forming apparatus, image forming system, and information generating method: s

20110238950 - Performing a scatterv operation on a hierarchical tree network optimized for collective operations: Performing a scattery operation on a hierarchical tree network optimized for collective operations including receiving, by the scattery module installed on the node, from a nearest neighbor parent above the node a chunk of data having at least a portion of data for the node; maintaining, by the scattery module... Agent: International Business Machines Corporation

20110238952 - Instruction fetch apparatus, processor and program counter addition control method: An instruction fetch apparatus is disclosed which includes: a program counter configured to manage the address of an instruction targeted to be executed in a program in which instructions belonging to a plurality of instruction sequences are placed sequentially; a change designation register configured to designate a change of an... Agent: Sony Corporation

20110238953 - Instruction fetch apparatus and processor: An instruction fetch apparatus is disclosed which includes: a detection state setting section configured to set the execution state of a program of which an instruction prefetch timing is to be detected; a program execution state generation section configured to generate the current execution state of the program; an instruction... Agent: Sony Corporation

20110238954 - Data processing apparatus: Source code to be processed is analyzed and configuration data in implementing in accordance with each of plural implementation systems is created and is stored in a local memory of a DRP incorporating system. When execution of target processing is started, the implementation system determination processing calculates estimated processing time... Agent: Fuji Xerox Co., Ltd.

20110238955 - Methods for scalably exploiting parallelism in a parallel processing system: Parallelism in a parallel processing subsystem is exploited in a scalable manner. A problem to be solved can be hierarchically decomposed into at least two levels of sub-problems. Individual threads of program execution are defined to solve the lowest-level sub-problems. The threads are grouped into one or more thread arrays,... Agent: Nvidia Corporation

20110238956 - Collective acceleration unit tree structure: A mechanism is provided in a collective acceleration unit for performing a collective operation to distribute or collect data among a plurality of participant nodes. The mechanism receives an input collective packet for a collective operation from a neighbor node within a collective tree. The input collective packet comprises a... Agent: International Business Machines Corporation

20110238958 - Data processing device: A data processing device has an instruction decoder, a control logic unit, and ALU. The instruction decoder decodes instruction codes of an arithmetic instruction. The control logic unit detects the effective data width of operation data to be processed according to the decode result from the instruction decoder and determines... Agent: Renesas Electronics Corporation

20110238957 - Software conversion program product and computer system: According to one embodiment, a software conversion program product having a computer readable medium including programmed instructions, wherein the instructions, when executed by a computer system including a host processor and one or more accelerator processors, causes the computer system to perform: analyzing input software and obtaining a compute intensity... Agent: Kabushiki Kaisha Toshiba

20110238959 - Distributed controller, distributed processing system, and distributed processing method: A distributed controller is connected to two or more processing elements and controls the two or more processing elements to execute distributed processing. The distributed controller comprises a plurality of control modules, each of which is connected to at least one other control module. The distributed controller determines a processing... Agent: Olympus Corporation

20110238960 - Distributed processing system, control unit, processing element, distributed processing method and computer program: A distributed processing system has a control unit and a plurality of processing elements and includes a control line through which control information is sent and received between the control unit and the processing elements, and a data line through which data to be processed is transmitted from at least... Agent: Olympus Corporation

20110238961 - System and method of instruction modification: A method and system of instruction modification. A first machine language instruction, which may comprise a plurality of discrete instructions, is fetched. Responsive to a trigger pattern in the first machine language instruction, a segment of the first machine language instruction is modified. Information can be substituted into the segment... Agent:

20110238962 - Register checkpointing for speculative modes of execution in out-of-order processors: A mechanism is provided for generating a checkpoint for a speculatively executed portion of code. The mechanisms identify, during a speculative execution of a portion of code, a register renaming operation occurring to an entry in a register renaming table of the processor. In response to the register renaming operation... Agent: International Business Machines Corporation

20110238963 - Reconfigurable array and method of controlling the reconfigurable array: A reconfigurable array is provided. The reconfigurable array includes a Very Long Instruction Word (VLIW) mode and a Coarse-Grained Array (CGA) mode. When the VLIW mode is converted to the CGA mode, instead of sharing a central register file between the VLIW mode and the CGA mode, live data to... Agent:

20110238964 - Data processor: The data processor includes CPU operable to execute an instruction included in an instruction set. The instruction set includes a load instruction for reading data on a memory space. The data read according to the load instruction includes data of a format type having a data-read-branching-occurrence bit region. The CPU... Agent: Renesas Electronics Corporation

20110238966 - Branch prediction method and branch prediction circuit for executing the same: A branch prediction method executed in a branch prediction circuit executes the branch instruction, the branch prediction method includes: a branch information storing process for storing the information in the first storage unit or the second storage unit; a process for determining on the basis of a branch condition set... Agent: Fujitsu Limited

20110238965 - Branch prediction method and branch prediction circuit performing the method: A branch prediction circuit includes: a memory for storing information representing a branch instruction and a branch prediction; a control circuit for controlling rewriting information in the memory in accordance with a result of determining whether or not a predicted branch has been taken, and determining an attribute of the... Agent: Fujitsu Limited

  
09/22/2011 > 6 patent applications in 6 patent subcategories. class, title,number
  
09/15/2011 > 11 patent applications in 10 patent subcategories. class, title,number
  
09/08/2011 > 16 patent applications in 14 patent subcategories. class, title,number
  
09/01/2011 > 7 patent applications in 7 patent subcategories. class, title,number
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