Electrical computers and digital processing systems: processing architectures and instruction processing (e.g., processors) inventions 06/06

20060143428 - Semiconductor signal processing device: An orthogonal memory for transforming arrangements of system bus data and processing data is placed between a system bus interface and a memory cell mat storing the processing data. The orthogonal memory includes two-port memory cells, and changes data train transferred in a bit parallel and word serial fashion into...

20060143429 - Method for executing plural programs, method for converting source programs and compiler program using these methods: A synchronous reference code indicative of the fact that synchronous updating was made is provided to data which is to be applied to a critical section, and the code is set when synchronous updating is made. After a sentence in the critical section is executed, it is confirmed whether or...

20060136699 - Apparatus and method for accessing registers in a processor: The present invention is generally directed to an apparatus and method for accessing registers within a processor. In accordance with one embodiment, an apparatus and method are provided for a processor in which at least two separate indicia (such as register select lines, register bank identifiers, processor mode identifiers, etc.)...

20060136698 - System and method for managing materials: The system for managing materials comprises: a material yard which has a material carry-in port and a material carry-out port, the material yard being divided into a plurality of yard sections which store materials; a plurality of first tags which record data of the materials to be read in a...

20060136700 - Vector processing system: A vector processing system for executing vector instructions, each instruction defining multiple pairs of values, an operation to be executed on each of said value pairs and a scalar modifier, the vector processing system comprising a plurality of parallel processing units, each arranged to receive one of said pairs of...

20060136701 - System and program to automatically identify a server on which to deploy an application: A system, method and computer program product for determining one of a plurality of servers on which to install and execute an application. First program instructions obtain information from each of the plurality of servers as to amounts of availability of their respective CPUs, RAMs and storage. Second program instructions...

20060129787 - Providing extended precision in simd vector arithmetic operations: The present invention provides extended precision in SIMD arithmetic operations in a processor having a register file and an accumulator. A first set of data elements and a second set of data elements are loaded into first and second vector registers, respectively. Each data element comprises N bits. Next, an...

20060117163 - High frequency module: A high frequency module comprises a layered substrate. Inside the layered substrate, a reception diplexer for processing reception signals and a transmission diplexer for processing transmission signals are provided. The reception diplexer and the transmission diplexer are located in two different regions inside the layered substrate. A conductor portion that...

20060117164 - Reconfigurable environmentally adaptive computing: Described are methods and apparatus, including computer program products, for reconfigurable environmentally adaptive computing technology. An environmental signal representative of an external environmental condition is received. A processing configuration is automatically selected, based on the environmental signal, from a plurality of processing configurations. A reconfigurable processing element...

20060117165 - Dynamic processing of data processing instructions: A cost-effective and efficient way of dynamically processing data processing instructions is described by the method and the apparatus for dynamically processing at least one data processing instruction in a communication network, using a data processing system which is in a form such that it can process data processing instructions...

20060117166 - Coprocessor instruction loading from port register based on interrupt vector table indication: A coprocessor interface is described which provides a flexible degree of coupling with a host control processor. Specific methods are defined for architectures to make use of the interface for supporting client-server coprocessors (CSCOPs). A dynamic debug interface is used to provide a coprocessor interface which supports tightly coupled, loosely...

20060117167 - Processing activity masking in a data processing system: Within a data processing systems supporting conditional write processing operations, a trash register is provided such that when non-write conditions are encountered a register write is made to the trash register rather than the data register specified by the conditional write operation. Thus the power signature associated with whether or...