|Electrical computers and digital processing systems: memory patents - Monitor Patents|
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Electrical computers and digital processing systems: memoryBelow are recently published patent applications awaiting approval from the USPTO. Recent week's RSS XML file available below.
Listing for abstract view: USPTO application #, Title, Abstract excerpt,Patent Agent. Listing format for list view: USPTO National Class full category number, title of the patent application. 09/04/2014 > 32 patent applications in 16 patent subcategories.
20140250255 - Key injection tool: A method can include injecting key information from memory of a memory device into non-volatile memory of a hardware device via a data port of the hardware device; receiving via the data port identification information from the hardware device that identifies the hardware device; and associating the key information and... Agent: Lenovo (singapore) Pte. Ltd.
20140250256 - Apparatus and system for object-based storage solid-state drive: An object-based storage system comprising a host system capable of executing applications for and with an object-based storage device (OSD). Exemplary configurations include a call interface, a physical layer interface, an object-based storage solid-state device (OSD-SSD), and are further characterized by the presence of a storage processor capable of processing... Agent:
20140250260 - Asynchronous fifo buffer for memory access: An asynchronous FIFO buffer that provides data in response to requests to read a memory array is disclosed. The asynchronous FIFO buffer provides the data output within a latency tolerance. The asynchronous FIFO has a read clock input and a write clock input. The read clock input receives a read... Agent: Sandisk 3d LLC
20140250257 - Compression-enabled blending of data in non-volatile memory: Described herein are embodiments of an apparatus configured for compression-enabled blending of data, a system including the apparatus configured for compression-enabled blending of data, and a method for compression-enabled blending of data. An apparatus configured for compression-enabled blending of data may include non-volatile memory configured to operate in a single-level... Agent:
20140250265 - Data modification based on matching bit patterns: A data storage device includes a memory and a controller. The controller is configured to identify groups of bits that match any bit pattern in a first set of bit patterns. Each of the groups of bits includes a first bit of first data, a second bit of second data,... Agent: Sandisk Technologies Inc.
20140250266 - Data randomization in 3-d memory: In a nonvolatile memory array, such as a three-dimensional array of charge-storage memory cells, data is randomized so that data of different strings along the same bit line are randomized using different keys and portions of data along neighboring word lines are randomized using different keys. Keys may be rotated... Agent: Sandisk Technologies Inc.
20140250258 - Data storage device and flash memory control method: A data storage device with a FLASH memory accessed via multiple channels and a FLASH memory control method. The control method includes the following steps: dividing a plurality of blocks of the FLASH memory into groups to be accessed via different channels; allocating at least one set of cache spaces... Agent: Silicon Motion, Inc.
20140250259 - Data storage device and flash memory control method: A data storage device and a FLASH memory control method with a cache space. The FLASH memory control method includes the following steps: using a plurality of channels to access a FLASH memory, wherein the FLASH memory has a plurality of blocks each with a plurality of pages, and the... Agent: Silicon Motion, Inc.
20140250261 - Logical unit operation: The present disclosure includes methods and devices for logical unit operation. One device embodiment includes a number of logical units, wherein each of the number of logical units has a unique address. The device includes control circuitry coupled to the number of logical units and configured optionally to control more... Agent: Micron Technology, Inc.
20140250264 - Memory system: A memory system according to an embodiment of the present invention comprises: speed of processing for searching through management tables is increased by providing a forward lookup table for searching for, respectively in track and cluster units, from a logical address, a storage device position where data corresponding to the... Agent: Kabushiki Kaisha Toshiba
20140250262 - System and method for polling the status of memory devices: A memory controller and methods thereof suitable for operating a system utilizing multiple memory bus channels and/or multiple banks of memory devices on each channel wherein the memory devices is polled only when necessary. The memory controller includes means for determining a status of each individual memory device of the... Agent: Ocz Storage Solutions, Inc.
20140250263 - Techniques for reducing memory write operations using coalescing memory buffers and difference information: A system, method, and computer program product are provided for reducing write operations in memory. In use, write operations to be performed on data stored in memory are identified. A difference is then determined between results of the write operations and the data stored in the memory. Difference information associated... Agent: Lsi Corporation
20140250267 - Systems and methods for providing dynamic hybrid storage: The present invention relates to dynamic hybrid storage. In particular, the present invention relates to utilization of a plurality of storage devices, recording media, or memories available to selectively store data, wherein the storage of the data is load balanced on the plurality of storage devices, recording media, or memories... Agent:
20140250268 - Method and apparatus for efficient cache read ahead: A method for providing improved sequential read performance in a storage controller is provided. In response to the storage controller receiving a host read request from a host computer, the method includes identifying, by the storage controller, a largest burst length of a plurality of burst lengths in a memory... Agent: Dot Hill Systems Corporation
20140250269 - Declustered raid pool as backup for raid volumes: Storage data is distributed across a first plurality of physical disks in a first enclosure using at least one redundant array of independent disks (RAID) technique. This creates a plurality of virtual volumes. This plurality includes at least a first virtual volume and a second virtual volume. The storage data... Agent: Lsi Corporation
20140250270 - Distributedly storing raid data in a raid memory and a dispersed storage network memory: A method begins by a processing module receiving redundant array of independent disks (RAID) data and determining whether to store the RAID data in at least one of a RAID format and in a dispersed storage network (DSN) format. The method continues with the processing module converting at least a... Agent: Cleversafe, Inc.
20140250271 - Remote copy system and remote copy control method: A first storage system comprises a first RAID group comprising multiple first storage devices, which constitute the basis of a first logical volume. A second storage system comprises a second RAID group comprising multiple second storage devices, which constitute the basis of a second logical volume. The RAID configuration of... Agent: Hitachi, Ltd.
20140250272 - System and method for fetching data during reads in a data storage device: A controller for a data storage device that includes a cache memory and a non-volatile solid state memory is configured to fetch data from the non-volatile solid state memory in response to a read command, conditionally fetch additional data from the non-volatile solid state memory in response to the read... Agent: Kabushiki Kaisha Toshiba
20140250273 - Re-building mapping information for memory devices: Memory modules and methods of operating memory modules re-build mapping information from data read from last valid physical pages. Corruption of mapping information is detected. A last valid physical page associated with logical data blocks is read. Mapping information is obtained from the data read from the last valid physical... Agent: Micron Technology, Inc.
20140250274 - Mapping persistent storage: A computer apparatus and related method to access storage is provided. In one aspect, a controller maps an address range of a data block of storage into an accessible memory address range of at least one of a plurality of processors, in a further aspect, the controller ensures that copies... Agent: Hewlett-packard Development Company, L. P.
20140250275 - Selection of post-request action based on combined response and input from the request source: A data structure includes a plurality of entries each corresponding to a different systemwide combined response of a data processing system. A particular entry includes identifiers of multiple possible actions that can be taken in response to a systemwide combined response. Master logic issues a memory access request on a... Agent: International Business Machines Corporation
20140250276 - Selection of post-request action based on combined response and input from the request source: A data structure includes a plurality of entries each corresponding to a different systemwide combined response of a data processing system. A particular entry includes identifiers of multiple possible actions that can be taken in response to a systemwide combined response. Master logic issues a memory access request on a... Agent:
20140250277 - Memory system: According to one embodiment, a memory system comprises a storage areas each having a physical page that is data-write- and read-accessible, the storage areas being divided into a plurality of parallel operation elements capable of performing a parallel operation, and the physical pages of the storage areas being associated with... Agent: Kabushiki Kaisha Toshiba
20140250279 - Apparatuses and methods for performing logical operations using sensing circuitry: The present disclosure includes apparatuses and methods related to performing logical operations using sensing circuitry. An example apparatus comprises an array of memory cells and sensing circuitry coupled to the array. The sensing circuitry is configured to perform a logical operation using a data value stored in a first memory... Agent: Micron Technology, Inc.
20140250278 - Integrated level shifting latch circuit and method of operation of such a latch circuit: An integrated level shifting latch circuit receives an input signal in a first voltage domain and generates an output signal in a second voltage domain. Data retention circuitry operates in a transparent phase where a data value is subjected to a level shifting function and is written into the data... Agent: Arm Limited
20140250280 - Method of using memory instruction including parameter to affect operating condition of memory: A method is provided for accessing a memory device. The method includes programming data in a plurality of cells of the memory device in a first programming operation. The first programming operation uses a first memory instruction including at least one first parameter representative of at least one first threshold... Agent: Micron Technology, Inc.
20140250281 - Learning machine to optimize random access in a storage system: Mechanisms are provided for optimizing random access in a storage system. According to various embodiments, an access pattern may be identified for a plurality of data segments stored in a first arrangement on a storage medium. Each of the plurality of data segments may be stored at a respective first... Agent: Dell Products L.p.
20140250282 - Storage system: A storage system according to the present invention includes: a data storage controlling part that stores data into a storage device and, when storing other data of the same data content as the data, refers to the already stored data as the other data; and a defragmentation processing part that... Agent: Nec Corporation
20140250283 - Balanced distributed backup scheduling: A method for scheduling a backup of digital data includes determining whether a backup has previously been performed within a predetermined period. It is then determined whether a connection to a backup server is available. It is then decided whether to initiate a backup of digital data within a present... Agent: International Business Machines Corporation
20140250284 - Communication device and management method for identification information item using communication device: In a case where an identification information item determination section (411) determines that a first identification information item indicates a non-replacement part, a first backup section (412) backs up the first identification information item in a backup memory (420). In a case where a confirmation section (413) determines that the... Agent:
20140250285 - Inter-domain memory copy method and apparatus: A method, apparatus, and system for moving data between memory domains of the processes having independent address spaces include receiving a signal including at least one of a source address of a memory where data to be transferred is written, a destination address of the memory where the data is... Agent: Samsung Electronics Co., Ltd.
20140250286 - Computer and memory management method: A computer comprising: a processor; a memory; and an I/O device, the memory including at least one first memory element and at least one second memory element, wherein a memory area provided by the at least one second memory element includes a data storage area and a data compression area,... Agent: Hitach, Ltd08/28/2014 > 76 patent applications in 27 patent subcategories.
20140244891 - Providing dynamic topology information in virtualized computing environments: Systems and methods for providing dynamic topology information to virtual machines hosted by a multi-processor computer system supporting non-uniform memory access (NUMA). An example method may comprise assigning, by a hypervisor executing on a computer system, unique identifiers to a plurality of memory blocks residing on a plurality of physical... Agent: Red Hat Israel, Ltd.
20140244892 - Assigning a weighting to host quality of service indicators: Quality of service indicators are provided from a host via a host interface. The quality of service indicators relate to data stored in a non-volatile data storage via the host. Workload indicators related to the quality of service indicators are measured, and a weighting is assigned to the host in... Agent: Seagate Technology LLC
20140244893 - Configuration data based diagnostic data capture: A data capture system includes a processor instructed by configuration data that indicates a trigger event and data identifiers, a volatile memory that stores data based upon the data identifiers, and a non-volatile memory that stores contents of the volatile memory based upon detection of the trigger event by the... Agent: Hamilton Sundstrand Corporation
20140244894 - Microprocessor: According to an embodiment, the program memory stores application software in a ROM area. An address range of the application software targeted for restriction on use in the program memory is described in the application information memory. Yes-or-no information on the use of the application software targeted for restriction on... Agent: Kabushiki Kaisha Toshiba
20140244903 - Controller, semiconductor storage device and method of controlling data writing: According to one embodiment, a memory controller includes a mode selection part that selects one of a MLC-mode and a SLC-mode, after a write command is decoded by a command decode part, and a write part that executes a data writing to a storage memory by using one of the... Agent:
20140244896 - Data update management in a cloud computing environment: Method and apparatus for managing data in a cloud computing environment. In accordance with some embodiments, data updates are received to a multi-tier memory structure across a cloud network and stored as working data in an upper rewritable non-volatile memory tier of the memory structure. The working data are periodically... Agent: Seagate Technology LLC
20140244910 - Electronic apparatus implemented with microprocessor with rewritable micro program and method to rewrite micro program: An intelligent optical transceiver able to revise a micro program by the host system is disclosed. The optical transceiver includes a MDIO interface, a CPU, and a non-volatile memory. The host system may communicate with the CPU through an external MDIO bus, the MDIO interface, and an internal bus; while... Agent: Sumitomo Electric Industries, Ltd.
20140244902 - Fast read in write-back cached memory: An apparatus having a cache and a circuit is disclosed. The cache includes a plurality of cache lines. The cache is configured to (i) store a plurality of data items in the cache lines and (ii) generate a map that indicates a dirty state or a clean state of each... Agent: Lsi Corporation
20140244898 - I/o hint framework for server flash cache: An I/O hint framework is provided. In one embodiment, a computer system can receive an I/O command originating from a virtual machine (VM), where the I/O command identifies a data block of a virtual disk. The computer system can further extract hint metadata from the I/O command, where the hint... Agent: Vmware, Inc.
20140244908 - Integrated circuit for computing target entry address of buffer descriptor based on data block offset, method of operating same, and system including same: A method of operating an integrated circuit is provided. The method includes receiving a data block offset from a second storage device, obtaining a target entry address using the data block offset, and reading an entry among a plurality of entries comprised in a buffer descriptor stored in a first... Agent: Samsung Electronics Co., Ltd.
20140244905 - Linear programming based decoding for memory devices: Technologies are generally described herein for linear programming based decoding for memory devices. In some examples, a cell threshold voltage level of a memory cell is detected. An interference voltage level of an interference cell that interferes with the memory cell can be determined. The cell threshold voltage level can... Agent: Empire Technology Development LLC
20140244907 - Memory device: According to an embodiment of the invention, a memory device includes an interface unit, a determining unit, a second command generating unit, and a processor. The interface unit receives a first command from the outside of the memory device. The determining unit determines whether the first command received by the... Agent: Kabushiki Kaisha Toshiba
20140244904 - Memory device and computer system: A memory device according to an embodiment includes a non-volatile storage device from which data is read and to which data is written, an interface that is connected to the host device by a multiple upstream lanes and/or a multiple downstream lanes and performs data communication in both directions with... Agent: Kabushiki Kaisha Toshiba
20140244913 - Memory systems: Memory systems having a volatile memory, a non-volatile memory arranged in blocks, and a controller coupled to the volatile memory and to the non-volatile memory. The controller is configured to maintain, in the volatile memory, a list of addresses of erased blocks of the non-volatile memory. The list of addresses... Agent: Micron Technology, Inc.
20140244906 - Memory, and method of reading data from the memory: Disclosed is a method of reading data from a memory including a NAND cell array for performing communications via a serial peripheral interface (SPI) bus. The method includes sequentially receiving inputs of a block address, a word-line address, and a bit-line address of the NAND cell array; and starting to... Agent: Ato Solution Co., Ltd.
20140244901 - Metadata management for a flash drive: An apparatus having one or more memories and a controller is disclosed. The memories are divided into a plurality of regions. Each regions is divided into a plurality of blocks. The blocks correspond to a plurality of memory addresses respectively. The controller is configured to (i) receive data from a... Agent: Lsi Corporation
20140244897 - Metadata update management in a multi-tiered memory: Method and apparatus for managing data in a memory. In accordance with some embodiments, metadata updates are stored in a first tier of a a multi-tier non-volatile memory structure responsive to access operations associated with data objects in the memory structure. The stored metadata updates are logged in a second,... Agent: Seagate Technology LLC
20140244911 - Method for programming a flash memory: A method of programming a flash memory is described. The method includes partitioning a flash memory into a first group having a first level of write-protection, a second group having a second level of write-protection, and a third group having a third level of write-protection. The write-protection of the second... Agent: United States Department Of Energy
20140244919 - Method of erasing information stored in a nonvolatile rewritable memory, storage medium and motor vehicle computer: Method of erasing information stored in a nonvolatile rewritable memory of a computer, wherein a master module sends erasing requests to a slave module of the computer, the memory including at least two interleaved sectors. The method includes preliminary steps of determining a virtual memory addressing space associated with the... Agent: Continental Automotive Gmbh
20140244917 - Methods and systems for reducing churn in flash-based cache: A storage device includes a flash memory-based cache for a hard disk-based storage device and a controller that is configured to limit the rate of cache updates through a variety of mechanisms, including determinations that the data is not likely to be read back from the storage device within a... Agent:
20140244918 - Methods and systems for reducing churn in flash-based cache: A storage device includes a flash memory-based cache for a hard disk-based storage device and a controller that is configured to limit the rate of cache updates through a variety of mechanisms, including determinations that the data is not likely to be read back from the storage device within a... Agent:
20140244914 - Mitigate flash write latency and bandwidth limitation: A method of operating a memory system is provided. The method includes a controller that regulates read and write access to one or more FLASH memory devices that are employed for random access memory applications. A buffer component operates in conjunction with the controller to regulate read and write access... Agent: Spansion LLC
20140244900 - Non-volatile memory based system ram: A memory module includes an input/output (I/O) interface adapted to fit into a system random access memory (RAM) socket. The module also includes at least one controller coupled to the I/O interface, the controller comprising a plurality of registers, and a plurality of non-volatile memory devices coupled to the controller.... Agent:
20140244915 - Pinning content in nonvolatile memory: Systems and methods relating to pinning selected data to sectors in non-volatile memory. A graphical user interface allows a user to specify certain data (e.g., directories or files) to be pinned. A list of pinned sectors can be stored so that a driver or controller that operates on a sector... Agent: Micron Technology, Inc.
20140244912 - Retired page utilization (rpu) for improved write capacity of solid state drives: A method for writing data to a memory module, the method may include determining to write a representation of a data unit to a retired group of memory cells; searching for a selected retired group of memory cells that can store a representation of the data unit without being erased;... Agent: Technion Research And Development Foundation Ltd.
20140244895 - Robust sector id scheme for tracking dead sectors to automate search and copydown: A brownout tolerant EEPROM emulator (18) manages memory operations at a volatile memory (20) and non-volatile memory (24) using a plurality of sector status bits (451) and forward/reverse skip flags (452, 453) stored in a sector identification record (45) of each sector to define a plurality of status indicators arranged... Agent: Freescale Semiconductor, Inc.
20140244909 - Semiconductor memory device: According to one embodiment, a semiconductor memory device includes: string units including a plurality of memory cells stacked above a semiconductor substrate; and a control circuit configured to perform an erase operation per a block, the block including the string units, the control circuit being configured to perform an erase... Agent: Kabushiki Kaisha Toshiba
20140244899 - Storage control system with data management mechanism and method of operation thereof: A method of operation of a storage control system includes: calculating a throttle threshold; identifying a detection point based on the throttle threshold; and calculating a number of write/erase cycles based on the detection point and the throttle threshold for writing a memory device.... Agent: Smart Storage Systems, Inc.
20140244916 - Virtual memory management apparatus: A virtual memory management apparatus of an embodiment is embedded in a computing machine 80 and is provided with an application program 21, an operating system 22, a volatile memory 11, and a nonvolatile memory 12. The volatile memory 11 is provided with a plurality of clean pages. The nonvolatile... Agent: Kabushiki Kaisha Toshiba
20140244921 - Asymmetric multithreaded fifo memory: A First-in First-out (FIFO) memory comprising a latch array and a RAM array and operable to buffer data for multiple threads. Each array is partitioned into multiple sections, and each array comprises a section designated to buffer data for a respective thread. A respective latch array section is assigned higher... Agent: Nvidia Corporation
20140244920 - Scheme to escalate requests with address conflicts: Techniques for escalating a real time agent's request that has an address conflict with a best effort agent's request. A best effort request can be allocated in a memory controller cache but can progress slowly in the memory system due to its low priority. Therefore, when a real time request... Agent: Apple Inc.
20140244924 - Load reduction dual in-line memory module (lrdimm) and method for programming the same: A method is disclosed for providing memory bus timing of a load reduction dual inline memory module (LRDIMM). The method includes: determining a latency value of a dynamic random access memory (DRAM) of the LRDIMM; determining a modified latency value of the DRAM that accounts for a delay caused by... Agent: Diablo Technologies Inc.
20140244923 - Memory controller with clock-to-strobe skew compensation: A clock signal is transmitted to first and second integrated circuit (IC) components via a clock signal line, the clock signal having a first arrival time at the first IC component and a second, later arrival time at the second IC component. A write command is transmitted to the first... Agent: Rambus Inc.
20140244922 - Multi-purpose register programming via per dram addressability mode: Embodiments of an apparatus, system and method for using Per DRAM Addressability (PDA) to program Multi-Purpose Registers (MPRs) of a dynamic random access memory (DRAM) device are described herein. Embodiments of the invention allow unique 32 bit patterns to be stored for each DRAM device on a rank, thereby enabling... Agent:
20140244925 - System, method and computer program product for tamper protection in a data storage system: Systems, methods and computer software utilized in the implementation of tamper protection, where unique information associated with data storage tapes and with particular revisions of these tapes is stored on the storage medium itself and on a memory of the tape cartridge, so that the data can be compared to... Agent: Kip Cr P1 Lp
20140244926 - Dedicated memory structure for sector spreading interleaving: The present disclosure is directed to a method for managing a memory. The method includes the step of receiving data, the data including a plurality of sectors. The method also includes the step of dividing each sector of the plurality of sectors into a plurality of data units. A further... Agent: Lsi Corporation
20140244928 - Method and system to provide data protection to raid 0/ or degraded redundant virtual disk: Disclosed is a system and method for providing redundancy to RAID 0 virtual disks by utilizing any right sized physical disk in the SAS domain. The system and method restore redundancy in a degraded redundant virtual disk. This may be done even in the absence of a configured hot spare.... Agent: Lsi Corporation
20140244929 - Object storage system: The storage system exports logical storage volumes that are provisioned as storage objects. These storage objects are accessed on demand by connected computer systems using standard protocols, such as SCSI and NFS, through logical endpoints for the protocol traffic that are configured in the storage system. Logical storage volumes are... Agent: Vmware, Inc.
20140244927 - Storage system and a method for allocating disk drives to redundancy array of independent disks: A storage system that may include a management module; and multiple disk drives; wherein the management module is arranged to allocate disk drives of the multiple disk drives to disk drive groups, each disk drive group corresponds to at least one redundancy array of independent disks (RAID) group of data... Agent:
20140244931 - Electronic device: An electronic device comprising a semiconductor memory unit that may include a cell array including a plurality of storage cells; a first line connected to one ends of the plurality of storage cells; a second line connected to the other ends of the plurality of storage cells; a first driver... Agent: Sk Hynix Inc.
20140244930 - Electronic devices having semiconductor magnetic memory units: An electronic device comprising a semiconductor memory unit that includes a resistance variable element configured to be changed in a resistance value according to a value of data stored therein; a first reference resistance element having a first resistance value; a second reference resistance element having a second resistance value... Agent: Sk Hynix Inc.
20140244932 - Method and apparatus for caching and indexing victim pre-decode information: The present invention provides a method and apparatus for caching pre-decode information. Some embodiments of the apparatus include a first pre-decode array configured to store pre-decode information for an instruction cache line that is resident in a first cache in response to the instruction cache line being evicted from one... Agent: Advanced Micro Devices, Inc.
20140244933 - Way lookahead: Methods and systems that identify and power up ways for future instructions are provided. A processor includes an n-way set associative cache and an instruction fetch unit. The n-way set associative cache is configured to store instructions. The instruction fetch unit is in communication with the n-way set associative cache... Agent: Mips Technologies, Inc.
20140244934 - Storage apparatus: [Solution] When data designated by a read request from a main frame is stored in a cache memory, a transfer control unit refers to internal control information, identifies the length of a key area and the length of a data area of the data designated by the read request, calculates... Agent:
20140244935 - Storage system capable of managing a plurality of snapshot families and method of snapshot family based read: A method for a snapshot family based reading of data units from a storage system, the method comprises: receiving a read request for reading a requested data entity, searching in a cache memory of the storage system for a matching cached data entity, if not finding the matching cached data... Agent: Infinidat Ltd.
20140244936 - Maintaining cache coherency between storage controllers: Systems and methods maintain cache coherency between storage controllers utilizing bitmap data. In one embodiment, a storage controller processes an I/O request for a logical volume from a host, and generates one or more cache entries in a cache memory that is based on the request. The storage controller identifies... Agent: Lsi Corporation
20140244937 - Read ahead tiered local and cloud storage system and method thereof: A high tier storage area stores a stub file and a lower tier cloud storage area stores the file corresponding to the stub file. When a client apparatus requests segments of the file from the high tier storage area, reference is made to the stub file to determine a predicted... Agent: Bluearc Uk Limited
20140244938 - Method and apparatus for returning reads in the presence of partial data unavailability: Techniques are disclosed for reducing perceived read latency. Upon receiving a read request with a scatter-gather array from a guest operating system running on a virtual machine (VM), an early read return virtualization (ERRV) component of a virtual machine monitor fills the scatter-gather array with data from a cache and... Agent: Vmware, Inc.
20140244939 - Texture cache memory system of non-blocking for texture mapping pipeline and operation method of texture cache memory: A non-blocking texture cache memory for a texture mapping pipeline and an operation method of the non-blocking texture cache memory may include: a retry buffer configured to temporarily store result data according to a hit pipeline or a miss pipeline; a retry buffer lookup unit configured to look up the... Agent: Samsung Electronics Co., Ltd.
20140244940 - Affinity group access to global data: A method, system, and computer readable medium to share data on a global basis within a symmetric multiprocessor (SMP) computer system are disclosed. The method may include grouping a plurality of processor cores into a plurality of affinity groups. Global data may be copied into a plurality of group data... Agent: International Business Machines Corporation
20140244941 - Affinity group access to global data: A method, system, and computer readable medium to share data on a global basis within a symmetric multiprocessor (SMP) computer system are disclosed. The method may include grouping a plurality of processor cores into a plurality of affinity groups. The method may include creating hints about the global data in... Agent: International Business Machines Corporation
20140244942 - Affinity group access to global data: A method, system, and computer readable medium to share data on a global basis within a symmetric multiprocessor (SMP) computer system are disclosed. The method may include grouping a plurality of processor cores into a plurality of affinity groups. Global data may be copied into a plurality of group data... Agent: International Business Machines Corporation
20140244943 - Affinity group access to global data: A method, system, and computer readable medium to share data on a global basis within a symmetric multiprocessor (SMP) computer system are disclosed. The method may include grouping a plurality of processor cores into a plurality of affinity groups. The method may include creating hints about the global data in... Agent: International Business Machines Corporation
20140244945 - Electronic device and method for operating electronic device: An electronic device comprising a semiconductor memory unit that may a variable resistance element configured to be changed in its resistance value in response to current flowing through both ends thereof; an information storage unit configured to store switching frequency information corresponding to a switching frequency which minimizes an amplitude... Agent: Sk Hynix Inc.
20140244944 - Wait-free algorithm for inter-core, inter-process, or inter-task communication: A method and system are presented for providing deterministic inter-core, inter-process, and inter-thread communication between a reader and a writer. The reader and writer communicate by passing data through a shared memory using double buffering of double buffers. The shared memory includes a first double buffer and a second double... Agent: Barco N.v.
20140244946 - Cross-point resistive-based memory architecture: A plurality of addressable memory tiles each comprise one or more cross-point arrays. Each array comprises a plurality of non-volatile resistance-change memory cells. A controller is configured to couple to the array and to a host system. The controller is configured to perform receiving, from the host system, one or... Agent: Seagate Technology LLC
20140244948 - Memory having internal processors and methods of controlling memory access: Memories having internal processors and methods of data communication within such memories are provided. One such memory may include a fetch unit configured to substantially control performing commands on a memory array based on the availability of banks to be accessed. The fetch unit may receive instructions including commands indicating... Agent: Micron Technology, Inc.
20140244947 - Memory, memory system including the same, and operation method of memory controller: A memory system includes a memory including a condition detection circuit configured to detect a memory condition, and a condition output circuit configured to output the memory condition detected by the condition detection circuit. A memory controller is configured to adjust operational performance of the memory in response to the... Agent:
20140244949 - Asynchronous data mirroring in memory controller: A method for mirroring data between virtual machines includes intercepting a write command initiated from a virtual machine. Address and data information from the intercepted write command is stored within a queue located within a memory buffer of the primary server. The stored address and data information is transferred, upon... Agent: International Business Machines Corporation
20140244950 - Cloning live virtual machines: A system and method are disclosed for cloning a live virtual machine (i.e., a virtual machine that is running). In accordance with one example, a computer system prepares an area of a storage device for a clone of a live virtual machine, and a transaction is then executed that comprises:... Agent: Red Hat Israel, Ltd.
20140244953 - Identifying and accessing reference data in an in-memory data grid: Embodiments relate to providing normalization techniques for reference data in an in-memory data grid. An aspect includes monitoring object creation and access in an in-memory data grid and identifying reference data in an object field of a plurality of object instances. A reference map for the object field is created... Agent: International Business Machines Corporation
20140244954 - Identifying and accessing reference data in an in-memory data grid: Embodiments relate to providing normalization techniques for reference data in an in-memory data grid. An aspect includes monitoring object creation and access in an in-memory data grid and identifying reference data in an object field of a plurality of object instances. A reference map for the object field is created... Agent: International Business Machines Corporation
20140244951 - Live snapshotting of multiple virtual disks in networked systems: A system and method are disclosed for servicing requests to create live snapshots of a plurality of virtual disks in a virtualized environment. In accordance with one example, a first computer system detects that a second computer system has issued one or more commands to create a first snapshot of... Agent: Red Hat Israel, Ltd.
20140244952 - System and method for a scalable crash-consistent snapshot operation: Described herein is a system and method for a scalable crash-consistent snapshot operation. Write requests may be received from an application and a snapshot creation request may further be received. Write requests received before the snapshot creation request may be associated with pre-snapshot tags and write requests received after the... Agent: Netapp, Inc.
20140244955 - System and method for allocation of organizational resources: System and methods for storing electronic data is provided, where the system comprises a storage manager component and a management module associated with the storage manager component. The management module is configured to receive information related to storage activities associated with one or more storage operation components within the storage... Agent: Commvault Systems, Inc.
20140244956 - Storage system in which fictitious information is prevented: According to one embodiment, a storage system includes a host device and a secure storage. The host device and the secure storage produce a bus key which is shared only by the host device and the secure storage by authentication processing, and which is used for encoding processing. The host... Agent: Kabushiki Kaisha Toshiba
20140244957 - Storage system in which fictitious information is prevented: According to one embodiment, a storage system includes a host device and a secure storage. The host device and the secure storage produce a bus key which is shared only by the host device and the secure storage by authentication processing, and which is used for encoding processing. The host... Agent: Kabushiki Kaisha Toshiba
20140244960 - Computing device, memory management method, and program: According to one embodiment, there is provided a computing device managing a first memory region and a second memory region, a power consumption to hold data stored in the second memory region being smaller than that of the first memory region, including: a data manager and a data processor. The... Agent: Kabushiki Kaisha Toshiba
20140244959 - Storage controller, storage system, method of controlling storage controller, and computer-readable storage medium having storage control program stored therein: A storage system includes: a first storage unit; a second storage unit that has an access speed higher than an access speed of the first storage unit; and a storage controller that collects load information about respective loads in a plurality of areas in the first storage unit, selects a... Agent: Fujitsu Limited
20140244958 - Storage system and management method therefor: A storage system comprises multiple first storage apparatuses, and a controller which provides a first logical volume corresponding to a storage area of the multiple first storage apparatuses to a host computer. The controller partitions a storage area corresponding to the first logical volume into multiple first physical storage areas,... Agent: Hitachi, Ltd.
20140244961 - Managing and storing electronic messages during recipient unavailability: A method for managing storage space for electronic messages. A computer receiving a selected time period in which a user of a messaging program will not be able to access electronic messages through the messaging program. The computer estimating, by one or more computer processors, an amount of storage space... Agent: International Business Machines Corporation
20140244963 - Method and apparatus for allocating memory for immutable data on a computing device: A system that allocates memory for immutable data on a computing device. The system allocates a memory region on the computing device to store immutable data for an executing application. This memory region is smaller than the immutable data for the application. When the system subsequently receives a request to... Agent: Oracle International Corporation
20140244962 - Multi-level memory compression: According to one embodiment of the present disclosure, an approach is provided in which a processor selects a page of data that is compressed by a first compression algorithm and stored in a memory block. The processor identifies a utilization amount of the compressed page of data and determines whether... Agent: International Business Machines Corporation
20140244964 - Dual mapping between program states and data patterns: The present disclosure includes methods and apparatuses for dual mapping between program states and data patterns. One apparatus includes a memory and a controller configured to control a dual mapping method comprising: performing a base conversion on a received data pattern and mapping a resulting base converted data pattern to... Agent: Micron Technology, Inc.
20140244965 - Method and system for simplified address translation support for static infiniband host channel adaptor structures: A method for optimized address pre-translation for a host channel adapter (HCA) static memory structure is disclosed. The method involves determining whether the HCA static memory structure spans a contiguous block of physical address space, when the HCA static memory structure spans the contiguous block of physical address space, requesting... Agent: Oracle International Corporation
20140244966 - Packet processing match and action unit with stateful actions: A packet processing block. The block comprises an input for receiving data in a packet header vector, where the vector comprises data values representing information for a packet. The block also comprises circuitry for performing packet match operations in response to at least a portion of the packet header vector... Agent: Texas Instruments Incorporated08/21/2014 > 56 patent applications in 27 patent subcategories.
20140237157 - System and method for providing an address cache for memory map learning: A system for interfacing with a co-processor or input/output device is disclosed. According to one embodiment, the system provides a one-hot address cache comprising a plurality of one-hot addresses and a host interface to a host memory controller of a host system. Each one-hot address of the plurality of one-hot... Agent: Diablo Technologies Inc.
20140237158 - Managing the translation look-aside buffer (tlb) of an emulated machine: A mechanism is provided for managing the translation look-aside buffer (TLB) of an emulated computer, in which an extension to the TLB is provided so as to improve virtual address translation capacity for the emulated central processing unit (CPU).... Agent: International Business Machines Corporation
20140237159 - Apparatus, system, and method for atomic storage operations: A virtual storage layer (VSL) for a non-volatile storage device presents a logical address space of a non-volatile storage device to storage clients. Storage metadata assigns logical identifiers in the logical address space to physical storage locations on the non-volatile storage device. Data is stored on the non-volatile storage device... Agent: Fusion-io, Inc.
20140237160 - Inter-set wear-leveling for caches with limited write endurance: A cache controller includes a first register that updates after every memory location swap operation on a number of cache sets in a cache memory and resets every N−1 memory location swap operations. N is a number of the cache sets in the cache memory. The memory controller also has... Agent: Qualcomm Incorporated
20140237161 - Systems and methods for user configuration of device names: A system includes a device, a BIOS, and a processor. The BIOS includes a storage operable to store predefined identifier/user defined name pairs. The processor is operable to, detect the device, determine a predefined identifier for the device, and access the storage to locate a predefined identifier/user defined name pair... Agent: Dell Products, Lp
20140237167 - Apparatus and methods for peak power management in memory systems: Disclosed are apparatus and techniques for managing power in a memory system having a controller and nonvolatile memory array. In one embodiment, prior to execution of each command with respect to the memory array, a request for execution of such command is received with respect to the memory array. In... Agent: Sandisk Technologies Inc.
20140237166 - Higher-level redundancy information computation: Higher-level redundancy information computation enables a Solid-State Disk (SSD) controller to provide higher-level redundancy capabilities to maintain reliable operation in a context of failures of non-volatile (e.g. flash) memory elements during operation of an SSD. A first portion of higher-level redundancy information is computed using parity coding via an XOR... Agent: Lsi Corporation
20140237169 - Hot memory block table in a solid state storage device: Solid state storage devices and methods for populating a hot memory block look-up table (HBLT) are disclosed. In one such method, an indication to an accessed page table or memory map of a non-volatile memory block is stored in the HBLT. If the page table or memory map is already... Agent: Micron Technology, Inc.
20140237164 - Hybrid drive that implements a deferred trim list: A hybrid drive controller maintains a deferred trim list that holds a subset of logical addresses of writes performed on magnetic disks. For example, if a write command is issued to an LBA space that overlaps a portion stored in flash memory and the write is to be performed on... Agent: Kabushiki Kaisha Toshiba
20140237172 - Imparting durability to a transactional memory system: A transactional memory system uses a volatile memory as primary storage for transactions. Data is selectively stored in a non-volatile memory to impart durability to the transactional memory system to allow the transactional memory system to be restored to a consistent state in the event of data loss to the... Agent:
20140237168 - Mass storage controller volatile memory containing metadata related to flash memory storage: A storage controller is provided that contains multiple processors. In some embodiments, the storage controller is coupled to a flash memory module having multiple flash memory groups, each flash memory group corresponding to a distinct flash port in the storage controller, each flash port comprising an associated processor. Each processor... Agent: Sandisk EnterpriseIPLLC
20140237165 - Memory controller, method of operating the same and memory system including the same: A memory controller controlling a nonvolatile memory device having a plurality of memory blocks as a data storage space includes an error detection and correction circuit and a reclaim control unit. The error detection and correction circuit receives data from a memory block and calculates a comparison result by comparing... Agent: Samsung Electronics Co., Ltd.
20140237162 - Non-volatile memory channel control using a general purpose programmable processor in combination with a low level programmable sequencer: A system includes a control processor, a non-volatile memory device interface, and a micro-sequencer. The control processor may be configured to receive commands and send responses via a command interface. The non-volatile memory device interface may be configured to couple the system to one or more non-volatile memory devices. The... Agent: Lsi Corporation
20140237163 - Reducing writes to solid state drive cache memories of storage controllers: Methods and structure are provided for reducing the number of writes to a cache of a storage controller. One exemplary embodiment includes a storage controller that has a non-volatile flash cache memory, a primary memory that is distinct from the cache memory, and a memory manager. The memory manager is... Agent: Lsi Corporation
20140237171 - Solid-state disk with wireless functionality: A system including an interface module to interface a solid-state disk controller to a computing device. A memory control module exchanges data with the computing device via the interface module and caches the data in a solid-state memory controlled by the solid-state disk controller. A network interface module communicates with... Agent: Marvell World Trade Ltd.
20140237170 - Storage device, and read command executing method: A storage device of the embodiment includes memory, a control section, a table holding section for managing a table for holding an identifier, a logical address, and a data length based on a read command, an issuing section for issuing the logical address and the data length for each identifier... Agent: Kabushiki Kaisha Toshiba
20140237173 - Aggregation of write traffic to a data store: A method and a processing device are provided for sequentially aggregating data to a write log included in a volume of a random-access medium. When data of a received write request is determined to be suitable for sequentially aggregating to a write log, the data may be written to the... Agent: Microsoft Corporation
20140237174 - Highly efficient design of storage array utilizing multiple cache lines for use in first and second cache spaces and memory subsystems: A method of operating a cache memory includes the step of storing a set of data in a first space in a cache memory, a set of data associated with a set of tags. A subset of the set of data is stored in a second space in the cache... Agent: Narada Systems, LLC
20140237175 - Parallel processing computer systems with reduced power consumption and methods for providing the same: A parallel processing computing system includes an ordered set of m memory banks and a processor core. The ordered set of m memory banks includes a first and a last memory bank, wherein m is an integer greater than 1. The processor core implements n virtual processors, a pipeline having... Agent: Cognitive Electronics, Inc.
20140237176 - System and method for unlocking additional functions of a module: A system for interfacing with a co-processor or input/output device is disclosed. According to one embodiment, the system performs a maze unlock sequence by operating a memory device in a maze unlock mode. The maze unlock sequence involves writing a first data pattern of a plurality of data patterns to... Agent: Diablo Technologies Inc.
20140237177 - Memory module and memory system having the same: A memory module includes a master memory device and at least one slave memory device. The master memory device may generate a refresh clock signal, and perform a refresh operation in synchronization with the refresh clock signal. The slave memory device may be connected to receive the refresh clock signal,... Agent: Samsung Electronics Co., Ltd.
20140237178 - Storage resource acknowledgments: A technique to adjust storage resource acknowledgments and a method thereof is Provided. In one aspect, a request for an operation associated with data is received, and it is determined whether the operation has attained a particular state. In a further aspect, the particular state is adjustable. In another example,... Agent:
20140237180 - Determining efficiency of a virtual array in a virtualized storage system: A virtualized storage system comprises at least one host, at least one virtual array, a backend array and a management server. The host requests storage operations to the virtual array, and the virtual array executes storage operations for the host. The backend array, coupled to the virtual array, comprises physical... Agent: Netapp, Inc.
20140237179 - Information system and data transfer method of information system: Availability of an information system including a storage apparatus and a host computer is improved. A host system includes a first storage apparatus provided with a first volume for storing data, and a second storage apparatus for storing the data sent from the first storage apparatus. In case of a... Agent: Hitachi, Ltd.
20140237181 - Method and apparatus for preparing a cache replacement catalog: Methods and systems to intelligently cache content in a virtualization environment using virtualization software such as VMWare ESX or Citrix XenServer or Microsoft HyperV or Redhat KVM or their variants are disclosed. Storage IO operations (reads from and writes to disk) are analyzed (or characterized) for their overall value and... Agent: Atlantis Computing, Inc.
20140237182 - Method and apparatus for servicing read and write requests using a cache replacement catalog: Methods and systems to intelligently cache content in a virtualization environment using virtualization software such as VMWare ESX or Citrix XenServer or Microsoft HyperV or Redhat KVM or their variants are disclosed. Storage IO operations (reads from and writes to disk) are analyzed (or characterized) for their overall value and... Agent: Atlantis Computing, Inc.
20140237184 - System and method for multi-tiered meta-data caching and distribution in a clustered computer environment: A system and method caches and distributes meta-data for one or more data containers stored on a plurality of volumes configured as a striped volume set (SVS) and served by a plurality of nodes interconnected as a cluster. The SVS comprises one meta-data volume (MDV) configured to store a canonical... Agent: Netapp, Inc.
20140237183 - Systems and methods for intelligent content aware caching: Methods and systems to intelligently cache content in a virtualization environment using virtualization software such as VMWare ESX or Citrix XenServer or Microsoft HyperV or Redhat KVM or their variants are disclosed. Storage IO operations (reads from and writes to disk) are analyzed (or characterized) for their overall value and... Agent: Atlantis Computing, Inc.
20140237185 - One-cacheable multi-core architecture: Technologies are generally described for methods, systems, and devices effective to implement one-cacheable multi-core architectures. In one example, a multi-core processor that includes a first and second tile may be configured to implement a one-cacheable architecture. The second tile may be configured to generate a request for a data block.... Agent: Empire Technology Development, LLC
20140237187 - Adaptive multilevel binning to improve hierarchical caching: A device driver calculates a tile size for a plurality of cache memories in a cache hierarchy. The device driver calculates a storage capacity of a first cache memory. The device driver calculates a first tile size based on the storage capacity of the first cache memory and one or... Agent: Nvidia Corporation
20140237186 - Filtering snoop traffic in a multiprocessor computing system: Filtering snoop traffic in a multiprocessor computing system, each processor in the multiprocessor computing system coupled to a high level cache and a low level cache, the including: receiving a snoop message that identifies an address in shared memory targeted by a write operation; identifying a set in the high... Agent: International Business Machines Corporation
20140237188 - Electronic information caching: Electronic information is made more readily available to one or more access requestors based on an anticipated demand for the electronic information using a process, system or computer software. For instance, electronic information stored on a first storage medium is identified for transport (e.g., in response to a request of... Agent: Aol Inc.
20140237189 - Compression status bit cache and backing store: One embodiment of the present invention sets forth a technique for increasing available storage space within compressed blocks of memory attached to data processing chips, without requiring a proportional increase in on-chip compression status bits. A compression status bit cache provides on-chip availability of compression status bits used to determine... Agent: Nvidia Corporation
20140237190 - Memory system and management method therof: A memory system having multiple memory layers is provided. The memory system includes an upper memory layer and an intermediate memory layer comprising a first sub-memory consisting of a nonvolatile memory and a second sub-memory consisting of a volatile memory in a parallel structure positioned below the upper memory layer,... Agent:
20140237192 - Method and apparatus for constructing memory access model: Embodiments of the present invention provide a method and an apparatus for constructing a memory access model, and relate to the field of computers. The method includes: obtaining a page table corresponding to a process referencing a memory block, and clearing a Present bit included in each page table entry... Agent: Huawei Technologies Co., Ltd.
20140237191 - Methods and apparatus for intra-set wear-leveling for memories with limited write endurance: Efficient techniques are described for extending the usable lifetime for memories with limited write endurance. A technique for wear-leveling of caches addresses unbalanced write traffic on cache lines which cause heavily written cache lines to fail much fast than other lines in the cache. A counter is incremented for each... Agent: Qualcomm Incorporated
20140237193 - Cache window management: A method of managing a plurality of least recently used (LRU) queues having entries that correspond to cached data includes ordering a first plurality of entries in a first queue according to a first recency of use of cached data. The first queue corresponds to a first priority. A second... Agent: Lsi Corporation
20140237194 - Efficient validation of coherency between processor cores and accelerators in computer systems: A method of testing cache coherency in a computer system design allocates different portions of a single cache line for use by accelerators and processors. The different portions of the cache line can have different sizes, and the processors and accelerators can operate in the simulation at different frequencies. The... Agent: International Business Machines Corporation
20140237195 - N-dimensional collapsible fifo: A system and method for efficient dynamic utilization of shared resources. A computing system includes a shared data structure accessed by multiple requestors. Both indications of access requests and indices pointing to entries within the data structure are stored in storage buffers. Each storage buffer maintains at a selected end... Agent: Apple Inc.
20140237196 - Charged particle beam writing apparatus, and buffer memory data storage method: A charged particle beam writing apparatus includes a buffer memory including a memory region capable of contemporarily storing writing data for data processing regions, wherein writing data including data files is temporarily stored for each of the data processing regions, a dividing unit to divide the memory region of the... Agent: Nuflare Technology, Inc.
20140237197 - Non-uniform memory access (numa) resource assignment and re-evaluation: A system and a method are disclosed for providing for non-uniform memory access (NUMA) resource assignment and re-evaluation. In one example, the method includes receiving, by a processing device, a request to launch a first process in a system having a plurality of Non-Uniform Memory Access (NUMA) nodes, determining, by... Agent: Red Hat, Inc.
20140237198 - Reducing effective cycle time in accessing memory modules: A method reduces a cycle time of an individual memory module to an effective cycle time shorter than the cycle time using a plurality of memory modules having a circular sequence. The method includes initiating a set of read operations on different memory modules of the plurality of memory modules... Agent: Spirent Communications, Inc.
20140237199 - Apparatus and method for handling page protection faults in a computing system: Method and apparatus for handling page protection faults in combination particularly with the dynamic conversion of binary code executable by a one computing platform into binary code executed instead by another computing platform. In one exemplary aspect, a page protection fault handling unit is used to detect memory accesses, to... Agent: International Business Machines Corporation
20140237200 - Readout of interfering memory cells using estimated interference to other memory cells: A method includes storing data in a memory that includes multiple analog memory cells. After storing the data, an interference caused by a first group of the analog memory cells to a second group of the analog memory cells is estimated. The data stored in the first group is reconstructed... Agent: Apple Inc.
20140237201 - Data replication with dynamic compression: A method for replicating data between two or more network connected data storage devices, the method including dynamically determining whether to compress data prior to transmitting across the network based, at least in part, on bandwidth throughput between the network connected data storage devices. If it has been determined to... Agent: Compellent Technologies
20140237203 - Semiconductor memory card access apparatus, a computer-readable recording medium, an initialization method, and a semiconductor memory card: A predetermined number of erasable blocks positioned at a start of a volume area in a semiconductor memory card are provided so as to include volume management information. A user area following the volume management information includes a plurality of clusters. A size of a partition control area from a... Agent: Panasonic Corporation
20140237204 - Storage system and object management method: A storage system comprises a second NAS storage apparatus comprising a processor and a storage medium and a third NAS storage apparatus for migrating an object managed by a first NAS storage apparatus. The processor stores path information of an object for which migration has started after including the path... Agent: Hitachi, Ltd.
20140237205 - System and method for providing a command buffer in a memory system: A system for interfacing with a co-processor or input/output device is disclosed. According to one embodiment, the system is configured to receive a command from a host memory controller of a host system and store the command in a command buffer entry. The system determines that the command is complete... Agent: Diablo Technologies Inc.
20140237202 - System for preventing duplication of autonomous distributed files, storage device unit, and data access method: There is provided an autonomous distributed type file system which is connected to a data reference device through a first network. The autonomous distributed type file system includes a plurality of storage device units which are mutually connected through a second network and are connected to the first network. Each... Agent: Hitachi, Ltd.
20140237206 - Managing personal information on a network: Devices, systems, and methods are provided for managing personal information by providing a centralized source or database for a user's information and enabling the user to regulate privacy levels for each information item or category of information. Templates are provided as a table of hierarchies or an onion layers model.... Agent: At&t Intellectual Property I, L.p.
20140237207 - Method and system for enhanced performance in serial peripheral interface: A method of conducting an operation in an integrated circuit having a plurality of memory cells includes receiving an operating command for the memory cells and receiving a first address segment associated with the memory cells in at least one clock cycle after receiving the operating command. The method further... Agent: Macronix International Co., Ltd.
20140237210 - Capacity forecasting for backup storage: A system for capacity forecasting for backup storage comprises a processor and a memory. The processor is configured to calculate a set of statistical analyses for subsets of a set of capacities at points in time. The processor is further configured to determine a selected statistical analysis from the set... Agent: Emc Corporation
20140237209 - Memory management method, memory management apparatus and numa system: Embodiments of the present invention provide a memory management method, a memory management apparatus and a NUMA system. The memory management method includes: determining, according to a memory demand information which includes memory demand information sent by a processor, whether a memory controller meeting the memory demand information exists in... Agent: Huawei Technologies Co., Ltd.
20140237208 - Protecting memory diagnostics from interference: Disclosed herein are techniques for managing diagnostics of computer memory. A range of contiguous addresses of a physical memory are associated with or mapped to addresses of a virtual memory. The range of contiguous addresses is protected from interference.... Agent: Hewlett-packard Development Company, L.p.
20140237211 - System and method for volume block number to disk block number mapping: The present invention provides a system and method for virtual block numbers (VBNs) to disk block number (DBN) mapping that may be utilized for both single and/or multiple parity based redundancy systems. Following parity redistribution, new VBNs are assigned to disk blocks in the newly added disk and disk blocks... Agent: Netapp, Inc.
20140237212 - Tracking and eliminating bad prefetches generated by a stride prefetcher: A method, an apparatus, and a non-transitory computer readable medium for tracking prefetches generated by a stride prefetcher are presented. Responsive to a prefetcher table entry for an address stream locking on a stride, prefetch suppression logic is updated and prefetches from the prefetcher table entry are suppressed when suppression... Agent: Advanced Micro Devices, Inc.08/14/2014 > 51 patent applications in 26 patent subcategories.
20140229653 - Mapping engine for a storage device: A hardware search structure determines the status of cache lines associated with a large disk array and at the same time reduces the amount of memory space needed for tracking the status. The search structure is configurable in hardware to different cache line sizes and different primary and secondary index... Agent: Violin Memory Inc.
20140229658 - Cache load balancing in storage controllers: Methods and structure are provided for cache load balancing in storage controllers that utilize Solid State Drive (SSD) caches. One embodiment is a storage controller of a storage system. The storage controller includes a host interface operable to receive Input and Output (I/O) operations from a host computer. The storage... Agent: Lsi Corporation
20140229654 - Garbage collection with demotion of valid data to a lower memory tier: Method and apparatus for managing data in a memory. In accordance with some embodiments, a first tier of a multi-tier memory structure is arranged into a plurality of garbage collection units (GCUs). Each GCU is formed from a plurality of non-volatile memory cells, and is managed as a unit. A... Agent: Seagate Technology LLC
20140229660 - Logical address offset: The present disclosure includes methods, devices, and systems for a logical address offset. One method embodiment includes detecting a memory unit formatting operation. Subsequently, in response to detecting the formatting operation, the method includes inspecting format information on the memory unit, calculating a logical address offset, and applying the offset... Agent: Micron Technology, Inc.
20140229662 - Memory system and method for controlling a nonvolatile semiconductor memory: A memory system includes a nonvolatile semiconductor memory having blocks, the block being data erasing unit; and a controller configured to execute; an update processing for; writing superseding data in a block, the superseding data being treated as valid data; and invalidating superseded data having the same logical address as... Agent: Kabushiki Kaisha Toshiba
20140229656 - Multi-tiered memory with different metadata levels: Method and apparatus for managing data in a memory. In accordance with some embodiments, a data object is stored in a first non-volatile tier of a multi-tier memory structure. A metadata unit is generated to describe the data object, the metadata unit having a selected granularity. The metadata unit is... Agent: Seagate Technology LLC
20140229661 - Operating system based dram and flash management: A memory system is provided. The system includes an operating system kernel that regulates read and write access to one or more FLASH memory devices that are employed for random access memory applications. A buffer component operates in conjunction with the kernel to regulate read and write access to the... Agent: Spansion LLC
20140229664 - Preloading data into a flash storage device: Programmer's data that is transferred from a programming device to a storage device is initially stored in a memory device of the storage device by using a durable data-retention storage setup. After the storage device is embedded in a host device, the programmer's data is internally (i.e., in the storage... Agent: Sandisk Il Ltd.
20140229657 - Readdressing memory for non-volatile storage devices: Memory for a fragmented file on a non-volatile storage device can be readdressed to contiguous physical memory addresses, while the physical location of the file fragments of the fragmented file stored on the non-volatile storage device remain the same after the memory is readdressed. A logical block addressing (LBA) mapping... Agent: Microsoft Corporation
20140229663 - Selectively programming data in multi-level cell memory: Devices, systems, methods, and other embodiments associated with accessing memory are described. In one embodiment, a method detects that a power quality associated with a volatile memory in a computing device meets a threshold value and in response thereto, reprogramming data from the volatile memory to a flash memory comprising... Agent: Marvell World Trade Ltd.
20140229655 - Storing error correction code (ecc) data in a multi-tier memory structure: Method and apparatus for managing data in a memory. In accordance with some embodiments, a data object is stored in a first non-volatile tier of a multi-tier memory structure. An ECC data set adapted to detect at least one bit error in the data object during a read operation is... Agent: Seagate Technology LLC
20140229659 - Thin translation for system access of non volatile semicondcutor storage as random access memory: A semiconductor chip is described having a controller having a point-to-point link interface and non volatile memory interfacing circuitry. The point-to-point link interface is to receive a command from a system that identifies a particular non volatile memory. The non volatile memory interfacing circuitry is to receive and forward the... Agent:
20140229665 - Mobile personalized boot data: A system and associated method of using may generally have at least a mobile data storage device with a controller directing data to first and second tiers of memory. The first tier of memory can have at least boot data pre-fetched from the second tier of memory with the boot... Agent: Seagate Technology LLC
20140229668 - Memory controller and memory control method: Write-leveling, a write-leveling control unit(250) adjusts the delay amounts of DQS control unit(242) and a DQ control unit(244), at first, within a range of less than one clock cycle. Then, with respect to each SDRAM(282), a read-data row acquired by performing a read after a write of an expected value... Agent: Nec Computertechno, Ltd.
20140229666 - Memory subsystem i/o performance based on in-system empirical testing: A memory subsystem empirically tests performance parameters of I/O with a memory device. Based on the empirical testing, the memory subsystem can set the performance parameters specific to the system in which the memory subsystem is included. A test system performs the testing. For each of multiple different settings for... Agent:
20140229667 - Memory system with calibrated data communication: An integrated circuit device includes a transmitter circuit operable to transmit a timing signal over a first wire to a DRAM. The DRAM receives a first signal having a balanced number of logical zero-to-one transitions and one-to-zero transitions and samples the first signal at a rising edge of the timing... Agent: Rambus Inc.
20140229669 - Memory architecture for dynamically allocated manycore processor: Invented hardware logic based methods and systems enable dynamically allocating and assigning an array of processing cores among instances of software programs, based on at least in part on indications of which instances of the programs are ready-to-execute, wherein such an indication for any given program instance is based at... Agent:
20140229670 - Cache coherency and synchronization support in expanders in a raid topology with multiple initiators: Systems and methods presented herein provide for region lock management in an expander. In one embodiment, an expander, being operable to link a plurality of initiators to a plurality of Redundant Array of Independent Disks logical volumes, includes a plurality of physical transceivers, each being operable to link the logical... Agent: Lsi Corporation
20140229671 - Creating logical disk drives for raid subsystems: A computer storage system includes multiple disk trays, each disk tray holding two or more physical disks. The disks on a single tray are virtualized into a single logical disk. The single logical disk reports to the RAID (redundant array of inexpensive disks) subsystem, creating the impression that there is... Agent:
20140229673 - Scheduling of reactive i/o operations in a storage environment: A system and method for effectively scheduling read and write operations among a plurality of solid-state storage devices. A computer system comprises client computers and data storage arrays coupled to one another via a network. A data storage array utilizes solid-state drives and Flash memory cells for data storage. A... Agent: Pure Storage, Inc.
20140229672 - Software development kit for lidar data: The present invention relates to a method and system for compressing and retrieving Light Detection and Ranging output data, and, more specifically, to a method and system for compressing Light Detection and Ranging output data by Run Length Encoding Light Detection and Ranging output data and rapidly accessing this compressed... Agent: Par Technology Corporation
20140229674 - Internal notebook microsd reader with read-only switch: A computing device can include a connector to connect with a removable storage device. A switch can control the connector to prevent in a first state and allow in a second state at least one of the writing and erasing of a removable storage device connected to the connector. The... Agent: Hewlett-packard Development Company, L.p.
20140229675 - Elastic i/o processing workflows in heterogeneous volumes: The present disclosure provides advantageous methods and systems for input/output processing workflows in a heterogeneous data volume. One embodiment relates to a method of writing data to a heterogeneous data volume having multiple disk classes of storage. A class of storage tier for the data write is selected using operating... Agent:
20140229676 - Rebuild of redundant secondary storage cache: System and techniques for rebuilding a redundant secondary storage cache including a first storage device and a second storage device are described. A metadata entry indicative of a validity of a portion of information stored by a first storage cache device and associated with a region of a primary storage... Agent: Lsi Corporation
20140229677 - Hiding instruction cache miss latency by running tag lookups ahead of the instruction accesses: This disclosure provides techniques and apparatuses to enable early, run-ahead handling of IC and ITLB misses by decoupling the ITLB and IC tag lookups from the IC data (instruction bytes) accesses, and making ITLB and IC tag lookups run ahead of the IC data accesses. This allows overlapping the ITLB... Agent:
20140229678 - Method and apparatus for accelerated shared data migration: A method and apparatus for accelerated shared data migration between cores, Using an Always Migrate protocol, when a migratory probe hits a directory entry in either modified or owned state, the entry is transitioned to an owned state, and a source done command is sent without sending cache block ownership... Agent: Advanced Micro Devices, Inc.
20140229680 - Aggregating cache eviction notifications to a directory: Technologies are described herein generally relate to aggregation of cache eviction notifications to a directory. Some example technologies may be utilized to update an aggregation table to reflect evictions of a plurality of blocks from a plurality of block addresses of at least one cache memory. An aggregate message can... Agent: Empire Technology Development LLC
20140229679 - Management of cached data based on user engagement: A social data aggregator generates entries of action data describing actions taken by users. A portion of the entries are stored in an action cache to expedite retrieval. To store more recent or relevant entries in the action cache, entries are removed from the action cache based on engagement scores... Agent:
20140229681 - Cache prefetching based on non-sequential lagging cache affinity: A mechanism is provided in a cache subsystem for cache prefetching based on non-sequential access. The mechanism determines frequently accessed non-sequential cache records in the cache subsystem. The mechanism collects trailing record statistics for the frequently accessed non-sequential cache records. The mechanism determines a caching strategy. The caching strategy comprises... Agent: International Business Machines Corporation
20140229682 - Conditional prefetching: A type of conditional probability fetcher prefetches data, such as for a cache, from another memory by maintaining information relating to memory elements in a group of memory elements fetched from the second memory. The information may be an aggregate number of memory elements that have been fetched for different... Agent: Advanced Micro Devices, Inc.
20140229683 - Self-disabling working set cache: A method to monitor the behavior of a working set cache of a full data set at run time and determine whether it provides a performance benefit is disclosed. An effectiveness metric of the working set cache is tracked over a period of time by efficiently computing the amount of... Agent: Microsoft Corporation
20140229684 - Coherent attached processor proxy supporting coherence state update in presence of dispatched master: A coherent attached processor proxy (CAPP) of a primary coherent system receives a memory access request specifying a target address in the primary coherent system from an attached processor (AP) external to the primary coherent system. The CAPP includes a CAPP directory of contents of a cache memory in the... Agent: International Business Machines Corporation
20140229685 - Coherent attached processor proxy supporting coherence state update in presence of dispatched master: A coherent attached processor proxy (CAPP) of a primary coherent system receives a memory access request specifying a target address in the primary coherent system from an attached processor (AP) external to the primary coherent system. The CAPP includes a CAPP directory of contents of a cache memory in the... Agent: International Business Machines Corporation
20140229686 - Mixed shared/non-shared memory transport for virtual machines: Methods, systems and computer program products are provided for mixed shared/non-shared memory transport in virtual machines. A computer-implemented method may include providing a shared memory area writeable by a first virtual processor and a second virtual processor that are runnable on a host CPU, retrieving the information stored in the... Agent: Red Hat Israel, Ltd.
20140229687 - Method and apparatus for calibrating a memory interface with a number of data patterns: Apparatuses and methods of calibrating a memory interface are described. Calibrating a memory interface can include loading and outputting units of a first data pattern into and from at least a portion of a register to generate a first read capture window. Units of a second data pattern can be... Agent: Micron Technology, Inc.
20140229688 - Storage control device, storage system, and storage control method: A storage control device including an area control unit, an attribute control unit, and an access control unit. The area control unit determines one or more valid areas for each type of areas included in respective storage areas stored in two or more storage devices to generate a virtual storage... Agent: Panasonic Corporation
20140229691 - Data control system for virtual environment: A data control system comprises a communication interface, a processing system, and a storage system. The communication interface is configured to receive a request to retrieve data from a primary storage volume that includes a secondary storage volume. The storage system is configured to store the primary storage volume that... Agent: Quantum Corporation
20140229690 - Instruction set architecture with secure clear instructions for protecting processing unit architected state information: A method and circuit arrangement utilize secure clear instructions defined in an instruction set architecture (ISA) for a processing unit to clear, overwrite or otherwise restrict unauthorized access to the internal architected state of the processing unit in association with context switch operations. The secure clear instructions are executable by... Agent: International Business Machines Corporation
20140229689 - System and method for ballooning wth assigned devices: A system and method for ballooning with assigned devices includes inflating a memory balloon, determining whether a first memory page is locked based on information associated with the first memory page, when the first memory page is locked unlocking the first memory page and removing first memory addresses associated with... Agent: Red Hat Israel, Ltd.
20140229694 - Asynchronous pausing of the formation of consistency groups: Provided are a computer program product, system, and method for asynchronous pausing of the formation of consistency groups. A first copy operation is initiated to copy the source data from the first storage to the first data copy in the second storage. A second copy operation is initiated to copy... Agent: International Business Machines Corporation
20140229696 - Distributed storage method, apparatus, and system for reducing a data loss that may result from a single-point failure: A distributed data storage method, apparatus, and system for reducing a data loss that may result from a single-point failure. The method includes: splitting a data file to generate K data slices, splitting each data slice of the K data slices to generate M data blocks for each data slice,... Agent: Huawei Technologies Co., Ltd.
20140229697 - Online virtual machine disk migration: A method for migrating a virtual machine disk (VM disk) from first physical storage to second physical storage while the virtual machine (VM) is running, the method comprising: (a) creating a first child VM disk to which writes are redirected from a first parent VM disk, the first parent VM... Agent: Vmware, Inc.
20140229695 - Systems and methods for backup in scale-out storage clusters: In accordance with embodiments of the present disclosure, a storage system may include a storage cluster comprising a plurality of network attached storage nodes, one or more backup devices communicatively coupled to the storage cluster, and a cluster-wide data server executing on the plurality of network attached storage nodes and... Agent: Dell Products L.p.
20140229693 - Systems, methods and computer program products for selective copying of track data through peer-to-peer remote copy: In one embodiment, a primary storage system, includes: logic integrated with and/or executable by at least one controller, the logic being adapted to: receive a request to establish a Peer-to-Peer Remote Copy (PPRC) relationship between a primary storage system and a secondary storage system; set a path between the primary... Agent: International Business Machines Corporation
20140229692 - Volume initialization for asynchronous mirroring: Methods, apparatus and computer program products implement embodiments of the present invention that include conveying first data from local regions of a local volume of a local storage system to a remote storage system having a remote volume with remote regions in a one-to-one correspondence with the local regions. While... Agent: International Business Machines Corporation
20140229698 - Control service for data management: Aspects of a data environment, such as the creation, provisioning, and management of data stores and instances, are managed using a separate control environment. A user can call into an externally-facing interface of the control environment, the call being analyzed to determine actions to be performed in the data environment.... Agent: Amazon Technologies, Inc.
20140229699 - Out-of-order command execution in non-volatile memory: An apparatus includes a memory and storage circuitry. The storage circuitry is configured to receive at least one request causing execution of a sequence of memory commands in the memory, to identify that, although a first memory command appears in the sequence before a second memory command, the execution of... Agent: Apple Inc.
20140229700 - Systems and methods for accommodating end of transfer request in a data storage device: Systems and methods for data processing particularly related addressing latency concerns in relation to data processing.... Agent: Lsi Corporation
20140229701 - Determining a metric considering unallocated virtual storage space and remaining physical storage space to use to determine whether to generate a low space alert: Provided are a method, system, and computer program product for determining a metric to use to determine whether to generate a low space alert. A determination is made of provisioned storage space comprising storage space allocated to at least one application, wherein applications may use less than all the provisioned... Agent: International Business Machines Corporation
20140229702 - Concurrent memory operations: Subject matter disclosed herein relates to performing concurrent memory operations.... Agent: Micron Technology Inc.
20140229703 - Information processing method, non-transitory computer readable medium having program stored thereon, and information processing apparatus: A control unit of an information processing apparatus extracts an address string of memory access generated in a processor executing a program in an arbitrary computer, divides the address string into a plurality of sections. And the control unit searches an address pattern accessible by an address generator that converts... Agent: Nec CorporationPrevious industry: Electrical computers and digital data processing systems: input/output
Next industry: Electrical computers and digital processing systems: processing architectures and instruction processing (e.g., processors)
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