|Electrical computers and digital processing systems: memory patents - Monitor Patents|
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Electrical computers and digital processing systems: memoryBelow are recently published patent applications awaiting approval from the USPTO. Recent week's RSS XML file available below.
Listing for abstract view: USPTO application #, Title, Abstract excerpt,Patent Agent. Listing format for list view: USPTO National Class full category number, title of the patent application. 10/02/2014 > 75 patent applications in 33 patent subcategories.
20140297919 - Apparatus and method for implementing a multi-level memory hierarchy: A system and method are described for intelligently flushing data from a processor cache. For example, a system according to one embodiment of the invention comprises: a processor having a cache from which data is flushed, the data associated with a particular system address range; and a PCM memory controller... Agent:
20140297918 - Buffer cache apparatus, journaling file system and journaling method for incorporating journaling features within non-volatile buffer cache: Disclosed herein are a buffer cache apparatus, a journaling file system, and a journaling method capable of incorporating journaling features based on nonvolatile memory. The buffer cache apparatus provides a data buffering function between a central processing unit (CPU) and storage. The buffer cache apparatus includes a plurality of cache... Agent: Ewha University-industry Collaboration Foundation
20140297920 - Multi-core processor and control method: According to an embodiment, a multi-core processor is capable of executing a plurality of tasks. The multi-core processor includes at least a first core and a second core. The first core and the second core are capable of accessing a shared memory area. The first core includes one or more... Agent: Kabushiki Kaisha Toshiba
20140297916 - Preventing out-of-space errors for legacy option rom in a computing system: Preventing out of legacy option ROM space errors in a computing system, including: iteratively for each option ROM in the computing system: loading, into an option ROM memory, the option ROM; executing, from the option ROM memory, the option ROM; and removing, from the option ROM memory, the option ROM.... Agent: International Business Machines Corporation
20140297917 - Preventing out-of-space errors for legacy option rom in a computing system: Preventing out of legacy option ROM space errors in a computing system, including: iteratively for each option ROM in the computing system: loading, into an option ROM memory, the option ROM; executing, from the option ROM memory, the option ROM; and removing, from the option ROM memory, the option ROM.... Agent: International Business Machines Corporation
20140297928 - Electronic circuit for and method of executing an application program stored in a one-time-programmable (otp) memory in a system on chip (soc): A method and apparatus for executing an application program stored in an one-time-programmable, OTP, memory in a system on chip (SoC) is described. The SoC has RAM, a CPU and an OTP controller. The OTP memory stores an application program. The method includes, by the processor unit at power-up, instructing... Agent: Dialog Semiconductor B.v.
20140297927 - Information processing apparatus, information processing method, and recording medium: An information processing apparatus includes a main storage device, in which the main storage device includes a non-volatile storage unit and a volatile storage unit, and a page is moved between the non-volatile storage unit and the volatile storage unit at a predetermined timing based on a priority that is... Agent: Sony Corporation
20140297926 - Information processing device and method for controlling replacement of semiconductor storage device: A processor or hard-wired logic circuit of an information processing device is configured to collect a life-expectancy index value of a first semiconductor storage device of primary semiconductor storage devices. The life-expectancy index value relates to a remaining number of times written data is able to be erased. The processor... Agent: Fujitsu Limited
20140297930 - Memory system: According to the embodiments, a memory system includes a nonvolatile semiconductor memory and a writing-loop-count monitoring unit that monitors a loop count of an applied voltage to the nonvolatile semiconductor memory required for data writing of the nonvolatile semiconductor memory as a writing loop count. Moreover, the memory system includes... Agent: Kabushiki Kaisha Toshiba
20140297932 - Memory system in which extension function can easily be set: According to one embodiment, a non-transitory medium, a controller, a memory, an extension function section, and an extension register. The controller controls the non-transitory medium. The memory which is serving as a work area is connected to the controller. The extension function section is controlled by the controller. The extension... Agent: Kabushiki Kaisha Toshiba
20140297922 - Method and apparatus for managing serial peripheral interface (spi) flash: A system for communicating with a flash device includes: a controller configured for communicating with the flash device, the controller including logic for classifying a command to the flash device as one of safe and unsafe and communicating each safe command. Methods and a computer program product and a computing... Agent:
20140297934 - Method and apparatus for optimizing the performance of a storage system: Methods and apparatuses for optimizing the performance of a storage system comprise a FLASH storage system, a hard drive storage system, and a storage controller. The storage controller is adapted to receive READ and WRITE requests from an external host, and is coupled to the FLASH storage system and the... Agent:
20140297931 - Method for wear leveling in a nonvolatile memory: A method for writing and reading data memory cells, comprising: defining in a first memory zone erasable data pages and programmable data blocks; and, in response to write commands of data, writing data in erased blocks of the first memory zone, and writing, in a second memory zone, metadata structures... Agent:
20140297921 - Method of partitioning physical block and memory system thereof: A method of partitioning a physical block in a memory includes: determining a sub-block size according to a data length of a sequential write and a block size; partitioning the physical block into sub-blocks, each having a size equal to the sub-block size; and mapping logical blocks to the sub-blocks.... Agent: Skymedi Corporation
20140297935 - Mount-time reconciliation of data availability: Systems and methods are disclosed for mount-time reconciliation of data availability. During system boot-up, a non-volatile memory (“NVM”) driver can be enumerated, and an NVM driver mapping can be obtained. The NVM driver mapping can include the actual availability of LBAs in the NVM. A file system can then be... Agent:
20140297929 - Non-volatile memory interface: Apparatuses, systems, methods, and computer program products are disclosed for a memory controller. An apparatus includes a volatile memory medium located on a memory module. An apparatus includes a non-volatile memory medium located on a memory module. A memory controller is located on a memory module. A memory controller may... Agent: Fusion-io, Inc.
20140297936 - Non-volatile memory storage apparatus, memory controller and data storing method: A non-volatile memory storage apparatus having a connector, an energy storage circuit, a power regulator and supply circuit, a non-volatile memory module, a memory controller and a buffer memory is provided. The power regulator and supply circuit is configured for transforming an output voltage from the energy storage circuit into... Agent:
20140297924 - Nonvolatile memory erasure techniques: Embodiments of the present disclosure describe methods, apparatus, and system configurations for conditional pre-programming of nonvolatile memory before erasure. In one instance, the method includes receiving a request to erase information in a portion of the nonvolatile memory device, in which the portion includes a plurality of storage units, determining... Agent:
20140297933 - Numeric representation to improve life of solid state storage devices: Technologies and implementations for improving life of a solid state storage device are generally disclosed.... Agent:
20140297923 - Populating localized fast bulk storage in a multi-node computer system: A high performance computing (HPC) system includes computing blades having a first region that includes processors for performing a computation, and a second region that includes non-volatile memory for use in performing the computation and another computing processor for performing data movement and storage. Because data movement and storage are... Agent:
20140297937 - Segmented caches: Embodiments herein relate to segmenting and pinning a first non-volatile memory to store cache information. In an embodiment, the first non-volatile memory is divided into a plurality of segments. Then, a first type of software of a plurality of types of software is pinned to a first segment of the... Agent:
20140297925 - Storage device with self-contained information storage space: A storage device with self-contained information storage space includes at least a type-I non-volatile memory and a type-II non-volatile memory which form a data storage region and an information storage region, respectively. The type-II non-volatile memory has higher endurance than the type-I non-volatile memory. The type-I and type-II non-volatile memory... Agent: Sk Hynix Inc.
20140297939 - Memory controllers, systems, and methods supporting multiple request modes: A memory system includes a memory controller with a plurality N of memory-controller blocks, each of which conveys independent transaction requests over external request ports. The request ports are coupled, via point-to-point connections, to from one to N memory devices, each of which includes N independently addressable memory blocks. All... Agent:
20140297938 - Non-volatile random access memory (nvram) as a replacement for traditional mass storage: A non-volatile random access memory (NVRAM) is used in a computer system to perform multiple roles in a platform storage hierarchy, specifically, to replace traditional mass storage that is accessible by an I/O. The computer system includes a processor to execute software and a memory coupled to the processor. At... Agent:
20140297940 - Storage control program, storage control method, storage system and hierarchy control apparatus thereof: A non-transitory computer readable storage medium that stores a storage control program causing a computer to execute a control process of a storage including a first storage device with first access speed, and a second storage device with second access speed that is slower than the first access speed, includes... Agent: Fujitsu Limited
20140297951 - Allocating storage units in a dispersed storage network: A method begins by a processing module detecting a new storage unit within a dispersed storage network DSN. The method continues with the processing module determining to affiliate the new storage unit with a virtual memory vault, where the virtual memory vault is mapped to a set of storage units... Agent: Cleversafe, Inc.
20140297952 - Configurable and scalable storage system: The system utilizes a plurality of layers to provide a robust storage solution. One layer is the RAID engine that provides parity RAID protection, disk management and striping for the RAID sets. The second layer is called the virtualization layer and it separates the physical disks and storage capacity into... Agent: Archion, Inc.
20140297942 - Data cache for a storage array: Embodiments of the present disclosure provide for a storage system that includes an array of disk drives and a controller communicatively coupled to the array of disk drives. The controller includes a dual purpose cache. The controller is configured to perform maintenance operations and host input/output (I/O) operations using the... Agent: Hewlett-packard Development Company, L.p.
20140297943 - Data storage apparatus: Data Storage Apparatus Anapparatus(1) for storing data comprises a plurality of physical data storage disks (2). Each of the physical data storage disks (2) isdivided into a plurality of sub-regions (3). The apparatus also comprises data processing means (4) configured such that: the data to be stored is divided into... Agent: Acunu Limited
20140297949 - Disk array device: The disk array device includes an allocation control unit that allocates a physical sector to a logical sector, and an erasure control unit that erases data written on a logical sector. The allocation control unit stores a logical sector and a physical sector allocated thereto in a translation table in... Agent: Nec Corporation
20140297948 - Method for processing data: A method for operating a system on a chip comprising a conventional processor unit (CISC, RISC, VLIW, DSP) and an array processor having a multidimensional arrangement of arithmetic units. Operation information for the array processor are stored in a memory shared between the conventional processor and the array processor. At... Agent: Pact Xpp Technologies Ag
20140297941 - Non-homogeneous disk abstraction for data oriented applications: One embodiment of the system described herein facilitates a virtualized heterogeneous disk that supports differentiated storage service qualities. During operation, the system mounts a plurality of partitions of a heterogeneous disk at different mount points, each mount point corresponding to a level of quality of service (QoS). The system then... Agent: Vmware, Inc.
20140297944 - Recording medium, system and method: A non-transitory computer-readable recording medium has stored therein a program for causing a computer to execute a process. The process includes identifying a data block from among a plurality of data blocks in a first storage for relocation to a second storage, determining an access mode of the identified data... Agent: Fujitsu Limited
20140297945 - Storage apparatus and copy control method: A storage apparatus includes a plurality of drives having different response speeds, a memory that stores location information of data stored in the plurality of drives, and a processor operable to execute performing rearrangement of the data among the plurality of drives in accordance with a specific condition, updating the... Agent: Fujitsu Limited
20140297946 - Storage system and method for managing storage apparatuses: A processor of a distribution device included in a storage system is configured to manage an initial write position and a current write position for each of a plurality of storage apparatuses. The initial write position varies for the storage apparatuses. The processor is configured to receive a write request... Agent: Fujitsu Limited
20140297950 - Storage system, recording medium storing data rebalancing program, and data rebalancing method: A storage system includes a plurality of storing devices configured to store data, a cache memory configured to hold data, an access control unit configured to make an access to any one of the plurality of storing devices when an access request for reading of target data or writing of... Agent:
20140297947 - Storage system, storage apparatus, control method of storage system, and computer product: A storage system includes a first storage apparatus that stores a first data group selected, based on an access time of each data among plural data; a second storage apparatus that stores a second data group; and a control apparatus that includes a memory unit that stores a Bloom filter... Agent: Fujitsu Limited
20140297953 - Removable storage device identity and configuration information: In embodiments of removable storage device identity and configuration information, a removable storage device is accessible by device applications while connected to a computing device, such as to access application data. A device manager can identify one or more storage volumes on the removable storage device while the removable storage... Agent: Microsoft Corporation
20140297954 - Caching mechanism to improve user interface responsiveness: A method to preferentially wait for fresh data from a primary source to become available in a system where there is also an older set of data from a secondary source. The method includes receiving a data request that is to be displayed and determining if the data from the... Agent:
20140297955 - Storage control device and control method: The first storage area stores original data of an update target that is to be updated by a host. The controller divides data to be written over the original data of the update target stored in the first storage area into a plurality of pieces of update data and thereby... Agent: Fujitsu Limited
20140297956 - Arithmetic processing apparatus, information processing apparatus and control method of arithmetic processing apparatus: An arithmetic processing apparatus includes a plurality of first processing units to be connected to a cache memory; a plurality of second processing units to be connected to the cache memory and to acquire, into the cache memory, data to be processed by the first processing unit before each of... Agent: Fujitsu Limited
20140297957 - Operation processing apparatus, information processing apparatus and method of controlling information processing apparatus: An operation processing apparatus includes an operation processing unit to perform an operation process using first data administered by the own operation processing apparatus and second data acquired from another operation processing apparatus; a main memory to store the first data; and a control unit to include a storing unit... Agent: Fujitsu Limited
20140297958 - System and method for updating an instruction cache following a branch instruction in a semiconductor device: A semiconductor device includes a memory for storing a plurality of instructions therein, an instruction queue which temporarily stores the instructions fetched from the memory therein, a central processing unit which executes the instruction supplied from the instruction queue, an instruction cache which stores therein the instructions executed in the... Agent: Renesas Electronics Corporation
20140297959 - Advanced coarse-grained cache power management: Methods and apparatuses for reducing power consumption of a system cache within a memory controller. The system cache includes multiple ways, and each way is powered independently of the other ways. A target active way count is maintained and the system cache attempts to keep the number of currently active... Agent: Apple Inc.
20140297960 - Multi-core system and method of data consistency: A system comprises a plurality of cores and a communication bus enabling the cores to communicate with one another, a core having a processor and of at least one cache memory area. At least one core comprises a table of patterns storing a set of patterns, a pattern corresponding to... Agent: Commissariat A L'energie Atomique Et Aux Energies Alternatives
20140297961 - Selective cache fills in response to write misses: A cache memory receives a request to perform a write operation. The request specifies an address. A first determination is made that the cache memory does not include a cache line corresponding to the address. A second determination is made that the address is between a previous value of a... Agent: Advanced Micro Devices, Inc.
20140297962 - Instructions and logic to provide advanced paging capabilities for secure enclave page caches: Instructions and logic provide advanced paging capabilities for secure enclave page caches. Embodiments include multiple hardware threads or processing cores, a cache to store secure data for a shared page address allocated to a secure enclave accessible by the hardware threads. A decode stage decodes a first instruction specifying said... Agent:
20140297963 - Processing device: When an invalidation request is inputted from another processing device, a cache controller registers a set of an invalidation request address which the invalidation request has and an identifier of the other processing device which outputted the invalidation request in an invalidation history table. When a central processing unit attempts... Agent: Fujitsu Limited
20140297964 - Storage system, storage controller, and method for managing mapping between local address and physical address: According to one embodiment, a mapping manager of a storage controller changes a first chunk from a second state to a third state if an access condition to the first chunk is a first condition that needs high speed access and the first chunk is in the second state. The... Agent: Kabushiki Kaisha Toshiba
20140297965 - Cache access arbitration for prefetch requests: A processor employs a prefetch prediction module that predicts, for each prefetch request, whether the prefetch request is likely to be satisfied from (“hit”) the cache. The arbitration priority of prefetch requests that are predicted to hit the cache is reduced relative to demand requests or other prefetch requests that... Agent: Advanced Micro Devices, Inc.
20140297966 - Operation processing apparatus, information processing apparatus and method of controlling information processing apparatus: An operation processing apparatus connected with another operation processing apparatus including an operation processing unit to perform an operation process using first data administered by the own operation processing apparatus and second data administered by and acquired from another operation processing apparatus, a main memory to store the first data,... Agent: Fujitsu Limited
20140297967 - Inter-queue anti-starvation mechanism with dynamic deadlock avoidance in a retry based pipeline: Methods and apparatus relating to an inter-queue anti-starvation mechanism with dynamic deadlock avoidance in a retry based pipeline are described. In one embodiment, logic may arbitrate between two queues based on various rules. The queues may store data including local or remote requests, data responses, non-data responses, external interrupts, etc.... Agent:
20140297968 - Magnetic tunneling junction devices, memories, memory systems, and electronic devices: Provided is a magnetic tunneling junction device including a first structure including a magnetic layer; a second structure including at least two extrinsic perpendicular magnetization structures, each including a magnetic layer and; a perpendicular magnetization inducing layer on the magnetic layer; and a tunnel barrier between the first and second... Agent:
20140297969 - Information processing device, method for controlling information processing device, and program for controlling information processing device: An information processing device includes a processor, and a plurality of memories arranged on the processor and coupled to the processor, wherein the plurality of memories are stacked on each other, and wherein a first memory that is located farthest from the processor among the plurality of memories is allocated... Agent: Fujitsu Limited
20140297970 - Concurrent execution of critical sections by eliding ownership of locks: Critical sections of multi-threaded programs, normally protected by locks providing access by only one thread, are speculatively executed concurrently by multiple threads with elision of the lock acquisition and release. Upon a completion of the speculative execution without actual conflict as may be identified using standard cache protocols, the speculative... Agent:
20140297971 - Control program of storage control device, control method of storage control device and storage control device: For segments having the number of IOs exceeding a threshold, a data collection unit connects adjacent segments whose distance is within “s” to each other and extracts the connected segments and segments in the range of “s” from outside of the connected segments as an n_segment. A workload analysis unit... Agent: Fujitsu Limited
20140297972 - Memory control device and memory control method: A memory control device has a write-request distribution unit and controllers. The write-request distribution unit divides data to be written in a memory and outputs a plurality of divided data blocks obtained by the division while distributing the divided data blocks to a plurality of buses. The controllers write the... Agent: Fujitsu Limited
20140297974 - Memory hub architecture having programmable lane widths: A processor-based system includes a processor coupled to a system controller through a processor bus. The system controller is used to couple at least one input device, at least one output device, and at least one data storage device to the processor. Also coupled to the processor bus is a... Agent:
20140297973 - Storage system and information processing apparatus: A storage system includes an information processing apparatus and plural storage nodes. A replication unit replicates plural data elements respectively stored in plural data regions of one of the plural storage nodes, and stores replicated data elements respectively in plural data regions of each of the other storage nodes. A... Agent: Fujitsu Limited
20140297975 - Primary memory module with record of usage history: Provided is a primary memory module including a counter for providing a count indicative of the numbers of times the primary memory module has ever been read/written by a processor. With the count, an operating situation of the primary memory module is evaluated so as to optimize memory allocation performed... Agent: International Business Machines Corporation
20140297976 - Electronic device with reversing stack data container and related methods: An electronic device may include a memory, and a processor coupled to the memory for storing and accessing data in the memory. The processor may arrange the data in a stack data container including values extending from a stack top to a stack bottom, operate the stack data container in... Agent:
20140297977 - Managing apparatus: A managing server includes a predicting unit and a controlling unit. The predicting unit predicts either a time or a time period at which frequency of accesses from a plurality of apparatuses to a storage device storing data therein will exceed a predetermined threshold value, on a basis of a... Agent:
20140297978 - Methods for synchronizing storage system data: In accordance with one example, a method for comparing data units is disclosed comprising generating a first digest representing a first data unit stored in a first memory. A first encoded value is generated based, at least in part, on the first digest and a predetermined value. A second digest... Agent: Falconstor, Inc.
20140297981 - Information processing system, storage device, and backup method: An information processing system includes a processing device; and a storage device that is accessed by the processing device. The storage device includes a storage unit, and a processor coupled to the storage unit. The processor is configured to build a virtual device, determine an I/O request to the virtual... Agent: Fujitsu Limited
20140297979 - Live migration of virtual disks: A system and method are disclosed for live migration of a virtual disk of a virtual machine between storage devices. In accordance with one example, a computer system prepares a first area of a first storage device and a second area of a second storage device for a live snapshot... Agent: Red Hat Israel, Ltd.
20140297980 - Storage system, storage controller, and method for eliminating data duplication based on hash table: According to one embodiment, a storage controller includes a dividing unit, a duplication manager, and a duplication determination unit. The dividing unit divides data specified in a write request from a host computer into a plurality of chunks. The duplication manager preferentially stores a first hash value of a first... Agent:
20140297983 - Method of arranging data, information processing apparatus, and recording medium: A method of arranging data in a stratified storage region includes: acquiring an index value related to data stored in the stratified storage region based on a predetermined rearrangement condition; and determining, based on the index value, data to be migrated from the data stored in the stratified storage region.... Agent: Fujitsu Limited
20140297982 - Multi-tier storage for delivery of services: Methods, systems, and computer readable media can be operable to facilitate the transfer of content between two or more storage units. The transfer of content between two or more storage units can be based upon a count of the number of hits to a storage unit entry associated with the... Agent: Arris Group, Inc.
20140297985 - Shiftable memory supporting in-memory data structures: A shiftable memory supporting in-memory data structures employs built-in data shifting capability. The shiftable memory includes a memory having built-in shifting capability to shift a contiguous subset of data from a first location to a second location within the memory. The shiftable memory further includes a data structure defined on... Agent:
20140297984 - Storage apparatus and control method of the same: A storage management system, if the required response performance of the file is added to the access request from the host computer, compares the required response performance of the file with the response performance of the pool volume assigned to the page. If the response performance of the compared pool... Agent:
20140297986 - Semiconductor memory devices and semiconductor systems including the same: The semiconductor memory device includes an internal flag signal generator and an active information generator. The internal flag signal generator generates a plurality of internal flag signals which are selectively enabled when combination signals of bank address signals and row address signals supplied are inputted from an external device at... Agent: Sk Hynix Inc.
20140297987 - Managing capacity of a thinly provisioned storage system: A thinly provisioned storage system detects whether physical storage capacity is available when there is a request to allocate storage capacity, prior to data being written to the storage system. In particular, at the time when the file system allocates storage, such as when creating a file or performing an... Agent: Microsoft Corporation
20140297988 - Storage device, allocation release control method: A storage device that allocates an unused physical storage area to logical storage areas to which write has been requested by an upper device, the storage device including a pattern test unit that tests whether a data pattern written to each of the logical storage areas is a data pattern... Agent: Fujitsu Limited
20140297989 - Information processing apparatus and memory control method: An information processing apparatus comprises a plurality of processor elements, and a memory having a plurality of banks. Statistical information representing an access frequency distribution to each memory area of the memory by the plurality of processor elements is obtained. An allocation process of allocating the banks to the memory... Agent:
20140297990 - Memory address translation: The present disclosure includes devices, systems, and methods for memory address translation. One or more embodiments include a memory array and a controller coupled to the array. The array includes a first table having a number of records, wherein each record includes a number of entries, wherein each entry includes... Agent: Micron Technology, Inc.09/25/2014 > 48 patent applications in 25 patent subcategories.
20140289446 - Memory system and memory: According to one embodiment, a memory system includes a memory and a controller configured to control the memory. The memory includes a semiconductor memory region in which data rewrite is executed by an instruction of the controller, a timing determination module configured to derive a command input timing to the... Agent:
20140289448 - Advanced memory interfaces and methods: Controllers, interfaces, memory devices, methods and systems are disclosed, including a controller configured to interface with a separate memory device and perform an iterative write operation to program a selected memory cell of the memory device to a target state, wherein each iteration of the write operation is configured to... Agent: Micron Technology, Inc.
20140289447 - Apparatus, system, and method for storage space recovery: An apparatus, system, and method are disclosed for storage space recovery. A storage division selection module selects a first storage division for recovery. The first storage division comprises a portion of solid-state storage in a solid-state storage device. A data recovery module reads valid data from the first storage division... Agent: Fusion-io, Inc.
20140289456 - Disk logging method applicable to storage medium and electrnoic device, storage medium using the same and electronic device using the same: The present disclosure proposes a disk logging method configured for an electronic device comprising a temporary non-volatile storage medium to log data from a volatile memory to said first storage medium, and the method includes the elements of aggregating data from applications of the electronic device in a queue, transferring... Agent: Industrial Technology Research Institute
20140289450 - Dynamic log likelihood ratio quantization for solid state drive controllers: A method for system for dynamic channel Log Likelihood Ratio (LLR) quantization for a Solid State Drive (SSD) controller is a targeted approach to scaling which results in a scaled, quantized set of LLRs whose relative magnitude remains undisturbed from an original magnitude. The method reads a set of voltages... Agent: Lsi Corporation
20140289452 - Electronic equipment including storage device: According to one embodiment, a storage device includes a nonvolatile memory, controller and interface. The nonvolatile memory stores data. The controller controls the operation of the nonvolatile memory. The interface includes first and second input/output units that transmit and receive a signal with respect to a host device. The first... Agent:
20140289455 - Memory patching circuit: A patching circuit for patching a memory 2 is disclosed. An address register 1 is configured to store a first memory address. A comparison unit 4 is configured to receive a second memory address from an address bus 5, and to receive the first memory address. The comparison unit is... Agent: Dialog Semiconductor B.v.
20140289453 - Memory system and constructing method of virtual block: According to one embodiment, a virtual block is constructed according to configuration conditions that, when a plurality of physical blocks included in the virtual block are selected, the sum of the number of physical block pairs and the number of single blocks allocated from the same memory chip to one... Agent: Kabushiki Kaisha Toshiba
20140289457 - Method and device to reduce leakage and dynamic energy consumption in high-speed memories: A microcomputer comprising a microprocessor unit and a first memory unit is disclosed. In one aspect, the microprocessor unit comprises at least one functional unit and at least one register. Further, the at least one register is a wide register comprising a plurality of second memory units which are capable... Agent: Imec
20140289451 - Method of recording mapping information, and memory controller and memory storage apparatus using the same: A method of recording mapping information for a rewritable non-volatile memory module is provided. The method includes configuring a plurality of logical addresses, establishing at least one logical address mapping table, and storing the at least one logical address mapping table into the rewritable non-volatile memory module. The method also... Agent: Phison Electronics Corp.
20140289449 - Storage apparatus, storage controller and method for relocating data in solid state drive: According to one embodiment, a storage controller comprises an access statistic collection unit, a selection unit and a rewrite unit. The access statistic collection unit collects write frequencies of a plurality of small logical address areas having a predetermined size which configure a logical area of a logical unit defined... Agent: Kabushiki Kaisha Toshiba
20140289454 - Storage device and controller: A storage device includes a memory having one or more storage regions each of which is assigned a physical address, and a controller having a writing control circuit configured to write data that is divided into a plurality of data units into logical storage positions, at least one of which... Agent: Kabushiki Kaisha Toshiba
20140289459 - Storage system: The temporary area capacity required to be secured with respect to the whole permanent area is calculated in accordance with the capacity and access frequency of a host computer data permanent area of a disk device contained in the storage system and a disk device of an external storage device... Agent:
20140289458 - System and method for micro-tiering in non-volatile memory: In a storage device such as a solid state disk (SSD), a central controller communicates with a plurality of multi-chip memory packages. Each multi-chip memory package comprises a plurality of memory dies and a local processor, wherein the plurality of memory dies includes different memory tiers. The central controller may... Agent: Sandisk Technologies Inc.
20140289460 - Systems and methods involving data bus inversion memory circuitry, configuration and/or operation including data signals grouped into 10 bits and/or other features: Systems, methods and fabrication processes relating to dynamic random access memory (DRAM) devices involving data signals grouped into 10 bits are disclosed. According to one illustrative implementation a DRAM device may comprise a memory core, circuitry that receives a data bus inversion (DBI) bit associated with a data signal as... Agent: Gsi Technology, Inc.
20140289461 - Information processing system including semiconductor device having self-refresh mode: Disclosed herein is an information processing system having first and second devices. The second device alternately issues a self-refresh command and a self-refresh exit command to the first device. The first device performs a refresh operation once in response to the self-refresh command and updates a state of a DLL... Agent:
20140289462 - Processor agnostic data storage in a pcie based shared storage environment: Disclosed are a system, a method and/or an apparatus of processor agnostic data storage in a PCIE based shared storage environment. In one aspect, a method includes processing a storage based request received at an adapter circuit of a controller device associated with a disk array to direct the storage... Agent:
20140289463 - Replication target service: A data storage service receives commands configured according to a communication protocol, such as a small computer system interface protocol. The commands may be replications of commands sent to a block-level data storage system, such as a storage area network. Data to be written by execution of the commands is... Agent: Amazon Technologies, Inc.
20140289464 - Tape library emulation with automatic configuration and data retention: Disk based emulation of tape libraries is provided with features that allow easier management and administration of a backup system and also allow increased flexibility to both archive data on tape at a remote location and also have fast restore access to archived data files. Features include automatic emulation of... Agent:
20140289466 - Data processing apparatus and method of controlling same: In a data processing apparatus having a plurality of card slots in which memory cards are removably inserted, it is determined, with regard to each of the plurality of card slots, whether a memory card that has been inserted into the slot is a wireless card having a wireless communication... Agent: Canon Kabushiki Kaisha
20140289465 - Smart card, portable electronic device and smart card processing device: According to an embodiment, a smart card includes a communication section and a control section. The communication section communicates with the external device. The control section sets up a first speed as the communication speed used for communication with the external device by the communication section. Moreover, the control section... Agent: Kabushiki Kaisha Toshiba
20140289467 - Cache miss detection filter: Systems and methods are provided that facilitate cache miss detection in an electronic device. The system contains a probabilistic filter coupled to the processing device. A probing component determines existence of an entry associated with a request. The probing component can communicate a miss token without the need to query... Agent: Applied Micro Circuits Corporation
20140289468 - Lightweight primary cache replacement scheme using associated cache: One aspect provides a method including: responsive to a request for data and a miss in both a first cache and a second cache, retrieving the data from memory, the first cache storing at least a subset of data stored in the second cache; inferring from information pertaining to the... Agent: International Business Machines Corporation
20140289469 - Processor and control method of processor: A processor includes: processing units, each including a first cache memory; a second cache memory being shared among the processing units; an acquiring unit to acquire lock target information including first storage location information in an first cache memory included in one of the processing units from an access request... Agent:
20140289470 - Computing device having optimized file system and methods for use therein: A computing device having an optimized file system and methods for use therein. File system optimizations include sector-aligned writes, anchored cluster searches, anchored index searches, companion caches dedicated to particular file management data types and predictive cache updates, all of which expedite processing on the computing device. The file system... Agent: Sharp Laboratories Of America, Inc.
20140289471 - Coherence de-coupling buffer: A coherence decoupling buffer. In accordance with a first embodiment, a coherence decoupling buffer is for storing tag information of cache lines evicted from a plurality of cache memories. A coherence decoupling buffer may be free of value information of the plurality of cache memories. A coherence decoupling buffer may... Agent: Intellectual Venture Funding LLC
20140289472 - Application-guided bandwidth-managed caching: Methods and systems for populating a cache memory that services a media composition system. Caching priorities are based on a state of the media composition system, such as media currently within a media composition timeline, a composition playback location, media playback history, and temporal location within clips that are included... Agent: Avid Technology, Inc.
20140289473 - Cache memory, cache memory control unit, and method of controlling the cache memory: A cache memory includes: a tag storage section in which one of a plurality of indexes, each index containing a plurality of tag addresses and one suspension-indicating section, is looked up by a first address portion of an accessed address; a data storage section; a tag control section configured to,... Agent: Sony Corporation
20140289475 - Cache memory device, information processing device, and cache memory control method: A cache memory device includes: a processor; and a main memory and a cache memory coupled to the processer, wherein the processor executes a process includes: obtaining a first address in the main memory; obtaining a first index that indicates a first cache index of the cache memory by a... Agent: Fujitsu Limited
20140289476 - Caching and deduplication of data blocks in cache memory: A storage system comprises a cache for caching data blocks and storage devices for storing blocks. A storage operating system may deduplicate sets of redundant blocks on the storage devices based on a deduplication requirement. Blocks in cache are typically deduplicated based on the deduplication on the storage devices. Sets... Agent: Netapp, Inc.
20140289474 - Operation processing apparatus, information processing apparatus and method of controlling information processing apparatus: An operation processing apparatus connected with another operation processing apparatus includes an operation processing unit configured to perform an operation process using first data administered by the own operation processing apparatus and second data administered by another operation processing apparatus and acquired from another operation processing apparatus, and a control... Agent: Fujitsu Limited
20140289477 - Lightweight primary cache replacement scheme using associated cache: One aspect provides an apparatus including: at least one processor; and a computer readable storage medium having computer readable program code embodied therewith and executable by the at least one processor, the computer readable program code including: computer readable program code configured to, responsive to a request for data and... Agent: International Business Machines Corporation
20140289479 - Bounding box prefetcher: A data prefetcher in a microprocessor. The data prefetcher includes a plurality of period match counters associated with a corresponding plurality of different pattern periods. The data prefetcher also includes control logic that updates the plurality of period match counters in response to accesses to a memory block by the... Agent: Via Technologies, Inc.
20140289478 - Control device, and storage system: A control device that controls a reading process of information stored in a unit storage area under control of the control device and a unit storage area under control of a different control device in a distributed manner, the control device includes a processor. The processor executes a procedure including... Agent: Fujitsu Limited
20140289481 - Operation processing apparatus, information processing apparatus and method of controlling information processing apparatus: An operation processing apparatus includes an operation processing unit configured to perform an operation process using first data administered by the own operation processing apparatus and second data administered by and acquired from another operation processing apparatus, a main memory configured to store the first data and third data, and... Agent: Fujitsu Limited
20140289480 - Processor, information processing apparatus, and control method of processor: A processor includes: a primary cache memory; an instruction control unit that issues a store request to the primary cache memory; a pipeline processing unit that, upon receiving the store request, writes data to the primary cache memory; a buffer unit that obtains an address output to the primary cache... Agent: Fujitsu Limited
20140289482 - Multi-port memory and operation: Multi-port memory having an additional control bus for passing commands between ports have individual ports that can be configured to respond to a command received from an external control bus or to a command received from the additional control bus. This facilitates various combinations of ports to vary the bandwidth... Agent: Micron Technology, Inc.
20140289483 - Shared memory control unit having lock transaction controller: A shared memory controller controls access to a shared memory by a plurality of master devices based on access requests received from the plurality of master devices. The shared memory control unit includes a memory access arbiter that receives a lock reading request to lock a portion of shared memory,... Agent: Kabushiki Kaisha Toshiba
20140289484 - Portable apparatus using multi-core storage mechanism and data access method therefor: Portable apparatus using multi-core storage mechanism and data access method therefor are provided. The portable apparatus includes a host circuit for controlling the portable apparatus, having a plurality of channels for being coupled to a multi-core storage unit so as to perform write or read operation. The host circuit divides... Agent:
20140289486 - Information processing apparatus, information processing method, and recording medium: An information processing apparatus includes a main storage device, and a secondary storage device, in which the main storage device includes a non-volatile storage unit and a volatile storage unit, the volatile storage unit has a synchronization area that is synchronized with a predetermined area of the secondary storage device,... Agent: Sony Corporation
20140289485 - Storage system, control apparatus, and method for controlling storage system: A storage system includes a library apparatus, a storage apparatus, and a control apparatus including a processor. The processor is configured to execute a copy processing of copying data of a plurality of logical volumes from a storage apparatus to a first recording medium. The copy processing includes a read... Agent: Fujitsu Limited
20140289487 - System of managing remote resources: A system of managing remote resources that includes a local storage associated with a local storage manager constituting a local storage system. A remote storage associated with a remote storage manager constituting a local storage system. The local storage system is associated with a remote storage system by means of... Agent: Infinidat Ltd.
20140289488 - System for securing contents of removable memory: This disclosure includes a method for securing a memory of an electronic system that includes initializing the memory, creating a security key, transmitting the security key to memory, storing the security key in the memory, transmitting the current security key and a a new security key to the memory by... Agent: International Business Machines Corporation
20140289490 - Extended address volume (eav) allocation verification: In one embodiment, a method includes determining that a request to allocate a target data set on a first storage includes a release command, determining an actual size of the target data set after storing the target data set on the first storage, comparing the actual size of the target... Agent: International Business Machines Corporation
20140289491 - Data processing device: A data processing device has: a shift circuit that makes data with a certain bit length to be input therein for each cycle, and shifts the data to delete first invalid data in the data; and a gate circuit that cuts, when data as a result of combining pieces of... Agent: Fujitsu Limited
20140289492 - Method and an apparatus for analyzing data to facilitate data allocation in a storage device: A method for data allocation in a storage device includes performing an analysis on current and past Input/Output (I/O) requests to access data in the storage device, the analysis yielding an output comprising a hotness of data and an access pattern of data associated with a file in the storage... Agent: Samsung Electronics Co., Ltd.
20140289493 - Control device, storage device, and computer-readable recording medium having stored therein control program: A control device including a processor. The processor configured to allocate a data area of a memory device to a plurality of memory areas of data blocks of a first size; allocate identical data blocks of the first size to a plurality of the data areas of the memory device;... Agent: Fujitsu Limited09/18/2014 > 253 patent applications in 56 patent subcategories.
20140281116 - Method and apparatus to speed up the load access and data return speed path using early lower address bits: A microprocessor implemented method for processing a load instruction is disclosed. The method comprises computing a virtual address corresponding to the load instruction. Next, it comprises performing a lookup of a set associative translation lookaside buffer (TLB) and a set associative data cache memory in parallel using early calculated lower... Agent: Soft Machines, Inc.
20140281115 - Shared cache used to provide zero copy memory mapped database: A technique for concurrently accessing a data set includes initializing a shared cache with a column data store configured to store an expected data set in columns and creating a memory map for accessing the physical memory location in the shared cache. Other operations include mapping the applications' data access... Agent:
20140281117 - Memory page de-duplication in a computer system that includes a plurality of virtual machines: Memory page de-duplication in a computer system that includes a plurality of virtual machine partitions managed by a hypervisor, where each virtual machine is assigned a different dedicated memory partition, may include: identifying, by the hypervisor, a plurality of identical memory pages in memory of one or more dedicated memory... Agent: International Business Machines Corporation
20140281118 - Memory page de-duplication in a computer system that includes a plurality of virtual machines: Memory page de-duplication in a computer system that includes a plurality of virtual machine partitions managed by a hypervisor, where each virtual machine is assigned a different dedicated memory partition, may include: identifying, by the hypervisor, a plurality of identical memory pages in memory of one or more dedicated memory... Agent: International Business Machines Corporation
20140281120 - Accessing different types of memory by respective commands with different timing requirements: A system is provided that includes a remote device and bus controller coupled to the remote device via a digital network bus. The remote device includes one or more data channels for respective one or more peripherals, and includes volatile channel-based memory for each data channel and non-volatile device-based memory... Agent: The Boeing Company
20140281119 - Managing configuration parameters for a non-volatile medium: An apparatus, system, and method are disclosed for managing configuration parameters of a non-volatile storage device. The method includes storing a first set of configuration parameters for a non-volatile recording device. The first set of configuration parameters are configured for a storage operation on a storage element of the non-volatile... Agent: Fusion-io, Inc.
20140281121 - Managing the write performance of an asymmetric memory system: Some implementations include a method of managing a hosted non-volatile random-access memory (NVRAM) based storage subsystem that includes NVRAM devices. The method includes: receiving, at a device driver on the host computing device, write requests each requesting to write a respective unit of data to the NVRAM-based storage subsystem; categorizing... Agent:
20140281176 - Accessing metadata with an external host: Systems and processes may be used to retrieve metadata from a nonvolatile memory of a portable device and transmit the retrieved metadata to an external host. Metadata may be analyzed using the external host and/or at least a portion of the metadata may be modified based on the analysis. Modified... Agent: Apple Inc.
20140281130 - Accessing non-volatile memory through a volatile shadow memory: An apparatus is provided that includes a non-volatile (device storage) memory configured to store data in a plurality of locations. The apparatus also includes a device interface coupled to the non-volatile memory and including a volatile (device storage) shadow memory configured to store an image of the plurality of locations... Agent: The Boeing Company
20140281162 - Adaptive reference tuning for endurance enhancement of non-volatile memories: A wear leveling technique is employed in a memory device so that the cycling history of a memory block is represented by the cycling history of a representative memory cell or a small number of representative memory cells. A control logic block tracks the cycling history of the one or... Agent: International Business Machines Corporation
20140281149 - Apparatuses and methods for adaptive control of memory: Apparatuses and methods for adaptive control of memory are disclosed. One example apparatus includes a processing unit configured to run an operating system, and a memory coupled to the processing unit. The memory configured to communicate with the processing unit via a memory bus. The example apparatus may further include... Agent:
20140281145 - Atomic write command support in a solid state drive: A method of performing an atomic write command in a data storage device comprising a volatile memory and a plurality of non-volatile memory devices configured to store a plurality of physical pages. The method may comprise storing data in a plurality of logical pages (L-Pages), each associated with a logical... Agent: Western Digital Technologies, Inc.
20140281141 - Binning of blocks for dynamic linking: A multi-plane non-volatile memory die includes circuits that receive and apply different parameters to different planes while accessing planes in parallel so that different erase blocks are accessed using individualized parameters. Programming parameters, and read parameters can be modified on a block-by-block basis with modification based on the number of... Agent: Sandisk Technologies Inc.
20140281146 - Compression and formatting of data for data storage systems: Embodiments of compression and formatting of data for data storage systems are disclosed. In some embodiments, a data storage system can compress fixed sized data before storing it on a media and format obtained variable sized compressed data for storing on the media that typically has fixed size storage granularity.... Agent: Western Digital Technologies, Inc.
20140281167 - Compressor resources for high density storage units: In various embodiments, a high-density solid-state storage unit includes a plurality of flash cards. Each flash card has a flash controller that incorporates one or more resources for facilitating compression and decompression operations. In one aspect, data reduction and data reconstruction operations can be performed in-line as data is stored... Agent: Skyera, Inc.
20140281129 - Data tag sharing from host to storage systems: A system and method for data tag sharing is disclosed. A host system may provide a storage system with information that identifies a set of logical addresses as pointing to data that is cold, which may mean that the data has not been written to within a threshold time period,... Agent:
20140281128 - Decoding data stored in solid-state memory: Embodiments of decoding data stored in solid-state memory arrays are disclosed. In one embodiment, multiple read operations are performed while taking inter-cell interference (ICI) into account. Soft-decision information, such as log-likelihood ratios (LLRs), is determined by using known data and its corresponding multi-read output. Soft-decision information is provided to a... Agent: Western Digital Technologies, Inc.
20140281150 - Difference l2p method: A method for maintaining a data set includes storing a base copy of the data set in a first non-volatile memory having a first writing speed, storing changes to the data set in a first change data set in a second non-volatile memory having a second writing speed, and generating... Agent:
20140281139 - Dual-interface flash drive: Various embodiments relate to apparatuses and methods of dual-interface flash drives which prevent both interfaces of the dual-interface flash drive from being able to be simultaneously connected to interface ports of devices. This eliminates the risk of damage to or malfunction of the dual-interface flash drive as a result of... Agent: Leef, Ltd.
20140281135 - Dynamic address grouping for parallel programming in non-volatile memory: A non-volatile memory system evaluates user data before writing in order to potentially group addresses for writing within a cycle. The system can determine which sense amplifier addresses of a column address will be programmed in a column address cycle. The number of bits that will be programmed is compared... Agent: Sandisk 3d LLC
20140281158 - File differentiation based on data block identification: A memory system or flash card may include an algorithm for identifying and accounting for the rewrite frequency of data to be written to the card. The file system partition or file type of data may be used for monitoring rewrite frequency and predicting future rewrites. A learning algorithm that... Agent:
20140281153 - Flash-based storage system including reconfigurable circuitry: Apparatus and method for accelerating processing operations of flash based storage systems are disclosed herein. In some embodiments, an IC component disposed between I/O circuitry and flash storage devices is configured to optimize fulfillment of data read and write requests originating from a network or device external to the flash... Agent: Saratoga Speed, Inc.
20140281169 - Flash-based storage system including reconfigurable circuitry: Apparatus and method for accelerating processing operations of flash based storage systems are disclosed herein. In some embodiments, an IC component disposed between I/O circuitry and flash storage devices is configured to optimize fulfillment of data read and write requests originating from a network or device external to the flash... Agent:
20140281151 - Green nand device (gnd) driver with dram data persistence for enhanced flash endurance and performance: A Green NAND Device (GND) driver application queries AC line and battery status and then stores an image of processor states and caches and a resume routine to DRAM when power failure occurs. A DRAM image is then stored to flash memory for a persistent mode when battery power is... Agent: Super Talent Technology, Corp.
20140281177 - Hybrid memory management: Methods and apparatus for managing data storage in hybrid memory devices utilizing single level and multi-level memory cells. Logical addresses can be distributed between single level and multilevel memory cells based on a frequency of write operations performed. Initial storage of data corresponding to a logical address in memory can... Agent: Round Rock Research, LLC
20140281165 - Integrated circuit with a patching function: An integrated circuit with a patching function comprises a one-time programmable memory (OTP), a random access memory (RAM), and a control unit. The control unit copies data stored on the OTP into the RAM to obtain a copied image mirroring said data. It checks for presence of one or more... Agent: Dialog Semiconductor B.v.
20140281171 - Lock-free communication storage request reordering: Lock-free communication storage request reordering enables reduced latency and/or increased bandwidth in some usage scenarios, such as a multi-threaded driver context operating with a device, such as a storage device (e.g. a Solid-State Disk (SSD)) enabled to respond to a multiplicity of outstanding requests.... Agent: Lsi Corporation
20140281133 - Managing the write performance of an asymmetric memory system: Some implementations include a method of managing a hosted non-volatile random-access memory (NVRAM) based storage subsystem that includes NVRAM devices. The method includes: receiving, at a device driver on the host computing device, write requests each requesting to write a respective unit of data to the NVRAM-based storage subsystem; categorizing... Agent:
20140281152 - Managing the write performance of an asymmetric memory system: Some implementations include a method of managing a hosted non-volatile random-access memory (NVRAM) based storage subsystem that includes NVRAM devices. The method includes: receiving, at a device driver on the host computing device, write requests each requesting to write a respective unit of data to the NVRAM-based storage subsystem; categorizing... Agent:
20140281156 - Managing wait states for memory access: A latch signal is received from a non-volatile memory device that is indicative of a current access time for the non-volatile memory device. The access time represents an amount of time required for the non-volatile memory device to make data available responsive to a request for data. A bus system... Agent:
20140281159 - Memory controller: According to one embodiment, a memory controller includes an address conversion table, an address conversion circuit which executes a conversion of a first logical address for accessing to a primary storage device and a conversion of a second logical address for accessing to a secondary storage device, and a control... Agent: Kabushiki Kaisha Toshiba
20140281144 - Memory system: According to one embodiment, a memory system includes a nonvolatile memory including first blocks configured to store an address indicating a data storage position, and second blocks configured to store the data, a first table configured to store a first address including first information and second information, the second information... Agent: Kabushiki Kaisha Toshiba
20140281147 - Memory system: According to one embodiment, a memory system includes a first interface unit configured to operate in parallel nonvolatile memories, and a second interface unit configured to receive data requested by a host from the first interface unit and transfer the data to the host independently of an order of commands... Agent: Kabushiki Kaisha Toshiba
20140281148 - Memory system: According to one embodiment, a memory system comprises a nonvolatile memory, a first volatile memory which stores management information to manage the nonvolatile memory, a controller which controls operations of the nonvolatile memory and the first volatile memory, and a power supply circuit which makes power supplied to part of... Agent: Kabushiki Kaisha Toshiba
20140281154 - Memory system: According to one embodiment, there is provided a memory system that is connected to a host apparatus. The memory system includes a transmitting port and a controller. The transmitting port transmits a transmission signal to the host apparatus. The controller includes a first output interface that is connected to the... Agent:
20140281163 - Memory system: According to one embodiment, a memory system includes a plurality of nonvolatile semiconductor memories configured to hold data, or a conversion table for converting a logical address of the data into a physical address of the data, a table memory configured to hold the conversion table, an interface configured to... Agent: Kabushiki Kaisha Toshiba
20140281164 - Memory system and memory controller: According to one embodiment, a memory system includes a plurality of nonvolatile semiconductor memories including a plurality of memory cell transistors for holding data, and holding position information indicating a position of a defective memory cell transistor incapable of normally holding data and a position of a substitute portion for... Agent: Kabushiki Kaisha Toshiba
20140281157 - Memory system, memory controller and method: According to one embodiment, a memory system includes a plurality of non-volatile memory chips and a memory controller. The memory controller controls a read operation of the memory chips, and manages correspondence relation information between a logical address included in a read command and a physical address of the memory... Agent: Kabushiki Kaisha Toshiba
20140281161 - Memory systems and methods including training, data organizing, and/or shadowing: Described embodiments include memory systems that may shadow certain data stored in a first memory device (e.g. NAND flash device) onto a second memory device (e.g. DRAM device). Memory systems may train and/or re-organize stored data to facilitate the selection of data to be shadowed. Initial responses to memory commands... Agent: Micron Technology, Inc.
20140281137 - Method and device implementing execute-only memory protection: Access requests to access data operands from memory space designated as a type of execute-only memory are allowed to precede in response to determining that the operand access request was generated using a particular type of addressing mode.... Agent:
20140281132 - Method and system for ram cache coalescing: A system and method for coalescing data fragments in a volatile memory such as RAM cache is disclosed. The method may include storing multiple data fragments in volatile memory and initiating a single write operation to flash memory only when a predetermined number of data fragments have been received and... Agent:
20140281178 - Method for assigning addresses to memory devices: A memory system having a memory controller and several separate memory devices connected to the controller by a system bus. The memory devices each included an array of memory cells, addressing circuitry used to address the cells and an address storage circuit which stores a local address unique to each... Agent: Micron Technology, Inc.
20140281166 - Method of operating a memory system, the memory system, and a memory controller: In one embodiment, the method includes buffering, under control of a memory controller, received data and an associated program entity in a buffer. The program entity includes first address information and second address information, the first address information indicates an address of the buffer storing the received data, and the... Agent:
20140281122 - Multi-level table deltas: A memory system or flash card may include an algorithm or process for managing the handling of large tables in memory. A delta may be used for each table to accumulate updates. There may be a plurality of deltas for a multi-level delta structure. In one example, the first level... Agent:
20140281140 - Network storage system using flash storage: A system can comprise an I/O circuitry, a processor, reconfigurable circuitry, an array of flash storage devices, and a serial interconnect network that is coupled to transfer data between the I/O circuitry, the processor, the reconfigurable circuitry and the flash storage devices. The processor can be configured to designate an... Agent:
20140281174 - Non-volatile multi-level cell memory system and method of performing adaptive data back-up in the system: In one example embodiment of the inventive concepts, an adaptive data backup method performed in a memory system including a non-volatile multi-level cell memory device includes receiving a write command from a host and determining a backup data size which is a size of data to be backed up among... Agent: Samsung Electronics Co., Ltd.
20140281160 - Non-volatile semiconductor storage apparatus: According to one embodiment, apparatus includes non-volatile memory chips, and a first controller which executes processing for reading first valid data stored in a first storage region of a first non-volatile memory chip in the non-volatile memory chips, processing for storing the first valid data in a buffer memory, processing... Agent: Kabushiki Kaisha Toshiba
20140281172 - Nonvolatile memory device, electronic device and computing system including the same: A nonvolatile memory device includes a memory onto which a flash translation layer is loaded, a controller, and first and second memory areas. The controller is configured to execute the flash translation layer. The nonvolatile memory is configured to receive write requested data and corresponding category information. The flash translation... Agent: Samsung Electronics Co., Ltd.
20140281173 - Nonvolatile memory system, system including the same, and method of adaptively adjusting user storage region in the same: A method is for adaptively adjusting a user storage region in an entire storage region of a nonvolatile memory system. The method includes a host transmitting a user region information request command to the nonvolatile memory system, the nonvolatile memory system transmitting user region information to the host, the host... Agent:
20140281170 - Nonvolatile storage device and operating system (os) image program method thereof: A nonvolatile storage device in accordance with the inventive concepts includes a nonvolatile memory device comprising a first memory area, a second memory area, and a memory controller. The memory controller includes a first register configured to store reliable mode information, and a second register configured to store operating system... Agent: Samsung Electronics Co., Ltd.
20140281126 - Overprovision capacity in a data storage device: A data storage module includes a non-volatile memory and a controller. A method performed in the data storage module includes receiving an overprovision capacity instruction from a host device. The method further includes updating a file system table of the non-volatile memory to indicate, by designating logical addresses in the... Agent: Sandisk Technologies Inc.
20140281175 - Program method, data recovery method, and flash memory using the same: A program method for a multi-level cell (MLC) flash memory is provided. The memory array includes a plurality of pages and a plurality of paired pages, which correspond to the respective pages. The program method includes the following steps. Firstly, a program address command is obtained. Next, whether the program... Agent: Macronix International Co., Ltd.
20140281143 - Reducing flash memory write amplification and latency: Data is distributed to solid-state disks (SSDs) using the RAID-0 technique. Based on a utilization of a first region of a first one of the SSDs, the first region is selected for garbage collection. Valid data from the first region is copied to an active region of the first one... Agent: Lsi Corporation
20140281179 - Stochastic block allocation for improved wear leveling: Systems and methods are disclosed for stochastic block allocation for improved wear leveling for a system having non-volatile memory (“NVM”). The system can probabilistically allocate a block or super block for wear leveling based on statistics associated with the block or super block. In some embodiments, the system can select... Agent: Apple Inc.
20140281155 - Storage device assisted data de-duplication: Systems and methods presented herein provide for de-duplication of data. In one embodiment, an input/output module is operable to generate an input/output operation to write data. A storage device is communicatively coupled to the input/output module and operable to write the data of the input/output operation at a logical address... Agent:
20140281127 - Storage module and method for regulating garbage collection operations based on write activity of a host: A storage module and method for regulating garbage collection operations based on write activity of a host are disclosed. In one embodiment, a storage module determines whether the host is operating in a burst mode by determining whether write activity of the host over a time period exceeds a threshold.... Agent:
20140281168 - Storage system and method of control for storage system: The storage system includes a plurality of storage devices and a storage controller. The storage controller stores a data request quantity indicating the data quantity of write data written to the target area in a specific period, and estimates, based on the quantity of request data and relationship information received... Agent:
20140281142 - Storage system employing mram and redundant array of solid state disk: A storage system includes one or more RAID groups, a RAID group comprising a number of physically addressed solid state disks (paSSD). Stripes are formed across a RAID group, data to be written is saved in a non-volatile buffer until enough data for a full strip is received (without any... Agent: Avalanche Technology, Inc.
20140281138 - Synchronous mirroring in non-volatile memory systems: First data is received for storing in a first asymmetric memory device. A first writing phase is identified as a current writing phase. A first segment included in the first asymmetric memory device is identified as next segment available for writing data. The first data is written to the first... Agent:
20140281124 - System and method for caching a storage medium: A standalone storage cache is responsive to a host independent of drivers or caching logic on the host. The standalone storage cache (standalone cache) interfaces between the host and corresponding storage device, and appears to each as the same I/O interface. I/O requests are sent by the host, and received/acknowledges... Agent:
20140281123 - System and method for handling i/o write requests: System and methods for managing I/O write requests of host systems to physical storage. A storage subsystem includes a plurality of storage devices where each storage device is configured to provide data storage. At least a pair of redundant controllers is connected to the plurality of storage devices for executing... Agent: Datadirect Networks, Inc.
20140281134 - System and method of processing of duplicate data at a data storage device: A data storage device includes a memory and a controller. A method may be performed at the data storage device. The method includes receiving a request to write data, generating a signature of the data, and searching a signature table to determine if the generated signature is in the signature... Agent: Sandisk Technologies Inc.
20140281125 - Systems and methods for in-place reorganization of device storage: A method for in-place reorganization of contents stored in a non-volatile storage of a device and organized according to an original organization scheme having at least one original storage unit and on original organization logic associated therewith, to a target organization scheme having at least one target storage unit and... Agent: Red Bend Ltd.
20140281131 - Systems and methods for persistent cache logging: A cache log module stores an ordered log of cache storage operations sequentially within the physical address space of a non-volatile storage device. The log may be divided into segments, each comprising a set of log entries. Data admitted into the cache may be associated with respective log segments. Cache... Agent:
20140281136 - Systems and methods for writing to high-capacity memory: Systems and methods for writing to high-capacity memory are disclosed. In high-capacity memory systems in which the capacity of the characteristic portion of the memory (e.g., a page of NAND flash memory) exceeds the capacity of a buffer used to write to the memory, underutilization issues are prevalent. Data organized... Agent: Apple Inc.
20140281182 - Apparatuses and methods for variable latency memory operations: Apparatuses and methods for variable latency memory operations are disclosed herein. An example apparatus may include a memory configured to receive an activate command indicative of a type of a command during a first addressing phase and to receive the command during a second addressing phase. The memory may further... Agent: Micron Technology, Inc.
20140281180 - Data coherency management: A data processing system 3 employing a coherent memory system comprises multiple main cache memories 8. An inclusive snoop directory memory 14 stores directory lines 22. Each directory line includes a directory tag and multiple snoop vectors. Each snoop vector relates to a span of memory addresses corresponding to the... Agent: Arm Limited
20140281186 - Dynamic granule-based intermediate storage: A data storage system includes data storage and random access memory. A sorting module is communicatively coupled to the random access memory and sorts data blocks of write data received in the random access memory of the data storage. A storage controller is communicatively coupled to the random access memory... Agent: Seagate Technology LLC
20140281187 - Electronic apparatus, method of creating snapshot image, and program: An electronic apparatus includes a volatile memory, a swap device, and a control unit. The control unit is configured to divide data loaded in the volatile memory between an activation start and a specific time point after the activation start into data used to create a snapshot image and data... Agent: Sony Corporation
20140281181 - Enhanced performance monitoring method and apparatus: A high-performance-computer system includes a statistics accumulation apparatus configured to efficiently accumulate system performance data from a variety of system components, and periodically write such data to processor local memory for efficient subsequent software processing of the thus acquired data, thereby reducing the system hardware and software overhead needed for... Agent: Silicon Graphics International Corp.
20140281188 - Method of updating mapping information and memory system and apparatus employing the same: A method of updating mapping information for a memory system comprises generating write transaction information based on multiple write requests issued by a host, performing program operations in the memory system based on the write transaction information, and following completion of the program operations, updating mapping information based on an... Agent: Samsung Electronics Co., Ltd.
20140281184 - Mixed memory type hybrid cache: A hybrid cache includes a static random access memory (SRAM) portion and a resistive random access memory portion. Cache lines of the hybrid cache are configured to include both SRAM macros and resistive random access memory macros. The hybrid cache is configured so that the SRAM macros are accessed before... Agent:
20140281189 - Processor system having variable capacity memory: According to one embodiment, a processor system includes a variable capacity memory. The memory includes a memory cell array including basic units, each of the basic units including one cell transistor and one variable resistance element, a mode selector switching between first and second modes, a read/write of one bit... Agent: Kabushiki Kaisha Toshiba
20140281183 - Staging sorted data in intermediate storage: A data storage system includes data storage and random access memory. A sorting module is communicatively coupled to the random access memory and is configured to sort data blocks of incoming write data received in the random access memory. A storage controller is communicatively coupled to the random access memory... Agent: Seagate Technology LLC
20140281185 - Staging sorted data in intermediate storage: A data storage system includes data storage and random access memory. A sorting module is communicatively coupled to the random access memory and is configured to sort data blocks of incoming write data received in the random access memory. A storage controller is communicatively coupled to the random access memory... Agent: Seagate Technology LLC
20140281191 - Address mapping including generic bits: Embodiments relate to address mapping including generic bits. An aspect includes receiving an address including generic bits from a memory control unit (MCU) by a buffer module in a main memory. Another aspect includes mapping the generic bits to an address format corresponding to a type of dynamic random access... Agent: International Business Machines Corporation
20140281190 - Coherence processing with error checking: An apparatus for processing and tracking the progress of coherency transactions in a computing system is disclosed. The apparatus may include a finite-element state machine, a processor, and a scoreboard circuit. The finite-element state machine may be configured to track the progress of a transaction as well as detect errors... Agent: Apple Inc.
20140281198 - Data interface circuit for capturing received data bits including continuous calibration: Circuits and methods for implementing a continuously adaptive timing calibration training function in an integrated circuit interface are disclosed. A mission data path is established where a data bit is sampled by a strobe. A similar reference data path is established for calibration purposes only. At an initialization time both... Agent: Uniquify, Inc.
20140281194 - Dynamically-sizeable granule storage: A data storage system includes data storage and random access memory. A sorting module is communicatively coupled to the random access memory and sorts data blocks of write data received in the random access memory of the data storage. A storage controller is communicatively coupled to the random access memory... Agent: Seagate Technology LLC
20140281200 - Memory devices and systems including multi-speed access of memory modules: A system, comprising: a plurality of modules, each module comprising a plurality of integrated circuits devices coupled to a module bus and a channel interface that communicates with a memory controller, at least a first module having a portion of its total module address space composed of first type memory... Agent: Cypress Semiconductor Corporation
20140281195 - Method and a system to verify shared memory integrity: A method, a system and a computer program product including instructions for verification of the integrity of a shared memory using in line coding is provided. It involves an active step wherein multiple bus masters write a corresponding data to a shared memory. After that it also includes a verification... Agent: International Business Machines Corporation
20140281199 - Optical interconnect in high-speed memory systems: A optical link for achieving electrical isolation between a controller and a memory device is disclosed. The optical link increases the noise immunity of electrical interconnections, and allows the memory device to be placed a greater distance from the processor than is conventional without power-consuming I/O buffers.... Agent: Micron Technology, Inc.
20140281196 - Processors, methods, and systems to relax synchronization of accesses to shared memory: A processor of an aspect includes a plurality of logical processors. A first logical processor of the plurality is to execute software that includes a memory access synchronization instruction that is to synchronize accesses to a memory. The processor also includes memory access synchronization relaxation logic that is to prevent... Agent:
20140281197 - Providing snoop filtering associated with a data buffer: In one embodiment, a conflict detection logic is configured to receive a plurality of memory requests from an arbiter of a coherent fabric of a system on a chip (SoC). The conflict detection logic includes snoop filter logic to downgrade a first snooped memory request for a first address to... Agent:
20140281193 - System and method for accessing memory: A close proximity memory arrangement maintains a point to point association between DQs, or data lines, to DRAM modules employs a clockless state machine on a DRAM side of the memory controller-DRAM interface such that a single FIFO on the memory controller side synchronizes or orders the DRAM fetch results.... Agent:
20140281192 - Tagging in memory control unit (mcu): Embodiments relate to tagging in a MCU. An aspect includes assigning a command tag to a command by a tag allocation logic of the MCU. Another aspect includes sending the command and the command tag on a plurality of channels that are in communication with the MCU. Another aspect includes... Agent: International Business Machines Corporation
20140281202 - Dram controller for variable refresh operation timing: A method for selection of a DRAM refresh timing in a DRAM memory system is disclosed. The method may include running a workload for a first number of refresh intervals using a first DRAM refresh timing and making a first workload throughput measurement for the first number of refresh intervals.... Agent: International Business Machines Corporation
20140281204 - Flexible memory system with a controller and a stack of memory: Embodiments of a system and method for providing a flexible memory system are generally described herein. In some embodiments, a substrate is provided, wherein a stack of memory is coupled to the substrate. The stack of memory includes a number of vaults. A controller is also coupled to the substrate... Agent:
20140281203 - Managing disturbance induced errors: In an embodiment, a memory controller may determine that one or more neighboring memory cells associated with a target memory cell in a memory device are to be refreshed. The controller may generate a command associated with refreshing the one or more neighboring memory cells. The controller may transfer the... Agent:
20140281205 - Memory circuit and method for its operation: In an illustrative embodiment, the memory circuit includes first and second data paths on which data is transferred for read and write memory operations and first and second mixer circuits for adjusting the phase of clock signals applied to their inputs. The mixer circuits are cross-coupled so that the outputs... Agent: Rambus, Inc.
20140281201 - Refresh control device, wireless receiver, and semiconductor integrated circuit: Provided is a refresh control device including: an arbitration operating unit configured to arbitrate (i) a memory access request for accessing a volatile memory that requires a refresh operation for holding data and (ii) a refresh trigger for requesting execution of the refresh operation; and a trigger generating unit configured... Agent: Panasonic Corporation
20140281207 - Techniques for determining victim row addresses in a volatile memory: Examples are disclosed for determining a logical address of one or more victim rows of a volatile memory based on a logical address of an aggressor row and address translation schemes associated with the volatile memory. Other examples are described and claimed.... Agent:
20140281206 - Techniques for probabilistic dynamic random access memory row repair: Examples are disclosed for probabilistic dynamic random access memory (DRAM) row repair. In some examples, using a row hammer limit for DRAM and a maximum activation rate for the DRAM a probabilistic row hammer detection value may be determined. The probabilistic row hammer detection value may then be used such... Agent:
20140281208 - Associative look-up instruction for a processor instruction set architecture: An associative look-up instruction for an instruction set architecture (ISA) of a processor and methods for use of an associative look-up instruction. The associative look-up instruction of the ISA specifies one or more fields within a data unit that are used as a pattern of bits for identifying data content... Agent: Silicon Graphics International Corp.
20140281209 - Hardware-based pre-page walk virtual address transformation: An indication of a virtual address is received. A current page size of a plurality of available page sizes is read from a register. A shift amount is determined based, at least in part, on the current page size. A bit shift of the virtual address is performed in which... Agent: International Business Machines Corporation
20140281210 - Dynamic storage device libraries: Tape device paths, library slots and drive information are automatically collected by agents at nodes in a library cluster. The information is reported to a central server database. The central server accesses the information and maps tape devices to path information so an administrator may easily have access to configuration... Agent:
20140281211 - Fast mount cache: A fast mount cache is provided by any offline storage media for fast volume mount access. The fast mount cache may be used as the first level in a hierarchical storage configuration after the high performance tier for data having high access rates shortly after creation but decreases sharply as... Agent: Silicon Graphics International Corp.
20140281213 - Apparatus and methods for prolonging service life of solid-state memory device in a digital video recorder: A method for prolonging the service life of a solid state drive. The method includes providing for use with a digital video recorder, a solid state drive (SSD) for time-shifted viewing of media content, changing the SSD from a first state to a second state based on a functional command... Agent:
20140281212 - On-disk operations on fragments to support huge data sizes: Data records of a data set can be stored in a plurality of main part fragments retained in on-disk storage. A size of the data set can be compared to an available size of main system memory. All of the plurality of main part fragments can be fully loaded into... Agent: Sap Ag
20140281215 - Storage method and storage apparatus: The storage method according to the present invention includes: partitioning raw data into several data blocks; calculating, according to a preset mapping algorithm, three consecutive virtual storage partitions to which a first data block is mapped, where a virtual storage partition is a partition obtained by dividing a virtual storage... Agent: Huawei Technologies Co., Ltd.
20140281214 - Total quotas for data storage system: Quotas are tracked for user usage of hard disk drive space and offline backup storage space. The quota is enforced against the total space utilized by a user, not just high tier hard drive space usage. When data is migrated from hard disk drive space to backup storage space, data... Agent: Silicon Graphics International Corp.
20140281216 - Vertically integrated storage: Various systems, methods, apparatuses, and computer-readable media for accessing a storage device are described. Techniques are described for vertically integrating the various software functions and hardware functions for accessing storage hardware. In some embodiments, the system is implemented using non-volatile memory.... Agent: Skyera, Inc.
20140281222 - Antiharmonic data copying method: A data copying method for one-to-many reproduction apparatus having a data buffer includes steps of: reading multiple data segments from source data into the data buffer, detecting newly connected random access devices, selecting the data segments from the data buffer individually for each of the random access devices, copying the... Agent:
20140281221 - Data processing: Various embodiments of the present invention relate to a method and apparatus for data copy. Specifically, in one embodiment of the present invention there is provided a method for data copy, comprising: obtaining a data source on which data copy is to be executed; determining a size P of a... Agent: Emc Corporation
20140281220 - Information processing system, and control method: A control method for a control device which connects, via a connecting device, each of a plurality of processors that each executes processing to at least one of a plurality of memory devices that each stores data, the control method comprises controlling the connecting device so that a second memory... Agent: Fujitsu Limited
20140281225 - Method and apparatus for dispersed storage data transfer: The method begins with a processing module determining whether to reconstruct data corresponding to a plurality of data slices when the plurality of data slices is to be transferred from a first type of memory device to a second type of memory device. The method continues with the processing module... Agent: Cleversafe, Inc.
20140281224 - Modular mass storage system: A system for storing data includes a rack, one or more data storage modules coupled to the rack, and one or more data control modules coupled to the rack. The data storage modules may include a chassis, two or more backplanes coupled to the chassis, and one or more mass... Agent: Amazon Technologies, Inc.
20140281223 - Optimized disk load distribution: A method in a distributed storage (DS) unit begins by the unit receiving one or more data slices to store. The method continues by determining a memory utilization method for the one or more data slices. The method continues when a multiple memory utilization method is determined. The method continues... Agent: Cleversafe, Inc.
20140281218 - Storage device powered by a communications interface: A storage device including a communications interface configured to receive data and power, a plurality of disk drives configured to be powered only by the power received by the communications interface, a controller configured to configure the plurality of disk drives as a redundant array of independent disks, a power... Agent: Western Digital Technologies, Inc.
20140281219 - Storage zoning tool: A system which semi-automates the assignment of data storage device controllers to data storage devices in a system that contains a plurality of data storage device controllers and a plurality of data storage devices. The object of the invention is to programmatically control which data storage device controllers control which... Agent: Silicon Graphics International Corp.
20140281217 - Technique for rapidly converting between storage representations in a virtualized computing environment: Embodiments described herein provide a storage conversion technique for rapidly converting between storage representations served by a storage system and presented to a host computer of a virtualized computing environment. The storage representations may include physical storage represented by a sequential set of blocks on disks of the storage system... Agent: Netapp, Inc.
20140281226 - Memory card and host device: According to one embodiment, a memory card includes a nonvolatile semiconductor memory which includes a first memory area that is not accessed by specifying an address thereof by a host device and a second memory area that is accessed by specifying an address thereof by the host device and stores... Agent: Kabushiki Kaisha Toshiba
20140281227 - Provisioning in heterogenic volume of multiple tiers: The provisioning of a volume that has multiple tiers corresponding to different trait sets. The volume to be provisioned is identified along with multiple tiers that are to be in the volume. For each of the tiers that are to be provisioned within the volume, a corresponding trait set is... Agent: Microsoft Corporation
20140281230 - Cache management in managed runtime environments: Methods and apparatus to provide cache management in managed runtime environments are described. In one embodiment, a controller comprises logic to determine an update frequency for an object in the runtime environment and assigning the object to an unshared cache line when the update frequency exceeds an update frequency threshold.... Agent:
20140281229 - Dynamic storage device provisioning: A method or system for allocating the storage space of a storage medium into a permanently allocated media cache storage region; a dynamically mapped media cache storage region, and statically mapped storage region, wherein the dynamically mapped media cache storage region is used for performance and/or reliability enhancing functions.... Agent: Seagate Technology LLC
20140281231 - Electronic device and method for fabricating the same: This technology relates to an electronic device and a method for fabricating the same. An electronic device in accordance with this technology includes semiconductor memory. The semiconductor memory may include a magnetization-pinned layer configured to include a first magnetic layer, a second magnetic layer, and a non-magnetic layer interposed between... Agent: Sk Hynix Inc.
20140281228 - System and method for an accelerator cache based on memory availability and usage: The storage processor of a data storage system such as a storage array automatically configures one or more accelerator caches (“AC”) upon detecting the presence of one or more solid-state storage devices (e.g., SSD drives) installed in the data storage system, such as when a storage device is plugged into... Agent: Drobo, Inc.
20140281233 - Storing data across a plurality of storage nodes: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for storing data on storage nodes. In one aspect, a method includes receiving a file to be stored across a plurality of storage nodes each including a cache. The is stored by storing portions of the file... Agent: Google Inc.
20140281232 - System and method for capturing behaviour information from a program and inserting software prefetch instructions: Methods, systems and software for inserting prefetches into software applications or programs are described. A baseline program is analyzed to identify target instructions for which prefetching may be beneficial using various pattern analyses. Optionally, a cost/benefit analysis can be performed to determine if it is worthwhile to insert prefetches for... Agent: Hagersten Optimization Ab
20140281239 - Adaptive hierarchical cache policy in a microprocessor: A method for determining an inclusion policy includes determining a ratio of a capacity of a large cache to a capacity of a core cache in a cache subsystem of a processor and selecting an inclusive policy as the inclusion policy for the cache subsystem in response to the cache... Agent: Intel Corporation
20140281237 - Broadcast cache coherence on partially-ordered network: A method for cache coherence, including: broadcasting, by a requester cache (RC) over a partially-ordered request network (RN), a peer-to-peer (P2P) request for a cacheline to a plurality of slave caches; receiving, by the RC and over the RN while the P2P request is pending, a forwarded request for the... Agent: Oracle International Corporation
20140281241 - Cached evaluation of paths through graph-based data representation: Embodiments of the invention generally provide a method, a computing system, and a computer-readable medium configured to request, cache, and generate translations of paths through graph-based data representations. The computer-implemented method includes receiving a first request for translation, wherein the first request specifies a first path configured to identify first... Agent: Netflix, Inc.
20140281240 - Instructions to mark beginning and end of non transactional code region requiring write back to persistent storage: A processor in described having an interface to non volatile random access memory and logic circuitry. The logic circuitry is to identify cache lines modified by a transaction which views the volatile random access memory as the transaction's persistence storage. The logic circuitry is also to identify cache lines modified... Agent:
20140281242 - Methods, systems and apparatus for predicting the way of a set associative cache: A method for predicting a way of a set associative shadow cache is disclosed. As a part of a method, a request to fetch a first far taken branch instruction of a first cache line from an instruction cache is received, and responsive to a hit in the instruction cache,... Agent: Soft Machines, Inc.
20140281243 - Multiple-core computer processor: A multi-core computer processor including a plurality of processor cores interconnected in a Network-on-Chip (NoC) architecture, a plurality of caches, each of the plurality of caches being associated with one and only one of the plurality of processor cores, and a plurality of memories, each of the plurality of memories... Agent:
20140281234 - Serving memory requests in cache coherent heterogeneous systems: Apparatus, computer readable medium, and method of servicing memory requests are presented. A read request for a memory block from a requester processing having a processor type may be serviced by providing exclusive access to the requested memory block to the requester processor when the requested memory block was modified... Agent: Advanced Micro Devices, Inc.
20140281235 - System and method for software/hardware coordinated adaptive performance monitoring: System and method embodiments are provided for coordinated hardware and software performance monitoring to determine a suitable polling time for memory cache during run time. The system and method adapt to the time-varying software workload by determining a next polling time based on captured local characteristics of memory access pattern... Agent: Futurewei Technologies, Inc.
20140281238 - Systems and methods for accessing cache memory: Systems and methods for providing data from a cache memory to requestors includes a number of cache memory levels arranged in a hierarchy. The method includes receiving a request for fetching data from the cache memory and determining one or more addresses in a cache memory level which is one... Agent: International Business Machines Corporation
20140281236 - Systems and methods for implementing transactional memory: Systems and methods for implementing transactional memory access. An example method may comprise initiating a memory access transaction; executing a transactional read operation, using a first buffer associated with a memory access tracking logic, with respect to a first memory location, and/or a transactional write operation, using a second buffer... Agent:
20140281244 - Storage apparatus and control method for storage apparatus: An exemplary storage apparatus of the invention includes storage devices for storing data of block I/O commands and file I/O commands and a controller including a block cache area and a file cache area. The controller creates block I/O commands from file I/O commands and accesses the storage devices in... Agent: Hitachi, Ltd.
20140281245 - Virtual unified instruction and data caches: Execution of a store instruction to modify an instruction at a memory location identified by a memory address is requested. A cache controller stores the memory address and the modified data in an associative memory coupled to a data cache and an instruction cache. In addition, the modified data is... Agent: International Business Machines Corporation
20140281246 - Instruction boundary prediction for variable length instruction set: A system, processor, and method to predict with high accuracy and retain instruction boundaries for previously executed instructions in order to decode variable length instructions is disclosed. In at least one embodiment, a disclosed processor includes an instruction fetch unit, an instruction cache, a boundary byte predictor, and an instruction... Agent:
20140281247 - Method to accelerate queries using dynamically generated alternate data formats in flash cache: A method for accelerating queries using dynamically generated columnar data in a flash cache is provided. In an embodiment, a method comprises a storage device receiving a first request for data that is stored in the storage device in a base major format in one or more primary storage devices.... Agent: Oracle International Corporation
20140281248 - Read-write partitioning of cache memory: A system and method to enforce read-write partitioning in an N-way, set associative cache may limit a number of ways allocated for storing modified data in a set to a value W and limit a number of ways holding read data to a value R. The cache may be configured... Agent: Intel Corporation
20140281249 - Hash-based spatial sampling for efficient cache utility curve estimation and cache allocation: Cache utility curves are determined for different software entities depending on how frequently their storage access requests lead to cache hits or cache misses. Although possible, not all access requests need be tested, but rather only a subset, determined by whether a hash value of each current storage location identifier... Agent: Cloud Physics, Inc.
20140281253 - Dynamically removing entries from an executing queue: According to an embodiment, a computer-implemented method for control block management is provided. The computer-implemented method includes placing one or more control blocks in a queue for execution by a computer hardware device. The computer-implemented method also includes allocating a purge flag in each of the control blocks. The purge... Agent: International Business Machines Corporation
20140281256 - Fault buffer for resolving page faults in unified virtual memory system: A system for managing virtual memory. The system includes a first processing unit configured to execute a first operation that references a first virtual memory address. The system also includes a first memory management unit (MMU) associated with the first processing unit and configured to generate a first page fault... Agent: Nvidia Corporation
20140281251 - Method and apparatus for cache line state update in sectored cache with line state tracker: Technologies for tracking updates to the line state of a cache superline are described. In response to a request pertaining to a superline, one or more read-modify-write (RMW) operations to (a) a line state vector of a line state array and (b) a counter of the line state array can... Agent:
20140281255 - Page state directory for managing unified virtual memory: A system for managing virtual memory. The system includes a first processing unit configured to execute a first operation that references a first virtual memory address. The system also includes a first memory management unit (MMU) associated with the first processing unit and configured to generate a first page fault... Agent: Nvidia Corporation
20140281254 - Semiconductor chip with adaptive bist cache testing during runtime: A method is described that includes during runtime of a semiconductor die, determining that a next BIST test sequence of a storage component embedded on the die is appropriate. The method further includes applying a BIST test sequence to each valid entry in the storage component. The method also includes... Agent:
20140281252 - Statement cache auto-tuning: Disclosed are methods and apparatuses that implement automatic resizing of statement caches in response to cache metrics. One embodiment provides an approach for periodically calculating a session eligibility index for each session cache, wherein the session eligibility index indicates the priority level of the session cache for resizing, and selecting... Agent:
20140281250 - Systems and methods for performing data recovery in a memory system: Systems and methods for performing data recovery are disclosed. A controller of a memory system may detect an error at a first page of memory and identify a data keep cache associated with the first page, the data keep cache associated with a primary XOR sum. The controller may further... Agent:
20140281257 - Caching backed-up data locally until successful replication: A mechanism is provided for caching backed-up data locally until successful replication of the backed-up data. Responsive to an indication to back up one or more pieces of identified data from a local storage device, a determination is made as to whether a primary storage device is available. Responsive to... Agent: International Business Machines Corporation
20140281258 - Dynamic caching module selection for optimized data deduplication: Embodiments of the invention provide a method, system and computer program product for dynamic caching module selection for optimized data deduplication. In an embodiment of the invention, a method for dynamic caching module selection for optimized data deduplication is provided. The method includes receiving a request to retrieve data and... Agent: International Business Machines Corporation
20140281262 - Dynamic caching module selection for optimized data deduplication: Embodiments of the invention provide a method, system and computer program product for dynamic caching module selection for optimized data deduplication. In an embodiment of the invention, a method for dynamic caching module selection for optimized data deduplication is provided. The method includes receiving a request to retrieve data and... Agent: Inernational Business Machines Corporation
20140281260 - Estimating access frequency statistics for storage device: Techniques are disclosed relating to determining statistics associated with the storage of data on a medium. In one embodiment, a computing system maintains a management statistic for a storage device, and uses the management statistic as a proxy for a workload statistic for a storage block within the storage device.... Agent: Fusion-io, Inc.
20140281261 - Increased error correction for cache memories through adaptive replacement policies: A system, processor and method to reduce the overall detectable unrecoverable FIT rate of a cache by reducing the residency time of dirty lines in a cache. This is accomplished through selectively choosing different replacement policies during execution based on the DUE FIT target of the system. System performance and... Agent: Intel Corporation
20140281264 - Migration counters for hybrid memories in a unified virtual memory system: Embodiments of the approaches disclosed herein include a subsystem that includes an access tracking mechanism configured to monitor access operations directed to a first memory and a second memory. The access tracking mechanism detects an access operation generated by a processor for accessing a first memory page residing on the... Agent: Nvidia Corporation
20140281263 - Replaying memory transactions while resolving memory access faults: One embodiment of the present invention is a parallel processing unit (PPU) that includes one or more streaming multiprocessors (SMs) and implements a replay unit per SM. Upon detecting a page fault associated with a memory transaction issued by a particular SM, the corresponding replay unit causes the SM, but... Agent: Nvidia Corporation
20140281259 - Translation lookaside buffer entry systems and methods: Presented systems and methods can facilitate efficient information storage and tracking operations, including translation look aside buffer operations. In one embodiment, the systems and methods effectively allow the caching of invalid entries (with the attendant benefits e.g., regarding power, resource usage, stalls, etc), while maintaining the illusion that the TLBs... Agent: Nvidia Corporation
20140281265 - Write admittance policy for a memory cache: A method includes monitoring a number of read access requests to an address for data stored on a backing store. The method also includes comparing the number of read access requests to a read access threshold. The read access threshold includes a threshold number of read access requests for the... Agent: Fusion-io
20140281267 - Enabling hardware transactional memory to work more efficiently with readers that can tolerate stale data: A technique for enabling hardware transactional memory (HTM) to work more efficiently with readers that can tolerate stale data. In an embodiment, a pre-transaction load request is received from one of the readers, the pre-transaction load request signifying that the reader can tolerate pre-transaction data. A determination is made whether... Agent: International Business Machines Corporation
20140281268 - Enabling hardware transactional memory to work more efficiently with readers that can tolerate stale data: A technique for enabling hardware transactional memory (HTM) to work more efficiently with readers that can tolerate stale data. In an embodiment, a pre-transaction load request is received from one of the readers, the pre-transaction load request signifying that the reader can tolerate pre-transaction data. A determination is made whether... Agent: International Business Machines Corporation
20140281266 - Maintaining coherence when removing nodes from a directory-based shared memory system: A high performance computing system and methods are disclosed. The system includes logical partitions with physically removable nodes that each have at least one processor, and memory that can be shared with other nodes. Node hardware may be removed or allocated to another partition without a reboot or power cycle.... Agent: Silicon Graphics International Corp.
20140281269 - Non-volatile memory update tracking: A technique includes performing an update to a location of a non-volatile memory. The update is created by execution of at least one machine executable instruction of a plurality of machine executable instructions. The technique includes using a processor-based machine to selectively track the update to allow recovery of the... Agent: Hewlett-packard Development Company, L.p.
20140281271 - Cache control device, processor, information processing system, and cache control method: A cache control device includes: a tag storage section configured to manage, for each cache line of a cache memory, whether or not the cache line is valid, and whether or not a write-back instruction to a shared storage section is provided; and a tag control section configured not to... Agent: Sony Corporation
20140281270 - Mechanism to improve input/output write bandwidth in scalable systems utilizing directory based coherecy: Methods and apparatus relating to directory based coherency to improve input/output write bandwidth in scalable systems are described. In one embodiment, a first agent receives a request to write data from a second agent via a link and logic causes the first agent to write the directory state to an... Agent:
20140281273 - Providing local cache coherency in a shared storage environment: Multiple nodes of a cluster have associated non-shared, local caches, used to cache shared storage content. Each local cache is accessible only to the node with which it is associated, whereas the cluster-level shared storage is accessible by any of the nodes. Attempts to access the shared storage by the... Agent: Symantec Corporation
20140281272 - Rapid recovery from downtime of mirrored storage device: No-loss rapid recovery performs resynchronization efficiently while concurrently allowing availability to mirrored data on the storage device. No-loss rapid recovery has two stages and involves storage devices that have both a non-volatile cache and primary storage and that operate as mirror buddies. The first stage is referred to herein as... Agent: Oracle International Corporation
20140281274 - Shared memory interleavings for instruction atomicity violations: A system, processor, and method to record the interleavings of shared memory accesses in the presence of complex multi-operation instructions. An extension to instruction atomicity (IA) is disclosed that makes it possible for software to infer partial information about a multi-operation execution if the hardware has recorded a dependency due... Agent: Intel Corporation
20140281275 - Broadcast messaging and acknowledgment messaging for power management in a multiprocessor system: Various aspects provide for implementing a cache coherence protocol. A system comprises at least one processing component and a centralized controller. The at least one processing component comprises a cache controller. The cache controller is configured to manage a cache memory associated with a processor. The centralized controller is configured... Agent: Applied Micro Circuits Corporation
20140281276 - Method, apparatus, and system for low latency communication: A method, apparatus, computer program product, and computer readable medium to perform receipt of a snoop notification indicating a write to a memory address associated with a cache, determination that the snoop notification signifies receipt of a message based, at least in part, on the memory address, and performance of... Agent:
20140281278 - Apparatus and methods for a distributed memory system including memory nodes: Apparatuses and methods for a distributed memory system including memory nodes are disclosed. An example apparatus includes a processor and a memory system coupled to the processor. The memory system is configured to receive instructions from the processor to access information stored by the memory system. The memory system includes... Agent: Micron Technology, Inc.
20140281277 - Integrated system and storage media controlller: A single device that provides computing system-level functionality with non-volatile storage controller functionality. These functionalities can share the same electronics.... Agent:
20140281279 - Nonvolatile memory device and data management method thereof: A data management method of a nonvolatile memory device which includes a data cell area and a reference cell area includes selecting shared data from write data input to the memory device; generating reference data based on the shared data; and storing the write data in the data cell area... Agent:
20140281281 - Host command based read disturb methodology: An apparatus comprising a memory and a controller. The memory may be configured to process a plurality of read/write operations. The memory comprises a plurality of memory modules each having a size less than a total size of the memory. The controller is configured to (i) determine if a read... Agent: Lsi Corporation
20140281280 - Selecting between non-volatile memory units having different minimum addressable data unit sizes: An apparatus includes a controller capable of being coupled to a host interface and a memory device. The memory device includes two or more non-hierarchical, non-volatile memory units having different minimum addressable data unit sizes. The controller is configured to at least perform determining a workload indicator of a data... Agent: Seagate Technology LLC
20140281282 - Storage device and storage system: According to one embodiment, a storage device includes a first memory, an interface that includes first physical layers and connects a host and the first memory, a second memory that temporarily stores the data transferred between the host and the first memory, a controller that controls operation of the interface.... Agent:
20140281283 - Dual host embedded shared device controller: Efficient techniques using a multi-port shared non-volatile memory are described that reduce latency in memory accesses from dedicated function specific processors, such as a modem control processor. The modem processor preempts a host processor that is accessing data from a multi-port shared non-volatile memory flash device allowing the modem processor... Agent: Qualcomm Incorporated
20140281284 - Multi-read port memory: A method includes receiving a multi-port read request for retrieval of data stored in three memories, each comprising two memory modules and a parity module. The multi-port read request is associated with first data stored at a first memory address, second data stored at a second memory address, and third... Agent:
20140281285 - Register file device: A register file device includes: a multi-port latch; and a write circuit that generates a signal to be written in the multi-port latch, the write circuit generating the signal on the basis of a plurality of data groups each including a write control signal, a write address, and a piece... Agent: Fujitsu Limited
20140281286 - Memory system: A memory system is provided, which includes a real memory space and a virtual memory space. The memory system includes a memory device having a first memory space which is accessed using a first memory address and a second memory space which is accessed using a second memory address, and... Agent: Samsung Electronics Co., Ltd.
20140281287 - Managing cpu resources for high availability micro-partitions: A primary processing unit entitlement is determined for a logical partition. A smaller secondary processing unit entitlement is also determined. A partition manager allocates primary processing units to the logical partition from a primary shared processor pool, and the logical partition is activated. The secondary processing units are reserved for... Agent: International Business Machines Corporation
20140281288 - Managing cpu resources for high availability micro-partitions: A partition manager relocates a logical partition from a primary shared processor pool to a secondary shared processor pool in response to a predetermined condition, such as a hardware failure. The relocated logical partition is allocated a smaller quantity of processing units from the secondary pool than it was allocated... Agent:
20140281289 - Managing cpu resources for high availability micro-partitions: Profile properties in a partition profile are user-configurable through a management entity such as a management console. A partition manager calculates a secondary processing unit entitlement for a logical partition based in part on a secondary processing unit mode property in the partition profile. The secondary processing unit entitlement may... Agent:
20140281290 - Dynamic definition of error information in a programmable device: Embodiments relate to collecting extended error data from units within a programmable device. A pointer is accessed that points to a region of memory that contains a list of entries that references the extended error data. The list of entries is walked by adjusting a read pointer to obtain the... Agent: International Business Machines Corporation
20140281291 - Method and apparatus for memory array access: A method includes: receiving a first plurality of consecutive bits from a base operand, wherein a MSB of the first plurality of consecutive bits from the base operand is a LSB of a second plurality of consecutive bits from the base operand; and receiving a first plurality of consecutive bits... Agent: Freescale Semiconductor, Inc
20140281293 - Method of operating memory controller and devices including memory controller: A method of operating a memory controller includes receiving a first data sequence and generating a coset representative sequence that can be divided into m-bit strings, where “m” is a natural number of at least 2; performing a first XOR operation on each of the m-bit strings in the coset... Agent: Samsung Electronics Co., Ltd.
20140281292 - Remote enabling of storage: Techniques for enabling storage remotely are presented. A REpresentational State Transfer (REST) front-end interface is interfaced to a legacy file system via a backend interface that directly interacts with the native storage and protocols of the legacy file system. The REST interface is presented as the frontend interface to the... Agent: Novell, Inc.
20140281294 - Adaptive reference tuning for endurance enhancement of non-volatile memories: A wear leveling technique is employed in a memory device so that the cycling history of a memory block is represented by the cycling history of a representative memory cell or a small number of representative memory cells. A control logic block tracks the cycling history of the one or... Agent: International Business Machines Corporation
20140281295 - Expediting rcu grace periods under user mode control: A technique for supporting user mode specification of RCU grace period latency to an operating system kernel-level RCU implementation. Non-expedited and expedited RCU grace period mechanisms are provided for invocation by RCU updaters performing RCU update operations to respectively initiate non-expedited and expedited grace periods. An expedited grace period indicator... Agent: International Business Machines Corporation
20140281296 - Fault buffer for tracking page faults in unified virtual memory system: A system for managing virtual memory. The system includes a first processing unit configured to execute a first operation that references a first virtual memory address. The system also includes a first memory management unit (MMU) associated with the first processing unit and configured to generate a first page fault... Agent: Nvidia Corporation
20140281298 - Method and appartus for suggesting data for deletion: An approach is provided for suggesting data for deletion from an electronic data storage medium. An external device detects initiation of transfer of data from first storage medium to second storage medium. Next, the external device determines an available storage in the second storage medium for the data. Then, the... Agent: Core Wireless Licensing, S.a.r.l.
20140281297 - Migration of peer-mapped memory pages: Techniques are provided by which memory pages may be migrated among PPU memories in a multi-PPU system. According to the techniques, a UVM driver determines that a particular memory page should change ownership state and/or be migrated between one PPU memory and another PPU memory. In response to this determination,... Agent: Nvidia Corporation
20140281299 - Opportunistic migration of memory pages in a unified virtual memory system: Techniques are disclosed for transitioning a memory page between memories in a virtual memory subsystem. A unified virtual memory (UVM) driver detects a page fault in response to a memory access request associated with a first memory page, where a local page table does not include an entry corresponding to... Agent: Nvidia Corporation
20140281301 - Elastic hierarchical data storage backend: A multi-tiered data management system utilizes vertical storage tiers, each with one or more horizontal data storage elements, to provide a dynamic and configurable system for managing the storing, archiving and retrieval of data. The system provides an ability to automatically copy data in parallel to multiple types of storage... Agent: Silicon Graphics International Corp.
20140281303 - Memory management for in-memory processing computing environments and systems: Data can be stored in a memory for in-memory processing system such the data is available for processing as soon as it is needed to be processed. By way of example, first portion and a second portion of the data can be stored in the memory of the in-memory processing... Agent: Teradata Corporation
20140281302 - Multiple stream compression and formatting of data for data storage systems: Embodiments of multiple stream compression and formatting of data for data storage systems are disclosed. In some embodiments, a data storage system can compress multiple streams of fixed sized host data before storing it on a media and format obtained variable sized compressed data for storing on the media that... Agent: Western Digital Technologies, Inc.
20140281300 - Opportunistic tier in hierarchical storage: A system reduces the impact of constrained bandwidth to long-term data storage without adding new data storage resources to the data center, typically by temporarily storing data on data storage devices that are contained within a desktop computer, a notebook computer, or other computing device. The invention stores lower priority... Agent: Silicon Graphics International Corp.
20140281313 - Apparatus and method for cloning and snapshotting in multi-dimensional to linear address space translation: A translation system can translate a storage request to a physical address using fields as keys to traverse a map of nodes with node entries. A node entry can include a link to a next node or a physical address. Using a portion of the key as noted in node... Agent: Skyera, Inc.
20140281316 - Data management device and method for copying data: In response to a first copy command, a first copying unit writes a first dataset read out of a volatile storage device into a first continuous area and a fourth continuous area, as well as a second dataset read out of the volatile storage device into a second continuous area... Agent: Fujitsu Limited
20140281314 - Dual system: A dual system according to the present invention includes: a memory copying unit configured to, when an arithmetic device of a first computer module is installed into the dual system, execute a memory copy process of copying data in a memory region of a second computer module into a memory... Agent: Nec Corporation
20140281307 - Handling snapshot information for a storage device: Techniques are disclosed relating to handling snapshot data for a storage device. In one embodiment, a computing system maintains information that indicates the state of data associated with an application at a particular point in time. In this embodiment, the computing system assigns an epoch number to a current epoch,... Agent: Fusion-io, Inc.
20140281315 - Mass storage device and method of operating the same to back up data stored in volatile memory: A mass storage memory device is disclosed. The device includes a nonvolatile memory, a volatile memory configured to store logical to physical (L2P) data associating logical addresses of data stored in the nonvolatile memory with physical locations of the nonvolatile memory at which the data is stored, and a controller.... Agent: Skyera, Inc.
20140281305 - Memory image capture via memory write from a running system: Techniques for memory image capture via memory write from a running system are described. In at least some embodiments, a request is received for an image of a portion of memory. Images of memory can be used for a variety of purposes, such as diagnosing and repairing error conditions for... Agent: Microsoft Corporation
20140281306 - Method and apparatus of non-disruptive storage migration: Example implementations described herein are directed to non-disruptive I/O storage migration between different storage types. In example implementations, virtual volume migration techniques such as snapshot, thin-provisioning, tier-provisioning, de-duplicated virtual volume, and so forth, are conducted between different storage types by using pool address re-mapping. In example implementations, asynchronous remote copy... Agent: Hitachi, Ltd.
20140281317 - Providing executing programs with reliable access to non-local block data storage: Techniques are described for managing access of executing programs to non-local block data storage. In some situations, a block data storage service uses multiple server storage systems to reliably store block data that may be accessed over one or more networks by programs executing on other physical computing systems. Users... Agent: Amazon Technologies, Inc.
20140281308 - Storage unit selection for virtualized storage units: Performance information for storage units located at a virtual data center is determined by executing storage administrator logic whose execution is controlled by a management entity different than the virtual data center provider. Performance expectations are automatically determined based on the determined performance information. In response to determining that a... Agent:
20140281304 - Systems and methods for integrating compute resources in a storage area network: A data processing and storage system includes a compute module for running at least one virtual machine for processing guest data. State data on the at least one virtual machine is collected. The system also includes a storage module communicating with the compute module and storing the guest data. The... Agent:
20140281311 - Systems and methods for memory system management based on thermal information of a memory system: Methods of mapping memory regions to processes based on thermal data of memory regions are described. In some embodiments, a memory controller may receive a memory allocation request. The memory allocation request may include a logical memory address. The method may further include mapping the logical memory address to an... Agent: Micron Technology, Inc.
20140281312 - Systems and methods for memory system management based on thermal information of a memory system: A translation system can translate a storage request having multiple fields to a physical address using the fields as keys to traverse a map. By using a map table, multiple storage services can be condensed into a single map traversal. The map can be made of nodes that include one... Agent: Skyera, Inc.
20140281309 - Transforming a shared virtualized space to an enclosed space: Provided are techniques for allocating disk space for a virtualized file space; designating files within a global disk space as files to be privatized with respect to the virtualized file space; copying the designated files to the allocated disk space; storing an indicator specifying that the designated files have been... Agent: International Business Machines Corporation
20140281310 - Transforming a shared virtualized space to an enclosed space: Provided are techniques for allocating disk space for a virtualized file space; designating files within a global disk space as files to be privatized with respect to the virtualized file space; copying the designated files to the allocated disk space; storing an indicator specifying that the designated files have been... Agent: International Business Machines Corporation
20140281318 - Efficiently searching and modifying a variable length queue: Embodiments relate to ensuring that serialization is maintained between separate transactions while searching and/or modifying a variable length queue is provided. An aspect includes searching a queue using a transaction. A first sequence number is retrieved from a queue header and a second sequence number is retrieved from local storage... Agent: International Business Machines Corporation
20140281320 - Forensic computer examination systems and methods: Systems, methods, and computer program products for facilitating write-protected virtual access to a target computing device, wherein the use and inspection of the computer device may occur without altering the digital data thereon, are disclosed. In an aspect, a user inserts a virtualization media device, which will boot the computer... Agent:
20140281319 - System and method for protecting data: A system and method are provided for protecting data. In operation, a request to read data from memory is received. Additionally, it is determined whether the data is stored in a predetermined portion of the memory. If it is determined that the data is stored in the predetermined portion of... Agent: Nvidia Corporation
20140281321 - Register access white listing: A system employs a white list of authorized transactions to control access to system registers. In an embodiment, the white list is loaded into filter registers during system boot. Routing logic monitors a logical interconnect fabric of the system for register access requests. The routing logic parses source, destination information... Agent: Intel Corporation
20140281324 - Migrating pages of different sizes between heterogeneous processors: One embodiment of the present invention sets forth a computer-implemented method for migrating a memory page from a first memory to a second memory. The method includes determining a first page size supported by the first memory. The method also includes determining a second page size supported by the second... Agent: Nvidia Corporation
20140281323 - Migration directives in a unified virtual memory system architecture: One embodiment of the present invention sets forth a computer-implemented method for altering migration rules for a unified virtual memory system. The method includes detecting that a migration rule trigger has been satisfied. The method also includes identifying a migration rule action that is associated with the migration rule trigger.... Agent: Nvidia Corporation
20140281322 - Temporal hierarchical tiered data storage: Embodiments of the invention includes identifying the priority of data sets based on how frequently they are accessed by data center compute resources or by other measures assigning latency metrics to data storage resources accessible by the data center, moving data sets with the highest priority metrics to data storage... Agent: Silicon Graphics International Corp.
20140281326 - Dual asynchronous and synchronous memory system: Embodiments relate to a dual asynchronous and synchronous memory system. One aspect is a system that includes a memory controller and a memory buffer chip coupled to the memory controller via a synchronous channel. The memory buffer chip includes a memory buffer unit configured to synchronously communicate with the memory... Agent: International Business Machines Corporation
20140281328 - Memory interface offset signaling: A memory interface includes circuitry configured for applying a variable delay to a portion of a data signal and applying a variable delay to a data strobe. The delayed data strobe samples the delayed portion of the data signal. Delayed portions of the data signal are spaced away from non-delayed... Agent: Qualcomm Incorporated
20140281329 - Priority command queues for low latency solid state drives: A method, apparatus, and system of a priority command queues for low latency solid state drives are disclosed. In one embodiment, a system of a storage system includes a command sorter to determine a target storage device for at least one of a solid state drive (SSD) command and a... Agent: Netapp, Inc.
20140281325 - Synchronization and order detection in a memory system: Embodiments relate to out-of-synchronization detection and out-of-order detection in a memory system. One aspect is a system that includes a plurality of channels, each providing communication with a memory buffer chip and a plurality of memory devices. A memory control unit is coupled to the plurality of channels. The memory... Agent: International Business Machines Corporation
20140281327 - System and method to dynamically determine a timing parameter of a memory device: A particular method includes receiving, from a processor, a first memory access request at a memory device. The method also includes processing the first memory access request based on a timing parameter of the memory device. The method further includes receiving, from the processor, a second memory access request at... Agent: Qualcomm Incorporated
20140281334 - Address resource mapping in a shared memory computer system: An algorithm for mapping memory and a method for using a high performance computing (“HPC”) system are disclosed. The algorithm takes into account the number of physical nodes in the HPC system, and the amount of memory in each node. Some of the nodes in the HPC system also include... Agent: Silicon Graphics International Corp.
20140281330 - Apparatus and method for resource alerts: A method of managing resource allocations in a storage system provisioning system, including monitoring write applications that result in new storage block allocations during a current time slice, calculating a time remaining to exceed actual capacity of allocated storage blocks, if the calculated remaining time does exceed length of next... Agent: International Business Machines Corporation
20140281339 - Computing system and controlling methods for the same: The computer system, during the course of executing an operation of dynamically allocating a storage area to a virtual volume in response to an access from a host system, detects where a balance of a storage capacity among a plurality of logical areas is disrupted, and subsequently moves a storage... Agent: Hitachi, Ltd.
20140281332 - Externally programmable memory management unit: A method includes reading, by a processor, one or more configuration values from a storage device or a memory management unit. The method also includes loading the one or more configuration values into one or more registers of the processor. The one or more registers are useable by the processor... Agent: Qualcomm Incorporated
20140281338 - Host-driven garbage collection: A host receives information related to garbage collection of a storage device, and it controls selective execution of garbage collection by the storage device according to the received information.... Agent: Samsung Semiconductor Co., Ltd.
20140281336 - Memory allocation accelerator: Technologies are generally described for methods and systems effective to implement a memory allocation accelerator. A processor may generate a request for allocation of a requested chunk of memory. The request may be received by a memory allocation accelerator configured to be in communication with the processor. The memory allocation... Agent: Empire Technology Development, LLC
20140281333 - Paging enablement for data storage: Techniques are disclosed relating to storing translations in memory that are usable to access data on a recording medium. In one embodiment, a request is sent for a memory allocation within a non-pageable portion of a memory in a computer system. Responsive to the request, allocated memory is received. Translations... Agent: Fusion-io, Inc.
20140281337 - Storage system, storage apparatus, and computer product: A storage system includes a storage apparatus having a first storage unit having first storage and a first storage control unit controlling access to the first storage, and a first control unit controlling storage units including the first storage unit; a second storage unit having second storage and a second... Agent: Fujitsu Limited
20140281335 - System and method for assigning memory access transfers between communication channels: A communication channel controller includes a queue, a memory map, and a scheduler. The queue to store a first memory transfer request received at the communication channel controller. The memory map stores information to identify a memory address range to be associated with a memory. The scheduler to compare a... Agent:
20140281331 - Systems and methods for processing data stored in data storage devices: A system and method for processing data stored in data storage devices is described. A computing processor acquires blocks of data from a target machine and computes an entropy value associated with each block of the acquired data. The computing processor checks the entropy values of each block to determine... Agent: Guidance Software, Inc.
20140281344 - Data processing system and method of operating the same: A method of operating a data processing system includes compressing a first part of uncompressed data, and determining whether to compress a second part of the uncompressed data based on an expected data size of the compressed first part and an actual data size of the compressed first part. The... Agent:
20140281345 - Distributed storage allocation for heterogeneous systems: Allocation of storage budget in a computer-based distributed storage system is described, where associated computer-based storage nodes have heterogeneous access probabilities. The problem is to allocate a given storage budget across the available computer-based nodes so as to store a unit-size data object (e.g. file) with a higher reliability (e.g.... Agent: California Institute Of Technology
20140281343 - Information processing apparatus, program, and memory area allocation method: A processing apparatus includes a plurality of memories and a plurality of processors coupled to the plurality of memories and configured to determine, in accordance with a demand for allocation of a memory area of a first size to store first data used by an operating system, whether or not... Agent: Fujitsu Limited
20140281342 - Migrating and retrieving queued data in byte-addressable storage: In an exemplary embodiment of this disclosure, a computer-implemented method may include storing in a primary storage a plurality of list entries belonging to an ordered list. Free space in the primary storage may be monitored to determine whether a first predetermined condition related to the free space is met.... Agent: International Business Machines Corporation
20140281340 - Multidimensional resource manager/allocator: An apparatus and method for multidimensional resource allocation and management are provided. The method includes receiving a request for allocation of a block of a multidimensional memory resource, selecting a grid for tracking spaces of the multidimensional memory resource according to the allocation request, determining whether a block of the... Agent: Samsung Electronics Co. Ltd.
20140281341 - Multiple, per sensor configurable fifos in a single static random access memory (sram) structure: A device includes one or more sensors, one or more processors, one or more sensors, and a memory. The memory has a first portion, a second portion, and a third portion. The first portion is allocated to storing instructions for execution by the one or more processors. The second portion... Agent: Invensense, Inc.
20140281346 - Managing cpu resources for high availability micro-partitions: A partition manager relocates a logical partition from a primary shared processor pool to a secondary shared processor pool in response to a predetermined condition, such as a hardware failure. The relocated logical partition is allocated a smaller quantity of processing units from the secondary pool than it was allocated... Agent:
20140281347 - Managing cpu resources for high availability micro-partitions: Profile properties in a partition profile are user-configurable through a management entity such as a management console. A partition manager calculates a secondary processing unit entitlement for a logical partition based in part on a secondary processing unit mode property in the partition profile. The secondary processing unit entitlement may... Agent: International Business Machines Corporation
20140281348 - Managing cpu resources for high availability micro-partitions: A primary processing unit entitlement is determined for a logical partition. A smaller secondary processing unit entitlement is also determined. A partition manager allocates primary processing units to the logical partition from a primary shared processor pool, and the logical partition is activated. The secondary processing units are reserved for... Agent:
20140281349 - Receive-side scaling in a computer system: A system, method, and computer program product are provided for receiving an incoming data stream. The system comprises a multi-core processor with a memory unit that is configured to include a circular queue that receives a data stream. The circular queue is divided into a plurality of sub-queues determined as... Agent: Genband US LLC
20140281350 - Multi-layered storage administration for flexible placement of data: A storage administrator may maintain location information in separate layers. A data storage system may identify the location of particular data by identifying the virtual location of data, such as the logical extent to which the data belongs. Object stores may maintain mappings of virtual locations to physical locations, such... Agent: Bracket Computing, Inc.
20140281352 - Mechanism for facilitating dynamic and efficient management of translation buffer prefetching in software programs at computing systems: A mechanism is described for facilitating dynamic and efficient binary translation-based translation lookaside buffer prefetching according to one embodiment. A method of embodiments, as described herein, includes translating code blocks into code translation blocks at a computing device. The code translation blocks are submitted for execution. The method may further... Agent:
20140281351 - Stride-based translation lookaside buffer (tlb) prefetching with adaptive offset: A processing device implementing stride-based translation lookaside buffer (TLB) prefetching with adaptive offset is disclosed. A processing device of the disclosure includes a data prefetcher to generate a data prefetch address based on a linear address, a stride, or a prefetch distance, the data prefetch address associated with a data... Agent:
20140281360 - Apparatus and method for insertion and deletion in multi-dimensional to linear address space translation: A translation system can translate a storage request to a physical address using fields as keys to traverse a map of nodes with node entries. A node entry can include a link to a next node or a physical address. Using a portion of the key as noted in node... Agent: Skyera, Inc.
20140281359 - Apparatus and method for referencing dense and sparse information in multi-dimensional to linear address space translation: A translation system can translate a storage request having multiple fields to a physical address using the fields as keys to traverse a map. The map can be made of nodes that include one or more node entries. The node entries can be stored in a hashed storage area or... Agent: Skyera, Inc.
20140281357 - Common pointers in unified virtual memory system: A system for managing virtual memory. The system includes a first processing unit configured to execute a first operation that references a first virtual memory address. The system also includes a first memory management unit (MMU) associated with the first processing unit and configured to generate a first page fault... Agent: Nvidia Corporation
20140281354 - Continuous run-time integrity checking for virtual memory: A run-time integrity checking (RTIC) method compatible with memory having at least portions that store data that is changed over time or at least portions configured as virtual memory is provided. For example, the method may comprise storing a table of page entries and accessing the table of page entries... Agent:
20140281353 - Hardware-based pre-page walk virtual address transformation: An apparatus includes a processor and a virtual address transformation unit coupled with the processor. The virtual address transformation unit includes a register. The virtual address transformation unit is configured to receive an indication of a virtual address and read, from the register, a current page size of a plurality... Agent: International Business Machines Corporation
20140281362 - Memory allocation in a system using memory striping: A system and associated methods are disclosed for allocating memory in a system providing translation of virtual memory addresses to physical memory addresses in a parallel computing system using memory striping. One method comprises: receiving a request for memory allocation, identifying an available virtually-contiguous physically-non-contiguous memory region (VCPNCMR) of at... Agent: Cognitive Electronics, Inc.
20140281356 - Microcontroller for memory management unit: One embodiment of the present invention includes a microcontroller coupled to a memory management unit (MMU). The MMU is coupled to a page table included in a physical memory, and the microcontroller is configured to perform one or more virtual memory operations associated with the physical memory and the page... Agent: Nvidia Corporation
20140281358 - Migration scheme for unified virtual memory system: A system for managing virtual memory. The system includes a first processing unit configured to execute a first operation that references a first virtual memory address. The system also includes a first memory management unit (MMU) associated with the first processing unit and configured to generate a first page fault... Agent: Nvidia Corporation
20140281361 - Nonvolatile memory device and related deduplication method: A nonvolatile memory device comprises an interface configured to receive write data and a logical address of the write data, a data storage device comprising multiple physical blocks and configured to store an address mapping table array, and a controller configured to selectively load at least one address mapping table... Agent: Samsung Electronics Co., Ltd.
20140281355 - Virtual storage pool: Virtual storage pool creation is simplified by allowing a user to specify what devices to include in virtual storage pool by physical location. The virtual storage pool may be automatically generated based on the simplified user specifications. The user may specify the virtual pool configuration in a configuration file. A... Agent: Silicon Graphics International Corp.
20140281366 - Address translation in a system using memory striping: A system and associated methods are disclosed for translating virtual memory addresses to physical memory addresses in a parallel computing system using memory striping. One method comprises: receiving a virtual memory address, comparing a portion of the received virtual memory address to each of a plurality of entries of a... Agent: Cognitive Electronics, Inc.
20140281365 - Frame buffer access tracking via a sliding window in a unified virtual memory system: One embodiment of the present invention is a memory subsystem that includes a sliding window tracker that tracks memory accesses associated with a sliding window of memory page groups. When the sliding window tracker detects an access operation associated with a memory page group within the sliding window, the sliding... Agent: Nvidia Corporation
20140281364 - Microcontroller for memory management unit: One embodiment of the present invention includes a microcontroller coupled to a memory management unit (MMU). The MMU is coupled to a page table included in a physical memory, and the microcontroller is configured to perform one or more virtual memory operations associated with the physical memory and the page... Agent: Nvidia Corporation
20140281363 - Multi-threaded memory management: Memory management includes maintaining a first mapping structure for each thread of a multi-threaded process. A second mapping structure is maintained for each core of a multi-core processing device. A global mapping structure for shared memory mappings is maintained. During thread context switches, copying thread context entries without modifying a... Agent:
20140281367 - Address calculation for received data: A method of address generation and corresponding index generator for one or more locations in a buffer with received data, determining an offset address for a specific data element in the buffer; calculating a correction factor in parallel with the determining an offset address; and providing an address for the... Agent:Previous industry: Electrical computers and digital data processing systems: input/output
Next industry: Electrical computers and digital processing systems: processing architectures and instruction processing (e.g., processors)
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