Electrical computers and digital processing systems: memory inventions

20090276559 - Arrangements for operating in-line memory module configurations: In one embodiment, a method is disclosed for timing responses to a plurality of memory requests. The method can include sending a plurality of memory requests to a plurality of in-line memory modules. The requests can be sent over a channel from a plurality of channels, where each channel can... Agent: Ibm Corporation (rtp) C/o Schubert Osterrieder & Nickelson PLLC

20090276560 - Copyback optimization for memory system: In a copyback or read operation for a non-volatile memory subsystem, data page change indicators are used to manage transfers of data pages between a register in non-volatile memory and a controller that is external to the non-volatile memory.... Agent: Fish & Richardson P.C.

20090276562 - Flash cache flushing method and system: A flash memory system that uses repeated writing of the data to achieve stable storage, is adapted for efficient cache flushing operations by utilizing a part of the non-volatile flash memory array as a designated buffer for the data, in which data integrity is retained until all repeat writing thereof... Agent: Martin Moynihan Prtsi, Inc.

20090276561 - Spi nand protected mode entry methodology: One or more techniques are provided for restricting access to protected modes of operation in a memory device. In one embodiment, detection circuitry is provided and configured to receive and evaluate a protected mode entry sequence for accessing a protected mode of operation. The detection circuitry may be further configured... Agent: Fletcher Yoder (micron Technology, Inc.)

20090276563 - Incremental state updates: A system and method are described that manage incremental state updates in such a way that multiple threads within a processor can each operate, in effect, on their own set of state data. The system and method are applicable to any processor in which multiple threads require access to sets... Agent: Courtney Staniford & Gregory LLP

20090276564 - Systematic memory shift for pre-segmented memory: A method of extending the life of a segmented memory device, consistent with certain embodiments involves providing a segmented memory device having a plurality of user defined segments with each segment having a starting and an ending address, and wherein the size and number of the segments is user defined;... Agent: Miller Patent Services

20090276565 - Storage control apparatus, data management system and data management method: A storage control apparatus according to the present invention includes a plurality of connecting units connected to one or more host computers and one or more hard disk drives as storage media for storing data, one or more non-volatile storage media which are of a different type from the hard... Agent: Brundidge & Stanger, P.C.

20090276569 - Apparatus and method for reallocating logical to physical disk devices using a storage controller with access frequency and sequential access ratio calculations and display: A storage controller calculates an access frequency of each logical disk; that is selects a first logical disk device of which the access frequency exceeds a first predetermined value, the first logical disk device being allocated to a first physical disk device; selects a second logical disk device which has... Agent: Mattingly & Malur, P.C.

20090276567 - Compensating for write speed differences between mirroring storage devices by striping: A method and system for data storage provides a digital fast-write storage device, a plurality of digital slow-write storage devices, and a controller. The digital fast-write storage device might be a solid state drive. The digital slow-write storage devices might be conventional rotational media drives. Typically, read operations are directed... Agent: Beck And Tysver P.l.l.c.

20090276566 - Creating logical disk drives for raid subsystems: A computer storage system includes multiple disk trays, each disk tray holding two or more physical disks. The disks on a single tray are virtualized into a single logical disk. The single logical disk reports to the RAID (redundant array of inexpensive disks) subsystem, creating the impression that there is... Agent: Perkins Coie LLP

20090276568 - Storage system, data processing method and storage apparatus: Proposed are a storage system, data processing method and storage apparatus capable of performing stable data I/O processing. Each of the storage apparatuses configured in the storage group stores group configuration information containing priority information given to each storage apparatus, and the storage apparatus with the highest priority becomes a... Agent: Juan Carlos A. Marquez C/o Stites & Harbison PLLC

20090276570 - Guaranteed memory card performance to end-of-life: In order to maintain a memory system's performance levels to its end-of-life, latency threshold level(s) are specified and associated with different memory system operating parameters. In one embodiment, the memory system monitors and gathers performance statistics in real time, and in accordance with specific memory transfer sizes. A current latency... Agent: Weaver Austin Villeneuve Sampson LLP

20090276574 - Arithmetic device, arithmetic method, hard disc controller, hard disc device, program converter, and compiler: This arithmetic device includes: a first memory to store a first program; a first arithmetic module to read the first program from the first memory to execute the first program; a second memory to store a second program which is embedded in processing of the first program and called from... Agent: Knobbe Martens Olson & Bear LLP

20090276571 - Enhanced direct memory access: A method for facilitating direct memory access in a computing system in response to a request to transfer data is provided. The method comprises selecting a thread for transferring the data, wherein the thread executes on a processing core within the computing system; providing the thread with the request, wherein... Agent: CenturyIPGroup, Inc. [ibm Il] C/o IBM Corporation, T.j. Watson Research Center

20090276575 - Information processing apparatus and compiling method: According to one embodiment, an information processing apparatus includes a processor, a cache, and a cache controller. The processor is configured to output a memory access request for accessing an entity of a variable stored in a variable-storage region provided in a memory by using first or second memory address.... Agent: Knobbe Martens Olson & Bear LLP

20090276572 - Memory management among levels of cache in a memory hierarchy: Methods, apparatus, and product for memory management among levels of cache in a memory hierarchy in a computer with a processor operatively coupled through two or more levels of cache to a main random access memory, caches closer to the processor in the hierarchy characterized as higher in the hierarchy,... Agent: Ibm (roc-blf)

20090276573 - Transient transactional cache: In one embodiment, a processor comprises an execution core, a level 1 (L1) data cache coupled to the execution core and configured to store data, and a transient/transactional cache (TTC) coupled to the execution core. The execution core is configured to generate memory read and write operations responsive to instruction... Agent: Meyertons, Hood, Kivlin, Kowert & Goetzel (amd)

20090276576 - Methods and apparatus storing expanded width instructions in a vliw memory for deferred execution: Techniques are described for decoupling fetching of an instruction stored in a main program memory from earliest execution of the instruction. An indirect execution method and program instructions to support such execution arc addressed. In addition, an improved indirect deferred execution processor (DXP) VLIW architecture is described which supports a... Agent: Peter H. Priest

20090276577 - Adaptive caching for high volume extract transform load process: A method, system, and medium related to a mechanism to cache key-value pairs of a lookup process during an extract transform load process of a manufacturing execution system. The method includes preloading a cache with a subset of a set of key-value pairs stored in source data; receiving a request... Agent: Siemens Corporation Intellectual Property Department

20090276578 - Cache coherency protocol in a data processing system: A data processing system includes a first master having a cache, a second master, a memory operably coupled to the first master and the second master via a system interconnect. The cache includes a cache controller which implements a set of cache coherency states for data units of the cache.... Agent: Freescale Semiconductor, Inc. Law Department

20090276579 - Cache coherency protocol in a data processing system: A method includes detecting a bus transaction on a system interconnect of a data processing system having at least two masters; determining whether the bus transaction is one of a first type of bus transaction or a second type of bus transaction, where the determining is based upon a burst... Agent: Freescale Semiconductor, Inc. Law Department

20090276581 - Method, system and apparatus for reducing memory traffic in a distributed memory system: The present disclosure provides a method for reducing memory traffic in a distributed memory system. The method may include storing a presence vector in a directory of a memory slice, said presence vector indicating whether a line in local memory has been cached. The method may further include protecting said... Agent: Grossman, Tucker, Perreault & Pfleger, PLLC C/o Cpa Global

20090276580 - Snoop request management in a data processing system: In a data processing system, a method includes a first master initiating a transaction via a system interconnect to a target device. After initiating the transaction, a snoop request corresponding to the transaction is provided to a cache of a second master. The transaction is completed. After completing the transaction,... Agent: Freescale Semiconductor, Inc. Law Department

20090276582 - External memory controller node: A memory controller to provide memory access services in an adaptive computing engine is provided. The controller comprises: a network interface configured to receive a memory request from a programmable network; and a memory interface configured to access a memory to fulfill the memory request from the programmable network, wherein... Agent: Nixon Peabody, LLP

20090276583 - External memory controller node: A memory controller to provide memory access services in an adaptive computing engine is provided. The controller comprises: a network interface configured to receive a memory request from a programmable network; and a memory interface configured to access a memory to fulfill the memory request from the programmable network, wherein... Agent: Nixon Peabody, LLP

20090276584 - External memory controller node: A memory controller to provide memory access services in an adaptive computing engine is provided. The controller comprises: a network interface configured to receive a memory request from a programmable network; and a memory interface configured to access a memory to fulfill the memory request from the programmable network, wherein... Agent: Nixon Peabody, LLP

20090276585 - Information processing device having securing function: An access information storage section (106) stores access information in which an effective area, used for determining whether access to a portion of or all of data stored in a data storage section (107) is permitted/not permitted, is defined. A position information acquisition section (101) acquires position information about the... Agent: Wenderoth, Lind & Ponack L.L.P.

20090276586 - Wrap-around sequence numbers for recovering from power-fall in non-volatile memory: Incrementing sequence numbers in the metadata of non-volatile memory is used in the event of a resume from power fail to determine which data in the memory is current and valid, and which data is not. To reduce the amount of metadata space consumed by these sequence numbers, the numbers... Agent: John F. Travis Intel Corporation

20090276587 - Selectively performing a single cycle write operation with ecc in a data processing system: A circuit includes a memory having error correction, circuitry which initiates a write operation to memory. When error correction is enabled and the write operation to the memory has the width of N bits, the write operation to the memory is performed in one access to the memory, and when... Agent: Freescale Semiconductor, Inc. Law Department

20090276588 - Free space utilization in tiered storage systems: Embodiments of the invention include first storage mediums having first storage characteristics for making up a first pool of capacity of a first tier of storage, and second storage mediums having second storage characteristics for making up a second pool of capacity of a second tier of storage. Free capacity... Agent: Mattingly & Malur, P.C.

20090276592 - Backup copy enhancements to reduce primary version access: A method, system, and computer program product for performing a backup operation in a computing environment is provided. A dataset corresponding to a backup copy is examined to determine if the dataset has changed from a previous backup operation. If the dataset has not changed, a backup inventory registry is... Agent: Griffiths & Seaton PLLC (ibm)

20090276593 - Data storage systems, methods and networks having a snapshot efficient block map: A data storage system includes a storage device divided into a plurality of blocks for storing data for a plurality of volumes, and a processor to execute instructions for maintaining a block map corresponding to the data stored on the storage device. The storage system may be part of a... Agent: Morgan Lewis & Bockius LLP

20090276591 - Extensible application backup system and method: An archive method and system receives a backup request for a target dataset used by an application on a primary storage system to be backed up on a secondary storage system. Different applications may each have a corresponding proprietary application format for storing their datasets. An application translator module is... Agent: Wiesner & Associates

20090276590 - Maintaining checkpoints during backup of live system: Techniques introduced here support block level transmission of a logical container from a network storage controller to a backup system. In accordance with the techniques, transmission can be restarted using checkpoints created at the block level by allowing restarts from various points within a logical container, for example a point... Agent: Perkins Coie LLP

20090276589 - Method and apparatus for data download from a mobile vehicle: A method and apparatus are provided for autonomous data download. The method includes the steps of navigating an autonomous data download device to a first data storage device located in a mobile vehicle and parking the autonomous data download device adjacent to the first data storage device. The method further... Agent: Honeywell International Inc. Patent Services

20090276594 - Storage system: Provided is a storage system capable of simply and promptly changing the operation of a storage subsystem as a stand-alone system and the operation of a storage subsystem as a virtual storage system. This storage system is able to set a first mode that operates as a stand-alone system and... Agent: Juan Carlos A. Marquez C/o Stites & Harbison PLLC

20090276595 - Providing a single drive letter user experience and regional based access control with respect to a storage device: A method and a storage device may be provided. The storage device may include physical storage subdivided into a number of regions. The regions may start and end based on logical block addresses specified in a region table. At least one of the regions may be mapped to a logical... Agent: Microsoft Corporation

20090276596 - Retention of active data stored in memory using multiple indexing systems for data storage: A method and apparatus for retention of active data stored in memory using multiple indexing systems for data storage. An embodiment of a method for retention of active data in a storage server includes reading data into a first location of a main memory of the storage server. The data... Agent: Network Appliance/bstz Blakely Sokoloff Taylor & Zafman LLP

20090276597 - Memory controller-adaptive 1t/2t timing control: Circuits, methods, and apparatus that adaptively control 1T and 2T timing for a memory controller interface. An embodiment of the present invention provides a first memory interface as well as an additional memory interface, each having a number of address and control lines. The address and control lines of the... Agent: Townsend And Townsend And Crew LLP

20090276599 - Configurable transactional memory for synchronizing transactions: A configurable transactional memory synchronizes transactions from clients. The configurable transactional memory includes a memory buffer and a transactional buffer. The memory buffer includes allocation control and storage, and the allocation control is configurable to selectively allocate the storage between a transactional buffer and a data buffer for the data... Agent: Xilinx, Inc Attn: Legal Department

20090276600 - Method and apparatus for determining memory usage for a computing device: One embodiment of the present invention provides a system that determines memory usage for a computing device. Within the computing device, an operating system manages memory allocation, and speculatively allocates otherwise-unused memory in an attempt to improve performance. During operation, the system receives a request to estimate the memory usage... Agent: Pvf -- Oracle International Corporation C/o Park, Vaughan & Fleming LLP

20090276598 - Method and system for capacity-balancing cells of a storage system: A plurality of cells forming at least a portion of a hive of a data storage system may be capacity balanced by fragmenting a portion of at least one non-empty tile of one of the plurality of cells and moving the fragmented portion to another one of the plurality of... Agent: Brooks Kushman P.C. / Sun / Stk

20090276601 - Virtual memory mapping for efficient memory usage: A processor (e.g. utilizing an operating system and/or circuitry) may access physical memory by paging, where a page is the smallest partition of memory mapped by the processor from a virtual address to a physical address. An application program executing on the processor addresses a virtual address space so that... Agent: Townsend And Townsend And Crew, LLP

20090276602 - Memory management system for reducing memory fragmentation: A memory management system for a process formulated in the C/C++ language in a processing unit includes an allocator which processes memory blocks of predetermined size, for example 64 Kb. Large objects are defined as being objects having a size of between 256 and 64 Kb. For such objects, 64... Agent: Greer, Burns & Crain

20090276603 - Techniques for efficient dataloads into partitioned tables: Techniques for efficiently loading data into a partition of a partitioned table of a database are provided. Data is stored in a swap table and the high water mark of the swap table has been reset prior to storing the data. The swap table is swapped with the partition. After... Agent: Townsend And Townsend And Crew LLP

20090276604 - Assigning memory for address types: Various example implementations are disclosed. According to one example, an integrated circuit may include a key extractor, a translation table block, and a memory assigner. The key extractor may be configured to receive data, extract key-related information from the data, and send the key-related information to a first memory device.... Agent: Brake Hughes Bellermann LLP C/o Cpa Global

20090276605 - Retaining an association between a virtual address based buffer and a user space application that owns the buffer: Registering memory space for an application is performed. One or more open calls are received from an application to access one or more input/output (I/O) devices. Responsive to receiving the one or more open calls, one or more I/O map and pin calls are sent in order to register memory... Agent: Ibm Corp. (wip) C/o Walder Intellectual Property Law, P.C.

20090271560 - Dynamic fix-up of global variables during system bios execution: A method is described for preserving the flexibility associated with relative memory addressing in programs designed to be stored in read-only memory.... Agent: Courtney Staniford & Gregory LLP

20090271568 - Flash memory system and data writing method thereof: Provided are a flash memory system and a data reading method thereof, the method including serially reading groups of data and parity codes corresponding to each of the respective groups from a page buffer; calculating the parity for each serially read group; checking for errors in each serially read group... Agent: F. Chau & Associates, LLC

20090271563 - Flash memory transactioning: Providing for improved transactioning for Flash memory is described herein. By way of example, transactioning operations associated with abstract data structures can be bundled into a common layer of a Flash management protocol stack, to reduce transaction redundancy at abstracted layers. In some aspects, the common layer can be a... Agent: Lee & Hayes, PLLC

20090271561 - Medium for integrating storing capacities of multiple storage devices: A medium for integrating storing capacities of multiple storage devices has multiple memory card connectors, a memory card interface management module, a control module and a communication interface. Each memory card connector is used to connect to a memory card. The memory card interface management module is connected to the... Agent: Rabin & Berdo, P.C.

20090271562 - Method and system for storage address re-mapping for a multi-bank memory device: A method and system for storage address re-mapping in a multi-bank memory is disclosed. The method includes allocating logical addresses in blocks of clusters and re-mapping logical addresses into storage address space, where short runs of host data dispersed in logical address space are mapped in a contiguous manner into... Agent: Brinks Hofer Gilson & Lione/sandisk

20090271566 - Method for configuring or re-configuring programmable device and apparatus associated therewith: A method of configuring a programmable device may include connecting an electronic storage medium to a configuration system with user-friendly input/output capabilities to establish configuration information for the programmable device, which may have limited input/output capabilities. The configuration information may be applied to the programmable device when the electronic storage... Agent: Calfee Halter & Griswold, LLP

20090271559 - Method for storing individual data items of a low-voltage switch: A method is disclosed for storing individual data items of a low-voltage switch provided with a microcontroller triggering unit. According to an embodiment, the ROM cells of a dead microcontroller ROM which are not occupied by a program code memory cells are occupied by the individual data items of the... Agent: Harness, Dickey & Pierce, P.L.C

20090271565 - Method of processing hard disk drive: A method of processing a hard disk drive. The method can include downloading at least two process codes and a main code to a first storage area of the hard disk drive, sequentially performing processes based on the at least two process codes, and installing the main code in a... Agent: Stanzione & Kim, LLP

20090271567 - Methods for managing blocks in flash memories: A method for managing blocks in a flash memory is provided, which includes dynamic and static block managing methods. In the dynamic block managing method, a blank block is selected as a swap block for write operation. During each write operation, new data and/or original data in an object block... Agent: Seed Intellectual Property Law Group PLLC

20090271564 - Storage system: A storage system has a storage controller and a flash memory module that is coupled to the storage controller. The storage controller manages the status of a storage area in a flash memory chip of the flash memory module. When a portion of the storage area in the flash memory... Agent: Sughrue Mion, PLLC

20090271569 - Partitioned management data cache: A system and method for decreasing system management data access time. A system includes a device, a cache memory coupled to the device, and a cache memory refresh controller. The device provides system management information. The cache memory stores system management information. The system management information stored in the cache... Agent: Hewlett-packard Company Intellectual Property Administration

20090271570 - Content-addressable memory lookup operations with error detection: Disclosed are, inter alia, methods, apparatus, computer-storage media, mechanisms, and means associated with content-addressable memory lookup operations with error detection. Lookup operations are performed on two identical sets of content-addressable memory entries to identify two lookup results. An error detection operation is performed on the highest-priority matching entry of each... Agent: The Law Office Of Kirk D. Williams

20090271571 - Storage server: A storage server includes a plurality of first disk drives (110) and a plurality of second disk drives (210). Each first disk drive is of a same type. The first disk drives are connected in series. Each second disk drive is of a same type different from each first disk... Agent: PCe Industry, Inc. Att. Steven Reiss

20090271572 - Dynamically re-classifying data in a shared cache: In one embodiment, the present invention includes a method for determining if a state of data is indicative of a first class of data, re-classifying the data from a second class to the first class based on the determination, and moving the data to a first portion of a shared... Agent: Trop, Pruner & Hu, P.C.

20090271573 - Partitioned management data cache: A system and method for decreasing system management data access time. A system includes a device, a cache memory coupled to the device, and a cache memory refresh controller. The device provides system management information. The cache memory stores system management information. The system management information stored in the cache... Agent: Hewlett-packard Company Intellectual Property Administration

20090271575 - Cache memory, system, and method of storing data: A cache memory according to the present invention is a cache memory that has a set associative scheme and includes: a plurality of ways, each way being made up of entries, each entry holding data and a tag; a first holding unit operable to hold, for each way, a priority... Agent: Wenderoth, Lind & Ponack L.L.P.

20090271574 - Method for improving frequency-based caching algorithms by maintaining a stable history of evicted items: The invention provides a method for improving frequency-based caching algorithms by maintaining a stable history of evicted items. One embodiment involves a process for caching data in a cache memory including logical pages including, upon detecting that a first page is being evicted from the cache memory, performing an addition... Agent: Kenneth L. Sherman, Esq. C/o Myers Dawes Andras & Sherman, LLP

20090271576 - Data processor: There is a need for providing a data processor capable of easily prefetching data from a wide range. A central processing unit is capable of performing a specified instruction that adds an offset to a value of a register to generate an effective address for data. This register can be... Agent: Miles & Stockbridge PC

20090271577 - Peer-to-peer network content object information caching: In a peer-to-peer network system, a local node communicates with a remote node on which detailed information about content objects resides and optionally, the content objects reside. The local node uses caching, message request resizing and predictive message requesting to speed response time to user requests and internal control node... Agent: Stolowitz Ford Cowger LLP

20090271578 - Reducing memory fetch latency using next fetch hint: In one aspect, a processor is provided. The processor may include logic, coupled to the processor, and to issue a currently issued memory fetch over a processor bus. The currently issued memory fetch may include a next fetch hint that may include information about a next memory fetch.... Agent: Ibm Corporation Intellectual Property Law Dept. 917

20090271579 - Storage subsystem and storage system: Provided is a storage subsystem that can reflect, when merging storage update information and local update information, those two kinds of update information in relevant volumes without overlapping the storage update information and the local update information. When reflecting update information in a storage subsystem 10 and update information in... Agent: Juan Carlos A. Marquez C/o Stites & Harbison PLLC

20090271580 - Information processing apparatus for managing history of electronic information: An electronic information format includes a header module and a history module in addition to source electronic information. A control program is incorporated in the header module, and the control program is expanded on a reception side. An operation on the electronic information on the reception side is recorded by... Agent: Christensen, O'connor, Johnson, Kindness, PLLC

20090271582 - Information system and i/o processing method: First and second storage apparatuses respectively and internally set a remote copy pair for copying data of a first volume to a second volume and associate a third volume with a remote copy pair according to an external command. When an I/O request to the first volume ends in an... Agent: Antonelli, Terry, Stout & Kraus, LLP

20090271581 - Systems and methods for reliably managing files in a computer system: Systems and methods allow for reliably and efficiently managing files stored on a data storage medium associated with a computer system such as a set-top box. The computer system manages a collection of metadata describing each of the files stored on the data storage medium in a memory during operation... Agent: Ingrassia Fisher & Lorenz, P.C. (es)

20090271587 - Content control systems and methods: What is disclosed is a control system which includes an interface configured to receive a content request from a request source wherein the content request identifies content stored on a storage medium. The control system also includes a processing system coupled to the interface and configured to process the content... Agent: The Ollila Law Group LLC

20090271584 - Controller of storage device, storage device, and control method of storage device: A controller of a storage device having a user area storing an operating system, the storage device developing the operating system stored in the user area on a host device in accordance with an access from the host device. The controller includes a user authentication routine storage controlling unit that... Agent: Greer, Burns & Crain

20090271585 - Data accessing system and related storage device: A data accessing system includes a host computer and a storage device. The host computer has a first media access control (MAC) address, and the storage device includes a first storage region, a second storage region, and a controller. The first storage region is utilized for storing data. The second... Agent: North America Intellectual Property Corporation

20090271586 - Method and system for providing restricted access to a storage medium: A method of restricting file access is disclosed wherein a set of file write access commands are determined from data stored within a storage medium. The set of file write access commands are for the entire storage medium. Any matching file write access command provided to the file system for... Agent: Venable LLP

20090271583 - Monitoring transactions in a data processing apparatus: Apparatus for processing data is provided comprising processing circuitry and monitoring circuitry for monitoring write transactions and performing transaction authorisations of certain transactions in dependence upon associated memory addresses. The processing circuitry is configured to enable execution of a write instruction corresponding to a write transaction to be monitored to... Agent: Nixon & Vanderhye P.C.

20090271588 - Migrating program objects in a multi-node computer system: Embodiments of the invention enable application programs running across multiple compute nodes of a highly-parallel system to selectively migrate objects from one node to another. For example, when an object becomes too large, a node containing the object may migrate the object to another node, thereby freeing memory space. Whether... Agent: Ibm Corporation, Intellectual Property Law Dept 917, Bldg. 006-1

20090271589 - Storage virtualization system: Storage virtualization systems and methods that allow customers to manage storage as a utility rather than as islands of storage which are independent of each other. A demand mapped virtual disk image of up to an arbitrarily large size is presented to a host system. The virtualization system allocates physical... Agent: Bainwood Huang And Associates LLC

20090271590 - Method and system for latency optimized ats usage: Methods and systems for latency optimized ATS usage are disclosed. Aspects of one method may include communicating a memory access request using an untranslated address and also an address translation request using the same untranslated address, where the translation request may be sent without waiting for a result of the... Agent: Mcandrews Held & Malloy, Ltd

20090265504 - Memory, computing system and method for checkpointing: Embodiments of the present invention provide local checkpoint memories that are closely coupled to the processor of a computing system used during normal operation. The checkpoint memory may be coupled to the processor through a peripheral bus or a memory bus. The checkpoint memory may be located on a same... Agent: Jennifer M. Lane, Esq. Dorsey & Whitney LLP

20090265503 - Non-volatile memory apparatus and method for accessing a non-volatile memory apparatus: A non-volatile memory apparatus and a method for accessing the non-volatile memory apparatus are provided. The non-volatile memory apparatus comprises a management unit, a look-up table and a controller. The management unit comprises a plurality of data blocks and a plurality of spare blocks. The look-up table is adapted to... Agent: Grossman, Tucker, Perreault & Pfleger, PLLC

20090265505 - Data writing method, and flash storage system and controller using the same: A data writing method, and a flash storage system and a controller using the same are provided. The method includes grouping the physical blocks of a flash memory into the physical blocks of a data area, a spare area and a special area. The method also includes writing the update... Agent: J C Patents

20090265508 - Scheduling of housekeeping operations in flash memory systems: A re-programmable non-volatile memory system, such as a flash EEPROM system, having its memory cells grouped into blocks of cells that are simultaneously erasable is operated to perform memory system housekeeping operations in the foreground during execution of a host command, wherein the housekeeping operations are unrelated to execution of... Agent: Davis Wright Tremaine LLP - Sandisk Corporation

20090265506 - Storage device: A computing system and a storage device are provided. A computing system includes a first storage media, a second storage media having an input/output speed slower than that of the first storage media, and a hybrid file system management unit to manage a first physical file system and second physical... Agent: Mcneely Bodendorf LLP

20090265507 - System to reduce drive overhead using a mirrored cache volume in a storage array: A system comprising a host, a solid state device, and an abstract layer. The host may be configured to generate a plurality of input/output (IO) requests. The solid state device may comprise a write cache region and a read cache region. The read cache region may be a mirror of... Agent: Christopher P Maiorana, PC Lsi Corporation

20090265509 - Memory system and method having volatile and non-volatile memory devices at same hierarchical level: A processor-based system includes a processor coupled to core logic through a processor bus. This includes a dynamic random access memory (“DRAM”) memory buffer controller. The DRAM memory buffer controller is coupled through a memory bus to a plurality of a dynamic random access memory (“DRAM”) modules and a flash... Agent: Dorsey & Whitney LLP Intellectual Property Department

20090265511 - Storage system, computer system and a method of establishing volume attribute: In order to store data in disk drives securely in an environment with a mixture of disk drives having write protection mechanisms and disk drives without write protection mechanisms, a different write protection mechanism must be checked for each of the disk drives, and write protection must be defined for... Agent: Townsend And Townsend And Crew, LLP

20090265510 - Systems and methods for distributing hot spare disks in storage arrays: In one embodiment, a system may include a storage array and a controller. The storage array may include a plurality of storage resources, where each storage resource of the plurality of storage resources may include plurality of active storage drives and a plurality of hot spare drives. The controller, coupled... Agent: Baker Botts, LLP

20090265512 - Methods and apparatus for efficiently sharing memory and processing in a multi-processor: A shared memory network for communicating between processors using store and load instructions is described. A new processor architecture which may be used with the shared memory network is also described that uses arithmetic/logic instructions that do not specify any source operand addresses or target operand addresses. The source operands... Agent: Gerald G. Pechanek

20090265513 - Solid state disk controller apparatus: A solid state disk controller apparatus comprises a first port; a second port having a plurality of channels; a central processing unit connected to a CPU bus; a buffer memory configured to store data to be transferred from the second port to the first port and from the first port... Agent: Marger Johnson & Mccollom, P.C.

20090265514 - Efficiency of cache memory operations: A processing system 1 including a memory 10 and a cache memory 4 is provided with a page status unit 40 for providing a cache controller with a page open indication indicating one or more open pages of data values in memory. At least one of one or more cache... Agent: Nixon & Vanderhye P.C.

20090265515 - Information processing apparatus, information processing method, and computer program: An information processing apparatus having a multi-processor unit including a plurality of processors. The multi-processor unit includes: a main-processor element including a main processor; and at least one sub-processor element having a sub-processor, a local memory corresponding to each of the processors, and a memory flow controller (MFC) executing data... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20090265516 - Method and system for managing inactive snapshot blocks: Method and system are provided for managing inactive snapshot blocks. Information regarding inactive blocks is collected and placed in a queue. After the queue reaches a threshold number of inactive blocks, the inactive blocks are compressed and stored as a compressed segment. The compressed segment may include inactive blocks for... Agent: Klein, O'neill & Singh, LLP

20090265517 - Scattered storage: Methods and apparatus are described in which data, which is required by system software in a self-service terminal, is stored across a number of persistent storage elements. The persistent storage elements are located in peripheral devices within the self-service terminal. When the data is lost from volatile memory in the... Agent: Michael Chan Ncr Corporation

20090265518 - Dynamic volume compare for asynchronous remote copy verification: A method, device, and computer program product for performing asynchronous remote copy verification is provided. An initial track-to-track comparison between a primary and a secondary volume pair is performed. Differences between primary and secondary volume tracks are recorded as noncompare tracks. A first predetermined time is waited for. A subsequent... Agent: Griffiths & Seaton PLLC (ibm)

20090265520 - Method and apparatus for backing up data: A method and apparatus for backing up data in the source LUN is disclosed. The method for backing up the data in a source Logic Unit Number (LUN), includes: copying the data which needs to be modified in the source LUN to a resource pool; monitoring the resource utilization amount... Agent: Brinks Hofer Gilson & Lione

20090265519 - Method and system for power aware i/o scheduling: A method for retrieving a logical block, including receiving a request to read the logical block, and obtaining metadata associated with the logical block, wherein the metadata includes a replication type used to store the logical block and physical block locations in a storage pool for each physical block associated... Agent: Osha Liang L.L.P./sun

20090265522 - Arrangements changing an operation authority responsive to attribute changes: A computer system including a copy source volume and a copy target volume which may be selectably PAIRED or SPLIT. User management information stores: an entry indicating that a first user is permitted to effect a PAIR operation and a PATH operation; and, an entry indicating that a second user... Agent: Antonelli, Terry, Stout & Kraus, LLP

20090265521 - Pattern protection method and circuit: The present invention discloses an address protection method and circuit capable of efficiently protecting inputting addresses from corruption. The predictable order of a series of original addresses is checked and then the correct addresses are generated by correcting the corrupted addresses within the original addresses. The address protection method and... Agent: Kirton And Mcconkie

20090265523 - Method and apparatus for shuffling data: Method, apparatus, and program means for shuffling data. The method of one embodiment comprises receiving a first operand having a set of L data elements and a second operand having a set of L control elements. For each control element, data from a first operand data element designated by the... Agent: Intel/bstz Blakely Sokoloff Taylor & Zafman LLP

20090265525 - Determining memory upgrade options: A method to determine memory/upgrade options retrieves memory configuration data from a non-volatile storage element associated with system memory modules, determine the total memory capacity of the computer system, determines a residual memory capacity based on the prior obtained information, and presents the user with a series of options to... Agent: Fletcher Yoder (micron Technology, Inc.)

20090265524 - Method and apparatus for arranging multiple processors on a semiconductor chip: A method and apparatus for connecting multiple cores to form a multi core processor. Each processor is connected to at least two other processors, each of which is a mirror image of the first processor. The processors are connected to form a two dimensional matrix connected by one drop busses.... Agent: Henneman & Associates, PLC

20090265526 - Memory allocation and access method and device using the same: A memory allocation method for a direct memory access controller (DMAC) in a limited-memory-size computer system includes the steps of allocating a memory space having continuous memory addresses to form a buffer of the DMAC; dividing the memory space successively into a plurality of first memory blocks and a second... Agent: North America Intellectual Property Corporation