|Electrical computers and digital processing systems: memory patents - Monitor Patents|
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Electrical computers and digital processing systems: memoryBelow are recently published patent applications awaiting approval from the USPTO. Recent week's RSS XML file available below.
Listing for abstract view: USPTO application #, Title, Abstract excerpt,Patent Agent. Listing format for list view: USPTO National Class full category number, title of the patent application. 07/10/2014 > 60 patent applications in 28 patent subcategories.
20140195715 - Scalable memory system: A memory system architecture has serially connected memory devices. The memory system is scalable to include any number of memory devices without any performance degradation or complex redesign. Each memory device has a serial input/output interface for communicating between other memory devices and a memory controller. The memory controller issues... Agent: Mosaid Technologies Incorporated
20140195716 - Method and apparatus for dynamically allocating memory address space between physical memories: A memory address space for each of a plurality of physical memories in a microprocessor-based system is allocated prior to knowing the desired logical size of at least one of the physical memories. At least two of the allocated memory address spaces overlap at least a portion of each other.... Agent: Avnera Corporation
20140195717 - Write once read many media methods: A method for providing for write once read many (WORM) times from at least some addresses of a storage drive that is otherwise manufactured for multiple writes to individual addresses. In at least one embodiment, a WORM area(s) is defined by a START_LBA and an END_LBA and the method uses... Agent: Greentec-usa, Inc.
20140195727 - Apparatus and method for generating descriptors to reaccess a non-volatile semiconductor memory of a storage drive due to an error: A storage drive including a first module and a second module. The first module is configured to, based on an instruction signal of a first descriptor, transfer a block of data to or from a non-volatile semiconductor memory in the storage drive. The second module is configured to: monitor a... Agent:
20140195724 - Apparatus and method of converting address and data of memory in a terminal: An apparatus and method of converting an address and data of a memory in a terminal. The apparatus includes a random key generator configured to generate a new random key, each time the terminal is powered on, an address mapper configured to convert an address of a memory area for... Agent: Samsung Electronics Co., Ltd
20140195718 - Control logic design to support usb cache offload: A redundant array of independent drives controller and board controlled cache off-loading during a power failure is described. Methods associated with the use of the redundant array of independent drives controller and board for controlled cache off-loading during a power failure are also described.... Agent: Lsi Corporation
20140195726 - Controller, data storage device and data storage system having the controller, and data processing method: A controller, a data storage device and a data storage system including the controller, and a data processing method are provided. The controller may process a plurality of instructions in parallel by including a plurality of address translation central processing units (CPUs) in a multi-channel parallel array structure, thereby improving... Agent:
20140195720 - High-performance indexing for data-intensive systems: Aspects of the present invention provide high-performance indexing for data-intensive systems in which “slicing” is used to organize indexing data on an SSD such that related entries are located together. Slicing enables combining multiple reads into a single “slice read” of related items, offering high read performance. Small in-memory indexes,... Agent: Wisconsin Alumni Research Foundation
20140195719 - Instantaneous save/restore of virtual machines with persistent memory: A computer implemented method creates a snapshot of a logical volume of a computer. The computer stores a system state of the computer in persistent memory. The computer flushes a cash of the computer. The computer identifies a preceding snapshot. Responsive to identifying the preceding snapshot, the computer hardens changes... Agent: International Business Machines Corporation
20140195721 - Instantaneous save/restore of virtual machines with persistent memory: A computer implemented method creates a snapshot of a logical volume of a computer. The computer stores a system state of the computer in persistent memory. The computer flushes a cash of the computer. The computer identifies a preceding snapshot. Responsive to identifying the preceding snapshot, the computer hardens changes... Agent: International Business Machines Corporation
20140195725 - Method and system for data storage: A system and method of storing data in a semiconductor-type non-volatile memory is described, where a physical storage address of data is made available to a user application such as a file system and where characteristics of the memory system that may be allocated on a physical or a logical... Agent:
20140195723 - Non-volatile configuration for serial non-volatile memory: Example embodiments for configuring a serial non-volatile memory device may comprise a non-volatile configuration register to store a configuration value received from the processor, the configuration value to specify one or more attributes of a memory access operation. The configuration value may be read at least in part in response... Agent: Micron Technology, Inc.
20140195722 - Storage system which realizes asynchronous remote copy using cache memory composed of flash memory, and control method thereof: The first storage apparatus provides a primary logical volume, and the second storage apparatus has a secondary logical volume. When the first storage apparatus receives a write command to the primary logical volume, a package processor in a flash package allocates first physical area in the flash memory chip to... Agent: Hitachi, Ltd.
20140195728 - Data sampling alignment method for memory inferface: The present disclosure relates to an interface comprising a memory controller and a memory unit coupled to the memory controller and configured to communicate with the memory controller through a first signal and a second signal. The interface further comprises a determination unit comprising judgment logic configured to send a... Agent: Taiwan Semiconductor Manufacturing Co., Ltd.
20140195729 - Memory having improved reliability for certain data types: A method for minimizing soft error rates within caches by configuring a cache with certain sections to correspond to bitcell topologies that are more resistant to soft errors and then using these sections to store modified data.... Agent:
20140195730 - Robust and secure memory subsystem: The present disclosure is generally directed to a more robust memory subsystem having a an improved architecture for managing a memory space. In one embodiment, a method is provided that includes receiving a memory access request from a memory controller and attempting to access the requested data from a first... Agent:
20140195731 - Physical link management: Disclosed is a storage system that includes a physical disk and a storage controller. The storage controller is configured to use a first physical link and a second physical link of a serial attached SCSI (SAS) wide port to communicate with the physical disk. Based on a dynamic system property,... Agent: Lsi Corporation
20140195732 - Method and system to maintain maximum performance levels in all disk groups by using controller vds for background tasks: Disclosed is a system and method for performing reconstruction or on-line capacity expansion, background tasks, on a disk group configured on a controller with minimal impact on the other disk groups configured on the same controller. A user is enabled to continuously experience increased performance on all source virtual disks... Agent: Lsi Corporation
20140195735 - Clustered storage network: A data storage network is provided. The network includes a client connected to the data storage network; a plurality nodes on the data storage network, wherein each data node has two or more RAID controllers, wherein a first RAID controller of a first node is configured to receive a data... Agent: Quantum Corporation
20140195733 - Memory using voltage to improve reliability for certain data types: A method for minimizing soft error rates within caches by configuring a cache with a certain way which is more resistant to soft errors and then using this way to store modified data. In certain embodiments, the memory is made more soft error resistant by increasing a voltage across bitcells... Agent:
20140195734 - Power management: Methods, and apparatus configured to perform such methods, providing peak power management are useful in mitigating excessive current levels within a multi-die package. For example, a method might include generating a clock signal in a particular die of a plurality of dies, counting pulses of the clock signal in a... Agent: Micron Technology, Inc.
20140195736 - Data accessing method and electronic apparatus utilizing the data accessing method: A data access method applicable on an electronic apparatus is provided. The electronic apparatus comprises a control unit, a first storage apparatus, and a second storage apparatus. The method comprising: storing a first part of data and a second part of data of a data group in the first storage... Agent: Mstar Semiconductor, Inc.
20140195737 - Flush engine: Techniques are disclosed related to flushing one or more data caches. In one embodiment an apparatus includes a processing element, a first cache associated with the processing element, and a circuit configured to copy modified data from the first cache to a second cache in response to determining an activity... Agent: Apple Inc.
20140195738 - I/o write request handling in a storage system: An improved method for I/O write request handling in a storage system comprising at least one normal storage device and at least one cache device. An I/O write request created by an external device is received. Two parallel threads are created for each write operation. A first thread attempts to... Agent: International Business Machines Corporation
20140195739 - Zero-copy caching: Caching of an immutable buffer that has its data and address prevented from changing during the lifetime of the immutable buffer. A first computing entity maintains a cache of the immutable buffer and has a strong reference to the immutable buffer. So long as any entity has a strong reference... Agent: Microsoft Corporation
20140195740 - Flow-id dependency checking logic: Systems and methods for maintaining an order of transactions in the coherence point. The coherence point stores attributes associated with received transactions in an input request queue (IRQ). When a new transaction is received with a device ordered attribute, the IRQ is searched for other entries with the same flow... Agent: Apple Inc.
20140195742 - System on chip including memory management unit and memory address translation method thereof: A system on chip (SoC) including a memory management unit (MMU) and a memory address translation method thereof are provided. The SoC includes a master intellectual property (IP) configured to output a request corresponding to each of a plurality of working sets; an MMU module comprising a plurality of MMUs,... Agent:
20140195741 - Type casting in a managed code system: Type casting in a managed code system is described. The managed code system includes managed memory as well as shared memory located outside of the managed memory. The managed memory has multiple managed memory portions, each corresponding to a computing entity, such as a processes. The type system permits obtaining... Agent: Microsoft Corporation
20140195743 - On-chip traffic prioritization in memory: According to one embodiment, a method for traffic prioritization in a memory device includes sending a memory access request including a priority value from a processing element in the memory device to a crossbar interconnect in the memory device. The memory access request is routed through the crossbar interconnect to... Agent: International Business Machines Corporation
20140195744 - On-chip traffic prioritization in memory: According to one embodiment, a memory device is provided. The memory device includes a processing element coupled to a crossbar interconnect. The processing element is configured to send a memory access request, including a priority value, to the crossbar interconnect. The crossbar interconnect is configured to route the memory access... Agent: International Business Machines Corporation
20140195745 - Data storage mechanism using storage system determined write locations: Mechanisms are provided, in a storage system controller of a storage system, for writing data to a storage medium. The storage system controller receives a write request to write a block of data to the storage medium. The write request does not specify a location on the storage medium to... Agent: International Business Machines Corporation
20140195746 - Dma channels: Communicating between an application and a hardware device. A method includes an application writing data to host physical memory using an application view of the memory. The method further includes mapping the data in the physical memory to a hardware driver view, usable by a hardware driver, without needing to... Agent: Microsoft Corporation
20140195747 - Write once read many media systems: A system for providing for write once read many (WORM) times from at least some addresses of a storage drive that is otherwise manufactured for multiple writes to individual addresses. In at least one embodiment, a WORM area(s) is defined by a START_LBA and an END_LBA and the method uses... Agent:
20140195750 - Buffer pool extension for database server: Aspects of the subject matter described herein relate to a buffer pool for a database system. In aspects, secondary memory such as solid state storage is used to extend the buffer pool of a database system. Thresholds such as hot, warm, and cold for classifying pages based on access history... Agent: Microsoft Corporation
20140195749 - Deduplication of volume regions: A system and method for performing coarse-grained deduplication of volume regions. A storage controller detects that a first region of a first volume is identical to a second region of a second volume, wherein the first volume points to a first medium and the second volume points to a second... Agent: Pure Storage, Inc.
20140195748 - Efficient replica cleanup during resynchronization: Mechanisms are provided for efficient replica cleanup during resynchronization. According to various embodiments, a plurality of deleted data segment ranges on a first storage node may be identified. The first storage node may be configured to store a plurality of data segments. Each of the plurality of data segments may... Agent: Dell Products L.p.
20140195752 - Efficient copying between storage devices: A system and method are disclosed for efficiently copy a disk image between storage devices. In accordance with one example, a computer system issues a request to create on a first storage device a snapshot of a first disk image that is stored on the first storage device. The computer... Agent: Red Hat Israel, Ltd.
20140195753 - Managing virtual hard disk snapshots: A method, system or computer usable program product for managing virtual disk snapshots including utilizing a processor to create multiple disk containers containing multiple snapshots on a host machine persistent memory, and combining the multiple snapshots on a guest operating system to produce a final snapshot utilized by the guest... Agent: International Business Machines Corporation
20140195755 - Performing copies in a storage system: A system and method for performing copy offload operations. When a copy offload operation from a first volume (pointing to a first medium) to a second volume (pointing to a second medium) is requested, the copy offload operation is performed without accessing the data being copied. A third medium is... Agent: Pure Storage, Inc.
20140195751 - Setting copy permissions for target data in a copy relationship: Providing a computer program product, system, and method for setting copy permissions for target data in a copy relationship. Source data is copied from a first storage to a first data copy in a second storage. A request is received to copy requested data from the first data copy to... Agent: International Business Machines Corporation
20140195756 - Setting copy permissions for target data in a copy relationship: Providing a computer program product, system, and method for setting copy permissions for target data in a copy relationship. Source data is copied from a first storage to a first data copy in a second storage. A request is received to copy requested data from the first data copy to... Agent: International Business Machines Corporation
20140195754 - Snapshots in a storage system: A system and method for creating and managing snapshots. Mediums are recorded and maintained, all of which are read-only except for the most recent mediums in use by a volume. Multiple volumes may be maintained, including a first volume which points to a first medium. When a snapshot of the... Agent: Pure Storage, Inc.
20140195757 - Storage network data allocation: A method of allocating data to a storage block included in a storage network may include determining a plurality of characteristics associated with a storage block included in a storage network. The plurality of characteristics may include storage capacity of the storage block, available storage space of the storage block,... Agent:
20140195758 - Block or page lock features in serial interface memory: Embodiments are provided for protecting boot block space in a memory device. Such a memory device may include a memory array having a protected portion and a serial interface controller. The memory device may have a register that enables or disables access to the portion when data indicating whether to... Agent: Micron Technology, Inc.
20140195759 - Increasing efficiency of block-level processes using data relocation awareness: A mechanism is provided for increasing the efficiency of block-level processes. Responsive to detecting an I/O write to a storage volume, a determination is made as to whether the I/O write matches one or more suspicious I/O reads in a plurality of suspicious I/O reads previously recorded in a memory.... Agent: International Business Machines Corporation
20140195760 - Storage apparatus and data management method: A storage apparatus for which a hierarchical data management system is adopted is designed so that when receiving a read request for a first logical area to which a first storage area of a first storage device in a virtual volume is allocated, whether or not to migrate data in... Agent: Hitachi, Ltd.
20140195763 - Hardware and file system agnostic mechanism for achieving capsule support: Methods and apparatus relating to a hardware and file system agnostic mechanism for achieving capsule support are described. In one embodiment, content associate with a capsule are stored in a non-volatile memory prior to a cold reset. A capsule descriptor may also be constructed, prior to the reset, which includes... Agent:
20140195761 - Logical volume space sharing: Space sharing between logical volumes is achieved through a technique that enables available storage space to be flexibly consumed and released by the logical volumes. Each logical volume is associated with an address tree that defines how available storage space is consumed by the logical volume. The technique involves receiving... Agent: Apple Inc.
20140195762 - Safety for volume operations: A system and method for maintaining the safety of volume operations. A storage controller receives a request to delete a first volume. In response to this request, the storage controller can delete a link between the first volume and its anchor medium. The storage controller can also delay the deletion... Agent: Pure Storage, Inc.
20140195764 - Memory device having an adaptable number of open rows: A memory device comprises a memory array, at least one row address buffer, a set of row data buffers, a row decoder, an array of sense amplifiers, and a demultiplexer. The memory array comprises data elements organized into rows and columns. Each of the rows is addressable by a row... Agent: Qualcomm Incorporated
20140195765 - Implementing user mode foreign device attachment to memory channel: A method, system and computer program product are provided for implementing attachment of a user mode foreign device to a memory channel in a computer system. A user mode foreign device is attached to the memory channel using memory mapping of device registers and device buffers to the processor address... Agent: International Business Machines Corporation
20140195767 - Lightweight random memory allocation: In response to a memory allocation request received from an application thread, a random number is obtained (e.g., from a random number list previously populated with multiple random numbers). A starting location in at least a portion of a bitmap associated with a region including multiple blocks of the memory... Agent: Microsoft Corporation
20140195766 - Shared and managed memory unified access: A managed memory in which multiple computing entities each have a corresponding entity-specific portion that is subject to garbage collection. An immutable buffer is located outside of managed memory. For a given computing entity, the corresponding managed memory portion contains entity-specific objects that can be accessed by a specific computing... Agent: Microsoft Corporation
20140195768 - Expanding memory size: A system, and computer usable program product for expanding memory size are provided in the illustrative embodiments. A desired size of an expanded memory and a first information about a workload in the data processing system are received. A size of a compressed memory pool to use with the memory... Agent: International Business Machines Corporation
20140195769 - Management of storage in a storage network: A storage block may include a first portion allocated for storage of network data associated with a storage network. The storage network may include the storage block and one or more other storage blocks. The storage block may further include a second portion allocated for storage of local data. The... Agent:
20140195770 - Serial attached storage drive virtualization: Techniques are provided for an access device, such as a Serial Attached Small Computer System Interface (SAS) expander, that is in communication with a storage device to subdivide the storage space of the storage device into a plurality of logical storage spaces, where the access device mediates storage and retrieval... Agent: Cisco Technology, Inc.
20140195771 - Anticipatorily loading a page of memory: In a particular embodiment, a method of anticipatorily loading a page of memory is provided. The method may include, during execution of first program code using a first page of memory, collecting data for at least one attribute of the first page of memory, including collecting data about at least... Agent: International Business Machines Corporation
20140195772 - System and method for out-of-order prefetch instructions in an in-order pipeline: Apparatuses, systems, and a method for providing a processor architecture with data prefetching are described. In one embodiment, a system includes one or more processing units that include a first type of in-order pipeline to receive at least one data prefetch instruction. The one or more processing units include a... Agent: Intel Corporation
20140195773 - Line termination methods and apparatus: Methods and apparatus for termination of signal lines coupled to a number of memory devices are disclosed. One such method includes adjusting an input impedance of one or more terminals of an interface of a memory device in response to the memory device receiving a particular address. One such apparatus... Agent: Micron Technology, Inc.
20140195774 - Apparatus and method for sliding window data access: An apparatus and method are described for fetching and storing a plurality of portions of a data stream into a plurality of registers. For example, a method according to one embodiment includes the following operations: determining a set of N vector registers into which to read N designated portions of... Agent:07/03/2014 > 96 patent applications in 40 patent subcategories.
20140189192 - Apparatus and method for a multiple page size translation lookaside buffer (tlb): An apparatus and method for implementing a multiple page size translation lookaside buffer (TLB). For example, a method according to one embodiment comprises: reading a first group of bits and a second group of bits from a linear address; determining whether the linear address is associated with a large page... Agent:
20140189191 - Apparatus and method for memory-mapped register caching: A processor is described comprising: an architectural register file implemented as a combination of a register file cache and an architectural register region within a level 1 (L1) data cache, and a data location table (DLT) to store data indicating a location of each architectural register within the register file... Agent:
20140189193 - Image forming apparatus and method of translating virtual memory address into physical memory address: An image forming apparatus includes a function unit to perform functions of the image forming apparatus, and a control unit to control the function unit to perform the functions of the image forming apparatus. The control unit includes a processor core to operate in a virtual memory address, a main... Agent: Samsung Electronics, Co., Ltd.
20140189194 - Low overhead paged memory runtime protection: Methods and apparatus relating to low overhead paged memory runtime protection are described. In an embodiment, permission information for guest physical mapping are received prior to utilization of paged memory by an Operating System (OS) based on the guest physical mapping. The permission information is provided through an Extended Page... Agent:
20140189195 - Providing memory condition information to guest applications: Virtualization software can improve the effectiveness of a guest application running inside a virtual machine (VM) by providing information to the guest application indicative of a memory condition of the VM. The memory condition is indicative of an availability of memory resources to the guest application. When guest physical memory... Agent: Vmware, Inc.
20140189196 - Determining weight values for storage devices in a storage tier to use to select one of the storage devices to use as a target storage to which data from a source storage is migrated: The present invention relates to a method, system, and computer program product for determining storage device weight values to use to select one of the storage devices to use as a target storage to which data from a source storage is migrated. A determination is made, for each of the... Agent: International Business Machines Corporation
20140189213 - Address generating circuit and address generating method: An address generating circuit according to an embodiment includes a register that maintains a partition address set by a CPU, a comparator that determines whether a designated address designated by the CPU designates the interleaved area or the non-interleaved area, a selection signal generating unit that generates the selection signal... Agent: Kabushiki Kaisha Toshiba
20140189216 - Apparatus, system, and method for conditional and atomic storage operations: An apparatus, system, and method are disclosed for implementing conditional storage operations. Storage clients access and allocate portions of an address space of a non-volatile storage device. A conditional storage request is provided, which causes data to be stored to the non-volatile storage device on the condition that the address... Agent: Fusion-io, Inc.
20140189220 - Execute-in-place mode configuration for serial non-volatile memory: Example embodiments for configuring a serial non-volatile memory device for an execute-in-place mode may comprise a non-volatile configuration register to store an execute-in-place mode value that may be read at least in part in response to power being applied to the memory device.... Agent: Micron Technology, Inc.
20140189199 - False power failure alert impact mitigation: Apparatus and computer program products implement embodiments of the present invention that include copying, by a storage system having a volatile memory configured as a write cache, write cache data from the volatile memory to a solid state device, upon receiving a signal indicating a loss of power to the... Agent: International Business Machines Corporation
20140189214 - False power failure alert impact mitigation: Methods, apparatus and computer program products implement embodiments of the present invention that include copying, by a storage system having a volatile memory configured as a write cache, write cache data from the volatile memory to a solid state device, upon receiving a signal indicating a loss of power to... Agent: International Business Machines Corporation
20140189201 - Flash memory interface using split bus configuration: A system having a split bus flash memory and a method for operating the split bus flash memory is disclosed. The system may include a controller, a non-volatile memory (including first and second non-volatile memory chips) and the system bus. The controller is configured to communicate via an N-bit bus.... Agent:
20140189200 - Flash memory using virtual physical addresses: A system and method for using virtual physical addresses in a non-volatile memory device are disclosed. The physical layout of the non-volatile memory device may have physical die that are not a power-of-2 in number. In order to advantageously use the power-of-2 die number, which enables using a power-of-2 die... Agent:
20140189223 - Ic card, portable electronic device, and method of controlling ic card: According to one embodiment, an IC card which executes a process in accordance with a command transmitted from an external device, includes, a first storage module configured to pre-store an application including a plurality of structures, a reception module configured to receive a command transmitted from the external device, and... Agent: Kabushiki Kaisha Toshiba
20140189204 - Information processing apparatus and cache control method: An information processing apparatus comprises a plurality types of cache memories having different characteristics, decides on a type of cache memory to be used as a data cache destination based on the access characteristics of cache-target data, and caches the data in the cache memory of the decided type.... Agent: Hitachi, Ltd.
20140189198 - Memory allocation for fast platform hibernation and resumption of computing systems: Memory allocation for fast platform hibernation and resumption of computing systems. An embodiment of an apparatus includes logic at least partially implemented in hardware, the logic to: dynamically allocate at least a first portion of a nonvolatile memory; in response to a command to enter the apparatus into a standby... Agent:
20140189215 - Memory modules and memory systems: A memory module includes a plurality of memory devices and a buffer chip. The buffer chip manages the memory devices. The buffer chip includes a refresh control circuit that groups a plurality of memory cell rows of the memory devices into a plurality of groups according to a data retention... Agent:
20140189210 - Memory system having an unequal number of memory die: A flash memory system having unequal number of memory die and method for operation is disclosed. The memory includes a plurality of flash memory die distributed unevenly among different control lines, such that there are an unequal number of die between control lines. A total physical storage capacity of the... Agent:
20140189207 - Method and system for managing background operations in a multi-layer memory: A multi-layer memory and method for performing background maintenance operations are disclosed. The memory includes a plurality of flash memory die having multiple layers, where each layer is made up of flash memory cells having a greater bit per cell storage capacity than then prior layer and each layer may... Agent:
20140189206 - Method and system for managing block reclaim operations in a multi-layer memory: A multi-later memory and method for operation is disclosed. The memory includes at least one flash memory die having multiple layers and a controller configured to execute block reclaim operations in a layer of the flash memory die until a net gain of at least one additional free block has... Agent:
20140189205 - Method and system for managing program cycles in a multi-layer memory: A system and method for managing program cycles in a multi-layer memory is disclosed. The method includes a controller receiving a request to program data from a host and, in advance of programming data associated with the request, determining a program cycle for programming the data associated with the request... Agent:
20140189208 - Method and system for program scheduling in a multi-layer memory: A multi-layer memory and method for operation is disclosed. The memory includes an interface, at least one flash memory die having a plurality of layers and a controller. The controller is configured to select an appropriate one of a predetermined number of program cycles for programming a fixed amount of... Agent:
20140189222 - Method for performing data shaping, and associated memory device and controller thereof: A method for performing data shaping is applied to a controller of a Flash memory, where the Flash memory includes a plurality of blocks. The method includes: performing a program optimization operation according to original data and a plurality of shaping codes, in order to generate trace back information corresponding... Agent: Silicon Motion Inc.
20140189218 - Method of programming data into nonvolatile memory and method of reading data from nonvolatile memory: Disclosed is a method of programming data into a nonvolatile memory that includes a plurality of memory cells connected with a word line, each memory cell storing first to mth bits of a plurality of bits, the plurality of bits forming first to mth pages. The method includes generating first... Agent: Samsung Electronics Co., Ltd.
20140189209 - Multi-layer memory system having multiple partitions in a layer: A multi-layer memory and method for operation is disclosed. The memory includes multiple layers, where each layer includes flash memory cells having a greater bit per cell capacity than then prior layer and each layer may include a plurality of partitions having blocks exclusively associated with a particular data type.... Agent:
20140189212 - Presentation of direct accessed storage under a logical drive model: In accordance with embodiments disclosed herein, there are provided methods, systems, mechanisms, techniques, and apparatuses for presentation of direct accessed storage under a logical drive model; for implementing a distributed architecture for cooperative NVM Data protection; data mirroring for consistent SSD latency; for boosting a controller's performance and RAS with... Agent:
20140189211 - Remapping blocks in a storage device: In the present disclosure, a persistent storage device includes both persistent storage, which includes a set of persistent storage blocks, and a storage controller. The persistent storage device stores and retrieves data in response to commands received from an external host device. The persistent storage device stores a logical block... Agent:
20140189217 - Semiconductor storage device: According to an embodiment, a semiconductor storage device includes a first storage unit, a read control unit, a second storage unit, and a write control unit. The first storage unit is configured to store data supplied from a host device. The read control unit is configured to perform control of... Agent: Kabushiki Kaisha Toshiba
20140189221 - Semiconductor storage device and method of controlling the same: A semiconductor storage device includes a first nonvolatile memory to store user data of a file, a second nonvolatile memory to store management data of the file, the second nonvolatile memory being different in type from the first nonvolatile memory, and a controller to control read/write of data with respect... Agent: Kabushiki Kaisha Toshiba
20140189197 - Sharing serial peripheral interface flash memory in a multi-node server system on chip platform environment: Methods and apparatus related to sharing Serial Peripheral Interface (SPI) flash memory in a multi-node server SoC (System on Chip) platform environment are described. In one embodiment, multi-port non-volatile memory is shared by a plurality of System on Chip (SoC) devices. Each of the plurality of SoC devices comprises controller... Agent:
20140189219 - Solid state storage element and method: A method and system for storing and retrieving data using flash memory devices. One example system includes an apparatus within a flash memory configuration. The flash memory configuration includes a plurality of memory cells, where each memory cell has a charge storage capacity for use in implementing digital storage. The... Agent: Benhov Gmbh, LLC
20140189202 - Storage apparatus and storage apparatus control method: A storage apparatus is provided with a controller, a memory and a drive. When the drive information is decided to satisfy the first condition and the controller receives from the host computer a write request instructing the controller to update first data stored in the drive to second data, the... Agent: Hitachi, Ltd.
20140189203 - Storage apparatus and storage control method: A cache memory (CM) in which data, which is accessed with respect to a storage device, is temporarily stored is coupled to a controller for accessing the storage device in accordance with an access command from a higher-level apparatus. The CM comprises a nonvolatile semi-conductor memory (NVM), and provides a... Agent: Hitachi, Ltd.
20140189225 - Independent control of processor core retention states: In an embodiment, a processor includes a first processor core, a second processor core, a first voltage regulator to provide a first voltage to the first processor core with a first active value when the first processor core is active, and a second voltage regulator to provide a second voltage... Agent:
20140189227 - Memory device and a memory module having the same: A memory device is provided. The memory device includes a plurality of memory chips, and a buffer chip connected to the plurality of memory chips. The plurality of memory chips and the buffer chip are disposed in a stack. A first input/output (IO) port of the buffer chip is connected... Agent: Samsung Electronics Co., Ltd.
20140189226 - Memory device and memory system having the same: A memory device includes a memory cell array, a multi-purpose register (MPR) and a control unit. The memory cell array includes a plurality of memory blocks. The multi-purpose register (MPR) stores physical address information for each of the plurality of memory blocks. The control unit outputs the physical address information... Agent:
20140189224 - Training for mapping swizzled data to command/address signals: Data pin mapping and delay training techniques. Valid values are detected on a command/address (CA) bus at a memory device. A first part of the pattern (high phase) is transmitted via a first subset of data pins on the memory device in response to detecting values on the CA bus;... Agent:
20140189230 - Memory controlling device and method thereof: A memory controlling device and method are disclosed for controlling a memory having a partial array self refresh (PASR) function and a plurality of memory segments. The memory controlling device comprises an address mapper, an address decoder, an address selector, and a PASR configuration register storing a PASR configuration. The... Agent: Industrial Technology Research Insitute
20140189229 - Refresh rate performance based on in-system weak bit detection: A memory subsystem can test a memory device in situ, testing the performance of the device in the system it is built into during production. Thus, the refresh rate can be adjusted specific to the memory device(s) of a specific system, rather than defaulting to a refresh frequency specified by... Agent:
20140189228 - Throttling support for row-hammer counters: Throttling of memory access commands. Accesses to rows of a memory device are monitored for a timeframe. The timeframe is divided into at least two sub-frames. If the number of accesses for any of the rows during a first sub-frame exceeds a first threshold throttling accesses to the accessed row... Agent:
20140189231 - Audio digital signal processor: A microprocessor includes a memory interface to obtain data envelopes of a first length, and control logic to implement an instruction to load an initial data envelope of a stream of data values into a buffer, each data value having a second length shorter than the first length, the stream... Agent: Tensilica, Inc.
20140189232 - Virtual tape device and virtual tape device control method: A virtual tape device includes a determination unit and a copy creation unit. The determination unit determines, when deleting some logical volume data among a plurality of logical volume data stored on a first physical tape, whether to conduct copy processing to store a copy of the logical volume data... Agent: Fujitsu Limited
20140189233 - Method for optimizing cleaning of maps in flashcopy cascades containing incremental maps: A method for optimizing cleaning of maps in storage cascades includes determining whether a target disk of a map contains data unavailable to a downstream disk from an upstream disk in a cascade and detect whether the downstream disk has a copy of the data. Additionally, the method includes copying... Agent: International Business Machines Corporation
20140189234 - Protecting volatile data of a storage device in response to a state reset: A plurality of aligned or unaligned data packets are received in a data storage device. A data bundle is constructed by concatenating different ones of the plurality of unaligned data packets. Data loss protection identifiers are utilized to track the construction of the data bundle. The data loss protection identifiers... Agent: Seagate Technology LLC
20140189236 - Data storage method and storage device: The embodiments of the present invention provide a data storage method, including: sending a performance level request to a storage device, which is used to query information about performance level of one or more logical unit number LUNs in the storage device; receiving a response sent by the storage device... Agent: Huawei Technologies Co., Ltd.
20140189235 - Stealth appliance between a storage controller and a disk array: A stealth appliance may be coupled between a storage controller and a disk array. The stealth appliance may be configured to receive a request from the storage controller encrypted with a first community-of-interest (COI) key, to decrypt the request with the first COI key, to encrypt the request with a... Agent: Unisys Corporation
20140189237 - Data processing method and apparatus: Embodiments of the present invention provide a data processing method and apparatus. According to the embodiments of the present invention, when it is found that a data hash value in a currently received data stream exceeds a preset first threshold, a part or all of data in the data stream... Agent: Huawei Technologies Co.,ltd.
20140189238 - Two-level cache locking mechanism: A virtually tagged cache may be configured to index virtual address entries in the cache into lockable sets based on a page offset value. When a memory operation misses on the virtually tagged cache, only the one set of virtual address entries with the same page offset may be locked.... Agent:
20140189240 - Apparatus and method for reduced core entry into a power state having a powered down core cache: A method performed by a multi-core processor is described. The method includes, while a core is executing program code, reading a dirty cache line from the core's last level cache and sending the dirty cache line from the core for storage external from the core, where, the dirty cache line... Agent:
20140189241 - Method and apparatus to write modified cache data to a backing store while retaining write permissions: A method is described that includes performing the following for a transactional operation in response to a request from a processing unit that is directed to a cache identifying a cache line. Reading the cache line, and, if the cache line is in a Modified cache coherency protocol state, forwarding... Agent:
20140189239 - Processors having virtually clustered cores and cache slices: A processor of an aspect includes a plurality of logical processors each having one or more corresponding lower level caches. A shared higher level cache is shared by the plurality of logical processors. The shared higher level cache includes a distributed cache slice for each of the logical processors. The... Agent:
20140189242 - Logging in secure enclaves: Embodiments of an invention for logging in secure enclaves are disclosed. In one embodiment, a processor includes an instruction unit and an execution unit. The instruction unit is to receive an instruction having an associated enclave page cache address. The execution unit is to execute the instruction without causing a... Agent:
20140189243 - Sectored cache with hybrid line granularity: A coarse-grained cache line may be associated with a way from a set in a cache. A first sector of the coarse-grained cache line may be stored in the way. The coarse-grained cache line may include a predetermined number of sectors. A fine-grained cache line may be associated with the... Agent:
20140189244 - Suppression of redundant cache status updates: A cache management system employs a replacement policy in a manner that manages redundant accesses to cache elements. The cache management system comprises a cache, a replacement policy state storage and an update control module. The update control module comprises a buffer for storing recent addresses, a comparison unit for... Agent:
20140189245 - Merging eviction and fill buffers for cache line transactions: A processor includes a first cache memory and a bus unit in some embodiments. The bus unit includes a plurality of buffers and is operable to allocate a selected buffer of a plurality of buffers for a fill request associated with a first cache line to be stored in a... Agent: Advanced Micro Devices, Inc.
20140189246 - Measuring applications loaded in secure enclaves at runtime: Embodiments of an invention for measuring applications loaded in secure enclaves at runtime are disclosed. In one embodiment, a processor includes an instruction unit and an execution unit. The instruction unit is to receive an instruction to extend a first measurement of a secure enclave with a second measurement. The... Agent:
20140189247 - Apparatus and method for implementing a scratchpad memory: An apparatus and method for implementing a scratchpad memory within a cache using priority hints. For example, a method according to one embodiment comprises: providing a priority hint for a scratchpad memory implemented using a portion of a cache; determining a page replacement priority based on the priority hint; storing... Agent:
20140189248 - Efficient online construction of miss rate curves: Miss rate curves are constructed in a resource-efficient manner so that they can be constructed and memory management decisions can be made while the workloads are running. The resource-efficient technique includes the steps of selecting a subset of memory pages for the workload, maintaining a least recently used (LRU) data... Agent: Vmware, Inc.
20140189249 - Software and hardware coordinated prefetch: Included is an apparatus comprising a processor configured to identify a code segment in a program, analyze the code segment to determine a memory access pattern, if the memory access pattern is regular, turn on hardware prefetching for the code segment by setting a control register before the code segment,... Agent: Futurewei Technologies, Inc.
20140189250 - Store forwarding for data caches: A bit or other vector may be used to identify whether an address range entered into an intermediate buffer corresponds to most recently updated data associated with the address range. A bit or other vector may also be used to identify whether an address range entered into an intermediate buffer... Agent:
20140189251 - Update mask for handling interaction between fills and updates: A multi core processor implements a cash coherency protocol in which probe messages are address-ordered on a probe channel while responses are un-ordered on a response channel. When a first core generates a read of an address that misses in the first core's cache, a line fill is initiated. If... Agent:
20140189252 - Dynamic cache write policy: A system, processor and method to monitor specific cache events and behavior based on established principles of quantized architectural vulnerability factor (AVF) through the use of a dynamic cache write policy controller. The output of the controller is then used to set the write back or write through mode policy... Agent:
20140189253 - Cache coherency and processor consistency: Responsive to execution of a computer instruction in a current translation window, state indicators associated with a cache line accessed for the execution may be modified. The state indicators may include: a first indicator to indicate whether the computer instruction is a load instruction moved from a subsequent translation window... Agent:
20140189255 - Method and apparatus to share modified data without write-back in a shared-memory many-core system: A cache-coherent device may include multiple caches and a cache coherency engine, which monitors whether there are more than one versions of a cache line stored in the caches and whether the version of the cache line in the caches is consistent with the version of the cache line stored... Agent:
20140189254 - Snoop filter having centralized translation circuitry and shadow tag array: A processor is described that includes a plurality of processing cores. The processor includes an interconnection network coupled to each of said processing cores. The processor includes snoop filter logic circuitry coupled to the interconnection network and associated with coherence plane logic circuitry of the processor. The snoop filter logic... Agent:
20140189256 - Processor with memory race recorder to record thread interleavings in multi-threaded software: A processor includes a first core to execute a first software thread, a second core to execute a second software thread, and shared memory access monitoring and recording logic. The logic includes memory access monitor logic to monitor accesses to memory by the first thread, record memory addresses of the... Agent:
20140189259 - Semiconductor device and electronic device: A semiconductor device includes a first memory controller configured to output a first control signal to first and second external memories through a first memory interface, a second memory controller configured to output a second control signal to the second external memory through a second memory interface, an inter-device interface... Agent: Renesas Mobile Corporation
20140189257 - Semiconductor memory device: A semiconductor memory device includes stacked memory strings in which at least some adjacent memory strings share a common source line. During a read operation for a selected memory string, a first current path is formed from a bit line of the selected memory string to the common source line... Agent: Sk Hynix Inc.
20140189258 - Semiconductor memory device: A semiconductor memory device includes a memory array including memory blocks stacked in a plurality of layers over a substrate, first lines coupling word lines of memory blocks arranged in even-numbered layers, and second lines coupling word lines of memory blocks arranged in odd-numbered layers.... Agent: Sk Hynix Inc.
20140189261 - Access type protection of memory reserved for use by processor logic: A processor of an aspect includes operation mode check logic to determine whether to allow an attempted access to an operation mode and access type protected memory based on an operation mode that is to indicate whether the attempted access is by an on-die processor logic. Access type check logic... Agent:
20140189260 - Approach for context switching of lock-bit protected memory: A streaming multiprocessor in a parallel processing subsystem processes atomic operations for multiple threads in a multi-threaded architecture. The streaming multiprocessor receives a request from a thread in a thread group to acquire access to a memory location in a lock-protected shared memory, and determines whether a address lock in... Agent: Nvidia Corporation
20140189262 - Optimization of native buffer accesses in java applications on hybrid systems: Managing buffers in a hybrid system, in one aspect, may comprise selecting a first buffer management method from a plurality of buffer management methods; capturing statistics associated with access to the buffer in the hybrid system running under the initial buffer management method; analyzing the captured statistics; identifying a second... Agent: International Business Machines Corporation
20140189264 - Reads and writes between a contiguous data block and noncontiguous sets of logical address blocks in a persistent storage device: In the present disclosure, a persistent storage device includes both persistent storage, which includes a set of persistent storage blocks, and a storage controller. The persistent storage device stores and retrieves data in response to commands received from an external host device. The persistent storage device stores data, from a... Agent:
20140189263 - Storage device and method for reallocating storage device resources based on an estimated fill level of a host buffer: A storage device and method for reallocating storage device resources based on an estimated fill level of a host buffer are disclosed. In one embodiment, a storage device receives, from a host device, a rate at which the host device stores data in its buffer and tracks an amount of... Agent:
20140189265 - Atomic time counter synchronization: Methods, integrated circuit devices, and fabrication processes relating to synchronization of master and local timestamp counters (TSCs) are described. One method includes sending, to a memory bus, in response to an event that desynchronizes a master and a local TSC, a bus-lock command to perform atomic reading from a first... Agent: Advanced Micro Devices, Inc.
20140189266 - Efficient read and write operations: Computer readable media, methods and apparatuses are disclosed that may be configured for sequentially reading data of a file stored on a storage medium. The disclosure also provides for alternating transferring of fixed size portions of the file data to a first buffer and a second buffer, alternating processing of... Agent: Comcast Cable Communications, LLC
20140189267 - Method and apparatus for managing memory space: Embodiments of the present invention relate to a method, apparatus and computer product for managing memory space. In one aspect of the present invention, there is provided a method for managing memory space that is organized into pages, the pages being divided into a plurality of page sets, each page... Agent: Emc Corporation
20140189268 - High read block clustering at deduplication layer: Methods, systems, and computer program products are provided for deduplicating data mapping a plurality of file blocks of selected data to a plurality of logical blocks, deduplicating the plurality of logical blocks to thereby associate each logical block with a corresponding physical block of a plurality of physical blocks located... Agent: International Business Machines Corporation
20140189272 - Method and apparatus for managing memory: A method includes, if functional units assigned with multiple reserved areas is not driven, storing data with one of a data withdrawal condition set in the multiple reserved areas, and if the functional unit is driven, processing data stored in the one of the multiple reserved areas to restore the... Agent: Samsung Electronics Co., Ltd.
20140189273 - Method and system for full resolution real-time data logging: A method and data-logging system are provided. The system includes a map-ahead thread configured to acquire blocks of private memory for storing data to be logged, the blocks of private memory being twice as large as the file page size, a master thread configured to write data to the blocks... Agent:
20140189270 - Storage system: A storage system of the present invention includes: a data writing means for storing actual data configuring storage data into a storage device and, for every update of the content of the storage data, newly storing; and a data specifying means for specifying the latest storage data among the same... Agent: Nec Corporation
20140189271 - System and electronic device for utilizing memory of video card: A control system for utilizing a memory of a video card of an electronic device is executed by a control unit of the electronic device. The control system includes storage space dividing module and a storage control module. The storage space dividing module divides the memory of the video to... Agent: Hon Hai Precision Industry Co., Ltd.
20140189269 - System and method for virtual tape library over s3: System and method embodiments are provided herein to enable VTL backup and retrieval over S3 storage technology. An embodiment method includes mapping a plurality of data blocks for VTL storage into a plurality of S3 objects for S3 storage, and storing the S3 objects at one or more locations for... Agent: Futurewei Technologies, Inc.
20140189274 - Apparatus and method for page walk extension for enhanced security checks: An apparatus and method for managing a protection table by a processor. For example, a processor according to one embodiment of the invention comprises: protection table management logic to manage a protection table, the protection table having an entry for each protected page or each group of protected pages in... Agent:
20140189275 - Providing versioning in a storage device: Provided are a computer program product, system and method for managing Input/Output (I/O) requests to a storage device. A write request is received having write data for a logical address, wherein data for the logical address is at a first physical location in the storage device and has an indicated... Agent: International Business Machines Corporation
20140189276 - Metadata containers with indirect pointers: A method is provided for managing a file system including data objects. The data objects, indirect pointers and source pointers are stored in containers that have addresses and include addressable units of a memory. The objects are mapped to addresses for corresponding containers. The indirect pointer in a particular container... Agent:
20140189277 - Storage controller selecting system, storage controller selecting method, and recording medium: A storage controller selecting system includes a time information storage unit, a receiver, and a processor. The time information storage unit is configured to store internal processing time information for each of a plurality of storage controllers. The internal processing time information for each individual storage controller relates to an... Agent: Fujitsu Limited
20140189278 - Method and apparatus for allocating memory space with write-combine attribute: Embodiments of the present invention disclose a method and an apparatus for allocating a memory space with a write-combine attribute, including: determining, when resources of devices are scanned, a type and a size of a resource required by each device; determining, after the scanning of the resources of the devices... Agent: Huawei Technologies Co., Ltd.
20140189279 - Method of compressing data and device for performing the same: A data compression method includes receiving an input data stream including a previous data block and a current data block, and executing a first comparison of a part of the previous data block with part of a previous reference data block, and a second comparison of the current data block... Agent:
20140189280 - Reuse of host hibernation storage space by memory controller: A method for data storage includes, in a host system that operates alternately in a normal state and a hibernation state, reserving a hibernation storage space in a non-volatile storage device for storage of hibernation-related information in preparation for entering the hibernation state. While the host system is operating in... Agent:
20140189281 - Methods and apparatus for compressed and compacted virtual memory: A method and an apparatus for a memory device including a dynamically updated portion of compressed memory for a virtual memory are described. The memory device can include an uncompressed portion of memory separate from the compressed portion of memory. The virtual memory may be capable of mapping a memory... Agent: Apple Inc.
20140189282 - Storage system and method of adjusting spare memory space in storage system: A method includes determining a size of a recommended spare memory space of each of one or more storage nodes based on a state of the storage nodes, and adjusting a spare memory space of each of the storage nodes based on the size of the recommended spare memory space.... Agent: Samsung Electronics Co., Ltd.
20140189283 - Semiconductor memory device and operating method for the same: Provided is a semiconductor memory device that may efficiently map an internal address used inside the semiconductor memory device in response to an external address that is applied from the outside of the semiconductor memory device. The semiconductor memory device may include a memory cell array configured to include a... Agent: Sk Hynix Inc.
20140189284 - Sub-block based wear leveling: Embodiments of the invention describe an apparatus, system and method for sub-block based wear leveling for memory devices. Embodiments of the invention may receive a write request to a physical memory address including a physical block address and a physical sub-block address. An address remapping table is accessed to translate... Agent:
20140189285 - Apparatus and method for tracking tlb flushes on a per thread basis: A method is described that includes recognizing that TLB information of one or more hardware threads is to be invalidated. The method also includes determining which ones of the one or more hardware threads are in a state in which TLB information is flushed. The method also includes directing a... Agent:
20140189286 - Wear leveling with marching strategy: A method for managing utilization of a memory including a physical address space comprises mapping logical addresses of data objects to locations within the physical address space, and defining a plurality of address segments in the space as an active window. The method comprises allowing writes of data objects having... Agent: Macronix International Co., Ltd.06/26/2014 > 107 patent applications in 39 patent subcategories.
20140181360 - Creating a dynamic address translation with translation exception qualifier: An enhanced dynamic address translation facility product is created such that, in one embodiment, a virtual address to be translated and an initial origin address of a translation table of the hierarchy of translation tables are obtained. Dynamic address translation of the virtual address proceeds. In response to a translation... Agent: International Business Machines Corporation
20140181359 - Information processing apparatus and method of collecting memory dump: An information processing apparatus running multiple virtual machines includes a correspondence information storage section configured to store correspondence information between a virtual address and a physical address, the correspondence information being used by a second virtual machine when executing a procedure relevant to a first virtual machine; a correspondence information... Agent: Fujitsu Limited
20140181362 - Electronic device for storing data on pram and memory control method thereof: The present disclosure relates to an electronic device for storing data on PRAM and a memory control method thereof The electronic device of the present disclosure comprises: a nonvolatile memory in which data is stored; a volatile memory in which an address conversion table of a nonvolatile memory is stored;... Agent: Industry Academic Cooperation Foundation Of Yeungnam University
20140181361 - Non-volatile hybrid memory: Memory units and computer systems are provided. The computer systems include a memory unit. The memory unit includes a stable storage unit, an unstable storage unit, and a controller. The unstable storage unit stores pending write operations for the stable storage unit. The controller is configured to determine the locations... Agent: Advanced Micro Devices, Inc.
20140181363 - Adapting behavior of solid-state drive using real usage model: An embodiment is a technique to adapt behavior of a solid-state drive (SSD) to extend lifespan of the SSD. Real environmental information is received from an environmental processor. The real environmental information corresponds to an environment of the SSD. A behavior model is selected based on a real environmental model... Agent: Virtium Technology, Inc.
20140181377 - Concurrent content management and wear optimization for a non-volatile solid-state cache: Described is a technique for managing the content of a nonvolatile solid-state memory data cache to improve cache performance while at the same time, and in a complementary manner, providing for automatic wear leveling. A modified circular first-in first-out (FIFO) log/algorithm is generally used to determine cache content replacement. The... Agent: Netapp, Inc.
20140181378 - Control device, control method, and program: There is provided a control device including, a reading and writing control unit configured to control writing and reading of data on and from a non-volatile memory that has a plurality of blocks each set to be a unit for performing erasure of data. The non-volatile memory stores order information... Agent: Sony Corporation
20140181372 - Data reading method, memory controller, and memory storage device: A data reading method, a memory controller, and a memory storage device are provided. The data reading method is adapted to a rewritable non-volatile memory module having a plurality of physical erasing units. The data reading method includes following steps. A plurality of logical addresses is configured to be mapped... Agent: Phison Electronics Corp.
20140181369 - Dynamic overprovisioning for data storage systems: Disclosed embodiments are directed to systems and methods for dynamic overprovisioning for data storage systems. In one embodiment, a data storage system can reserve a portion of memory, such as non-volatile solid-state memory, for overprovisioning. Depending on various overprovisioning factors, recovered storage space due to compressing user data can be... Agent: Western Digital Technologies, Inc.
20140181368 - Equalizing wear on storage devices with write counters: Data stored in file blocks and storage blocks of a storage device may be tracked by the file system. The file system may track a number of writes performed to each file block and storage block. The file system may also track a state of each storage block. The file... Agent: Unisys Corporation
20140181379 - File reading method, storage device and electronic device: A file reading method, storage device and electronic device are described. The file reading method is applied to an electronic device that includes a nonvolatile storage device as an internal storage device. The method includes determining a specific file in the electronic device as a hotspot file according to a... Agent: Beijing Lenovo Software Ltd.
20140181367 - In-place change between transient and persistent state for data structures on non-volatile memory: Methods and apparatus related to in-place change between transient and persistent state for data structures on non-volatile memory are described. In one embodiment, controller logic causes a change in a state of a first portion of one or more non-volatile memory devices between a persistent state and a transient state... Agent:
20140181375 - Memory controller: According to one embodiment, a memory controller includes a first interface, a second interface, a cache unit, a translation unit, an access unit and a lock unit. The first interface receives a lock request and an access request which includes a logical address. The second interface is connectable to a... Agent:
20140181376 - Memory controller and memory system: According to an embodiment, a retention time of each block group is managed and a degree of wear of each block is managed. A free block allocated to each block group is determined based on the retention time of each block group and the degree of wear of each block.... Agent: Kabushiki Kaisha Toshiba
20140181380 - Memory wear control: The disclosure is related to systems and methods of controlling wear of a memory. In a particular embodiment, a system is disclosed that comprises a memory and a performance governor circuit coupled to the memory. The performance governor circuit is adapted to control a wear of the memory as a... Agent: Seagate Technology LLC
20140181371 - Method and system for reducing mapping table size in a storage device: A method and system are disclosed for handling logical-to-physical mapping and reducing mapping table size. The method includes the storage device storing in fast access memory, such as DRAM, only the physical location of a primary cluster in each cluster group, and then writing location information for remaining clusters in... Agent:
20140181366 - Method for dispersing and collating i/o's from virtual machines for parallelization of i/o access and redundancy of storing virtual machine data: Methods and systems to disperse and collate I/O from virtual machines (VMs) among a plurality of near line controllers for parallelization of I/O's (parallel reads and parallel writes) and for providing redundancy for stored VM data is disclosed.... Agent: Atlantis Computing, Inc.
20140181370 - Method to apply fine grain wear leveling and garbage collection: An apparatus includes a non-volatile memory and a controller. The controller is coupled to the non-volatile memory and configured to (i) measure a rate of free space consumption in the non-volatile memory, (ii) measure a rate of free space production in the non-volatile memory, and (iii) adjust a rate of... Agent: Lsi Corporation
20140181373 - Persistent storage device with nvram for staging writes: A persistent storage device includes both persistent storage, which includes a set of persistent storage blocks, and NVRAM, and in particular a set of NVRAM blocks. The persistent storage device also typically includes a storage controller. The persistent storage device, in addition to responding to commands to write data directly... Agent:
20140181381 - Pre-fetching data into a memory: Systems and methods for pre-fetching of data in a memory are provided. By pre-fetching stored data from a slower memory into a faster memory, the amount of time required for data retrieval and/or processing may be reduced. First, data is received and pre-scanned to generate a sample fingerprint. Fingerprints stored... Agent:
20140181383 - Reliability scheme using hybrid ssd/hdd replication with log structured management: In one embodiment, a method of managing data includes managing a first copy of data in a solid state memory using a controller of the solid state memory, and managing a second copy of the data in a hard disk drive memory using the controller. In another embodiment, a system... Agent: International Business Machines Corporation
20140181374 - Speculative copying of data from main buffer cache to solid-state secondary cache of a storage server: A network storage server includes a main buffer cache to buffer writes requested by clients before committing them to primary persistent storage. The server further uses a secondary cache, implemented as low-cost, solid-state memory, such as flash memory, to store data evicted from the main buffer cache or data read... Agent:
20140181364 - Systems and methods for support of non-volatile memory on a ddr memory channel: Systems and methods are provided for supporting use of non-volatile memory (NVM) on a double data rate (DDR) memory channel for an information handling system so that non-volatile memory devices (e.g., such as Phase Change Memory “PCM” devices) may be employed for main memory usage. In one possible implementation, information... Agent: Dell Products L.p.
20140181365 - Techniques to configure a solid state drive to operate in a storage mode or a memory mode: Examples are disclosed for configuring a solid state drive (SSD) to operate in a storage mode or a memory mode. In some examples, one or more configuration commands may be received at a controller for an SSD having one or more non-volatile memory arrays. The SSD may be configured to... Agent:
20140181382 - User selectable balance between density and reliability: A method for enabling users to select a configuration balance for a memory device is described. The method includes receiving an indication of a memory configuration for a mass memory including two or more of memory cells. One or more memory cells of the mass memory are selected based at... Agent: Memory Technologies LLC
20140181384 - Memory scheduling for ram caches based on tag caching: A system, method and computer program product to store tag blocks in a tag buffer in order to provide early row-buffer miss detection, early page closing, and reductions in tag block transfers. A system comprises a tag buffer, a request buffer, and a memory controller. The request buffer stores a... Agent: Advanced Micro Devices, Inc.
20140181385 - Flexible utilization of block storage in a computing system: Embodiments of the present invention disclose a method, computer program product, and system for utilizing a block storage device as Dynamic Random-Access Memory (DRAM) space, wherein a computer includes at least one DRAM module and at least one block storage device interfaced to the computer using a double data rate... Agent: International Business Machines Corporation
20140181392 - Hardware chip select training for memory using read commands: A method of training chip select for a memory module. The method includes programming a memory controller into a mode wherein a command signal is active for a programmable time period. The method then programs a programmable delay line of the chip select with a delay value and performs initialization... Agent: Nvidia Corporation
20140181391 - Hardware chip select training for memory using write leveling mechanism: A method of training chip select for a memory module. The method includes programming a memory controller into a mode wherein a command signal is active for a programmable time period. The method then programs a programmable delay line of the chip select with a delay value and performs initialization... Agent: Nvidia Corporation
20140181387 - Hybrid cache: Data caching methods and systems are provided. A method is provided for a hybrid cache system that dynamically changes modes of one or more cache rows of a cache between an un-split mode having a first tag field and a first data field to a split mode having a second... Agent: Advanced Micro Devices, Inc.
20140181389 - Installation cache: Data caching methods and systems are provided. The data cache method loads data into an installation cache and a cache (simultaneously or serially) and returns data from the installation cache when the data has not completely loaded into the cache. The data cache system includes a processor, a memory coupled... Agent: Advanced Micro Devices, Inc.
20140181393 - Memory systems and methods for dynamically phase adjusting a write strobe and data to account for receive-clock drift: A memory system includes a memory controller that writes data to and reads data from a memory device. A write data strobe accompanying the write data indicates to the memory device when the write data is valid, whereas a read strobe accompanying data from the memory device indicates to the... Agent: Rambus Inc.
20140181386 - Method and apparatus for power reduction for data movement: A method of and device for transferring data is provided. The method includes determining a difference between a data segment that was transferred last relative to each of one or more data segments available to be transferred next. In some embodiments, for so long as no data segment available to... Agent: Advanced Micro Devices, Inc.
20140181388 - Method and apparatus to implement lazy flush in a virtually tagged cache memory: A processor includes a processor core including an execution unit to execute instructions, and a cache memory. The cache memory includes a controller to update each of a plurality of stale indicators in response to a lazy flush instruction. Each stale indicator is associated with respective data, and each updated... Agent:
20140181390 - Method, apparatus and system for exchanging communications via a command/address bus: Techniques and mechanisms for exchanging information from a memory controller to a memory device via a command/address bus. In an embodiment, the memory device samples a first portion of a command during a first sample period and samples a second portion of the command during a second sample period, the... Agent:
20140181394 - Directory cache supporting non-atomic input/output operations: Responsive to receiving a write request for a cache line from an input/output device, a caching agent of a first processor determines that the cache line is managed by a home agent of a second processor. The caching agent sends an ownership request for the cache line to the second... Agent:
20140181395 - Virtual tape library system: A virtual tape library system is used to back up data from a client archive system expecting physical tape operations onto logical data containers and/or a metadata store of a storage service by emulating the physical tape operations. For example, a virtual tape library appliance is installed at a customer... Agent: Amazon Technologies, Inc.
20140181396 - Virtual tape using a logical data container: A virtual tape is constructed using a logical data container to aid in emulating a virtual tape by providing tape functionality, reducing seek time and improving recovery time in case of a failure. For example, the logical data container may comprise a global header followed by one or more data... Agent: Amazon Technologies, Inc.
20140181397 - Synchronous management of disk flush requests: In a process for migrating a virtual machine's storage from a source disk to a destination disk, a virtual machine monitor (VMM) records a source-generation count representing contents on the source disk, a writes-mirrored value representing a number of writes replicated from the source disk to the destination disk at... Agent: Red Hat, Inc.
20140181398 - Configuring object storage system for input/output operations: A method processes input-output commands (IOs) in a storage system. The storage system receives an IO including first and second identifiers. The first identifier is used to direct the IO to the storage system. At the storage system, the method retrieves the second identifier from the IO and translates the... Agent: Vmware, Inc.
20140181400 - Method for a storage device processing data and storage device: A method and an apparatus for tiered storage processing of data, and a storage device. The method includes: splitting the migration unit into multiple migration subunits when a migration unit of low-tier disks is migrated to high-tier disks, and detecting a data access frequency of each migration subunit respectively; migrating... Agent: Huawei Technologies Co., Ltd.
20140181399 - System and method for providing long-term storage for data: A system for storing files comprises a processor and a memory. The processor is configured to break a file into one or more segments; store the one or more segments in a first storage unit; and add metadata to the first storage unit so that the file can be accessed... Agent: Emc Corporation
20140181401 - Method and apparatus for querying for and traversing virtual memory area: Embodiments of the present invention disclose a method and an apparatuses for querying for and traversing a virtual memory area. The method includes: determining whether a virtual memory area (vma) corresponding to a query address is in an adjacent range of a cached vma, and if the vma corresponding to... Agent: Huawei Technologies Co., Ltd.
20140181403 - Cache policies for uncacheable memory requests: b
20140181404 - Information coherency maintenance systems and methods: Systems and methods for coherency maintenance are presented. The systems and methods include utilization of multiple information state tracking approaches or protocols at different memory or storage levels. In one embodiment, a first coherency maintenance approach (e.g., similar to a MESI protocol, etc.) can be implemented at one storage level... Agent: Nvidia Corporation
20140181402 - Selective cache memory write-back and replacement policies: A method of managing cache memory includes assigning a caching priority designator to an address that addresses information stored in a memory system. The information is stored in a cacheline of a first level of cache memory in the memory system. The cacheline is evicted from the first level of... Agent: Advanced Micro Devices, Inc.
20140181405 - Instruction cache having a multi-bit way prediction mask: In a particular embodiment, an apparatus includes control logic configured to selectively set bits of a multi-bit way prediction mask based on a prediction mask value. The control logic is associated with an instruction cache including a data array. A subset of line drivers of the data array is enabled... Agent: Qualcomm Incorporated
20140181406 - System, method and computer-readable medium for spool cache management: A system, method, and computer-readable medium that facilitate efficient use of cache memory in a massively parallel processing system are provided. A residency time of a data block to be stored in cache memory or a disk drive is estimated. A metric is calculated for the data block as a... Agent: Teradata Corporation
20140181407 - Way preparation for accessing a cache: For a memory access at a processor, only a subset (less than all) of the ways of a cache associated with a memory address is prepared for access. The subset of ways is selected based on stored information indicating, for each memory access, which corresponding way of the cache was... Agent: Advanced Micro Devices, Inc.
20140181408 - Managing global cache coherency in a distributed shared caching for clustered file systems: Systems. Methods, and Computer Program Products are provided for managing a global cache coherency in a distributed shared caching for a clustered file systems (CFS). The CFS manages access permissions to an entire space of data segments by using the DSM module. In response to receiving a request to access... Agent: International Business Machines Corporation
20140181410 - Management of cache size: In response to a processor core exiting a low-power state, a cache is set to a minimum size so that fewer than all of the cache's entries are available to store data, thus reducing the cache's power consumption. Over time, the size of the cache can be increased to account... Agent: Advanced Micro Devices, Inc.
20140181412 - Mechanisms to bound the presence of cache blocks with specific properties in caches: A system and method for efficiently limiting storage space for data with particular properties in a cache memory. A computing system includes a cache and one or more sources for memory requests. In response to receiving a request to allocate data of a first type, a cache controller allocates the... Agent: Advanced Micro Devices, Inc.
20140181409 - Method and system for queue descriptor cache management for a host channel adapter: A method for managing a queue descriptor cache of a host channel adaptor (HCA) includes obtaining a queue descriptor from memory. The queue descriptor includes data describing a queue and the memory is located in a host system. The method further includes storing a copy of the queue descriptor in... Agent: Oracle International Corporation
20140181411 - Processing device with independently activatable working memory bank and methods: A data processing device is provided that includes an array of working memory banks and an associated processing engine. The working memory bank array is configured with at least one independently activatable memory bank. A dirty data counter (DDC) is associated with the independently activatable memory bank and is configured... Agent: Advanced Micro Devices, Inc.
20140181414 - Mechanisms to bound the presence of cache blocks with specific properties in caches: A system and method for efficiently limiting storage space for data with particular properties in a cache memory. A computing system includes a cache array and a corresponding cache controller. The cache array includes multiple banks, wherein a first bank is powered down. In response a write request to a... Agent: Advanced Micro Devices, Inc.
20140181413 - Method and system for shutting down active core based caches: A system and method are presented. Some embodiments include a processing unit, at least one memory coupled to the processing unit, and at least one cache coupled to the processing unit and divided into a series of blocks, wherein at least one of the series of cache blocks includes data... Agent: Advanced Micro Devices, Inc.
20140181415 - Prefetching functionality on a logic die stacked with memory: Prefetching functionality on a logic die stacked with memory is described herein. A device includes a logic chip stacked with a memory chip. The logic chip includes a control block, an in-stack prefetch request handler and a memory controller. The control block receives memory requests from an external source and... Agent: Advanced Micro Devices, Inc.
20140181416 - Resource management within a load store unit: A load store pipeline 18 includes an issue queue 20 and load store circuitry 24. The load store circuitry 24 includes the plurality of access slot circuits 26 to 40. Dependency tracking circuitry 42, 44, 46, 48 serves to track a freeable number of access slot circuits 26 to 42... Agent: Arm Limited
20140181417 - Cache coherency using die-stacked memory device with logic die: A die-stacked memory device implements an integrated coherency manager to offload cache coherency protocol operations for the devices of a processing system. The die-stacked memory device includes a set of one or more stacked memory dies and a set of one or more logic dies. The one or more logic... Agent: Advanced Micro Devices, Inc.
20140181418 - Managing global cache coherency in a distributed shared caching for clustered file systems: Systems. Methods, and Computer Program Products are provided for managing a global cache coherency in a distributed shared caching for a clustered file systems (CFS). The CFS manages access permissions to an entire space of data segments by using the DSM module. In response to receiving a request to access... Agent: International Business Machines Corporation
20140181419 - Credit lookahead mechanism: Systems and methods for preventing excessive buffering of transactions in a coherence point. The coherence point uses a lookahead mechanism to determine if there are enough credits from the memory controller for forwarding the outstanding transactions stored in the IRQ. If there are not enough credits, then the coherence point... Agent: Apple Inc.
20140181420 - Distributed cache coherency directory with failure redundancy: A system includes a number of processors with each processor including a cache memory. The system also includes a number of directory controllers coupled to the processors. Each directory controller may be configured to administer a corresponding cache coherency directory. Each cache coherency directory may be configured to track a... Agent: Oracle International Corporation
20140181421 - Processing engine for complex atomic operations: A system includes an atomic processing engine (APE) coupled to an interconnect. The interconnect is to couple to one or more processor cores. The APE receives a plurality of commands from the one or more processor cores through the interconnect. In response to a first command, the APE performs a... Agent: Advanced Micro Devices, Inc.
20140181422 - Protocol engine for processing data in a wireless transmit/receive unit: A protocol engine (PE) for processing data within a protocol stack in a wireless transmit/receive unit (WTRU) is disclosed. The protocol stack executes decision and control operations. The data processing and re-formatting which was performed in a conventional protocol stack is removed from the protocol stack and performed by the... Agent: Interdigital Technology Corporation
20140181424 - Semiconductor memory system and operation method thereof: A semiconductor memory system may include a plurality of memory devices each configured to have multiple planes, and an access controller configured to access each of the multiple planes corresponding to each of the plurality of memory devices as a unit memory.... Agent: Sk Hynix Inc.
20140181423 - System and method for implementing numa-aware statistics counters: The systems and methods described herein may be used to implement scalable statistics counters suitable for use in systems that employ a NUMA style memory architecture. The counters may be implemented as data structures that include a count value portion and a node identifier portion. The counters may be accessible... Agent: Oracle International Corporation
20140181425 - Method for divisionally managing files on a user basis, and a storage system and computer program product thereof: According to one embodiment, a method for a plurality of users to write at least one file to a medium in such a manner that the file is divisionally managed in a system environment in which an input/output control is performed on a storage system includes saving, in the medium... Agent: International Business Machines Corporation
20140181427 - Compound memory operations in a logic layer of a stacked memory: Some die-stacked memories will contain a logic layer in addition to one or more layers of DRAM (or other memory technology). This logic layer may be a discrete logic die or logic on a silicon interposer associated with a stack of memory dies. Additional circuitry/functionality is placed on the logic... Agent: Advanced Micro Devices, Inc.
20140181426 - Memory devices and their operation having trim registers associated with access operation commands: Methods, and apparatus configured to perform methods, including loading trim settings into a trim register of a memory device associated with a command for an access operation, receiving the command for the access operation at the memory device, setting trims for the access operation in response to the trim settings... Agent: Micron Technology, Inc.
20140181429 - Multi-dimensional hardware data training between memory controller and memory: A method of training a memory interface between a memory controller and a memory module. The method includes programming a delay line of a data strobe with a delay value and programming a reference voltage with a voltage value. The method then writes a data bit pattern to the memory... Agent: Nvidia Corporation
20140181428 - Quality of service support using stacked memory device with logic die: A die-stacked memory device implements an integrated QoS manager to provide centralized QoS functionality in furtherance of one or more specified QoS objectives for the sharing of the memory resources by other components of the processing system. The die-stacked memory device includes a set of one or more stacked memory... Agent: Advanced Micro Devices, Inc.
20140181430 - Equalizing wear on storage devices through file system controls: Data stored in file blocks and storage blocks of a storage device may be tracked by the file system. The file system may track a number of writes performed to each file block and storage block. The file system may also track a state of each storage block. The file... Agent: Unisys Corporation
20140181431 - Facilitation of simultaneous storage initialization and data destage: Various embodiments for storage initialization and data destage in a computing storage environment are provided. At least a portion of data on a storage device is initialized using a background process, while one of simultaneously and subsequently destaging the at least the portion of the data to the storage device... Agent: International Business Machines Corporation
20140181432 - Priority-based garbage collection for data storage systems: Priority-based garbage collection utilizes attributes of data stored in the non-volatile memory array in order to improve efficiency of garbage collection and of the overall data storage system. A set of low priority data can be selectively evicted from a non-volatile memory array. This can, for example, reduce write amplification... Agent: Western Digital Technologies, Inc.
20140181433 - Storage device and method for enabling hidden functionality: A storage device and method for enabling hidden functionality are provided. In one embodiment, a storage device is provided comprising an interface a memory, and a controller. The controller is configured to receive a series of read and/or write commands to the memory from the host device. If the series... Agent:
20140181443 - Archiving using data obtained during backup of primary storage: A data storage system can scan one or more information stores of primary storage and analyze the metadata of files stored in the one or more information stores of primary storage to identify multiple, possibly relevant, secondary copy operations that can be performed on the files. The storage system can... Agent:
20140181437 - Equalizing wear on mirrored storage devices through file system controls: Data stored in file blocks and storage blocks of a storage device may be tracked by the file system. The file system may track a number of writes performed to each file block and storage block. The file system may also track a state of each storage block. The file... Agent: Unisys Corporation
20140181438 - Filtered reference copy of secondary storage data in a data storage system: The data storage system according to certain aspects can filter secondary copies of data (e.g., backups, snapshots, archives, etc.) generated by multiple client computing devices into a single, filtered, global reference copy. A reference copy may be a filtered view or representation of secondary storage data in a data storage... Agent:
20140181441 - Identifying files for multiple secondary copy operations using data obtained during backup of primary storage: A data storage system can scan one or more information stores of primary storage and analyze the metadata of files stored in the one or more information stores of primary storage to identify multiple, possibly relevant, secondary copy operations that can be performed on the files. The storage system can... Agent:
20140181434 - Integrated and naturalized static wear-leveling for block mapping: Another embodiment is a technique to maintain a FIFO static pool. All valid data are consolidated when a data collection condition is met. An erased block is selected from a free set. All consolidated data are copied into the erased block to form a new block. The new block is... Agent: Virtium Technology, Inc.
20140181436 - Isolating data storage mirroring operations: Systems, methods, and computer-readable storage media for isolating mirroring operations when interacting with a data storage space, and more specifically to directing data to be stored in two locations, where storing the data in the second location does not slow or impede storing the data in the first location. Upon... Agent: Dropbox, Inc.
20140181439 - Memory system: A memory system includes a processor, one or more volatile memory dies stacked with the processor and one or more nonvolatile memory dies stacked with the processor and the volatile memory dies. The processor transfers data stored in the volatile memory die to the nonvolatile memory die in response to... Agent:
20140181435 - Multiple computer system processing write data outside of checkpointing: The disclosure describes a system including a first computer system including a first memory controller and a first inter-computer transfer interface to send information about write operations over an interconnect to a second computer system. A second computer system includes a second memory controller and a second inter-computer transfer interface... Agent:
20140181442 - Reporting using data obtained during backup of primary storage: A data storage system can scan one or more information stores of primary storage and analyze the metadata of files stored in the one or more information stores of primary storage to identify multiple, possibly relevant, secondary copy operations that can be performed on the files. The storage system can... Agent:
20140181444 - Storage apparatus and area releasing method: A storage apparatus performs, in place of a copy process which involves physical resource allocation to a copy destination logical volume, a copy process which allows the copy destination logical volume to refer to an allocation destination managed by a management unit area of a copy source logical volume. A... Agent: Fujitsu Limited
20140181447 - Structured block transfer module, system architecture, and method for transferring: Structured block transfer module, system architecture, and method for transferring content or data. Circuit allowing content in one memory to be shifted, moved, or copied to another memory with no direction from a host, the circuit comprising: a connection manager, at least one copy engine, and a connection between the... Agent: Synopsys, Inc.
20140181446 - System and method for optimizing protection levels when replicating data in an object storage system: A redundant array of independent nodes are networked together. Each node executes an instance of an application that provides object-based storage. The nodes are grouped into a plurality of systems each having multiple nodes. A data protection level method comprises setting a numerical value of a system dynamic data protection... Agent: Hitachi Data Systems Corporation
20140181440 - Systems and methods for copying data maintained in a dynamic storage volume and verifying the copied data: A first volume comprising a plurality of blocks stored in a first location is accessed. A plurality of hash values representing the plurality of blocks is stored. The plurality of blocks is copied to a second volume stored in a second location, generating a copied volume. The copied volume is... Agent: Cirrus Data Solutions, Inc.
20140181445 - Systems and methods for processing instructions while repairing and providing access to a copied volume of data: A volume of data is copied from a first location to a second location. A procedure to repair a volume of data is initiated. A first instruction associated with the repair procedure is selectively redirected to a staging storage, based on a determination that the first instruction relates to an... Agent: Cirrus Data Solutions, Inc.
20140181449 - Memory controller and memory system including the same: A memory system includes a memory unit and a memory controller. The memory unit includes a plurality of memory banks, wherein an information stored in a memory bank is accessed via a word line and a bit line. The memory controller is configured to limit repetitive accessing of a same... Agent:
20140181448 - Tagging in a storage device: In an embodiment, a command issued by an entity may be acquired by a controller contained in a storage device. The command may be issued by the entity to access a block in the storage device. The entity may be associated with a tag that may identify the entity. The... Agent:
20140181450 - Computer system and its management method: Resources migrated from migration source storage apparatuses to a migration destination storage apparatus are appropriately allocated to each migration source user. A migration destination storage apparatus among a plurality of storage apparatuses and has a controller for sending or receiving information to or from a host computer and managing each... Agent: Hitachi, Ltd
20140181452 - Hardware command training for memory using read commands: A method of training command signals for a memory module. The method includes programming a memory controller into a mode wherein a column access strobe is active for a single clock cycle. The method then programs a programmable delay line of the column access strobe with a delay value and... Agent: Nvidia Corporation
20140181451 - Hardware command training for memory using write leveling mechanism: A method of training a command signal for a memory module. The method includes programming a memory controller into a mode wherein a single bit of an address signal is active for a single clock cycle. The method then programs a programmable delay line of the address signal with a... Agent: Nvidia Corporation
20140181454 - Method and system for efficient memory region deallocation: A method for deallocation of a memory region involving transmitting, by a host channel adapter (HCA), a first invalidation command for invalidating at least one key associated with the memory region, transmitting, by the HCA, a second invalidation command for invalidating a translation lookaside buffer (TLB) entry for the memory... Agent: Oracle International Corporation
20140181453 - Processor with host and slave operating modes stacked with memory: A system, method, and computer program product are provided for a memory device system. One or more memory dies and at least one logic die are disposed in a package and communicatively coupled. The logic die comprises a processing device configurable to manage virtual memory and operate in an operating... Agent: Advanced Micro Devices, Inc.
20140181455 - Category based space allocation for multiple storage devices: The invention provides a technique for carrying out a request to store data. The technique includes the steps of receiving, from an application, the request to store data, and determining a storage functionality associated with the request. The storage functionality represents a particular storage function (e.g., RAID-5) that can be... Agent: Apple Inc.
20140181456 - Memory, memory controller, memory system including the memory and the memory controller, and operating method of the memory system: A memory controller may include a reception unit configured to receive count information on the number of failed addresses in a memory, an address generation unit configured to generate an address having a value between a minimum address value and a maximum address value, wherein the maximum address value is... Agent: Sk Hynix Inc.
20140181458 - Die-stacked memory device providing data translation: A die-stacked memory device incorporates a data translation controller at one or more logic dies of the device to provide data translation services for data to be stored at, or retrieved from, the die-stacked memory device. The data translation operations implemented by the data translation controller can include compression/decompression operations,... Agent: Advanced Micro Devices, Inc.
20140181457 - Write endurance management techniques in the logic layer of a stacked memory: A system, method, and memory device embodying some aspects of the present invention for remapping external memory addresses and internal memory locations in stacked memory are provided. The stacked memory includes one or more memory layers configured to store data. The stacked memory also includes a logic layer connected to... Agent: Advanced Micro Devices, Inc.
20140181463 - Dynamic address translation with translation table entry format control for identifying format of the translation table entry: An enhanced dynamic address translation facility is provided. In one embodiment, a virtual address to be translated and an initial origin address of a translation table of the hierarchy of translation tables are obtained. An index portion of the virtual address is used to reference an entry in the translation... Agent: International Business Machines Corporation
20140181460 - Processing device with address translation probing and methods: A data processing device is provided that employs multiple translation look-aside buffers (TLBs) associated with respective processors that are configured to store selected address translations of a page table of a memory shared by the processors. The processing device is configured such that when an address translation is requested by... Agent: Advanced Micro Devices, Inc.
20140181461 - Reporting access and dirty pages: A method and apparatus for reporting events into at least one event log are presented. An “access” event entry may be added to an event log stored in memory when a peripheral device accesses an address of a memory page described by a page table entry (PTE). A “dirty” event... Agent: Advanced Micro Devices, Inc.
20140181459 - Speculative addressing using a virtual address-to-physical address page crossing buffer: A method includes receiving an instruction to be executed by a processor. The method further includes performing a lookup in a page crossing buffer that includes one or more entries to determine if the instruction has an entry in the page crossing buffer. Each of the entries includes a physical... Agent: Qual Comm Incorporated
20140181462 - Virtual address based memory reordering: A method for detecting an instruction ordering violation in a CPU. The method includes receiving a reordered stream of instructions and detecting whether an ordering violation has occurred by using virtual addresses. The method further includes transferring results of the reordered stream of instructions from a load store buffer into... Agent: Nvidia Corporation
20140181464 - Coalescing adjacent gather/scatter operations: According to one embodiment, a processor includes an instruction decoder to decode a first instruction to gather data elements from memory, the first instruction having a first operand specifying a first storage location and a second operand specifying a first memory address storing a plurality of data elements. The processor... Agent:
20140181465 - Increased in-line deduplication efficiency: Exemplary embodiments for increased in-line deduplication efficiency in a computing environment are provided. Embodiments include incrementing the size of data samples from fixed size data chunks for each nth iteration for reaching a full size of an object requested for in-line deduplication, calculating in nth iterations hash values on data... Agent: International Business Machines Corporation06/19/2014 > 77 patent applications in 32 patent subcategories.
20140173169 - Controlling access to groups of memory pages in a virtualized environment: Embodiments of an invention for controlling access to groups of memory pages in a virtualized environment are disclosed. In one embodiment, a processor includes a virtualization unit and a memory management unit. The virtualization unit is to transfer control of the processor to a virtual machine. The memory management unit... Agent:
20140173170 - Multiple subarray memory access: A multiple subarray-access memory system is disclosed. The system includes a plurality of memory chips, each including a plurality of subarrays and a memory controller in communication. with the memory chips, the memory controller to receive a memory fetch width (“MFW”) instruction during an operating system start-up and responsive to... Agent: Hewlett-packard Development Company, L.p.
20140173171 - System and method to create a non-volatile bootable ram disk: A manufacturing testing system includes an information handling system, a RAM memory device including a reserved physical RAM address space, non-volatile bootable disk, and a header for the reserved physical RAM address space. The head may include a non-volatile bootable disk signature, a start physical address, a length of reserved... Agent: Dell Products, Lp
20140173172 - System and method to update read voltages in a non-volatile memory in response to tracking data: A method includes reading a representation of tracking data from at least a portion of a non-volatile memory. The method further includes adjusting a read voltage based on a comparison between a number of bits in tracking data as compared to a count of bits in the representation of the... Agent: Sandisk Technologies Inc.
20140173189 - Computing system using nonvolatile memory as main memory and method for managing the same: A method of managing data of a computing system is provided, where the computing system uses a nonvolatile memory as a main memory. The method includes loading a process into the nonvolatile memory in response to a first run request, freezing the process loaded into the nonvolatile memory in response... Agent:
20140173183 - Data storage device and method of operating the same: An operating method of a data storage device including nonvolatile memory devices includes making a victim block list for victim blocks for which a merge operation is to be performed and copying valid pages of the victim bocks to a merge block. The method also includes determining whether there is... Agent:
20140173184 - Data storage device and operating method thereof: A method of operating a data storage device includes setting program verify voltages for verifying whether memory cells of a nonvolatile memory device are programmed to desired program states; transmitting the set program verify voltages to the nonvolatile memory device; generating data patterns respectively corresponding to program states based on... Agent: Sk Hynix Inc.
20140173176 - Heap-based mechanism for efficient garbage collection block selection: A maximum value is retrieved from a highest level of the max heap structure. The max heap structure is traversed down to lowest level using the maximum value at each level until reaching the lowest level. The lowest level corresponds to N page counters. One of the N blocks having... Agent: Virtium Technology, Inc.
20140173188 - Information processing device: An information processing device includes: an SSD storage controlling unit for storing a physical address of a storage region of data stored in an SSD (Solid State Drive) and a number of updates of the storage region, as SSD update information into the SSD; a backup storage controlling unit for... Agent: Nec Corporation
20140173178 - Joint logical and physical address remapping in non-volatile memory: A method includes, for data items that are to be stored in a non-volatile memory in accordance with respective logical addresses, associating the logical addresses with respective physical storage locations in the non-volatile memory, and storing the data items in the respective associated physical storage locations. A remapping command, which... Agent: Apple Inc.
20140173186 - Journaling raid system: A method of providing data storage is disclosed that includes writing a plurality of data non-sequentially to at least one first storage drive, the at least one first storage drive having a random first input/output operations per second (IOPS) speed, and writing the plurality of data and an associated plurality... Agent: Nexsan Corporation
20140173174 - Lower page read for multi-level cell memory: An electronic memory or controller may use a first type of read command, addressed to a first page of memory of an electronic memory that includes information to indicate that a second page of memory of the electronic memory has not been programmed and a second type of read command,... Agent:
20140173173 - Method, device, and system including configurable bit-per-cell capability: A method includes providing a partition command to a device that includes a memory array including a plurality of memory cells. In response to the providing of the partition command, the memory cells of the memory array are partitioned to select a portion of the memory array. In response to... Agent: Elpida Memory, Inc.
20140173175 - Nand command aggregation: An embodiment is a method and apparatus to provide an optimization of commands in a flash device. Commands sent by at least a top-level processor to a flash device are buffered in a buffer. The buffered commands are analyzed for an optimizing condition. The commands are aggregated if the optimizing... Agent: Virtium Technology, Inc.
20140173182 - Nonvolatile semiconductor memory: According to one embodiment, a memory includes a temporary storage area which temporary stores data in a read/write operation to an array. The temporary storage area comprises a clamp FET connected between a first data bus and a second data bus, a first precharge FET connected between the first data... Agent: Kabushiki Kaisha Toshiba
20140173181 - Rapid virtual machine suspend and resume: A method of enabling “fast” suspend and “rapid” resume of virtual machines (VMs) employs a cache that is able to perform input/output operations at a faster rate than a storage device provisioned for the VMs. The cache may be local to a computer system that is hosting the VMs or... Agent: Vmware, Inc.
20140173191 - Semiconductor memory system having a snapshot function: In a semiconductor memory computer equipped with a flash memory, use of backed-up data is enabled. The semiconductor memory computer includes an address conversion table for detecting physical addresses of at least two pages storing data by designating a logical address from one of logical addresses to be designated by... Agent: Hitachi, Ltd.
20140173190 - Techniques to perform power fail-safe caching without atomic metadata: A method and system to allow power fail-safe write-back or write-through caching of data in a persistent storage device into one or more cache lines of a caching device. No metadata associated with any of the cache lines is written atomically into the caching device when the data in the... Agent:
20140173180 - Tracking read accesses to regions of non-volatile memory: A data storage device includes a memory and a controller and may perform a method that includes updating, in the controller, a value of a particular counter of a set of counters in response to a read access to a particular region of the non-volatile memory that is tracked by... Agent: Sandisk Technologies Inc.
20140173179 - Virtual boundary codes in a data image of a read-write memory device: Methods, systems and devices are provided for configuring a read-write memory device with a data image. The method includes determining a data image distribution based on a virtual block size of a series of virtual blocks designated for the read-write memory device. The data image is divided into one or... Agent: Qualcomm Incorporated
20140173187 - Virtual boundary codes in a data image of a read-write memory device: Methods, systems and devices are provided for revising a data image of a read-write memory device. The method includes accessing an initial data image from an initial virtual block corresponding to an actual block of a series of actual blocks of the read-write memory device. The initial data image includes... Agent: Qualcomm Incorporated
20140173185 - Write performance in fault-tolerant clustered storage systems: Embodiments of the invention relate to supporting transaction data committed to a stable storage. Committed data in the cluster is stored in the persistent cache layer and replicated and stored in the cache layer of one or more secondary nodes. One copy is designated as a master copy and all... Agent: International Business Machines Corporation
20140173177 - Write performance in solid state storage by recognizing copy source to target operations and only storing updates instead of entire block: A mechanism is provided in a data processing system for accessing a solid state drive. Responsive to receiving request to write an update to a block of data in the solid state drive with an update option set, the mechanism reads the block of data from the solid state drive.... Agent: International Business Machines Corporation
20140173192 - Execution engine for executing single assignment programs with affine dependencies: The execution engine is a new organization for a digital data processing apparatus, suitable for highly parallel execution of structured fine-grain parallel computations. The execution engine includes a memory for storing data and a domain flow program, a controller for requesting the domain flow program from the memory, and further... Agent: Stillwater Supercomputing, Inc.
20140173193 - Technique for accessing content-addressable memory: A tag unit configured to manage a cache unit includes a coalescer that implements a set hashing function. The set hashing function maps a virtual address to a particular content-addressable memory unit (CAM). The coalescer implements the set hashing function by splitting the virtual address into upper, middle, and lower... Agent: Nvidia Corporation
20140173194 - Computer system management apparatus and management method: The present invention measures an actual utilization frequency of data and controls a location of this data in a storage apparatus in a case where a host computer makes joint use of a storage apparatus and a cache apparatus. A portion of data used by an application program 1A is... Agent: Hitachi, Ltd.
20140173198 - Method and apparatus for decomposing i/o tasks in a raid system: A data access request to a file system is decomposed into a plurality of lower-level I/O tasks. A logical combination of physical storage components is represented as a hierarchical set of objects. A parent I/O task is generated from a first object in response to the data access request. A... Agent: Netapp, Inc.
20140173197 - Method and storage drive for writing portions of blocks of data in respective arrays of memory cells of corresponding integrated circuits: A storage drive includes a first integrated circuit, a second integrated circuit, an interface, an encoder, and a write module. The first integrated circuit includes a first array of memory cells. The second integrated circuit includes a second array of memory cells. The interface is connected to a host. The... Agent: Marvell World Trade Ltd.
20140173196 - Rapid virtual machine suspend and resume: A method of enabling “fast” suspend and “rapid” resume of virtual machines (VMs) employs a cache that is able to perform input/output operations at a faster rate than a storage device provisioned for the VMs. The cache may be local to a computer system that is hosting the VMs or... Agent: Vmware, Inc.
20140173195 - System and method for in-band lun provisioning in a data center network environment: A method is provided in one example embodiment and includes instantiating a virtual adapter on a network device connected to a storage array, the virtual adapter capable of communicating with the storage array; determining storage configuration properties for the network device; and provisioning a portion of the storage array to... Agent: Cisco Technology, Inc.
20140173199 - Enhancing analytics performance using distributed multi-tiering: Embodiments of the invention relate to cluster-centric tiered storage with a flexible tier definition to support performance of transactions. Object data is distributed in a multi-tiered shared-nothing cluster. Hierarchical tiers of data storage are assigned different roles within the hierarchy. The tiers are managed globally across the cluster and objects... Agent: International Business Machines Corporation
20140173201 - Acquiring remote shared variable directory information in a parallel computer: Methods, parallel computers, and computer program products for acquiring remote shared variable directory (SVD) information in a parallel computer are provided. Embodiments include a runtime optimizer determining that a first thread of a first task requires shared resource data stored in a memory partition corresponding to a second thread of... Agent: International Business Machines Corporation
20140173202 - Information processing apparatus and scheduling method: An information processing apparatus includes: at least one access unit that issues a memory access request for a memory; an arbitration unit that arbitrates the memory access request issued from the access unit; a management unit that allows the access unit that is an issuance source of the memory access... Agent: Fujitsu Limited
20140173200 - Non-blocking caching technique: The described implementations relate to processing of electronic data. One implementation is manifested as a system that can include a cache module and at least one processing device configured to execute the cache module. The cache module can be configured to store data items in slots of a cache structure,... Agent: Microsoft Corporation
20140173203 - Block memory engine: In an embodiment, a processor is disclosed and includes a cache memory and a memory execution cluster coupled to the cache memory. The memory execution cluster includes a memory execution unit to execute instructions including non-block memory instructions, and block memory logic to execute one or more block memory operations.... Agent:
20140173204 - Analyzing update conditions for shared variable directory information in a parallel computer: Methods, parallel computers, and computer program products for analyzing update conditions for shared variable directory (SVD) information in a parallel computer are provided. Embodiments include a runtime optimizer receiving a compare-and-swap operation header. The compare-and-swap operation header includes an SVD key, a first SVD address, and an updated first SVD... Agent: International Business Machines Corporation
20140173205 - Analyzing update conditions for shared variable directory information in a parallel computer: Methods, parallel computers, and computer program products for analyzing update conditions for shared variable directory (SVD) information in a parallel computer are provided. Embodiments include a runtime optimizer receiving a compare-and-swap operation header. The compare-and-swap operation header includes an SVD key, a first SVD address, and an updated first SVD... Agent: International Business Machines Corporation
20140173206 - Power gating a portion of a cache memory: In an embodiment, a processor includes multiple tiles, each including a core and a tile cache hierarchy. This tile cache hierarchy includes a first level cache, a mid-level cache (MLC) and a last level cache (LLC), and each of these caches is private to the tile. A controller coupled to... Agent:
20140173208 - Methods and apparatus for multi-level cache hierarchies: A multi-level cache structure in accordance with one embodiment includes a first cache structure and a second cache structure. The second cache structure is hierarchically above the first cache. The second cache includes a tag array comprising a plurality of tag entries corresponding to respective addresses of data within a... Agent: Advanced Micro Devices, Inc.
20140173207 - Power gating a portion of a cache memory: In an embodiment, a processor includes multiple tiles, each including a core and a tile cache hierarchy. This tile cache hierarchy includes a first level cache, a mid-level cache (MLC) and a last level cache (LLC), and each of these caches is private to the tile. A controller coupled to... Agent:
20140173209 - Presenting enclosure cache as local cache in an enclosure attached server: Presenting enclosure cache as local cache in an enclosure attached server, including: determining, by the enclosure, a cache hit rate for local server cache in each of a plurality of enclosure attached servers; determining, by the enclosure, an amount of available enclosure cache for use by one or more of... Agent: International Business Machines Corporation
20140173210 - Multi-core processing device with invalidation cache tags and methods: A data processing device is provided that facilitates cache coherence policies. In one embodiment, a data processing device utilizes invalidation tags in connection with a cache that is associated with a processing engine. In some embodiments, the cache is configured to store a plurality of cache entries where each cache... Agent: Advanced Micro Devices, Inc.
20140173212 - Acquiring remote shared variable directory information in a parallel computer: Methods, parallel computers, and computer program products for acquiring remote shared variable directory (SVD) information in a parallel computer are provided. Embodiments include a runtime optimizer determining that a first thread of a first task requires shared resource data stored in a memory partition corresponding to a second thread of... Agent: International Business Machines Corporation
20140173211 - Partitioning caches for sub-entities in computing devices: Some embodiments include a partitioning mechanism that partitions a cache memory into sub-partitions for sub-entities. In the described embodiments, the cache memory is initially partitioned into two or more partitions for one or more corresponding entities. During a partitioning operation, the partitioning mechanism is configured to partition one or more... Agent: Advanced Micro Devices
20140173213 - Rapid virtual machine suspend and resume: A method of enabling “fast” suspend and “rapid” resume of virtual machines (VMs) employs a cache that is able to perform input/output operations at a faster rate than a storage device provisioned for the VMs. The cache may be local to a computer system that is hosting the VMs or... Agent: Vmware, Inc.
20140173216 - Invalidation of dead transient data in caches: Embodiments include methods, systems, and articles of manufacture directed to identifying transient data upon storing the transient data in a cache memory, and invalidating the identified transient data in the cache memory.... Agent: Advanced Micro Devices, Inc.
20140173215 - Methods and systems for provisioning a bootable image on to an external drive: The present invention relates to a method of optimizing the provisioning of a bootable image onto a storage device. In some embodiments, a host device executes a provisioning application to image a storage drive as a bootable drive. During the provisioning process, the storage device is configured to disguise its... Agent: Western Digital Technologies, Inc.
20140173214 - Retention priority based cache replacement policy: A data processing system includes a cache memory 58 and cache control circuitry 56 for applying a cache replacement policy based upon a retention priority value PV stored with each cache line 66 within the cache memory 58. The initial retention priority value set upon inserting a cache line 66... Agent: Arm Limited
20140173217 - Tracking prefetcher accuracy and coverage: A method, an apparatus, and a non-transitory computer readable medium for tracking accuracy and coverage of a prefetcher in a processor are presented. A table is maintained and indexed by an address, wherein each entry in the table corresponds to one address. A number of demand requests that hit in... Agent: Advanced Micro Devices, Inc.
20140173218 - Cross dependency checking logic: Systems and methods for maintaining an order of transactions in the coherence point. The coherence point stores attributes associated with received transactions in an input request queue (IRQ). When a new transaction is received by the coherence point, the IRQ is searched for other entries with the same request address... Agent: Apple Inc.
20140173219 - Lightweight observable values for multiple grids: A method, computer program product, and computer system for updating observable values for multiple user-interface components. A computer system reads first values indexed by keys from a cache, in response to receiving a request from the multiple user-interface components. The computer system reads second values, which are indexed by the... Agent: International Business Machines Corporation
20140173220 - Using logical block addresses with generation numbers as data fingerprints to provide cache coherency: The technique introduced here involves using a block address and a corresponding generation number as a “fingerprint” to uniquely identify a sequence of data within a given storage domain. Each block address has an associated generation number which indicates the number of times that data at that block address has... Agent:
20140173221 - Cache management: The present disclosure provides techniques for cache management. A data block may be received from an IO interface. After receiving the data block, the occupancy level of a cache memory may be determined. The data block may be directed to a main memory if the occupancy level exceeds a threshold.... Agent:
20140173222 - Validating cache coherency protocol within a processor: A mechanism is provided for effectively validating cache coherency within a processor. For each node in a set of nodes, responsive to a node in a set of nodes being a controlling node, at least one action is performed on each controlled node mapped to the controlling node. After performing... Agent: International Business Machines Corporation
20140173223 - Storage controller with host collaboration for initialization of a logical volume: A device includes a storage controller for accessing a logical volume. The storage controller collaborates with a host to initialize the logical volume such that host resources perform a portion of the initialization of the logical volume.... Agent:
20140173225 - Reducing memory access time in parallel processors: Apparatus, computer readable medium, and method of servicing memory requests are presented. A first plurality of memory requests are associated together, wherein each of the first plurality of memory requests is generated by a corresponding one of a first plurality of processors, and wherein each of the first plurality of... Agent: Advanced Micro Devices, Inc.
20140173224 - Sequential location accesses in an active memory device: Embodiments relate to sequential location accesses in an active memory device that includes memory and a processing element. An aspect includes a method for sequential location accesses that includes receiving from the memory a first group of data values associated with a queue entry at the processing element. A tag... Agent: International Business Machines Corporation
20140173226 - Logical object deletion: The presently disclosed subject matter includes a method and system for enabling the deletion of logical objects characterized by an object identifier (OID). Upon restart following a system interruption, one or more logical objects are identified, each object being addressed by an interrupted delete request. For each identified logical object... Agent: Infinidat Ltd.
20140173228 - Memory system and system on chip including the same: In one example embodiment, a memory system includes a hierarchical first-in first-out (FIFO) memory configured to store data, and a FIFO controller configured to control inputting and outputting of data to and from the FIFO memory, wherein the FIFO memory includes a first layer. The first layer includes a high-speed... Agent: Samsung Electronics Co., Ltd.
20140173227 - Method and apparatus for managing memory in virtual machine environment: A method and apparatus for managing a memory in a portable terminal including a main memory, a secondary memory, and a plurality virtual machines allocated by partitioning the main memory are provided. The method includes generating, by the virtual machines, monitoring information by monitoring access to the main memory and... Agent: Samsung Electronics Co., Ltd.
20140173230 - Application programming interfaces for data synchronization with online storage systems: The disclosed embodiments provide a system that manages access to data associated with an online storage system. During operation, the system enables synchronization of the data between an electronic device and the online storage system through an application programming interface (API) with an application on the electronic device. Next, the... Agent: Dropbox, Inc.
20140173233 - Information processing device, storage processing method, and computer readable recording medium having program stored therein: An information processing device includes: a calculator that calculates the number of pages used for storing management information in a first storage medium; a storage processor that sets pages corresponding to the calculated number of pages as free pages and stores the management information in the set free pages to... Agent: Fujitsu Limited
20140173229 - Method and apparatus for automated migration of data among storage centers: A method for controlling the storage of data among multiple regional storage centers coupled through a network in a global storage system is provided. The method includes steps of: defining at least one dataset comprising at least a subset of the data stored in the global storage system; defining at... Agent: International Business Machines Corporation
20140173232 - Method and apparatus for automated migration of data among storage centers: A method for controlling the storage of data among multiple regional storage centers coupled through a network in a global storage system is provided. The method includes steps of: defining at least one dataset comprising at least a subset of the data stored in the global storage system; defining at... Agent: International Business Machines Corporation
20140173235 - Resilient distributed replicated data storage system: A resilient distributed replicated data storage system is described herein. The storage system includes zones that are independent, and autonomous from each other. The zones include nodes that are independent and autonomous. The nodes include storage devices. When a data item is stored, it is partitioned into a plurality of... Agent: Datadirect Networks, Inc.
20140173234 - Semiconductor memory device and memory system: A semiconductor memory system or device includes a memory cell array and an address converter. The memory cell array includes a plurality of memory blocks, and there is at least one block that serves as a buffer. Each of the memory blocks includes at least one memory cell row. An... Agent: Samsung Electronics Co., Ltd.
20140173231 - Semiconductor memory device and system operating method: Disclosed is a semiconductor memory device for controlling a memory block. The semiconductor memory device includes a plurality of memory blocks to store data, and controller. The memory controller requests a first memory block, of the plurality of memory blocks, to performing a copy operation to copy the first memory... Agent: Sk Hynix Inc.
20140173238 - Methods and circuits for securing proprietary memory transactions: Described are systems and method for protecting data and instructions shared over a memory bus and stored in memory. Independent and separately timed stream ciphers for write and read channels allow timing variations between write and read transactions. Data and instructions can be separately encrypted prior to channel encryption to... Agent: Rambus Inc.
20140173236 - Secure computer system for preventing access requests to portions of system memory by peripheral devices and/or processor cores: A computer system is provided for preventing peripheral devices and/or processor cores from accessing restricted portions of system memory. For example, the computer system can include a host bridge, system memory coupled to the host bridge via a first access bus, a security processor coupled to the host bridge via... Agent:
20140173237 - Storage device, and method for protecting data in storage device: A storage device includes a memory including a first storage area configured to store area information that indicates a geographical area, and a second storage area configured to store data, and a processor coupled to the memory and configured to append data storage information, which indicates a location of the... Agent: Fujitsu Limited
20140173239 - Refreshing of memory blocks using adaptive read disturb threshold: A method includes storing data in a memory that includes multiple memory blocks. A level of distortion that affects a given memory block of the memory is estimated. An adaptive read disturb threshold is set for the given memory block as a function of the estimated level of distortion. Upon... Agent: Apple Inc.
20140173240 - Memory controller with staggered request signal output: A memory controller having a time-staggered request signal output. A first timing signal is generated while a second timing signal is generated having a first phase difference relative to the first timing signal. An address value is transmitted in response to the first timing signal and a control value is... Agent: Rambus Inc.
20140173242 - Method and apparatus for controlling a storage device: A mass storage device such as a disk drive or SSD (solid state drive) employs optimization logic for reduced power consumption in a host personal electronic device that identifies and prioritizes performance and power trade-offs by considering user expectations, user presence and application responsiveness. The storage device receives commands and... Agent:
20140173241 - Method of generating optimized memory instances using a memory compiler: A method of generating optimized memory instances using a memory compiler is disclosed. Data pertinent to describing a memory to be designed are provided, and front-end models and back-end models are made to supply a library. Design criteria are received via a user interface. Design of the memory is optimized... Agent: M31 Technology Corporation
20140173243 - Efficient management of computer memory using memory page associations and memory compression: A method for managing memory operations includes reading a first memory page from a storage device responsive to a request for the first memory page. The first memory page is stored to a system memory. Based on a pre-established set of association rules, one or more associated memory pages are... Agent: Ibm Corporation
20140173244 - Filtering requests for a translation lookaside buffer: The present application describes a method and apparatus for filtering requests to a translation lookaside buffer (TLB). Some embodiments of the method include receiving, from a first translation lookaside buffer (TLB), an indication of a first virtual address associated with a request to a second TLB for a page table... Agent:
20140173245 - Relative addressing usage for cpu performance: The embodiments provide a computing device for incorporating data into code such that the data is relative to the code and, thereby, available for relative addressing. The computing device may include a code generator configured to receive source code from a source code database, and generate executable object code from... Agent: Bmc Software, Inc.Previous industry: Electrical computers and digital data processing systems: input/output
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