|Electrical computers and digital processing systems: memory patents - Monitor Patents|
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Electrical computers and digital processing systems: memory January recently filed with US Patent Office 01/11Below are recently published patent applications awaiting approval from the USPTO. Recent week's RSS XML file available below.
Listing for abstract view: USPTO application #, Title, Abstract excerpt,Patent Agent. Listing format for list view: USPTO National Class full category number, title of the patent application. 01/27/2011 > 47 patent applications in 28 patent subcategories. recently filed with US Patent Office
20110022774 - Cache memory control method, and information storage device comprising cache memory: According to a cache memory control method of an embodiment, a data write position in a segment of a cache memory is changed to an address to which a lower bit of a logical block address of write data is added as an offset. Then, even if writing is completed... Agent: Knobbe Martens Olson & Bear LLP
20110022773 - Fine grained cache allocation: A mechanism is provided in a virtual machine monitor for fine grained cache allocation in a shared cache. The mechanism partitions a cache tag into a most significant bit (MSB) portion and a least significant bit (LSB) portion. The MSB portion of the tags is shared among the cache lines... Agent: Ibm Corp. (wip) C/o Walder Intellectual Property Law, P.C.
20110022775 - Assigning a physical address to a data storage device: A method of assigning a physical address to a tape-based data storage device is provided. The method includes receiving a first initialization signal from a system controller at an input port associated with a first tape-based data storage device and prohibiting communication at an output port associated with the first... Agent: Baker Botts L.L.P.
20110022781 - Controller for optimizing throughput of read operations: A controller, techniques, systems, and devices for optimizing throughput of read operations in flash memory are disclosed. Various optimizations of throughput for read operations can be performed using a controller. In some implementations, read operations for a multi-die flash memory device or system can be optimized to perform a read... Agent: Fish & Richardson P.C.
20110022776 - Data reliability in storage architectures: Among other subject matter, storage architectures are provided that store data reliably in connection with a system. The storage architecture (14) includes a first data reliability facility (32), and a second data reliability facility (34), where the second data reliability facility (34) is encoded compliant with the first data reliability... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing
20110022787 - Data writing method for non-volatile memory and controller using the same: A data writing method for a non-volatile memory is provided, wherein the non-volatile memory includes a data area and a spare area. In the data writing method, a plurality of blocks in a substitution area of the non-volatile memory is respectively used for substituting a plurality of blocks in the... Agent: J C Patents
20110022786 - Flash memory storage apparatus, flash memory controller, and switching method thereof: A flash memory storage apparatus including a multi level cell (MLC) NAND flash memory, a flash memory controller, and a host transmission bus is provided. The MLC NAND flash memory includes a plurality of blocks for storing data, wherein each of the blocks has an upper page and a lower... Agent: J C Patents
20110022782 - Flash storage with array of attached devices: A flash storage system includes a flash storage controller coupled to storage modules of a flash storage array via universal serial buses. Each storage module includes at least one flash memory device. The flash storage controller receives a programming command of a communication protocol and generates universal serial bus commands... Agent: Mcdermott Will & Emery LLP
20110022783 - Flash storage with increased throughput: A flash storage system includes a flash storage controller coupled to storage modules of a flash storage array via universal serial buses. Each storage module includes at least one flash memory device. The flash storage controller receives a programming command of a communication protocol and generates universal serial bus commands... Agent: Mcdermott Will & Emery LLP
20110022778 - Garbage collection for solid state disks: Described embodiments provide a method of recovering storage space on a solid state disk (SSD). An index and valid page count are determined for each block of a segment of an SSD. If the valid page count of at least one block in the segment is zero, a quick clean... Agent: Ip Legal Services
20110022788 - Integrating data from symmetric and asymmetric memory: Data stored within symmetric and asymmetric memory components of main memory is integrated by identifying a first data as having access characteristics suitable for storing in an asymmetric memory component. The first data is included among a collection of data to be written to the asymmetric memory component. An amount... Agent: Fish & Richardson P.C. (dc)
20110022789 - Memory device, host device, memory system, memory device control method, host device control method and memory system control method: A memory card 100 having a NAND type flash memory connectable to a host device 200, capable of transmitting/receiving a signal to/from the host device 200 at a first voltage (3.3 V) or a second voltage (1.8 V) and safely changing a signal voltage of a transmission/reception signal that mutually... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.
20110022784 - Memory system: A memory system according to an embodiment of the present invention comprises: a memory amount required for management table creation is reduced by adopting a nonvolatile semiconductor memory including a plurality of parallel operation elements respectively having a plurality of physical blocks as units of data erasing and a controller... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.
20110022785 - Method for programming a memory-programmable controller with resistant storage of data in memory: The invention relates to a method for programming and/or diagnosis of a memory-programmable controller, having at least one memory-programmable function component. For programming, a predetermined programming system is used. In the context of this programming system variables are predetermined, and information exchange sequences are used for the programming. Results of... Agent: Ronald E. Greigg Greigg & Greigg P.l.l.c.
20110022780 - Restore index page: Techniques for restoring index pages stored in non-volatile memory are disclosed where the index pages map logical sectors into physical pages. Additional data structures in volatile and non-volatile memory can be used by the techniques for restoring index pages. In some implementations, a lookup table associated with data blocks in... Agent: Fish & Richardson P.C.
20110022779 - Skip operations for solid state disks: Described embodiments provide skip operations for transferring data to or from a plurality of non-contiguous sectors of a solid-state memory. A host layer module sends data to, and receives commands from, a communication link. Received commands are one of read requests or write requests, with commands including i) a starting... Agent: Ip Legal Services
20110022777 - System and method for direct memory access in a flash storage: A flash storage device provides direct memory access based on a first communication protocol. A host selects the first communication protocol and provides a request to the flash storage device for a direct memory access. Additionally, the host provides data blocks to the flash storage device for the direct memory... Agent: Mcdermott Will & Emery LLP
20110022790 - Systems and methods for providing nonlinear journaling: In one embodiment, systems and methods are provided for nonlinear journaling. In one embodiment, groups of data designated for storage in a data storage unit are journaled into persistent storage. In one embodiment, the journal data is recorded nonlinearly. In one embodiment, a linked data structure records data and data... Agent: Knobbe Martens Olson & Bear LLP
20110022791 - High speed memory systems and methods for designing hierarchical memory systems: A system and method for designing and constructing hierarchical memory systems is disclosed. A plurality of different algorithmic memory blocks are disclosed. Each algorithmic memory block includes a memory controller that implements a specific storage algorithm and a set of lower level memory components. Each of those lower level memory... Agent: Dag Johansen
20110022792 - Solid state memory drive and method: A solid state memory drive includes a first interface for receiving solid state memory cartridges; and a second interface for communicatively coupling the solid state memory drive unit with a host system through a drive bay configured to house a cassette tape drive. A host system then includes at least... Agent: Rader Fishman & Grauer PLLC
20110022793 - Systems and methods for accessing hard disk drives: The present disclosure generally pertains to systems and methods for accessing hard disk drives. In one exemplary embodiment, a computer system comprises a hard disk drive (HDD), an operating system, and a translation element. The operating system is configured to transmit an HDD access command, which has a sector count... Agent: Hewlett-packard Company Intellectual Property Administration
20110022794 - Distributed cache system in a drive array: An apparatus comprising a drive array, a first cache circuit, a plurality of second cache circuits and a controller. The drive array may comprise a plurality of disk drives. The plurality of second cache circuits may each be connected to a respective one of the disk drives. The controller may... Agent: Christopher P Maiorana, PC Lsi Corporation
20110022796 - Disk array apparatus and method for controllng the same: An apparatus includes a controller and a plurality of disk drives. The controller has a communication control unit for accepting a data input/output request, a disk controller unit for controlling a disk drive, and a cache memory for temporarily storing data transferred between the communication control unit and the disk... Agent: Mattingly & Malur, P.C.
20110022795 - Management method for virtualized storage view: Method and system for providing a topology view for a storage system. Storage system includes a storage device, a management server and host devices in communication together. The host devices are used by users. The management server is in control of an administrator. The storage device is divided into logical... Agent: Sughrue Mion, PLLC
20110022797 - Storing of frequently modified data in an ic card: There is provided a system and method for storing data in an IC card, which is connectable to a host device. The IC card may include a microcontroller comprising a memory for storing data elements modified by a data processing program, when the IC card is operated. The memory may... Agent: Barry D. Blount
20110022798 - Method and system for caching terminology data: A method for caching terminology data, including steps of: receiving a terminology request; determining that the terminology request is related to at least one uncached terminology concept; retrieving a complete concept set of the terminology concept as a cache unit, wherein the complete concept set includes the terminology concept, all... Agent: Ibm Corporation, T.j. Watson Research Center
20110022800 - System and a method for selecting a cache way: A method for selecting a cache way, the method includes: selecting an initially selected cache way out of multiple cache ways of a cache module for receiving a data unit; the method being characterized by including: searching, if the initially selected cache way is locked, for an unlocked cache way,... Agent: Larson Newman & Abel, LLP
20110022801 - Apparatus, system, and method for redundant write caching: An apparatus, system, and method are disclosed for redundant write caching. The apparatus, system, and method are provided with a plurality of modules including a write request module, a first cache write module, a second cache write module, and a trim module. The write request module detects a write request... Agent: Kunzler Needham Massey & Thorpe
20110022802 - Controlling data accesses to hierarchical data stores to retain access order: Data storage circuitry for controlling access to data stored in a memory is disclosed. The data storage circuitry comprises: a data store for storing a subset of the data stored in the memory; access circuitry for receiving access requests and for outputting the requested data, at least some of the... Agent: Nixon & Vanderhye P.C.
20110022803 - Two partition accelerator and application of tiered flash to cache hierarchy in partition acceleration: An approach is provided to identify a disabled processing core and an active processing core from a set of processing cores included in a processing node. Each of the processing cores is assigned a cache memory. The approach extends a memory map of the cache memory assigned to the active... Agent: Ibm Corporation- Austin (jvl) C/o Van Leeuwen & Van Leeuwen
20110022804 - Method and system for improving availability of network file system service: A method and system for improving availability of a network file system service are disclosed. In one embodiment. a method of a client device for improving an availability of a network file system service in a network of the client device and a file server includes receiving a user request.... Agent: Hewlett-packard Company Intellectual Property Administration
20110022805 - Wait-free parallel data cache: A system and method for managing a data cache in a central processing unit (CPU) of a database system. A method executed by a system includes the processing steps of adding an ID of a page p into a page holder queue of the data cache, executing a memory barrier... Agent: Mintz, Levin, Cohn, Ferris, Glovsky & Popeo, P.C.
20110022806 - Method and system of numerical analysis for continuous data: A method of numerical analysis for continuous data includes: providing a temporary storage block; fetching a plurality of data units sequentially from a continuous data to store in the temporary storage block; conducting an analysis step in which the first of the data units is analyzed based on all the... Agent: Muncy, Geissler, Olds & Lowe, PLLC
20110022808 - Output driver, memory having output driver, memory controller, and memory system: An output driver has a first driver connected between a first power source and an output terminal and a second driver connected between a second power source and the output terminal. One of the first driver and the second driver has two driving parts connected in parallel to each other.... Agent: Sughrue Mion, PLLC
20110022807 - Write once recording device: An access device 1 internally includes a logical-physical empty capacity management part 16 for obtaining information of a remaining capacity on a write once memory from a write once recording device 2A. In addition, the write once recording device 2A internally includes a physical empty capacity management part 27 for... Agent: Greenblum & Bernstein, P.L.C
20110022809 - Consolidated electronic control unit and relay program implemented in the same: In a consolidated electronic control unit (ECU) integrally produced by a plurality of conventional ECUs, an inventive relay program is adapted to enable a CPU of the consolidated ECU to rewrite internal and external parameters into the external and internal parameters, respectively, with reference to a correspondence list previously set... Agent: Nixon & Vanderhye, PC
20110022810 - Data storing method and data storing system: A non-transitory computer-readable medium storing an data storing program executed by an archive device including a first storage unit for storing data and a second storage unit for storing hash value determined from the data, the program causing the archive device to execute a process includes receiving hash value determined... Agent: Fujitsu Patent Center Fujitsu Management Services Of America, Inc.
20110022811 - Information backup/restoration processing apparatus and information backup/restoration processing system: To reduce the size of backup data, increase the backup speed, and solve a problem that the amount of unnecessary writing could undesirably increase in a restoration process, which would otherwise require physical disks with a capacity greater than the size of a virtual volume. On a backup server having... Agent: Mattingly & Malur, P.C.
20110022812 - Systems and methods for establishing a cloud bridge between virtual storage resources: Methods and systems for establishing a cloud bridge between two virtual storage resources and for transmitting data from one first virtual storage resource to the other virtual storage resource. The system can include a first virtual storage resource or cloud, and a storage delivery management service that executes on a... Agent: Choate, Hall & Stewart / Citrix Systems, Inc.
20110022813 - Data storage system and data storage program: Atomic data are stored in blocks on a hard disk. The blocks are grouped into a committed block aggregate P1, which exists only on the hard disk, a next-generation committed block aggregate C1, which is converted into a committed block aggregate at predetermined times, and an atomic block aggregate S3,... Agent: Ditthavong Mori & Steiner, P.C.
20110022814 - Methods and system of pooling storage devices: A system and method are provided for pooling storage devices in a virtual library for performing a storage operation. A storage management device determines a storage characteristic of a plurality of storage devices with respect to performing a storage operation. Based on a storage characteristic relating to performing the storage... Agent: Knobbe Martens Olson & Bear LLP
20110022815 - Storage allocation: Techniques for storage allocation of a data record are provided. The techniques include attempting to identify a first location for storing a data record, wherein the data record comprises one or more data record attributes, if the first location is identified, selecting the first location for storing the data record,... Agent: Ryan, Mason & Lewis, LLP
20110022816 - Redundant, multi-dimensional data partitioning: methods, program product and system: Horizontal partitioning can handle a transaction by accessing a single node only if the transaction is restricted along the single partitioned dimension. Composite partitioning allows for partitioning along more than one dimension, but can only handle a transaction by accessing a single node if the transaction is limited along all... Agent: Glenn Patent Group
20110022817 - Mapping processing logic having data-parallel threads across processors: A method for executing a plurality of data-parallel threads of a processing logic on a processor core includes grouping the plurality of data-parallel threads into one or more workgroups, associating a first workgroup from the one or more workgroups with an operating system thread on the processor core, and configuring... Agent: Sterne, Kessler, Goldstein & Fox P.l.l.c.
20110022818 - Iommu using two-level address translation for i/o and computation offload devices on a peripheral interconnect: An IOMMU for controlling requests by an I/O device to a system memory of a computer system includes control logic and a cache memory. The control logic may translate an address received in a request from the I/O device. If the request includes a transaction layer protocol (TLP) packet with... Agent: Meyertons, Hood, Kivlin, Kowert & Goetzel (amd)
20110022819 - Index cache tree: Memory mapping techniques for non-volatile memory are disclosed where logical sectors are mapped into physical pages using data structures in volatile and non-volatile memory. In some implementations, a first lookup table in non-volatile memory maps logical sectors directly into physical pages. A second lookup table in volatile memory holds the... Agent: Fish & Richardson P.C.01/20/2011 > 32 patent applications in 18 patent subcategories. recently filed with US Patent Office
20110016267 - Low-power usb flash card reader using bulk-pipe streaming with uas command re-ordering and channel separation: A flash-card reader improves transmission efficiency by using bulk streaming of multiple pipes. A bulk data-out pipe carries host write data to the card reader and can operate in parallel with a bulk data-in pipe that carries host read data that was read from a flash card attached to the... Agent: Stuart T Auvinen
20110016260 - Managing backup device metadata in a high availability disk subsystem: A system includes a data storage device, a controller coupled with the data storage device, a backup device coupled with the controller for backing up a modified portion of data and volatile memory metadata stored by the controller, and a backup power source for powering the controller. The controller includes... Agent: Lsi Corporation C/o Suiter Swantz PC Llo
20110016264 - Method and apparatus for cache control in a data storage device: According to one embodiment, a data storage device is provided, which has a cache controller that performs cache control, by using a buffer memory divided into segments, which are managed. The cache controller performs sequential hit judge on each segment, in accordance with the requested access range designated by a... Agent: Knobbe Martens Olson & Bear LLP
20110016263 - Method for performing data pattern management regarding data accessed by a controller of a flash memory, and associated memory device and controller thereof: A method for performing data pattern management regarding data accessed by a controller of a Flash memory includes: when the controller receives a write command, generating a first random function, where the write command is utilized for instructing the controller to write the data into the Flash memory; and adjusting... Agent: North America Intellectual Property Corporation
20110016261 - Parallel processing architecture of flash memory and method thereof: A parallel processing architecture of flash memory and method thereof are described. A processing unit classifies a plurality of commands to generate a first command group and a second command group respectively. The processing unit executes the first command group and the second command group. A first control unit performs... Agent: Austin Rapp & Hardman
20110016266 - Semiconductor device: On a single semiconductor package PK1, m semiconductor chips CP1 to CPm are mounted, and the semiconductor package PK1 has external terminals T shared by m pad electrodes PD1 to PDm of the m semiconductor chips CP1 to CPm. An electrostatic protection circuit CD is mounted on only one CPm... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.
20110016262 - Storage and method for performing data backup using the storage: A method for performing data backup using a storage device starts a backup battery when an electronic device is powered off, reads data from a memory of the electronic device by a system on chip (SoC) of the storage device, and writes the data into a field programmable gate array... Agent: Altis Law Group, Inc. Attn: Steven Reiss
20110016265 - Storage device and data process method: A storage device includes a flash memory, a temporary storage unit, and a control unit. The flash memory includes a number of memory blocks, each of which has a number of pages. The temporary storage unit receives and stores a number of written commands transferred from a host system. Each... Agent: Flash Intellectual Property, Inc. Attn. Cheng-ju Chiang
20110016268 - Phase change memory in a dual inline memory module: Subject matter disclosed herein relates to management of a memory device.... Agent: Berkeley Law & Technology Group LLP
20110016270 - Rapid startup computer system and method: A computer system includes a north bridge chipset, a south bridge chipset, a memory, and a rapid startup apparatus. The rapid startup apparatus includes a DRAM module to install application programs or operation system programs, a battery, a control chip to control data reading and writing for the DRAM module,... Agent: Altis Law Group, Inc. Attn: Steven Reiss
20110016269 - System and method of increasing addressable memory space on a memory board: A load-reducing memory module includes a plurality of memory components such as DRAMs. The memory components are organized into sets or ranks such that they can be accessed simultaneously for the full data bit-width of the memory module. A plurality of load reducing switching circuits is used to drive data... Agent: Knobbe Martens Olson & Bear LLP
20110016271 - Techniques for managing data in a write cache of a storage controller: A technique for limiting an amount of write data stored in a cache memory includes determining a usable region of a non-volatile storage (NVS), determining an amount of write data in a current write request for the cache memory, and determining a failure boundary associated with the current write request.... Agent: Dillon & Yudell, LLP
20110016273 - Storage management method and server: When the application I/O performance problem is solved, the I/O amount from the application is increased. In the conventional technique, no consideration has been taken on the affect of the increase of the application I/O performance to other applications. A resource whose I/O load is reduced by setting modification of... Agent: Foley And Lardner LLP Suite 500
20110016272 - Virtualized data storage in a network computing environment: Methods and systems for load balancing read/write requests of a virtualized storage system. In one embodiment, a storage system includes a plurality of physical storage devices and a storage module operable within a communication network to present the plurality of physical storage devices as a virtual storage device to a... Agent: Duft Bornsen & Fishman LLP
20110016275 - Mobile communication device and method for implementing mifare memory multiple sectors mechanisms: A mobile communication device (1) comprises a MIFARE memory (MM) being configured as a MIFARE Classic card or an emulated MIFARE Classic memory and a MIFARE application manager (MAM) being adapted to install MIFARE applications in the MIFARE memory (MM). When a MIFARE application (MA) is a multiple sector application... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing
20110016274 - Portable electronic device, smartcard and control method for portable electronic device: A smartcard includes a write unit that writes data to be written to a data memory according to a write command supplied from an external device, a determining unit that determines whether important data is contained in the data to be written specified by the write command supplied from the... Agent: Pillsbury Winthrop Shaw Pittman, LLP
20110016276 - System and method for cache management: Aspects of the invention relate to improvements to the Least Recently Used (LRU) cache replacement method. Weighted LRU (WLRU) and Compact Weighted LRU (CWLRU) are CPU cache replacement methods that have superior hit rates to LRU replacement for programs with poor locality, such as network protocols and applications. WLRU assigns... Agent: Bereskin And Parr LLP/s.e.n.c.r.l., S.r.l.
20110016277 - Method for performing cache coherency in a computer system: In a computing system, cache coherency is performed by selecting one of a plurality of coherency protocols for a first memory transaction. Each of the plurality of coherency protocols has a unique set of cache states that may be applied to cached data for the first memory transaction. Cache coherency... Agent: Baker Botts L.L.P.
20110016278 - Independent threading of memory devices disposed on memory modules: A memory module includes a substrate having signal lines thereon that form a control path and a plurality of data paths. A plurality of memory devices are mounted on the substrate. Each memory device is coupled to the control path and to a distinct data path. The memory module includes... Agent: Morgan Lewis & Bockius LLP/rambus Inc.
20110016279 - Simultaneous read and write data transfer: A controller for an arrangement of memory devices may issue a write command without waiting for the receipt of a previously issued read command. An addressed memory device may read data out onto the data bus according to a read command while, simultaneously, writing data according to a write command... Agent: Ridout & Maybee LLP
20110016280 - Copy protection of software and/or data: Autorun functionality is incorporated into an integrated circuit memory device such as any USB peripheral, which has a memory component interfaced to a USB microcontroller. This provides autorun of one or more executables or application installers from a memory component with a USB interface without an intermediate hardware-based autorun feature.... Agent: Kolisch Hartwell, P.C.
20110016281 - Line allocation in multi-level hierarchical data stores: A storage apparatus for storing data is disclosed. The storage apparatus comprises: a plurality of stores having storage locations for storing data items, including a level one store and a level two store the storage apparatus having a hierarchy such that in response to an access request for accessing a... Agent: Nixon & Vanderhye P.C.
20110016282 - Synchronous memory read data capture: A method of snap-shot data training to determine the optimum timing of the DQS enable signal in a single read operation is provided. This is accomplished by first writing a Gray code count sequence into the memory and then reading it back in a single burst. The controller samples the... Agent: Smart & Biggar P.o. Box 2999, Station D
20110016285 - Apparatus and method for scratch pad memory management: Disclosed is a scratch pad memory management device and a method thereof. The scratch pad memory management device divides a scratch pad memory into a plurality of unit blocks, maintains a memory allocation table corresponding to indices of the plurality of unit blocks in a main memory, and manages the... Agent: Staas & Halsey LLP
20110016286 - Information processing apparatus, information processing method and computer readable medium: An information processing apparatus includes: a memory that stores a process identifier for identifying a process uniquely, a virtual address which is an address of a memory space available in the process, a physical address corresponding to the virtual address, and a continuous memory capacity assigned to the process so... Agent: Sughrue-265550
20110016284 - Memory management in network processors: System and method for storing information units is provided. The system includes a memory comprising a plurality of contiguous memory segments, a local memory storing a plurality of pointers, each pointer pointing to one contiguous memory segment, a receiving unit configured to arrange incoming information units into queues and memory... Agent: Slater & Matsil, L.L.P.
20110016283 - Method and system for configuring a storage array: There is provided a system and method of configuring a storage array. An exemplary method includes generating information within a storage array controller, the information corresponding to a menu of user options. The exemplary method also includes sending the information from the array controller to a user interface module. The... Agent: Hewlett-packard Company Intellectual Property Administration
20110016287 - Method for implementing on demand configuration changes: A method for implementing on-demand configuration of a logical volume, wherein the method monitors the amount of available storage capacity of the logical storage volume and determines whether the available storage capacity exceeds a predetermined threshold, such as a percentage of available logical storage space. If the method determines that... Agent: Dale F. Regelman Quarles & Brady, LLP
20110016288 - Serial flash memory and address transmission method thereof: A serial flash memory and an address transmission method thereof. The serial flash memory selectively addresses a first memory space according to a first address length or addresses a second memory space according to a second address length longer than the first address length. If the first memory space is... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP
20110016289 - Apparatus and method for profiling software performance on a processor with non-unique virtual addresses: A system includes a processor with a memory map specifying a user mode region with virtual address translation by a memory management unit and a kernel mode region with direct virtual address translation. The processor executes an application in the user mode region where virtual addresses are not unique. A... Agent: Mips C/o Cooley LLP
20110016290 - Method and apparatus for supporting address translation in a multiprocessor virtual machine environment: In one embodiment, a method includes receiving control of a first processor transitioned from a virtual machine due to a privileged event pertaining to a translation-lookaside buffer, and determining which entries in a guest translation data structure were modified by the virtual machine. The determination is made based on metadata... Agent: Thomas R. Lane Intel Corporation
20110016291 - Serial memory interface for extended address space: An integrated circuit memory device has a memory array and control logic with at least a first addressing mode in which the instruction includes a first instruction code and an address of a first length; and a second addressing mode in which the instruction includes the first instruction code and... Agent: Macronix C/o Haynes Beffel & Wolfeld LLP01/13/2011 > 39 patent applications in 24 patent subcategories. recently filed with US Patent Office
20110010483 - Memory protection unit in a virtual processing environment: The present invention relates to a memory management system in a virtualized environment. The system comprises a virtual address, a buffer storage such as a translation lookaside buffer provided to store virtual address to physical address translations, a buffer storage such as a page table provided to store virtual address... Agent: Nokia, Inc.
20110010492 - Data protection for non-volatile semiconductor memory using block protection flags: Receiving a request for canceling setting, a control circuit erases data stored in a corresponding block, changes a value of a protection flag, and cancels protection setting. When an overall protection is set for any block, the control circuit prohibits access to all blocks, except when it is an operation... Agent: Buchanan, Ingersoll & Rooney PC
20110010491 - Data storage device: A data storage device comprising: at least two flash devices for storing data; a circuit board, wherein each of the flash devices are integrated on the circuit board; a controller integrated on the circuit board for reading and writing to each flash devices, wherein the controller interfaces each flash devices;... Agent: Meredith & Keyhani, PLLC
20110010485 - Flash memory control device: A flash memory control device includes a controller and an expansion device. The expansion device is electrically connected to the controller and one and more flash memory devices for temporarily storing data, integrating data and presenting processing status, wherein the controller orders the expansion device to transform data to the... Agent: Hdls Ipr Services
20110010487 - Health reporting from non-volatile block storage device to processing device: Methods and devices are provided for adapting an I/O pattern, with respect to a processing device using a non-volatile block storage device based on feedback from the non-volatile block storage device. The feedback may include information indicating a status of the non-volatile block storage device. In response to receiving the... Agent: Microsoft Corporation
20110010489 - Logical block management method for a flash memory and control circuit storage system using the same: A logical block management method for managing a plurality of logical blocks of a flash memory device is provided. The logical block management method includes providing a flash memory controller, grouping the logical blocks into a plurality of logical zones, wherein each logical block maps to one of the logical... Agent: J C Patents
20110010493 - Nonvolatile storage gate, operation method for the same, and nonvolatile storage gate embedded logic circuit, and operation method for the same: Provided is a nonvolatile storage gate embedded logic circuit embedding a nonvolatile storage gate which can hold data after power supply cutoff and can cut off a power supply at the same time shifting into a standby state. The nonvolatile storage gate embedded logic circuit includes a logic calculation unit... Agent: Fish & Richardson P.C. (ny)
20110010484 - Optimized page programming order for non-volatile memory: During a programming data transfer process in a non-volatile storage system, recording units of data are transferred from a host to a memory device, such as a memory card. For each recording unit, pages of data are arranged in an order such that a page which takes longer to write... Agent: Vierra Magen/sandisk Corporation
20110010486 - Realtime line of response position confidence measurement: A PET event position calculation method using a combination angular and radial event map wherein identification of the radial distance of the event from the centroid of the scintillation crystal with which the event is associated as well as angular information is performed. The radial distance can be converted to... Agent: Siemens Corporation Intellectual Property Department
20110010490 - Solid state drive and related method of operation: A solid state drive (SSD) comprises an input/output interface and a memory controller. The input/output interface stores a plurality of input/output commands. The memory controller comprises first and second input/output contexts and an input/output scheduler. The first and second input/output contexts process input/output commands from the input/output interface in an... Agent: Volentine & Whitt PLLC
20110010488 - Solid state drive data storage system and method: The present disclosure relates to a data storage system and method that includes at least two solid state devices that can be classified in at least two different efficiency levels, wherein data progression is used to allocate data to the most cost-appropriate device according to the nature of the data.... Agent: Dorsey & Whitney LLP Intellectual Property Department
20110010494 - Memory control circuit and memory control method: The memory control circuit has an access count setting circuit and a DRAM access control circuit. The access count setting circuit receives a minimum activation interval time for different rows in the same bank of the SDRAM, an operating speed, and the number of banks, and calculates an optimal number... Agent: Mcdermott Will & Emery LLP
20110010495 - Autonomic reclamation processing on sequential storage media: Various embodiments for autonomic reclamation of data stored on at least one sequential storage media are provided. In one exemplary embodiment, active data stored on the at least one sequential storage media is identified. The active data is read out from a reclamation memory. The active data is stored in... Agent: Griffiths & Seaton PLLC (ibm)
20110010496 - Method for management of data objects: A method and system for management of data objects on a variety of storage media, wherein a storage control module is allocated to each of the storage media, wherein a file system is provided that communicates with each of the storage control modules, wherein the storage control module obtains information... Agent: Muncy, Geissler, Olds & Lowe, PLLC
20110010497 - A storage device receiving commands and data regardless of a host: A storage device includes an input device for receiving data and commands directly from a user, without the storage device reporting to or notifying of the storage device activities that result from the received data and received commands. The user may visually-code the commands for the storage device, or s/he... Agent: Toler Law Group
20110010498 - Providing preferred seed data for seeding a data deduplicating storage system: There is disclosed a computer system operable to process a plurality of logical storage unit manifests the manifests comprising respective pluralities of chunk identifiers identifying data chunks in a deduplicated data chunk store The computer system can determine at least one preferred manifest or preferred combination of manifests according to... Agent: Hewlett-packard Company Intellectual Property Administration
20110010500 - Novel context instruction cache architecture for a digital signal processor: Improved thrashing aware and self configuring cache architectures that reduce cache thrashing without increasing cache size or degrading cache hit access time, for a DSP. In one example embodiment, this is accomplished by selectively caching only the instructions having a higher probability of recurrence to considerably reduce cache thrashing.... Agent: Goodwin Procter LLP Patent Administrator
20110010499 - Storage system, method of controlling storage system, and method of controlling control apparatus: A storage system including a storage, has a first power supplier for supplying electronic power, a second power supplier for supplying electronic power when the first power supplier not supplying electronic power to the storage system, a cache memory for storing data sent out from a host, a non-volatile memory... Agent: Staas & Halsey LLP
20110010501 - Efficient data prefetching in the presence of load hits: A BIU prioritizes L1 requests above L2 requests. The L2 generates a first request to the BIU and detects the generation of a snoop request and L1 request to the same cache line. The L2 determines whether a bus transaction to fulfill the first request may be retried and, if... Agent: Huffman Law Group, P.C.
20110010502 - Cache implementing multiple replacement policies: In an embodiment, a cache stores tags for cache blocks stored in the cache. Each tag may include an indication identifying which of two or more replacement policies supported by the cache is in use for the corresponding cache block, and a replacement record indicating the status of the corresponding... Agent: Meyertons, Hood, Kivlin, Kowert & Goetzel, P.C.
20110010503 - Cache memory: A cache memory for operating in accordance with a multi-way set associative system, the cache memory includes an identification information storage for storing an identification information for identifying a requesting element of a memory access request corresponding to a cache block specified by a received memory access request, a replacement... Agent: Staas & Halsey LLP
20110010504 - Combined transparent/non-transparent cache: In one embodiment, a memory that is delineated into transparent and non-transparent portions. The transparent portion may be controlled by a control unit coupled to the memory, along with a corresponding tag memory. The non-transparent portion may be software controlled by directly accessing the non-transparent portion via an input address.... Agent: Meyertons, Hood, Kivlin, Kowert & Goetzel, P.C.
20110010505 - Resource management cache to manage renditions: A resource management cache of a computing device receives a request for an item. The item may include any type of content, such as an image or a video. A rendition for the item is determined. The item may be stored in a plurality of renditions for retrieval. The resource... Agent: Trellis Intellectual Property Law Group, PC
20110010506 - Data prefetcher with multi-level table for predicting stride patterns: A data prefetcher includes a table of entries to maintain a history of load operations. Each entry stores a tag and a corresponding next stride. The tag comprises a concatenation of first and second strides. The next stride comprises the first stride. The first stride comprises a first cache line... Agent: Huffman Law Group, P.C.
20110010507 - Host memory interface for a parallel processor: A memory interface for a parallel processor which has an array of processing elements and can receive a memory address and supply the memory address to a memory connected to the processing elements. The processing elements transfer data to and from the memory at the memory address. The memory interface... Agent: Dorsey & Whitney LLP Intellectual Property Department
20110010508 - Memory system and information processing device: A memory system includes a first memory that is used as a main memory of a target device, a second memory that has an access speed lower than that of the first memory, a securing section that secures a predetermined area of the first memory as a temporary storage area... Agent: Staas & Halsey LLP
20110010510 - Method for updating a program section: A method for updating a program section is disclosed; the method is used for an electronic system. The electronic system comprises a control unit and a storage device; the control unit is electrically connected with the storage device; the storage device comprises a program section; the program section comprises an... Agent: Bacon & Thomas, PLLC
20110010509 - System and method of sorting and calculating statistics on large data sets with a known value range: A system for sorting data and calculating statistics on large data sets with a known value range includes a memory element and a processing element configured to execute steps of the methods. Methods for sorting data include establishing an array of counters such that each counter corresponds to a value... Agent: Hovey Williams LLP
20110010511 - Interleave control device, interleave control method, and memory system: According to one embodiment, an interleave control device of a memory system includes a memory divided into sections, and a data bus used, in common, for data transfers for the sections, the device comprises a detector and a start module. The detector is configured to detect a transfer of data... Agent: Knobbe Martens Olson & Bear LLP
20110010512 - Method for controlling storage system having multiple non-volatile memory units and storage system using the same: A method for controlling a storage system and the storage system using this method are disclosed. In the storage system, at least two memory units share an I/O bus. The shared I/O bus transfers information for each memory unit to execute an operation. The operation has at least one high... Agent: Kirton And Mcconkie
20110010514 - Adjusting location of tiered storage residence based on usage patterns: Mechanisms for managing data segments in a tiered storage system are provided. The mechanisms maintain at least one counter for each data segment in the tiered storage system. Each counter in the at least one counter counts a number of access operations to a corresponding data segment for a predetermined... Agent: Ibm Corp. (wip) C/o Walder Intellectual Property Law, P.C.
20110010515 - Backup of virtual machines using cloned virtual machines: A system and method for creating a backup of a virtual machine running on a host computer is described herein. The system and method operate by creating a copy or “clone” of a virtual machine running on a first host computer on a second host machine connected thereto. After generation... Agent: Microsoft Corporation
20110010513 - Storage management system for preserving consistency of remote copy data: A storage control system adapted to operate as a remote copy pair by communicating between a primary and a secondary of the remote copy pair comprises: a selector for selecting writes to be placed in a batch based on one or more criteria; a sequence number requester for requesting a... Agent: Konrad Raynes & Victor, LLP. Attn: Ibm37
20110010516 - Method for controlling access to a data file of an ic card: A method is for controlling access to a data file of an IC card and may include storing a plurality of access conditions to be evaluated for accessing the data file, and enabling access to the file if the access conditions are satisfied. The method may further include ordering the... Agent: Allen, Dyer, Doppelt, Milbrath & Gilchrist P.A.
20110010517 - Electronic device, password deletion method, and program: An electronic device that can automatically unlock an external storage device with a password without adding a function to the external storage device is provided. An electronic device 100B has memory card connection means 108 for connecting a memory card 200 that can be locked with a password, password holding... Agent: Seed Intellectual Property Law Group PLLC
20110010518 - Systems and methods for migrating components in a hierarchical storage network: System and methods for selectively or automatically migrating resources between storage operation cells are provided. In accordance with one aspect of the invention, a management component within the storage operation system may monitor system operation and migrate components from storage operation cell to another to facilitate failover recovery, promote load... Agent: Mcdermott Will & Emery LLP
20110010519 - Memory management for a mobile multimedia processor: Certain embodiments of the invention may be found in a method for memory management for a mobile multimedia processor. The method may comprise receiving within a mobile multimedia processor chip a plurality of memory requests, and setting a priority level for each of the plurality of received memory requests. Memory... Agent: Mcandrews Held & Malloy, Ltd
20110010520 - Block-based non-transparent cache: In an embodiment, a non-transparent memory unit is provided which includes a non-transparent memory and a control circuit. The control circuit may manage the non-transparent memory as a set of non-transparent memory blocks. Software executing on one or more processors may request a non-transparent memory block in which to process... Agent: Meyertons, Hood, Kivlin, Kowert & Goetzel, P.C.
20110010521 - Tlb prefetching: In an embodiment, a memory management unit (MMU) is configured to retain a block of data that includes multiple page table entries. The MMU is configured to check the block in response to TLB misses, and to supply a translation from the block if the translation is found in the... Agent: Meyertons, Hood, Kivlin, Kowert & Goetzel, P.C.01/06/2011 > 21 patent applications in 13 patent subcategories. recently filed with US Patent Office
20110004719 - Memory element: Disclosed is memory apparatus (20) in which an area (34) of a memory element (24) is reserved for configuration data relating to parameters of the memory apparatus (20), the area (34) being accessible using a command issued by a device driver (10). Including the configuration data in the memory apparatus... Agent: Nokia, Inc.
20110004725 - Data storage device and method: According to one embodiment, a data storage device, includes: a recording medium, statuses of storage areas of the recording medium being managed by groups; a managing table storage module storing a managing table in which bit information pieces are associated to indexes representing the groups, the bit information pieces indicating... Agent: Knobbe Martens Olson & Bear LLP
20110004722 - Data transfer management: Methods, controllers, and systems for managing data transfer, such as those in solid state drives (SSDs), are described. In some embodiments, the data transfer between a host and a memory is monitored and then assessed to provide an assessment result. A number of storage units of the memory allocated to... Agent: Schwegman, Lundberg & Woessner/micron
20110004723 - Data writing method for flash memory and control circuit and storage system using the same: A data writing method for a flash memory and a control circuit and a storage system using the same are provided. The data writing method includes determining whether the size of data to be stored by a host system is smaller than a predetermined value according to a write command... Agent: J C Patents
20110004721 - Loading secure code into a memory: A method and system of controlling access to a programmable memory including: allowing code to be written to the programmable memory in a first access mode; preventing execution of the code stored in the programmable memory in the first access mode; verifying the integrity of the code stored in the... Agent: Stmicroelectronics Inc. C/o Wolf, Greenfield & Sacks, P.C.
20110004720 - Method and apparatus for performing full range random writing on a non-volatile memory: A method for performing random writing on a NV memory includes: writing page mapping information regarding a portion of a full range of addresses of the NV memory and providing at least one page mapping table corresponding to a predetermined size; and accessing the NV memory according to the page... Agent: North America Intellectual Property Corporation
20110004724 - Method and system for manipulating data: A method of manipulating data includes receiving a data manipulation command for corresponding data, which corresponds to a first logical block address, to a second logical block address. The method further includes mapping the second logical block address to a physical block address, which is mapped to the first logical... Agent: Volentine & Whitt PLLC
20110004726 - Piecewise erasure of flash memory: Embodiments of a circuit are described. This circuit includes control logic that generates multiple piecewise-erase commands to erase information stored in a storage cell of a memory device formed within another circuit. Note that execution of a single one of the multiple piecewise-erase commands within the memory device may be... Agent: Pvf -- Rambus, Inc. C/o Park, Vaughan & Fleming, LLP
20110004727 - Tape storage emulation for open systems environments: A method according to one embodiment is performed in an environment wherein a plurality of backup hosts are connected to a plurality of virtual tape library servers (VTL servers) which in turn are connected to each of a plurality of disk library units (DLUs), each VTL server being adapted to... Agent: Zilka-kotab, PC- Ibm
20110004728 - On-device data compression for non-volatile memory-based mass storage devices: A non-volatile memory-based mass storage device that includes a host interface attached to a package, at least one non-volatile memory device within the package, a memory controller connected to the host interface and adapted to access the non-volatile memory device in a random access fashion through a parallel bus, a... Agent: Hartman & Hartman, P.C.
20110004729 - Block caching for cache-coherent distributed shared memory: Methods, apparatuses, and systems directed to the caching of blocks of lines of memory in a cache-coherent, distributed shared memory system. Block caches used in conjunction with line caches can be used to store more data with less tag memory space compared to the use of line caches alone and... Agent: Huawei Technologies Co., Ltd.
20110004730 - Cache memory device, processor, and control method for cache memory device: A cache memory device that connects an instruction controlling unit outputting a memory access request for requesting data and a storage device storing data, the cache memory device including: a data memory unit that holds data for each cache line, a tag memory unit that holds, for each cache line... Agent: Staas & Halsey LLP
20110004731 - Cache memory device, cache memory system and processor system: A cache memory device includes: a storage unit in which data and attribute information can be stored in association with each other; and a cache controller which (i) obtains, from CPU, a request signal requesting access to data and an indication signal indicating whether or not the requested data is... Agent: Greenblum & Bernstein, P.L.C
20110004732 - Dma in distributed shared memory system: An example embodiment of the present invention provides processes relating to direct memory access (DMA) for nodes in a distributed shared memory system with virtual storage. The processes in the embodiment relate to DMA read, write, and push operations. In the processes, an initiator node in the system sends a... Agent: Huawei Technologies Co., Ltd.
20110004733 - Node identification for distributed shared memory system: An example embodiment of the present invention provides processes relating to a connection/communication protocol and a memory-addressing scheme for a distributed shared memory system. In the example embodiment, a logical node identifier comprises bits in the physical memory addresses used by the distributed shared memory system. Processes in the embodiment... Agent: Huawei Technologies Co., Ltd.
20110004734 - System and method for providing more logical memory ports than physical memory ports: Some embodiments provide for a method of mapping a user design to a configurable integrated circuit (IC). The method is for a configurable IC that implements a user design with an associated user design clock cycle. The IC operates on a sub-cycle clock that has multiple sub-cycle periods within a... Agent: Adeli & Tollen, LLP
20110004736 - Computer system and control method for the computer system: A computer system including a first storage system connected to a first host computer, a second storage system connected to a second host computer and a third storage system connected to the first and second storage systems. The second storage system sets transfer setting before an occurrence of a failure,... Agent: Brundidge & Stanger, P.C.
20110004735 - Method and apparatus for two-phase storage-aware placement of virtual machines: Techniques for placement of a virtual machine in a computing system. A first request is sent from a pool management subsystem to a placement subsystem. The first request includes specification of available storage capacities of storage systems in a computer network. The placement subsystem automatically determines a target storage system... Agent: Law Office Of Ido Tuchman (yor)
20110004737 - Method and apparatus for protected content data processing: Methods and an apparatuses that perform protected content data processing with limited access to system resources are described. One or more regions in a memory (including a source memory and a destination memory) can be allocated and unprocessed content data can be mapped to the source memory. A process can... Agent: Apple Inc./bstz Blakely Sokoloff Taylor & Zafman LLP
20110004738 - Data storage device and data management method: A data storage device for storing and managing data includes a data memory, an input unit, a data writer, and a data deleter. The data memory stores data. The data memory includes a preferential deletion area for storing data which needs to be preferentially deleted. The input unit accepts input... Agent: Fujitsu Patent Center Fujitsu Management Services Of America, Inc.
20110004739 - Extended page size using aggregated small pages: A processor including a virtual memory paging mechanism. The virtual memory paging mechanism enables an operating system operating on the processor to use pages of a first size and a second size, the second size being greater than the first size. The mechanism further enables the operating system to use... Agent: Meyertons, Hood, Kivlin, Kowert & Goetzel (amd)Previous industry: Electrical computers and digital data processing systems: input/output
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