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Electrical computers and digital processing systems: memory August inventions list 08/10

20100217914 - Memory access determination circuit, memory access determination method and electronic device: A memory access determination circuit includes a counter that outputs a first value counted by using a first reference value, and a control unit that makes a cache determination of an address corresponding to an output of the counter, wherein, when a cache miss occurs for the address, the counter... Agent: Fujitsu Patent Center Fujitsu Management Services Of America, Inc.

20100217915 - High availability memory system: A memory system with high availability is provided. The memory system includes multiple memory channels. Each memory channel includes at least one memory module with memory devices organized as partial ranks coupled to memory device bus segments. Each partial rank includes a subset of the memory devices accessible as a... Agent: Cantor Colburn LLP - IBM Rochester Division

20100217916 - Method and apparatus for facilitating communication between virtual machines: A computer-implemented method, apparatus, and virtual machine for facilitating the communication between VMs. The method of facilitating the communication between a first VM and a second VM includes: allocating a shared memory segment from within the memory of the physical machine; mapping the requested memory space addresses to the shared... Agent: Ibm Corporation, T.j. Watson Research Center

20100217922 - Access module, storage module, musical sound generating system and data writing module: An access module is connected to a storage module which stores multiplexed musical sound data in a non-compressed form. Based on a read request status of each sounding channel and access status of the nonvolatile storage module as a read target, a read instructing part transfers a read instruction to... Agent: Mark D. Saralino (pan) Renner, Otto, Boisselle & Sklar, LLP

20100217925 - Block management for mass storage: An embodiment of the present invention includes a nonvolatile memory system comprising nonvolatile memory for storing sector information, the nonvolatile memory being organized into blocks with each block including a plurality of sectors, each sector identified by a logical block address and for storing sector information. A controller is coupled... Agent: Leffert Jay & Polglaze, P.A.

20100217918 - Data storage device and method for accessing flash memory: The invention provides a method for accessing a flash memory. In one embodiment, the flash memory comprises a plurality of memory units, each of the memory units has a physical address, and an address link table records a mapping relationship between a plurality of logical addresses and a plurality of... Agent: Wang Law Firm, Inc.

20100217926 - Direct data file storage implementation techniques in flash memories: Host system data files are written directly to a large erase block flash memory system with a unique identification of each file and offsets of data within the file but without the use of any intermediate logical addresses or a virtual address space for the memory. Directory information of where... Agent: Davis Wright Tremaine LLP - Sandisk Corporation

20100217924 - Hybrid memory device with single interface: Described is a technology by which a memory controller is a component of a hybrid memory device having different types of memory therein (e.g., SDRAM and flash memory), in which the controller operates such that the memory device has only a single memory interface with respect to voltage and access... Agent: Workman Nydegger/microsoft

20100217919 - Memory controller, semiconductor memory device and control method thereof: A memory controller includes logical-physical address conversion table, an access number storing section configured to store the number of accesses to read out data from a memory cell in association with a logical address, a storage state checking section configured to check a storage state of data stored in the... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100217920 - Memory system and address allocating method of flash translation layer thereof: The memory system includes a flash memory and a memory controller. The flash memory has at least two addresses with different program times. The memory controller is configured to control the flash memory. The memory controller is configured to assign an address corresponding to a shorter program time from among... Agent: Harness, Dickey & Pierce, P.L.C

20100217921 - Memory system and data processing method thereof: A method of processing data of a nonvolatile memory includes performing a randomization operation on a data unit including page data to be programmed into the nonvolatile memory and page metadata corresponding to the page data and generating a random seed; and programming the randomized data unit, and the random... Agent: Harness, Dickey & Pierce, P.L.C

20100217927 - Storage device and user device including the same: A storage device includes a host interface, a buffer memory, a storage medium, and a controller. The host interface is configured to receive storage data and an invalidation command, where the invalidation command is indicative of invalid data among the storage data received by the host interface. The buffer memory... Agent: Volentine & Whitt PLLC

20100217923 - Storage device with flash memory: According to one embodiment, a write detector detects a predetermined state where a flash memory contains an area to which write data subject to a write request from a host is to be written and from which data has been erased. A data reception controller allows a data buffer to... Agent: Knobbe Martens Olson & Bear LLP

20100217917 - System and method of finalizing semiconductor memory: Systems and methods of finalizing a semiconductor memory are disclosed. A method includes receiving an instruction to finalize data at a data storage device that includes a controller coupled to a semiconductor memory. The data storage device also includes a status indicator to indicate a finalize status of the semiconductor... Agent: Toler Law Group

20100217928 - Semiconductor memory asynchronous pipeline: An asynchronously pipelined SDRAM has separate pipeline stages that are controlled by asynchronous signals. Rather than using a clock signal to synchronize data at each stage, an asynchronous signal is used to latch data at every stage. The asynchronous control signals are generated within the chip and are optimized to... Agent: Hamilton, Brook, Smith & Reynolds, P.C.

20100217929 - Using external memory devices to improve system performance: The invention is directed towards a system and method that utilizes external memory devices to cache sectors from a rotating storage device (e.g., a hard drive) to improve system performance. When an external memory device (EMD) is plugged into the computing device or onto a network in which the computing... Agent: Microsoft Corporation

20100217933 - Allocation control program and allocation control device: An allocation control device divides the storage management devices into groups based on grouping factors. It generates group management information about each group based on the grouping factors corresponding to storage management devices belonging to the group. It obtains logical volume information about a subject logical volume to be allocated... Agent: Fujitsu Patent Center Fujitsu Management Services Of America, Inc.

20100217930 - Managing processing systems access to control blocks providing information on storage resources: Provided are a method, system, and article of manufacture to manage storage resources in a storage system. Requests by processing systems are received for access to a control block providing information on an address assigned to one of the storage resources to access. A token is generated for each processing... Agent: Konrad Raynes & Victor, LLP. Attn: Ibm37

20100217931 - Managing workflow communication in a distributed storage system: In a data storage system having a plurality of storage nodes storing replicas of stripes, one storage node serves as a primary stripe node for a stripe. Client applications using the data storage system request operations affecting metadata stored in the stripe, and the data storage system creates workflow objects... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20100217932 - Storage apparatus and storage control apparatus: A storage apparatus includes a copy control unit for managing a copy session for copying an copy source data area in at least one of the first to the Mth copy source disk groups to an copy destination data area in a corresponding copy destination disk group, setting a first... Agent: Staas & Halsey LLP

20100217934 - Method, apparatus and system for optimizing image rendering on an electronic device: Portable electronic devices typically have reduced computing resources, including reduced screen size. The method, apparatus and system of the present specification provides, amongst other things, an intermediation server configured to access network content that is requested by a portable electronic device and to analyze the content including analyzing images in... Agent: Perry + Currier Inc. (for Rim)

20100217935 - System on chip and electronic system having the same: An electronic system includes a system on chip (SOC). The SOC includes at least one internal memory that operates selectively as a cache memory or a tightly-coupled memory (TCM). The SOC may include a microprocessor, an internal memory, and a selecting circuit. The selecting circuit may be configured to set... Agent: F. Chau & Associates, LLC

20100217936 - Systems and methods for processing access control lists (acls) in network switches using regular expression matching logic: A network node, such as an Ethernet switch, is configured to monitor packet traffic using regular expressions corresponding to Access Control List (ACL) rules. In one embodiment, the regular expressions are expressed in the form of a state machine. In one embodiment, as packets are passed through the network node,... Agent: Ip Legal Services

20100217937 - Data processing apparatus and method: A data processing apparatus is described which comprises a processor operable to execute a sequence of instructions and a cache memory having a plurality of cache lines operable to store data values for access by the processor when executing the sequence of instructions. A cache controller is also provided which... Agent: Nixon & Vanderhye P.C.

20100217939 - Data processing system: A data processing system includes a plurality of nodes connected with each other, each of the nodes including a processor and a memory, each of the processor including a processing unit, a cache memory, a tag memory for storing tag information, the processor accessing data to be processed, in the... Agent: Staas & Halsey LLP

20100217938 - Method and an apparatus to improve locality of references for objects: Some embodiments of a method and an apparatus to improve locality of references for objects have been presented. In one embodiment, an access counter is provided to each of a set of objects in a computing system. The access counter is incremented each time a respective object is accessed. In... Agent: Red Hat/bstz Blakely Sokoloff Taylor & Zafman LLP

20100217940 - Centrifugal separator: To propose a centrifugal separator that is capable of performing, easily and accurately, a condition setting operation for continuously operating the centrifugal separator under a plurality of operating conditions. In the centrifugal separator, which stores operating conditions in a plurality of memories respectively and independently or continuously calls up the... Agent: Posz Law Group, PLC

20100217941 - Improving the efficiency of files sever requests in a computing device: A computing system is operated such that its file server is arranged not to block a client application and distinguishes between synchronous devices, which respond to requests immediately, and asynchronous devices, which do not. For asynchronous devices, it also distinguishes between synchronous operations, which complete immediately, and asynchronous operations, which... Agent: Fox Rothschild LLP

20100217943 - Microcontroller and electronic control unit: A microcontroller in which respective CPUs execute different applications so as to improve processing performance, and the respective CPUs execute an application that requires safety and mutually compare the results thereof so as to enhance the reliability of write data is provided. The microcontroller has a plurality of processing systems... Agent: Mattingly & Malur, P.C.

20100217942 - Usb host controller and controlling method for usb host controller: The present invention aims to provide a USB host controller capable of reducing time for a data transfer between storage devices. A USB host controller according to the present invention includes a buffer memory for USB pipe having a first buffer memory region and a second buffer memory region, and... Agent: Mcginn Intellectual Property Law Group, PLLC

20100217945 - Fast context save in transactional memory: The present invention provides a method, apparatus and article of manufacture, for fast context saving in transactional memory. The method creates a mapping table that includes entries corresponding to architectural registers. Each entry includes a physical register index and shadow bit of a first physical register mapped to an architectural... Agent: Ibm Corporation, T.j. Watson Research Center

20100217944 - Systems and methods for managing configurations of storage devices in a software provisioning environment: A provisioning server can provide and interact with a storage device tool on target machines. The storage device tool can communicate with the storage devices of the target machines, independent of the types of the storage devices. To communicate independent of the type of the storage device, the storage device... Agent: Mh2 Technology Law Group (cust. No. W/red Hat)

20100217946 - Indirectly-accessed, hardware-affine channel storage in transaction-oriented dma-intensive environments: Embodiments of the invention provide a method, system, and computer program product for managing a computer memory system including a channel controller and a memory area. In one embodiment, the method comprises the channel controller receiving a request including a header and a payload, and separating said memory area into... Agent: Scully, Scott, Murphy & Presser, P.C.

20100217947 - Discontiguous object addressing: Some embodiments of discontiguous object addressing have been presented. In one embodiment, a set of objects, each having one or more properties, are stored in a memory of a computer system. The memory is divided into chunks. The properties of at least one of the objects are stored in discontiguous... Agent: Red Hat/bstz Blakely Sokoloff Taylor & Zafman LLP

20100217948 - Methods and systems for data storage: In one general aspect, various embodiments are directed to a method of writing a data block to a memory comprising receiving an electronic write request from an application. A content address of a first data block considering the value for the first data block. A mapping of the first data... Agent: K&l Gates LLP

20100217949 - Dynamic logical partition management for numa machines and clusters: A partitioned NUMA machine is managed to dynamically transform its partition layout state based on NUMA considerations. The NUMA machine includes two or more NUMA nodes that are operatively interconnected by one or more internodal communication links. Each node includes one or more CPUs and associated memory circuitry. Two or... Agent: Walter W. Duft

20100217950 - Computer apparatus and control method: A computer system with a physical computer having a physical processor, physical memory, virtual computer and virtual computer controller is disclosed. The virtual computer has its own processor and memory, which are virtual components that are provided by logically dividing the physical processor and memory, respectively. The virtual computer also... Agent: Mattingly & Malur, P.C.

20100217951 - R and c bit update handling: In one embodiment, a processor comprises a memory management unit (MMU) and an interface unit coupled to the MMU and to an interface unit of the processor. The MMU comprises a queue configured to store pending hardware-generated page table entry (PTE) updates. The interface unit is configured to receive a... Agent: Meyertons, Hood, Kivlin, Kowert & Goetzel, P.C.

20100217952 - Remapping of data addresses for a large capacity victim cache: Method and apparatus for remapping addresses for a victim cache used in a storage system is provided. The storage system may store data blocks having associated storage system addresses. Blocks may be stored to a main cache and blocks evicted from main cache may be stored in the victim cache,... Agent: Stattler-suh PC

20100217953 - Hybrid hash tables: A hash table system having a first hash table and a second hash table is provided. The first hash table may be in-memory and the second hash table may be on-disk. Inserting an entry to the hash table system comprises inserting the entry into the first hash table, and, when... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20100211725 - Information processing system: An information processing system comprises a main memory operative to store data, and a control circuit operative to access the main memory for data. The main memory includes a nonvolatile semiconductor memory device containing electrically erasable programmable nonvolatile memory cells each using a variable resistor, and a DRAM arranged as... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100211723 - Memory controller, memory system with memory controller, and method of controlling flash memory: Access to flash memories is controlled so that efficiency of data writing and effective utilization of storage area go together. In the access control, priority order, for physical blocks each storing effective data, is managed so that a position of a physical block in the assignment order becomes higher according... Agent: Posz Law Group, PLC

20100211721 - Memory network methods, apparatus, and systems: Apparatus and systems may include a first node group include a first network node coupled to a memory, the first network node including a first port, a second port, a processor port, and a hop port. Network node group may include a second network node coupled to a memory, the... Agent: Schwegman, Lundberg & Woessner/micron

20100211726 - Method for manipulating state machine storage in a small memory space: A method includes configuring a flash memory device including a first memory sector having a primary memory sector correspondence, a second memory sector having an alternate memory sector correspondence, and a third memory sector having a free memory sector correspondence, copying a portion of the primary memory sector to the... Agent: Pitney Bowes Inc.

20100211722 - Method for transmitting special commands to flash storage device: The invention provides a data storage system. In one embodiment, the data storage system comprises a host and a flash storage device. The host sends a series of first access commands for accessing a plurality of special files to the flash storage device. The flash storage device having the stored... Agent: Wang Law Firm, Inc.

20100211724 - Systems and methods for determining logical values of coupled flash memory cells: Systems and methods for determining program levels useful for reading cells of a flash memory, such as but not limited to detecting charge levels for the cells, obtaining joint conditional probability densities for a plurality of combinations of program levels of the cells; and determining program levels for the cells... Agent: Pearl Cohen Zedek Latzer, LLP

20100211727 - integrated circuit board with secured input/output buffer: An integrated circuit card including a processor unit associated with RAM and with data exchange means for exchanging data with an external device, the RAM including a memory zone dedicated to exchanged data, and the processor unit being arranged to secure the dedicated memory zone and to store the exchanged... Agent: Muncy, Geissler, Olds & Lowe, PLLC

20100211728 - Apparatus and method for buffering data between memory controller and dram: A apparatus is provided for buffering data between a memory controller and a DRAM. The apparatus includes a phase locked loop (PLL), a phase interpolator for aligning a phase of an output clock signal in response to a phase aligning control word, and a non-volatile storage location permanently storing the... Agent: Texas Instruments Incorporated

20100211729 - Method and apparatus for reading and writing data: A method and an apparatus for reading and writing data are disclosed. The method includes: storing a request in a bank queue; comparing weight values of different banks in the bank queue, wherein the different banks comply with a time sequence parameter; and scheduling the bank queue according to the... Agent: Finnegan, Henderson, Farabow, Garrett & Dunner LLP

20100211732 - Copy control apparatus: A copy control apparatus for controlling a copy process between disks includes a copy process execution unit, a data capacity measuring unit, and a changing unit. The copy process execution unit executes the copy process between disks by securing a storage area on a cache. The data capacity measuring unit... Agent: Staas & Halsey LLP

20100211731 - Hard disk drive with attached solid state drive cache: Methods, systems, and computer programs for managing storage in a computer system using a solid state drive (SSD) read cache memory are presented. The method includes receiving a read request, which causes a miss in a cache memory. After the cache miss, the method determines whether the data to satisfy... Agent: Martine Penilla & Gencarella, LLP

20100211730 - System and method for caching data on a hard disk drive: A method for caching data on a hard disk drive. The method begins by identifying at least one track residing on the hard disk drive to devote to caching. The method continues with determining an average for each data value both residing on the hard disk drive and not residing... Agent: Schmeiser, Olsen & Watts

20100211737 - Apparatus, system, and method for data block usage information synchronization for a non-volatile storage volume: An apparatus, system, and method are disclosed for data block usage information synchronization for a non-volatile storage volume. The method includes referencing first data block usage information for data blocks of a non-volatile storage volume managed by a storage manager. The first data block usage information is maintained by the... Agent: Kunzler Needham Massey & Thorpe

20100211733 - Data valid indication method and apparatus: Memory devices and methods facilitate handling of data received by a memory device through the use of data grouping and assignment of data validity status values to grouped data. For example, data is received and delineated into one or more data groups and a data validity status is associated with... Agent: Leffert Jay & Polglaze, P.A.

20100211740 - Integrated storage virtualization and switch system: A system integrates an intelligent storage switch with a flexible virtualization system to enable the intelligent storage switch to provide efficient service of file and block protocol data access requests for information stored on the system. A storage operating system executing on a storage system coupled to the switch implements... Agent: Cesari And Mckenna, LLP

20100211734 - Maintaining method for external controller-based storage apparatus and maintenance system for storage apparatus: The invention discloses a maintaining method for an external controller-based storing apparatus, which the maintaining method includes the steps of: a) connecting a portable maintenance apparatus to an external controller-based storage apparatus; b) when the portable maintenance apparatus is connected to and detected by the external controller-based storage apparatus, executing... Agent: Morris Manning Martin LLP

20100211738 - Mass storage system with improved usage of buffer capacity: The present invention relates to a mass storage system with improved usage of buffer capacity, and more specifically to a mass storage system for real-time data storage with an embedded controller. According to the invention, the mass storage system has a first data path between a real-time data interface and... Agent: Robert D. Shedd, Patent Operations Thomson Licensing LLC

20100211736 - Method and system for performing i/o operations on disk arrays: A method and system for performing input/output (I/O) operations on disk arrays are disclosed. The method for performing I/O operations on disk array comprises: determining whether the data layout of a row of storage units in a disk array related to an I/O operation request is a first layout or... Agent: Harness, Dickey & Pierce P.L.C

20100211739 - Storage subsystem and storage system: The first storage subsystem, when new data is written in a first memory device beyond a certain timing, writes pre-updated data prior to update by said new data into a pre-updated data memory region and, in addition, updates snapshot management information that expresses a snapshot of a data group within... Agent: Brundidge & Stanger, P.C.

20100211735 - Storage system, storage control device, reception control device, and control method: A storage system, including a storing unit, which is configured to be connectable to an information processor, includes a communication data receiving unit, a path information extracting unit, a specifying information creating unit and an access controlling unit. The communication data receiving unit receives communication data transmitted from the information... Agent: Staas & Halsey LLP

20100211741 - Shared composite data representations and interfaces: Embodiments described herein provide information management features and functionality that can be used to manage information of distinct information sources, but are not so limited. In an embodiment, a computing environment includes a client that can be used to access data from distinct sources and generate a data composition representing... Agent: Merchant & Gould (microsoft)

20100211742 - Conveying critical data in a multiprocessor system: A system for conveying critical and non-critical words of multiple cache lines includes a first node interface of a first processing node receiving, from a first processor, a first request identifying a critical word of a first cache line and a second request identifying a critical word of a second... Agent: Mhkkg/oracle (sun)

20100211743 - Information processing apparatus and method of controlling same: Disclosed is an information processing apparatus equipped with first and second CPUs, as well as a method of controlling this apparatus. When the first CPU launches an operating system for managing a virtual memory area that includes a first cache area for a device, the first CPU generates specification data,... Agent: Fitzpatrick Cella Harper & Scinto

20100211744 - Methods and aparatus for low intrusion snoop invalidation: Efficient techniques are described for tracking a potential invalidation of a data cache entry in a data cache for which coherency is required. Coherency information is received that indicates a potential invalidation of a data cache entry. The coherency information in association with the data cache entry is retained to... Agent: Qualcomm Incorporated

20100211745 - Memory prefetch systems and methods: Systems and methods are disclosed herein, including those that operate to prefetch a programmable number of data words from a selected memory vault in a stacked-die memory system when a pipeline associated with the selected memory vault is empty.... Agent: Schwegman, Lundberg & Woessner/micron

20100211746 - Cache device: A cache device interposed between a processor and a memory device, including: a cache memory storing data from the memory device; a buffer holding output data output from the processor; a control circuit determining, on the basis of a request to access the memory device, whether a cache hit has... Agent: Arent Fox LLP

20100211747 - Processor with reconfigurable architecture: Disclosed is configuration memory access technology in a processor with a reconfigurable architecture. The processor with the reconfigurable architecture includes an array of processing elements (PEs), a configuration memory and a token network. The configuration memory stores configuration data associated with controlling data flow of the respective PEs. The token... Agent: North Star Intellectual Property Law, PC

20100211748 - Memory system with point-to-point request interconnect: A memory system includes a memory controller with a plurality N of memory-controller blocks, each of which conveys independent transaction requests over external request ports. The request ports are coupled, via point-to-point connections, to from one to N memory devices, each of which includes N independently addressable memory blocks. All... Agent: Silicon Edge Law Group, LLP

20100211750 - Data storage control apparatus and data storage control method: According to one embodiment, a data storage control method, which is applied to a virtual memory that controls access to the data stored in each of the physical memory regions by the corresponding one of the virtual addresses on the basis of an address management table that manages the correspondence... Agent: Blakely Sokoloff Taylor & Zafman LLP

20100211749 - Method of storing data, method of loading data and signal processor: A method for storing a vector of process data elements (D1, . . . , D8) that have a size of n bits from a register file (RF) into a memory (M) is described. The memory is arranged for storage of a vector of storage data elements in locations (M1,... Agent: Docket Clerk

20100211751 - Program execution apparatus, program execution method, and program: According to one embodiment, a program execution apparatus includes a first memory configured to store a first program, a second memory configured to store a partial program loaded from the first memory or a second program loaded from one other memory, and a controller configured to perform first correspondence to... Agent: Blakely Sokoloff Taylor & Zafman LLP

20100211752 - Methods and apparatus for providing independent logical address space and access management: A command receiver receives, from an external access requesting entity, a command with which to access data, together with an address to be accessed and IOID to identify the access requesting entity. Based on the IOID, the access decision unit determines whether or not an access is one that is... Agent: Gibson & Dernier LLP

20100211753 - Parallel garbage collection and serialization without per-object synchronization: Parallel garbage collection, tracing, copying, and/or serialization of source memory areas is achieved without per-object synchronization instructions by dividing a source memory area into non-overlapping partitions, accessing each partition by only one thread at a time, and using a combination of global and thread-local data structures to minimize synchronization overhead... Agent: Tatu Ylonen Oy, Ltd.

20100211754 - Memory utilization analysis: An application records memory allocations and releases as they occur over time, and an analysis system presents characteristic memory utilization patterns to a user for review and analysis. A variety of sampling techniques are used to minimize the impact of this memory utilization monitoring on the performance of the application,... Agent: Robert M. Mcdermott, Esq.

20100211755 - Method and apparatus for allocating storage addresses: A method and apparatus for allocating storage addresses are disclosed. The method includes: receiving a storage address allocation request; searching a level-2 bitmap in a hierarchical bitmap in bidirectional mode; outputting an idle bit according to the result of searching in the level-2 bitmap; obtaining a storage address according to... Agent: Leydig, Voit & Mayer, Ltd (for Huawei Technologies Co., Ltd)

20100211756 - System and method for numa-aware heap memory management: A system and method for allocating memory to multi-threaded programs on a Non-Uniform Memory Access (NUMA) computer system using a NUMA-aware memory heap manager is disclosed. In embodiments, a NUMA-aware memory heap manager may attempt to maximize the locality of memory allocations in a NUMA system by allocating memory blocks... Agent: Meyertons, Hood, Kivlin, Kowert & Goetzel (amd)

20100205344 - Unified cache structure that facilitates accessing translation table entries: One embodiment provides a system that includes a processor with a unified cache structure that facilitates accessing translation table entries (TTEs). This unified cache structure can simultaneously store program instructions, program data, and TTEs. During a memory access, the system receives a virtual memory address. The system then uses this... Agent: Pvf -- Oracle America, Inc. C/o Park, Vaughan & Fleming LLP

20100205345 - Microcontroller with linear memory access in a banked memory: A microcontroller has a data memory divided into a plurality of memory banks, an address multiplexer for providing an address to the data memory, an instruction register providing a first partial address to a first input of the address multiplexer, a bank select register which is not mapped to the... Agent: King & Spalding LLP

20100205346 - Microcontroller with special banking instructions: An instruction set for a microcontroller with a data memory divided into a plurality of memory banks wherein the data memory has more than one memory bank of the plurality of memory banks that form a block of linear data memory to which no special function registers are mapped, a... Agent: King & Spalding LLP

20100205347 - Method for speeding up page table address update on virtual machine: A method is provided which eliminates redundancy from the shadow PT operation performed by the virtual machine monitor (VMM) when the guest operating system running on a virtual machine updates a guest page table (PT) address. The VMM associates a plurality of shadow PTs with guest PTs and allocates their... Agent: Brundidge & Stanger, P.C.

20100205348 - Flash backed dram module storing parameter information of the dram module in the flash: A device includes volatile memory; one or more non-volatile memory chips, each of which is for storing data moved from the volatile-memory; an interface for connecting to a backup power source arranged to temporarily power the volatile memory upon a loss of power from a primary power source; a controller... Agent: Wilmerhale/boston

20100205362 - Cache control in a non-volatile memory device: A flash memory device includes a storage area having a main memory portion and a cache memory portion storing at least one bit per cell less than the main memory portion; and a controller that manages data transfer between the cache memory portion and the main memory portion according to... Agent: Davis Wright Tremaine LLP - Sandisk Corporation

20100205351 - Database join optimized for flash storage: Computer-implemented systems and associated operating methods implement a fast join for databases which is adapted for usage with flash storage. A system comprises a processor that performs a join of two tables stored in a storage in pages processed in a column orientation wherein column values for all rows on... Agent: Hewlett-packard Company Intellectual Property Administration

20100205356 - Memory controller, memory system with memory controller, and method of controlling flash memory: In the control of the number of program-erase cycles, physical blocks (PBs) are divided into plural groups on a basis of the number of program-erase cycles and a search for a free PB is performed in the groups when assigning a logical block (LB) to the free PB. In the... Agent: Posz Law Group, PLC

20100205357 - Memory controller, memory system with memory controller, and method of controlling flash memory: In the control of the number of program-erase cycles, when assigning a logical block (LB) to a physical block (PB), the number of program-erase cycles of a first PB and that of a second PB are compared, which first PB is a free PB of which the number of program-erase... Agent: Posz Law Group, PLC

20100205353 - Memory system: A memory system according to an embodiment of the present invention comprises: a log overflow control unit that, when a third condition in which a second log accumulated in a log storage area exceeds a set value is satisfied, stops a recording operation of the second log in the log... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100205358 - Method to rewrite flash memory with exclusively activated two blocks and optical transceiver implementing controller performing the same: An effective algorithm for the CPU with a flash memory is disclosed to shorten a dead time to erase the flash memory and to write new data therein. The flash memory of the invention provides front and back blocks for the user data area. When the front block is filled,... Agent: Smith, Gambrell & Russell

20100205352 - Multilevel cell nand flash memory storage system, and controller and access method thereof: A multi level cell (MLC) NAND flash memory storage system is provided. A controller of the MLC NAND flash memory storage system declares it a signal level cell (SLC) NAND flash memory chip to a host system connected thereto and provides a plurality of SLC logical blocks to the host... Agent: J C Patents

20100205355 - Multiplexing secure digital memory: A method of storing data within a plurality of memory devices is disclosed. Each memory device of the plurality of memory devices comprises flash memory, and supports a first data transfer rate, A. Data is provided from a data interface to a multiplexer using a second data transfer rate, B,... Agent: Freedman & Associates

20100205360 - Removable mother/daughter peripheral card: A peripheral card having a Personal Computer (“PC”) card form factor and removably coupled externally to a host system is further partitioned into a mother card portion and a daughter card portion. The daughter card is removably coupled to the mother card. In the preferred embodiment, a low cost flash... Agent: Davis Wright Tremaine LLP - Sandisk Corporation

20100205349 - Segmented-memory flash backed dram module: A memory device for use with a primary power source, includes volatile memory including a plurality of memory segments defined by at least one starting addresses and a corresponding at least one ending address; an interface for connecting to a backup power source; a non-volatile memory; and a controller in... Agent: Wilmerhale/boston

20100205361 - Semiconductor memory card access apparatus, a computer-readable recording medium, an initialization method, and a semiconductor memory card: A data length NOM of an area from a master boot record & partition table sector to a partition boot sector is determined so that the plurality of clusters in the user area are not arranged so as to straddle erasable block boundaries. Since cluster boundaries and erasable block boundaries... Agent: Wenderoth, Lind & Ponack L.L.P.

20100205354 - Storage device using flash memory: Provided is a system whose effective endurable number of rewrite times can be drastically improved in a storage device using a flash memory whose rewrite life is restricted. The logical address (LBA) of a sector in which data which is not used as a file system is accumulated is detected.... Agent: Kubotera & Associates, LLC

20100205359 - Storage system using flash memory modules logically grouped for wear-leveling and raid: A storage system using flash memories includes a storage controller and plural flash memory modules as storage media. Each flash memory module includes at least one flash memory chip and a memory controller for leveling erase counts of blocks belonging to the flash memory chip. The storage controller combines the... Agent: Hitachi America, Ltd. Intellectual Property Group

20100205350 - System and method of host request mapping: Systems and methods for reading data are disclosed. In a particular embodiment, a data storage device includes a host interface that is adapted to couple the data storage device to a host. The host includes memory that is addressable by a host memory address space. The data storage device also... Agent: Toler Law Group

20100205363 - Memory device and wear leveling method thereof: Disclosed is a memory device including a NVRAM and a page table, and a wear leveling method therefor. The page table includes mapping information which maps virtual addresses of the NVRAM with physical addresses of the NVRAM. A page table entry includes aging information which indicates the wear of a... Agent: North Star Intellectual Property Law, PC

20100205364 - Ternary content-addressable memory: A low-heat, large-scale ternary content-addressable memory (TCAM) efficiently compares one or more input records with a set of entries. Compression may also be used. X bits are eliminated from entries and in some embodiments, a subset of non-X bits are also eliminated, minimizing entries that must be searched. Entry bit... Agent: Carr & Ferrell LLP

20100205366 - Automatic media readying system and method for a optical medium with file systems: In one aspect of the invention, a computer system comprises application logic executable to search an optical medium for at least one type of file system that may be resident on the optical medium. In response to identifying the presence of at least one type of file system resident on... Agent: Hewlett-packard Company Intellectual Property Administration

20100205365 - Hard drive accessing method and hard drive accessing system supporting maximum transmission rate of hard drive: A hard drive assessing method and a hard drive assessing system supporting a maximum transmission rate of a hard drive are provided, wherein the hard drive is accessed by a controller, and both the controller and the hard drive support a plurality of transmission rates. The maximum transmission rate of... Agent: J C Patents

20100205368 - Method and system for caching data in a storage system: A method for caching data in a storage system involves receiving a request for a first datum stored on a storage disk, retrieving the first datum from the storage disk when a copy of the first datum is not stored in a main memory and when a copy of the... Agent: Osha Liang LLP/oracle

20100205367 - Method and system for maintaining cache data integrity with flush-cache commands: A non-volatile memory location in a disk drive is utilized to store data residing in a write-cache upon receiving a flush-cache command from a host computer. If a subsequent flush-cache command is not issued within a predetermined time period, any data residing in the write-cache and stored in the non-volatile... Agent: Patterson & Sheridan, L.L.P.

20100205369 - Methods and systems for storing data blocks of multi-streams and multi-user applications: A method for storing data, comprises the steps of: defining one or more intervals for one or more virtual disks, wherein each of the intervals has data; receiving a storage command in a cache, wherein the command having a logical address and a data block; determining a respective interval for... Agent: Venture Pacific Law, PC

20100205372 - Disk array control apparatus: A disk array control apparatus controls a disk array having a redundant configuration with two or more disk devices and a spare disk provided for lack of redundancy in the disk array. And the disk array control apparatus includes a failure detecting unit for detecting the lack of redundancy in... Agent: Staas & Halsey LLP

20100205370 - File server, file management system and file management method: When receiving a file access from the client, the file access program refers to the mapping table, and processes an access to files of on volumes of RAID groups. The file server analyzes the file access states, and groups the files depending on the access time period, defines the file... Agent: Juan Carlos A. Marquez C/o Stites & Harbison PLLC

20100205371 - Storage system: e

20100205373 - Smart sd card and method of accessing the same: A smart SD card and a method of accessing the same are disclosed, which resolve a problem of incompatibilities between drivers of various smart SD cards. The smart SD card includes a SD interface (201), a SD memory (203), a smart card (204) and a SD controller (202). The method... Agent: Martine Penilla & Gencarella, LLP

20100205374 - Embedded system for managing dynamic memory and methods of dynamic memory management: A dynamic memory management method suitable for a memory allocation request of various applications can include predicting whether an object for which memory allocation is requested is a short-lived first type object or a long-lived second type object by using index information relating to the size of the object; determining... Agent: Myers Bigel Sibley & Sajovec

20100205375 - Method, apparatus, and system of forward caching for a managed client: A method, apparatus, and system are disclosed of forward caching for a managed client. A storage module stores a software image on a storage device of a backend server. The backend server provides virtual disk storage on the storage device through a first intermediate network point for a plurality of... Agent: Kunzler Needham Massey & Thorpe

20100205376 - Method for the improvement of microprocessor security: A method for the improvement of the security of microprocessors (1) with a cache memory (3, 4), whereas with a cache-instruction data can be written into the cache memory (3, 4), is improved to enhance the security of a system by inhibiting the direct writing of the cache-instruction into the... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20100205380 - Cache coherent switch device: In one embodiment, the present invention includes a switch device to be coupled between a first semiconductor component and a processor node by interconnects of a communication protocol that provides for cache coherent transactions and non-cache coherent transactions. The switch device includes logic to handle cache coherent transactions from the... Agent: Trop, Pruner & Hu, P.C.

20100205379 - Cache-line based notification: Embodiments of the invention provide a method, system, and computer program product for cache-line based notification. An embodiment of the method comprises injecting a cache-line including notification information into a cache of a processing unit, marking the cache-line as having the notification information, and using the notification information to notify... Agent: Scully, Scott, Murphy & Presser, P.C.

20100205377 - Debug control for snoop operations in a multiprocessor system and method thereof: A data processing system has a cache which receives both non-debug snoop requests and debug snoop requests for processing. The non-debug snoop requests are generated in response to transactions snooped from a system interconnect. Debug control circuitry that is coupled to the cache provides the debug snoop requests to the... Agent: Freescale Semiconductor, Inc. Law Department

20100205378 - Method for debugger initiated coherency transactions using a shared coherency manager: A data processing system includes a system interconnect, a first interconnect master coupled to the system interconnect, a second interconnect master coupled to the system interconnect, and a cache coherency manager coupled to the first and second interconnect masters. The first interconnect master includes a cache. The cache coherency manager... Agent: Freescale Semiconductor, Inc. Law Department

20100205382 - Dynamic queue management: A method may include receiving a data unit and identifying a state of a memory storing data units. The method may include selecting a threshold value having a first threshold unit or a second threshold unit based on the state of the memory. The method may include comparing the threshold... Agent: Harrity & Harrity, LLP

20100205381 - System and method for managing memory in a multiprocessor computing environment: A method for managing a memory communicatively coupled to a plurality of processors may include analyzing a data structure associated with a processor to determine if one or more portions of memory associated with the processor are sufficient to store data associated with an operation of the processor. The method... Agent: Baker Botts L.l.p

20100205383 - Memory controller for improved read port selection in a memory mirrored system: The present invention describes improving the scheduling of read commands on a mirrored memory computer system by utilizing information about pending memory access requests. A conflict queue is configured to track a read/write queue associated with each of a plurality of memory ports on the mirrored memory system. The conflict... Agent: Ibm Corporation RochesterIPLaw Dept. 917

20100205387 - Apparatus utilizing efficient hardware implementation of shadow registers and method thereof: Embodiments of a processor architecture efficiently implement shadow registers in hardware. A register system in a processor includes a set of physical data registers coupled to register renaming logic. The register renaming logic stores data in and retrieves data from the set of physical registers when the processor is in... Agent: Stmicroelectronics, Inc.

20100205386 - Memory controller and memory control method: In order to provide a memory controller capable of calibrating a memory access timing even in a case where an application has no blanking interval, the memory controller includes: a delay circuit (3) for delaying data strobe signals; at least two FIFO buffer units (7, 8, and 9) for storing... Agent: Mcginn Intellectual Property Law Group, PLLC

20100205388 - Method and system for scalable video data width: Processing data samples may comprise partitioning the data samples in a first set of data bits and a second set of data bits and utilizing at least some of the first and second set of data bits while operating under a first condition. Only at least some of the first... Agent: Mcandrews Held & Malloy, Ltd

20100205385 - Method, system, and apparatus for supporting limited address mode memory access: Supporting limited address mode memory access involves receiving a write request from the processor targeted to a first predetermined address. A data portion of the write request includes a target address of the system memory. In response to determining the write request is targeted to the first predetermined address, the... Agent: Unisys Corporation

20100205384 - Store hit load predictor: In one embodiment, a processor implements a store hit load predictor. The store hit load predictor is configured to monitor fetched ops in the processor, and is configured to detect stores that may have previously caused store hit load events. The store hit load predictor is configured to predict that... Agent: Meyertons, Hood, Kivlin, Kowert & Goetzel, P.C.

20100205389 - Backup of deduplicated data: Methods and systems back up deduplicated data to data storage media, the deduplicated data comprising a plurality of data blocks referenced for deduplication. In one embodiment, the existence of multiple references to each of the data blocks is determined; and at least two copies of at least each data block... Agent: John H. Holcombe IBM Corporation,IPLaw Dept.

20100205393 - High efficiency portable archive: According to one embodiment, a method is disclosed for storing and archiving point-in-time sets of a raw data set in an environment including at least one server storing the raw data set. The method includes providing a virtualization layer on a computing resources pool. A virtualized storage application is operated... Agent: Workman Nydegger/emc

20100205391 - Memory system and managing method therefor: A memory system in which a first management unit includes an update information managing unit that manages update information indicating an updated section in status information stored in a volatile first storing unit, and an update information notifying unit that notifies a second management unit of the update information managed... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100205392 - Method for remote asynchronous replication of volumes and apparatus therefor: A method for remote asynchronous volume replication and apparatus therefore are disclosed. Asynchronous replication is applied to deal with data changes on the source volume on the local site incurred by Host IO requests. In coordination with the “point-in-time differential backup” technology, the data is subjected to be backuped to... Agent: Thomas, Kayden, Horstemeyer & Risley, LLP

20100205390 - Methods and apparatus for migrating thin provisioning volumes between storage systems: Multiple storage systems have capability to provide thin provisioning volumes to host computers and capability to transfer (import/export) management information regarding thin provisioning between storage systems. Moreover, at least one of the storage systems posses capability to provide storage area of other storage system as own storage area virtually via... Agent: Sughrue Mion, PLLC

20100205394 - Semiconductor storage device and control method thereof: When an address indicating an access destination of a data storing unit, and a command indicating a content of a process for the address are input, block information corresponding to the input address is output from an information holding unit. Whether or not to execute the command for the address... Agent: Staas & Halsey LLP

20100205395 - Optimal memory allocation for guested virtual machine(s): Methods and apparatus allocate and adjust memory of a hardware platform hosting a plurality of guest virtual machines. One of the virtual machines is configured as a management domain that determines whether other virtual machines comply with a performance computing policy. If not, an initial amount of memory for the... Agent: King & Schickli, PLLC

20100205396 - Formatting device: A formatting device (200) which formats a memory module in such a manner that delay in updating management information is prevented is a formatting device that formats a memory card (100) including a first recording area (110) and a second recording area (120) having different characteristics, the formatting device including:... Agent: Wenderoth, Lind & Ponack L.L.P.

20100205397 - Method and apparatus for allocating resources in a computer system: Embodiments of the present invention provide a computer system, comprising at least two logical partitions, each partition having allocated computing resources, wherein the computing resources allocated to a first partition include memory storing a file system accessible by processes executing in the first partition; and a partition resource allocator, wherein... Agent: Hewlett-packard Company Intellectual Property Administration

20100199023 - Apparatus and method for managing memory: A memory management method and apparatus are disclosed. The memory management apparatus may compute a remaining storage capacity of a flash memory based on a number of bad blocks in a flash memory or a number of block-erases of each of a plurality of blocks, and may display the computed... Agent: North Star Intellectual Property Law, PC

20100199032 - Enhanced data communication by a non-volatile memory card: A method of transmitting a stream of data bits from a memory card to a host device includes determining, at the memory card, a first number of data lines between the memory card and the host device, from one to a plurality of data lines. If the first number of... Agent: Toler Law Group

20100199021 - Firehose dump of sram write cache data to non-volatile memory using a supercap: A mechanism is provided for firehose dumping modified data in a static random access memory of a hard disk drive to non-volatile memory of the hard disk drive during a power event. Responsive an indication of a power event in the hard disk drive, hard disk drive command processing is... Agent: Ibm Corp. (wip) C/o Walder Intellectual Property Law, P.C.

20100199026 - Flash file system and driving method thereof: The present invention discloses a flash file system and drive method thereof, characterized in that, after reception of an access function, it verifies the parameters in the access function and analyzes the file name of the file to be accessed included therein, then queries the starting position of the file... Agent: Wang Law Firm, Inc.

20100199022 - Information access method with sharing mechanism and computer system: An information access method and a computer system are provided. The computer system includes a system management bus (SMBus), a non-volatile memory, a plurality of hardware devices, a chipset, and a CPU. The hardware devices have a plurality of specific recognition information. The CPU performs a configuration process on the... Agent: J C Patents

20100199019 - Logical memory blocks: The present disclosure includes methods and devices for logical memory blocks. One method for operating a memory device includes receiving a command to operate X pages of the memory device, X being greater than Y, and executing the command by executing multiple subcommands, each subcommand operating on a logical memory... Agent: Brooks, Cameron & Huebsch , PLLC

20100199025 - Memory system and interleaving control method of memory system: A memory system comprising: a plurality of nonvolatile memory areas capable of operating individually; and a memory controller connected to each of the memory areas individually via a ready/busy signal for interleaving an operation in the memory areas by changing a memory area as a target of an operation command,... Agent: Oblon, Spivak, Mcclelland Maier & Neustadt, L.L.P.

20100199024 - Method and apparatus for managing data of flash memory via address mapping: A method of managing data of a flash memory is provided. The method comprises: assigning a logical area of the flash memory as a user block area in which user storage data is stored, and a free block area in which the user storage data is temporarily stored when changing... Agent: Sughrue Mion, PLLC

20100199030 - Method of managing flash memory allocation in an electroni token: The invention is a method of managing flash memory-allocation in an electronic token. Said token has a memory comprising a list area and a managed area. Said managed area comprises allocated spaces and at least one free memory chunk. Said list area comprises at least one valid entry referencing a... Agent: Osha Liang L.L.P.

20100199020 - Non-volatile memory subsystem and a memory controller therefor: In the present invention a non-volatile memory subsystem comprises a non-volatile memory device and a memory controller. The memory controller controls the operation of the non-volatile memory device with the memory controller having a processor for executing computer program instructions for partitioning the non-volatile memory device into a plurality of... Agent: Dla Piper LLP (us )

20100199028 - Non-volatile storage device with forgery-proof permanent storage option:

20100199029 - Storage device, computer system, and data writing method: A storage device that includes a flash memory device providing a storage medium, a cache memory for use with the flash memory device, and a control circuit. In the storage device, based on a write command and provided address information, the control circuit selects either the flash memory device or... Agent: Rader Fishman & Grauer PLLC

20100199031 - System and method for controlling access to a memory device of an electronic device: The invention relates to a system and method for controlling implementation of a command to a NAND memory device. The method comprises: monitoring an input/output (I/O) bus connected to the NAND memory device for an assertion of a write command for the NAND memory device. Upon detection of the write... Agent: Mccarthy Tetrault LLP

20100199027 - System and method of managing indexation of flash memory: The invention is a system of managing indexation of memory. Said system has a microprocessor, and a flash memory. Said flash memory has an indexed area comprising indexed items, and an index that is structured in a plurality of index areas comprising a plurality of entries. Said flash memory comprises... Agent: Buchanan, Ingersoll & Rooney PC

20100199033 - Solid-state drive command grouping: A method and other embodiments associated with solid-state drive command grouping are described. In one embodiment, a first command and a second command are grouped into a command pack, where the first command and the second command do not share a common channel for execution. A solid-state drive is controlled... Agent: Kraguljac & Kalnay, LLC - Marvell

20100199034 - Method and apparatus for address fifo for high bandwidth command/address busses in digital storage system: A method of buffering a data stream in an electronic device using a first-in first-out (FIFO) buffer system wherein a first read latch signal does not change a pointer location of a read pointer. A dynamic random access memory (DRAM) and system are also disclosed in accordance with the invention... Agent: Trask Britt, P.C./ Micron Technology

20100199035 - File server and file management method: A file server achieving sufficient power-saving effect is provided. The file server is capable of operating an on-line storage medium (in a state in which reading/writing can be started immediately in response to a file read/write request) and an off-line storage medium (which has to be started up upon receiving... Agent: Juan Carlos A. Marquez C/o Stites & Harbison PLLC

20100199036 - Systems and methods for block-level management of tiered storage: Acceleration of I/O access to data stored on large storage systems is achieved through multiple tiers of data storage. An array of first storage devices with relatively slow data access rates, such as hard disk drives, is provided along with a smaller number of second storage devices having relatively fast... Agent: Holland & Hart, LLP

20100199037 - Methods and systems for providing translations of data retrieved from a storage system in a cloud computing environment: A method for providing translations of data retrieved from a storage system in a cloud computing environment includes receiving, by an interface object executing on a first physical computing device, a request for provisioning of a virtual storage resource by a storage system. The interface object requests, from a storage... Agent: Choate, Hall & Stewart / Citrix Systems, Inc.

20100199038 - Remote copy method and remote copy system: In a configuration in which it is necessary to transfer data from a first storage system to a third storage system through a storage system between the storage systems, there is a problem that it is inevitable to give an excess logical volume to a second storage system between the... Agent: Mattingly & Malur, P.C.

20100199040 - Storage subsystem and storage system architecture performing storage virtualization and method thereof: A method for generating a virtual volume (VV) in a storage system architecture. The architecture comprises a host and one or more disk array subsystems. Each subsystem comprises a storage controller. One or more of the subsystems comprises a physical storage device (PSD) array. The method comprises the following steps:... Agent: Brian M. Mcinnis

20100199041 - Storage subsystem and storage system architecture performing storage virtualization and method thereof: Method for accessing data in a storage system architecture, the architecture comprises at least one disk array subsystem, comprising the following steps. Provide a SAS for managing a first and a second media extent (ME) the at least one subsystem. Obtain a location index corresponding to a host LBA via... Agent: Brian M. Mcinnis

20100199042 - System and method for secure and reliable multi-cloud data replication: A multi-cloud data replication method includes providing a data replication cluster comprising at least a first host node and at least a first online storage cloud. The first host node is connected to the first online storage cloud via a network and comprises a server, a cloud array application and... Agent: Akc Patents

20100199039 - Systems and methods for optimizing host reads and cache destages in a raid system: In one aspect, a method of a storage adapter controlling a redundant array of independent disks (RAID) may be provided. The method may include examining performance curves of a storage adapter with a write cache, determining if an amount of data entering the write cache of the storage adapter has... Agent: Ibm Corporation, Intellectual Property Law

20100199043 - Methods and mechanisms for proactive memory management: A proactive, resilient and self-tuning memory management system and method that result in actual and perceived performance improvements in memory management, by loading and maintaining data that is likely to be needed into memory, before the data is actually needed. The system includes mechanisms directed towards historical memory usage monitoring,... Agent: Workman Nydegger/microsoft

20100199044 - Interface apparatus, calculation processing apparatus, interface generation apparatus, and circuit generation apparatus: There is provided is an interface apparatus including: a stream converter receiving write-addresses and write-data, storing the received data in a buffer, and sorting the stored write-data in the order of the write-addresses to output the write-data as stream-data; a cache memory storing received stream-data if a load-signal indicates that... Agent: Wolf Greenfield & Sacks, P.C.

20100199045 - Store-to-load forwarding mechanism for processor runahead mode operation: A system and method to optimize runahead operation for a processor without use of a separate explicit runahead cache structure. Rather than simply dropping store instructions in a processor runahead mode, store instructions write their results in an existing processor store queue, although store instructions are not allowed to update... Agent: Dillon & Yudell LLP

20100199047 - Expiring virtual content from a cache in a virtual uninerse: An invention that expires cached virtual content in a virtual universe is provided. In one embodiment, there is an expiration tool, including an identification component configured to identify virtual content associated with an avatar in the virtual universe; an analysis component configured to analyze a behavior of the avatar in... Agent: Keohane & D'alessandro

20100199046 - Method and device for controlling a memory access in a computer system having at least two execution units: A method and device for controlling memory access in a computer system having at least two execution units, a buffer area, in particular a cache memory area being provided for each execution unit, and furthermore a switchover device and a comparison device being provided, the system switching between a performance... Agent: Kenyon & Kenyon LLP

20100199049 - Parameter copying method and parameter copying device: A parameter copying method is applied to a duplex system in which MPU and a main memory are duplicated and duplex operations on a hot standby system are performed. The parameter copying method includes cache reading data in the main memory corresponding to one MPU, cache writing the data read... Agent: Westerman, Hattori, Daniels & Adrian, LLP

20100199048 - Speculative writestream transaction: Embodiments of the present invention provide a system that performs a speculative writestream transaction. The system starts by receiving, at a home node, a writestream ordered (WSO) request to start a WSO transaction from a processing subsystem. The WSO request identifies a cache line to be written during the WSO... Agent: Pvf -- Oracle America, Inc. C/o Park, Vaughan & Fleming LLP

20100199050 - Proactive technique for reducing occurrence of long write service time for a storage device with a write cache: Provided are techniques for introducing a delay in responding to host write requests. A percentage of fullness of a write cache is determined. Based on the determined percentage of fullness of the write cache (f), a low cache threshold (L), alpha (α), and k, an amount of delay to introduce... Agent: Konrad Raynes & Victor, LLP. Attn: Ibm37

20100199051 - Cache coherency in a shared-memory multiprocessor system: A method of making cache memories of a plurality of processors coherent with a shared memory includes one of the processors determining whether an external memory operation is needed for data that is to be maintained coherent. If so, the processor transmits a cache coherency request to a traffic-monitoring device.... Agent: Docket Clerk

20100199052 - Information processing apparatus, execution environment transferring method and program thereof: The information processing device comprises a basic side CPU 100 for executing basic processing and an addition side CPU 200 for executing additional processing, in which a transfer management unit 300 provided on the basic side CPU 100 transfers execution environment data 1000 including constitution information of an execution environment... Agent: Mr. Jackson Chen

20100199053 - Method and apparatus for logical volume management: Systems and methods for consistent logical volume management of the storage subsystem. The present invention guarantees permanent identification data consistency while migrating, mirroring, creating, deleting LU and so on. It prevents the administrator from the change of management.... Agent: Sughrue Mion, PLLC

20100199054 - System and method for improving memory transfer: System and method for performing a high-bandwidth memory copy. Memory transfer instructions allow for copying of data from a first memory location to a second memory location without the use of load and store word instructions thereby achieving a high-bandwidth copy. In one embodiment, the method includes the steps of... Agent: Sterne, Kessler, Goldstein & Fox P.l.l.c.

20100199055 - Information processing system and management device for managing relocation of data based on a change in the characteristics of the data over time: In an information processing system including a computer device, and a storage device storing data used by the computer device, the region in which the data is held is managed in association with a change, over the passage of time in the performance and availability required of the data holding... Agent: Brundidge & Stanger, P.C.

20100199056 - Fractured erase system and method: Efficient and convenient storage systems and methods are presented. In one embodiment, a fractured erase process is performed in which a pre-program process, erase process and soft program process are initiated independently. Memory cells can be pre-programmed and conditioned independent of an erase command. The initiation of the independent pre-programming... Agent: Spansion LLC C/o Murabito , Hao & Barnes LLP

20100199057 - Independent link and bank selection: Provided is a memory system that has a plurality of memory banks and a plurality of link controllers. For each memory bank, there is first switching logic for receiving output for each link controller, and for passing on the output of only one of the link controllers to the memory... Agent: Smart & Biggar P.o. Box 2999, Station D

20100199058 - Data set size tracking and management: Specified data sets may be tracked from creation to end-of-life (e.g., deletion). Between creation and end-of-life, data set storage changes may be recorded (i.e., when additional storage is allocated or when some storage is released). During a subsequent allocation cycle, this information may be used in conjunction with user-specified allocation... Agent: Wong, Cabello, Lutsch, Rutherford & Brucculeri, L.L.P.

20100199059 - Mobile communication device and method for defragging mifare memory: A mobile communication device (1) is connectable to a classic or emulated MIFARE memory (MM) and comprises a MIFARE applications manager (MAM) which parses the MIFARE memory (MM) for parts of the memory being occupied by MIFARE applications and for empty memory spaces between the occupied parts of the memory.... Agent: Nxp, B.v. Nxp Intellectual Property & Licensing

20100199060 - Memory controller, nonvolatile memory module, access module, and nonvolatile memory system: An address management part 125 manages a nonvolatile memory 110 by dividing the memory into a region 110A and a region 110B. When recording plural pieces of contents as in a normal recording, a reading-writing controller 107 writes data to the region 110A in an alternate manner. Furthermore, when recording... Agent: Greenblum & Bernstein, P.L.C

20100199061 - System and method for distributed partitioned library mapping: A system and method of media library access that utilizes distributed mapping of media library partitions. A first controller can be connected to a data transport element of a media library and a second controller can be connected to a media changer of the media library. The first controller can... Agent: SprinkleIPLaw Group

20100199062 - Managing requests of operating systems executing in virtual machines: A coordinator in a computer system receives a request from one of a plurality of operating systems (that coexist in the computer system) to invoke a service of a management routine in the computer system. The plurality of operating systems execute in respective virtual machines of the computer system. The... Agent: Hewlett-packard Company Intellectual Property Administration

20100199063 - Methods and mechanisms for proactive memory management: A proactive, resilient and self-tuning memory management system and method that result in actual and perceived performance improvements in memory management, by loading and maintaining data that is likely to be needed into memory, before the data is actually needed. The system includes mechanisms directed towards historical memory usage monitoring,... Agent: Workman Nydegger/microsoft

20100199064 - Fast address translation for linear and circular modes: The core of this invention is the application of a fast comparison circuit to the problem of address translation. Traditional implementations generate the virtual address and the physical address in series. This invention generates the physical address and virtual address simultaneously. A bitwise operation on the base address, the offset... Agent: Texas Instruments Incorporated

20100199065 - Methods and apparatus for performing efficient data deduplication by metadata grouping: The system is composed of: identifier generation program or logic, identifier confirm program or logic, plural identifier table and metadata mapping table. Data streams or data blocks, files are stored in the data storage system with metadata. The metadata includes additional information of the data and files. For example application,... Agent: Sughrue Mion, PLLC

20100199066 - Generating a log-log hash-based hierarchical data structure associated with a plurality of known arbitrary-length bit strings used for detecting whether an arbitrary-length bit string input matches one of a plurality of known arbitrary-length bit strings: Generating and using a high-speed, scalable and easily updateable data structures are described. The proposed data structure provides minimal perfect hashing functionality while intrinsically supporting low-cost set-membership queries. In other words, in some embodiments, it provides at most one match candidate in a set of known arbitrary-length bit strings that... Agent: Straub & Pokotylo